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IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 25, NO.

1, MARCH 2010 1
Dead Time Compensation Method
for Voltage-Fed PWM Inverter
Seon-Hwan Hwang, Student Member, IEEE, and Jang-Mok Kim, Member, IEEE
AbstractA new dead time compensation method for a
pulsewidth modulation (PWM) inverter is proposed. In the PWM
inverter, voltage distortion due to the dead time effects produces
fth and seventh harmonics in the phase currents of the stationary
reference frame, and a sixth harmonic in the d- and q-axis currents
of the synchronous reference frame, respectively. In this paper, the
sixth harmonic of the integrator output of the synchronous d-axis
proportionalintegral (PI) current regulator is used to compensate
the output voltage distortion due to the dead time effects, since the
integrator output has ripple corresponding to six times the stator
fundamental frequency. The proposed method can be easily im-
plemented by feedforwardly adding compensation voltages to the
output reference voltage of the synchronous PI current regulator.
The proposed method, therefore, has some signicant advantages
such as simple implementation without additional hardware, easy
mathematical computation, no ofine experimental measurements,
and application in both the steady state and the transient state. The
validity of the proposed compensation algorithm is shown through
several experiments.
Index TermsDead time effects, integrator output of the syn-
chronous d-axis proportionalintegral (PI) current regulator, sixth
harmonic, voltage distortion.
I. INTRODUCTION
P
ULSEWIDTH modulation (PWM) inverters have widely
been used in adjustable speed motor drives. However, these
inverters produce voltage distortion caused by the nonlinear
characteristics of switching devices such as dead time, turn-
ON/turn-OFF time, and voltage drop of switches and diodes. The
most signicant nonlinearity is represented by the dead time
to avoid short circuit of inverter legs. Turn-ON/OFF time and
voltage drop inevitably exist in practical devices. To solve the
nonlinear characteristics of the inverter, various solutions have
already been suggested [1][15]. In most cases, compensation
techniques are based on an average value theory where the lost
voltseconds are averaged over an entire cycle and added vecto-
rially to the voltage reference [1], [2]. A pulse-based compensa-
tion method has been proposed in [3], wherein the compensation
is realized for each PWM pulse. These methods are dependent
on the polarity of the phase currents [1][3]. In [4][8], the
methods are based on a feedforward method, where the com-
pensated voltages are fed to the reference voltages in order to
generate a modied voltage. The compensation voltages in [5]
Manuscript received February 14, 2009; revised June 24, 2009. First pub-
lished November 3, 2009; current version published February 17, 2010. Paper
no. TEC-00066-2009.
The authors are with the Department of Electrical Engineering, Pusan Na-
tional University, Busan 609-735, Korea (e-mail: jmok@pusan.ac.kr).
Color versions of one or more of the gures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identier 10.1109/TEC.2009.2031811
are calculated by using the dead time, switching period, current
command, and dc-link voltage. This approach can compensate
the fundamental and harmonic components of the voltage error
in the d- and q-axis frame. In the calculation of the compensat-
ing signals, nonlinear characteristics of the switching devices
such as nite switching times and voltage drops are also con-
sidered in [4][8]. However, these methods can be implemented
only by ofine methods because the switching times and voltage
drops of switching devices and diodes are varied with operating
conditions such as dc-link voltage, phase currents, and motor
speed. Thus, it is difcult to accurately compensate for the dead
time effects by ofine methods. The other methods adjust the
switching frequency and PWMaccording to the operation condi-
tions [9], [10]. However, these approaches require an additional
hardware and lot of efforts to determine the stable parameter
set. Accordingly, online methods are proposed in [11][15].
The method in [11] needs the additional computational burden
to determine the phase angle of currents and set up a lookup
table. These methods are proposed in [12] and [13] for the dead
time compensation strategy using disturbance observer for per-
manent magnet synchronous motor (PMSM) drive. Therefore,
it is necessary to tune parameters such as observer gains and
load conditions. In [14], this method is based on an emerging
learning technique called by support vector regression (SVR).
It is difcult to implement SVR model method requiring some
parameters, online computation, and extra memory to construct
the regression function.
In this paper, a new dead time compensation method using
the integrator output of the synchronous d-axis proportional
integral (PI) current regulator is proposed. The proposed com-
pensation algorithm does not require any additional hardware,
complicated mathematical calculations, or ofine experimen-
tal measurements. Moreover, this method can be easily imple-
mented in both the steady state and the transient state because the
d-axis reference current is usually constant or zero in the ac drive
systems. Therefore, the integrator output of the synchronous d-
axis PI current regulator is nearly constant and stable for the
input signal of the proposed dead time compensator at all oper-
ating conditions. The proposed algorithm can be used only for
vector-controlled motor drives in which current control loop is
employed. The experimental results show the effectiveness of
the proposed compensation algorithm.
II. ANALYSIS OF DEAD TIME EFFECTS
A. Dead Time Effects in the PWM Inverter
The typical three-phase PWM inverter with a PMSM load
is shown in Fig. 1(a). Since a switching device has a nite
switching time, the dead time should be considered in the PWM
0885-8969/$26.00 2009 IEEE

2 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 25, NO. 1, MARCH 2010
Fig. 1. PMSM drive system. (a) Three-phase PWM inverter with a PMSM
load. (b) Basic conguration of one phase leg of the PWM inverter during the
dead time.
gating signals in order to prevent the simultaneous conduction
of two switching devices in the same leg. Although the dead
time is very short, it causes performance degradation.
Fig. 1(b) shows one phase leg of the PWM inverter. It is
convenient to analyze the dead time effects from one phase leg
of the PWM inverter and extend the results to the other phase
legs. During the dead time T
d
, both of the switching devices
in Fig. 1(b) cease to conduct, and one of the diodes conducts.
If the current polarity is positive, the lower diode will conduct.
Otherwise, the upper diode will conduct. Therefore, the output
voltage depends on the direction of the a-phase current i
as
, as
shown in Fig. 1(b).
The zero-current clamping effects and nonideal characteris-
tics such as voltage drops and parasitic capacitance in switching
devices are not considered, and are beyond the scope of this
paper [14][16]. Therefore, the switching patterns and output
voltages are shown in Fig. 2 [2][4], [12]. In practice, because
of the nite turn-ON/turn-OFF time associated with any type of
switch devices, a switch is turned off at the instant of the switch-
ing time determined in Fig. 2(a). However, the turn-ON of the
other switch in the inverter leg is delayed by the dead time T
d
.
The gating signals for the two switches in the presence of a dead
time are shown in Fig. 2(b). The voltage distortion caused by the
dead time and turn-ON/turn-OFF time is shown in Fig. 2(d) and
(e) according to the direction of the a-phase current. FromFig. 2,
the average distorted voltage V according to the direction of
the a-phase current i
as
can be represented as [4], [12]
V =
T
d
t
ON
+ t
OFF
2T
s
V
dc
, i
as
> 0 (1)
V =
T
d
+ t
ON
t
OFF
2T
s
V
dc
, i
as
< 0 (2)
where T
s
, t
ON
, and t
OFF
are the sampling period of the current
Fig. 2. Switching patterns and output voltages. (a) Ideal gating pattern.
(b) Real gating pattern with dead time. (c) Ideal pole voltage. (d) Real pole
voltage (i
as
> 0). (e) Real pole voltage (i
as
< 0).
regulator, turn-ON time, and turn-OFF time, respectively.
The average distorted voltages of three phases may be ex-
pressed according to the direction of the respective three-phase
currents as [4]
v

as
=
T
d
t
ON
+ t
OFF
2T
s
V
dc

2 sign(i
as
) sign(i
bs
) sign(i
cs
)
3

bs
=
T
d
t
ON
+ t
OFF
2T
s
V
dc

2 sign(i
bs
) sign(i
cs
) sign(i
as
)
3

cs
=
T
d
t
ON
+ t
OFF
2T
s
V
dc

2 sign(i
cs
) sign(i
as
) sign(i
bs
)
3

(3)
where
sign(i
as
) =

1, i
as
> 0
1, i
as
< 0
.
v

as
, v

bs
, and v

cs
are the average distorted voltages of three
phases, respectively.
Fig. 3 shows the three-phase currents and the distorted a-
phase voltage of the six-step waveform that is based on (3).
The distorted voltages and the dq-axes currents of the station-
ary reference frame are shown in Fig. 4. Note that the distorted
voltages are 180

out of phase with the phase currents. In Fig. 4,


the distorted d- and q-axis voltages can be derived by taking the

HWANG AND KIM: DEAD TIME COMPENSATION METHOD FOR VOLTAGE-FED PWM INVERTER 3
Fig. 3. Three-phase currents and the distorted a-phase voltage in the PWM
inverter.
Fig. 4. Distorted voltages and dq-axes currents of the stationary reference
frame.
Fourier series as follows:
v
s

ds
=
4

sin
e
t +
1
5
sin 5
e
t +
1
7
sin 7
e
t
+
1
11
sin 11
e
t +
1
13
sin 13
e
t +

(4)
v
s

qs
=
4

cos
e
t +
1
5
cos 5
e
t
1
7
cos 7
e
t
+
1
11
cos 11
e
t
1
13
cos 13
e
t +

. (5)
Considering a balanced three-phase load, the distorted d-and
q-axis currents i
s

ds
and i
s

qs
of the stationary reference frame can
be expressed as [6]
i
s

ds
=
4

V
Z
L

sin(
e
t ) +
1
5
sin 5(
e
t )
+
1
7
sin 7(
e
t )

+
4

V
Z
L

1
11
sin 11(
e
t )
+
1
13
sin 13(
e
t ) +

(6)
i
s

qs
=
4

V
Z
L

cos(
e
t ) +
1
5
cos 5(
e
t )

1
7
cos 7(
e
t )

+
4

V
Z
L

1
11
cos 11(
e
t )

1
13
cos 13(
e
t ) +

(7)
where Z
L
and are the load impedance and the load impedance
angle, respectively.
From (4) and (5), the distorted voltages of the synchronous
reference frame v
e

ds
and v
e

qs
can be obtained as
v
e

ds
=
4

12
35
sin 6
e
t +
24
143
sin 12
e
t +

(8)
v
e

qs
=
4

1 +
2
35
cos 6
e
t +
2
143
cos 12
e
t +

.
(9)
Therefore, the distorted d- and q- axis currents i
e

ds
and i
e

qs
in
the synchronous reference frame can be rewritten as follows:
i
e

ds
=
4V

12
35Z
6
sin(6
e
t
6
)
+
24
143Z
12
sin(12
e
t
12
)

(10)
i
e

qs
=
4V

1
R
s
+
2
35Z
6
cos(6
e
t
6
)
+
2
143Z
12
cos(12
e
t
12
)

(11)
where
Z
k
= |R
s
+ jk
e
L
s
| =

R
2
s
+ (k
e
L
s
)
2

k
= tan
1
k
e
L
s
R
s
, (k = 6, 12, . . .)
R
s
is the stator resistance, and L
s
is the stator self-inductance
of PMSM.
In (10) and (11), the distorted d- and q-axis currents of the
synchronous reference frame contain the 6th, 12th, and high-
order harmonic components due to the dead time effects. The
dominant harmonic component is the sixth harmonic, as shown
in (10) and (11).
III. PROPOSED DEAD TIME COMPENSATION METHOD
A. Processing the Integral Output of the Synchronous d-axis PI
Current Regulator for Dead Time Compensation
Fig. 5 shows a block diagram of the synchronous d-axis PI
current regulator with the proposed dead time compensator. In
Fig. 5, i
e
ds
is the d-axis reference current, v
e
ds
is the d-axis ref-
erence voltage, v
e

ds
is the d-axis distorted voltage caused by the
dead time effects, and v
e
ds com
and v
e
qs com
are the compensation
voltages calculated by the proposed dead time compensator. The
variable v
e
ds integ
is the output of the integral of the synchronous
d-axis PI current regulator and v
e
ds
is the feedforward d-axis
voltage term of the synchronous PI current regulator, as shown
in Fig. 5.

4 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 25, NO. 1, MARCH 2010
Fig. 5. Block diagram of the synchronous d-axis PI current regulator with the
proposed dead time compensator.
As mentioned previously, the dead time effects mainly pro-
duce the fth and seventh harmonic components in the dq-axes
currents of the stationary reference frame. Consequently, these
main harmonics appear in the 6th and 12th harmonic compo-
nents of d- and q-axis currents of the synchronous reference
frame, as shown in (10) and (11). The integrator output of the
synchronous d-axis PI current regulator is used for the input sig-
nal of the proposed dead time compensator in this paper. This is
because the d-axis reference current is usually constant or zero
in ac drive systems so that the output signal of the synchronous
d-axis PI current regulator is nearly constant and stable for the
dead time compensation at all operating conditions. In addition,
the 6th harmonic component of the d-axis current is about six
times larger than the q-axis current in the synchronous refer-
ence frame, as shown in (10) and (11). Therefore, the integrator
output of the synchronous d-axis PI current regulator can be
derived as [17]
v
e
ds integ
= K
i

t
0
(i
e
ds
i
e
ds
)dt = K
i

t
0
(i
e
ds
i
e

ds
)dt.
(12)
For convenience, only the 6th harmonic of the d-axis current is
derived and considered temporarily because the 12th harmonic
component is too small to affect system performance compared
to the 6th harmonic, as shown in (10). The resulting signal of the
integrator output of the synchronous d-axis PI current regulator
can be acquired in (13) by inserting (10) into (12) as
v
e
ds integ
= K
i

t
0
(i
e
ds err
)dt
= K
i
4V

t
0

12
35Z
6
sin(6
e
t
6
)

dt
= K
i
4

V
Z
6
2
35
e
{cos 6
e
t(cos
6
)
+ sin 6
e
t(sin
6
)}. (13)
From (13), the integrator output can be rearranged only for
mathematical simplication, as in (14). As stated earlier, (14) is
composed of sine and cosine waveforms that have six times the
Fig. 6. Integrating the sixth harmonic of the synchronous d-axis PI current
regulator. (a) Integration of the integrator output about sine waveform. (b)
Integration of the integrator output about cosine waveform.
stator fundamental frequency
v
e
ds integ
= K
1
cos 6
e
t + K
2
sin 6
e
t (14)
where
K
1
= K
i
4

V
Z
6
2
35
e
(cos
6
)
K
2
= K
i
4

V
Z
6
2
35
e
(sin
6
).
B. Proposed Dead Time Compensation Method
From (14), the dead time effects cause the integrator out-
put of the synchronous d-axis PI current regulator to generate
successive sine and cosine waveforms at six times the stator
fundamental frequency. Therefore, the dead time effects can be
compensated by reducing and suppressing the harmonic com-
ponents of the integrator output of the current regulator.
Fig. 6 shows the integral operation of the sine and cosine
waveforms about the integrator output of the synchronous d-
axis PI current regulator according to the rotor position between
0 and /3, respectively. From Fig. 6, the magnitude of the sixth
harmonic can be detected by using integral operation with rotor
position. In Fig. 6, secI, secII, secIII, and secIV are the integral
sections between 0 and /3 according to the rotor position.
Also, Integ1, Integ2, Integ3, and Integ4 are the integral results
of each integral section.
In order to extract the magnitude of sixth harmonic com-
ponent from Fig. 6, two steps must be taken. First, the sine
waveform of the integrator output can be divided into secI and

HWANG AND KIM: DEAD TIME COMPENSATION METHOD FOR VOLTAGE-FED PWM INVERTER 5
Fig. 7. Block diagram of the proposed dead time compensation algorithm.
secII, as shown in Fig. 6(a). Integ1 can be acquired by integrat-
ing sin 6
e
of secI between 0 and /6, as shown in (15), and
Integ2 can be obtained by integrating sin 6
e
of secII between
/6 and /3, as shown in (16)
Integ1 =

/6
0
(v
e
ds integ
)d
e
=

/6
0
K
2
sin 6
e
d
e
=
K
2
3
(15)
Integ2 =

/3
/6
(v
e
ds integ
)d
e
=

/3
/6
K
2
sin 6
e
d
e
=
K
2
3
(16)
where

e
=
e
t.
The process of the rst step has the function of automatically
removing the cosine term by the integrating operation in (15)
and (16), respectively. By subtracting Integ2 from Integ1, as
in (17), the difference
1
between secI and secII reects the
amplitude of the sine term K
2
in (14)

1
= Integ1 Integ2 = 2
K
2
3
. (17)
Second, the cosine term in (14) can be divided into secIII
and secIV, as shown in Fig. 6(b). Integ3 can be acquired by
integrating cos 6
e
of secIII between 0 and /12, and Integ4
can be calculated by integrating cos 6
e
of secIV between /12
and /6, respectively as
Integ3 =

/12
0
(v
e
ds integ
)d
e
=

/12
0
K
1
cos 6
e
d
e
=
K
1
6
(18)
Integ4 =

/6
/12
(v
e
ds integ
)d
e
=

/6
/12
K
1
cos 6
e
d
e
=
K
1
6
. (19)
The difference
2
between secIII and secIV reects the am-
plitude of the cosine term, K
1
in (14) as

2
= Integ3 Integ4 =
K
1
3
. (20)
The summation
sum
of
1
and
2
is given as

sum
=
1
+
2
= 2
K
2
3
+
K
1
3
. (21)
The sixth harmonic component due to the dead time effects
can be compensated by making
sum
zero.
C. Implementation of the Proposed Compensation Method
Fig. 7 shows the block diagram of the proposed dead time
compensation algorithm. The part of the proposed dead time
compensator is indicated by dashed block. The detailed com-
pensation process is shown in the dashed block. The compen-
sation voltages, as shown in Fig. 7, are achieved by adding the
amplitude of the 6th and 12th harmonic components to the out-
put reference voltage of the d- and q-axis current regulators. The
magnitude of the compensation voltages K
com
can be acquired
by using the integral (I) controller with an integral gain K
icomp
and a limiter, as shown in Fig. 7. In addition, the integral con-
troller of the dead time compensator forces
sum
to be zero. The
integral (I) controller has a memory function to store the magni-
tude of the compensation voltages K
com
, which is used in (22)
and (23) to get voltages v
e
ds com
and v
e
qs com
. Moreover, these
voltages are added to the output voltages of the synchronous PI
current regulator, respectively, as shown in Fig. 7.

6 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 25, NO. 1, MARCH 2010
In the proposed algorithm, the nal d- and q-axis output volt-
ages of the dead time compensator are composed of the follow-
ing equations, as shown in Fig. 7
v
e
ds com
= K
com

12
35
sin 6
e
t
24
143
sin 12
e
t

(22)
v
e
qs com
= K
com

2
35
cos 6
e
t
2
143
cos 12
e
t

. (23)
Unlike (8), the rst term of (9) is compensated by the inte-
gration part of the PI current regulator, which accounts for zero
steady-state error of dc term.
In the proposed compensation algorithm, since the integrator
output of the synchronous d-axis current regulator is used to
compensate the dead time effects, both the bandwidth of the
current regulator and the integral gain K
icomp
of the dead time
compensator affect the performance of the dead time compensa-
tion. If K
icomp
is large, the response of the proposed compen-
sator is quicker, but there are ripples in the output voltages of
the proposed dead time compensator. However, when the small
integral gain K
icomp
is given, the operation of the proposed
compensator can be completed with the slowresponse and more
accuracy. The integral gain K
icomp
can be experimentally ob-
tained according to the change of the bandwidth of the current
regulator. For example, in the high-bandwidth current regulator,
K
icomp
will be decreased for stable compensation operation.
In this paper, K
icomp
= 1 is chosen for stable and precise
operation of the proposed dead time compensator.
IV. EXPERIMENTAL RESULTS
The proposed compensation method was implemented with
a PMSM drive system whose parameters are given in Table I in
the Appendix. The sampling period of the current regulator is
100 s. The PWM switching frequency is 5 kHz [18]. The dead
time is congured at 3.5 s, and turn-ON/turn-OFF times of the
switching devices are 0.82.0 and 2.02.9 s, respectively [19].
The proposed algorithm was performed by a DSP board with
a TMS320VC33 and eld-programmable gate array (FPGA,
EPF10K30A).
The several experiments are carried out in the steady state
with different sampling periods of the current regulator and
in the transient state by load step change. In Figs. 811, the
motor was operated at 5 Hz (75 r/min) stator frequency. For the
experiments, the 6th and 12th harmonic components in the d-
and q-axis currents are compensated using (22) and (23) under
its given conditions.
Figs. 8 and 9 show the experimental waveforms without and
with the dead time compensation when the motor operates at
75 r/min at no load. In Fig. 8(a), the xy plot displays hexagonal
rather than circular waveforms. The dq-axes currents of the
stationary reference frame with the distorted waveforms are
shown in Fig. 8(b). The dq-axes currents of the synchronous
reference frame have the 6th and 12th harmonic components,
as shown in Fig. 8(c). The fast Fourier transform (FFT) results
in Fig. 8(c) show the magnitude difference of the harmonic
Fig. 8. Current waveforms without the dead time compensation under no load
(75 r/min), sampling period of current regulator (100 s). (a) xy plot of d-
and q-axis currents. (b) Current waveforms of the stationary reference frame.
(c) Current waveforms of the synchronous reference frame and FFT results.
components in the d- and q-axis currents of the synchronous
reference frame. Therefore, it is useful to use the d-axis current
of the synchronous d-axis PI current regulator for the dead time
compensation, as shown in Fig. 5.
After the dead time compensation, the phase currents have
nearly sinusoidal waveforms, as shown in Fig. 9(a) and (b).
Moreover, the d- and q-axis current ripples considerably de-
creased due to the proposed compensation method, as shown in
Fig. 9(c).
The proposed compensation method may be inuenced by
the sampling period of the current regulator with respect to the
accuracy of the integrals in (15), (16), (18), and (19). Therefore,
Figs. 10 and 11 showthe experimental results when the sampling
period of the current regulator is changed from 100 to 50 s.

HWANG AND KIM: DEAD TIME COMPENSATION METHOD FOR VOLTAGE-FED PWM INVERTER 7
Fig. 9. Current waveforms with the dead time compensation under no load
(75 r/min), sampling period of current regulator (100 s). (a) xy plot of
d-and q-axis currents. (b) Current waveforms of the stationary reference frame.
(c) Current waveforms of the synchronous reference frame and FFT results.
Fig. 10 shows the experimental waveforms without the dead
time compensation. In Fig. 10(a) and (b), the d- and q-axis
currents of the stationary reference frame show the distorted
waveforms. The d- and q-axis currents of the synchronous ref-
erence frame have the dominant 6th and 12th harmonics, as
shown in Fig. 10(c). If the sampling period of the current regu-
lator decreases, the distortion of the phase currents increases a
little at low-speed range, as in (3).
In Fig. 11, the d- and q-axis current waveforms of the sta-
tionary and synchronous reference frame are shown in the case
of the proposed compensation algorithm. As seen in Fig. 11(a)
and (b), the dq-axes currents of the stationary reference frame
are nearly sinusoidal waveforms and the xy plot displays al-
most circular waveforms. The ripple components of the d- and
Fig. 10. Current waveforms without the dead time compensation under no
load (75 r/min), sampling period of current regulator (50 s). (a) xy plot of
d- and q-axis currents. (b) Current waveforms of the stationary reference frame.
(c) Current waveforms of the synchronous reference frame and FFT results.
q-axis currents are also signicantly reduced by the proposed
algorithm, as shown in Fig. 11(c).
From Figs. 811, the experimental results show that the dead
time effects can be effectively compensated by the proposed al-
gorithmdespite the change of the sampling period of the current
regulator.
Figs. 12 and 13 show the experiment results to compare
the proposed method with another method that uses direct
pulsewidth compensation with current measurement [5]. In
Figs. 12 and 13, the phase current and FFT results show the
experimental waveforms when the motor is operated at steady

8 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 25, NO. 1, MARCH 2010
Fig. 11. Current waveforms with the dead time compensation under no load
(75 r/min), sampling period of current regulator (50 s). (a) xy plot of d-
and q-axis currents. (b) Current waveforms of the stationary reference frame.
(c) Current waveforms of the synchronous reference frame and FFT results.
state of 8 Hz (120 r/min). The d- and q-axis currents, i
s
ds
and
i
s
qs
in the stationary reference frame, are less distorted by the
proposed scheme, as shown in Fig. 12(c), than in the no dead
time compensation or in the ofine compensation method, as
shown in Fig. 12(a) and (b), respectively.
Moreover, the d- and q-axis currents, i
e
ds
and i
e
qs
in the syn-
chronous reference frame, have the 6th and 12th harmonics
without the dead time compensation, as shown in Fig. 13(a). In
Fig. 13(b), the dq axis currents and FFT results show almost
the reduced current harmonics by ofine method [5]. As can be
seen in Fig. 13 (b), the d-axis current ripple considerably existed
Fig. 12. Current waveforms under no load (120 r/min), sampling period of
current regulator (100 s). (a) Without dead time compensation. (b) With dead
time compensation using [5]. (c) With dead time compensation using proposed
method.
after compensating the dead time. However, the proposed com-
pensation method nearly removed the 6th and 12th harmonics,
as shown in Fig. 13(c).
Fig. 14 shows the speed waveform, d- and q-axis currents,
and a-phase current during a step load torque of 2.7 Nm. The
load is generated from another PMSM that operates at torque
control mode, and applied to PMSM for the test of the tran-
sient. In Fig. 14(b), the proposed algorithm is slowly decreasing
the ripple of the d-axis current by adjusting the integral gain

HWANG AND KIM: DEAD TIME COMPENSATION METHOD FOR VOLTAGE-FED PWM INVERTER 9
Fig. 13. Current waveforms and FFT results under no load (120 r/min), sam-
pling period of current regulator (100 s). (a) Without dead time compensation.
(b) With dead time compensation using [5]. (c) With dead time compensation
using proposed method.
K
icomp
, as shown in Fig. 7. In the experimental results, the
dead time effects can be compensated by the proposed algorithm
without the degradation of the control performance in both tran-
sient and steady states, as shown in Fig. 14. Due to the function
of the limiter to suppress the excessive components during the
transient, as shown in Fig. 7, the proposed compensation algo-
rithmcan work for the compensation at all operation conditions.
Therefore, the proposed dead time compensation method shows
Fig. 14. Experimental results under the transient state (75 r/min, 2.7 Nm),
sampling period of current regulator (100 s). (a) Without the dead time com-
pensation. (b) Process of the dead time compensation. (c) With the dead time
compensation.
a good dynamic performance in the transient state, as shown in
Fig. 14.
V. CONCLUSION
In this paper, a newdead time compensation algorithmis pro-
posed by using the integrator output of the synchronous d-axis
PI current regulator as the input signal of the dead time com-
pensator. Moreover, the integral operation according to the rotor

10 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 25, NO. 1, MARCH 2010
position is used to detect the dominant harmonic components of
the integrator output of the synchronous d-axis PI current reg-
ulator. The proposed algorithm does not require any additional
hardware, excessive computation time, or ofine experimental
measurements. This algorithm can be easily implemented and
applied both in the steady state and transient state. Experimen-
tal results verify the effectiveness of the proposed compensation
algorithm.
APPENDIX
TABLE I
PARAMETERS OF PMSM
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Seon-HwanHwang (S07) was born in Cheongyang,
Korea, in 1978. He received the B.S. and M.S. de-
grees in electrical engineering in 2004 and 2006, re-
spectively, from Pusan National University, Busan,
Korea, where he is currently working toward the
Ph.D. degree.
His current research interests include the control
of the electric machine drives and renewable energy.
Jang-Mok Kim (M03) was born in Busan, Korea,
in August 1961. He received the B.S. degree from
Pusan National University (PNU), Busan, in 1988,
and the M.S. and Ph.D. degrees from the Department
of Electrical Engineering, Seoul National University,
Seoul, Korea, in 1991 and 1996, respectively.
From 1997 to 2000, he was a Senior Research
Engineer with Korea Electrical Power Research In-
stitute. Since 2001, he has been with the Department
of Electrical Engineering, PNU, where he is currently
a Faculty and a Research Member in the Research In-
stitute of Computer Information and Communication. His research interests
include the control of the electric machines, electric vehicle propulsion, and
power quality.