Lecture 2 Long Channel Model

R. Dutton, B. Murmann Stanford University

R. Dutton, B. Murmann

EE114 (HO #5)

Basic MOS Operation (1)

0V VD (>0V)

0V

0V

With zero voltage at the gate, device is "off" Back-to-back reverse biased pn junctions
R. Dutton, B. Murmann EE114 (HO #5) 2

Basic MOS Operation (2)

>0

With a positive gate bias applied, electrons are pulled toward the positive gate electrode Given a large enough bias, the electrons start to "invert" the surface (pn); a conductive channel forms Magic "threshold voltage" Vt (more later)
R. Dutton, B. Murmann EE114 (HO #5) 3

Basic Operation (3)

>0

ID=?

VDS>0

If we now apply a positive drain voltage, current will flow How can we calculate this current as a function of VGS, VDS?

R. Dutton, B. Murmann

EE114 (HO #5)

Assumptions
>0 VDS>0

1) Current is controlled by the mobile charge in the channel. This is a very good approximation. 2) ) "Gradual Channel Assumption" p - The vertical field sets channel charge, g so we can approximate the available mobile charge through the voltage difference between the gate and the channel 3) The last and worst assumption (we will fix it later) is that the carrier velocity is proportional to lateral field ( = E). This is equivalent to Ohm's law: velocity (current) is proportional to E-field (voltage)
R. Dutton, B. Murmann EE114 (HO #5) 5

First Order IV Characteristics (1)

What we know:
Qn ( y ) = Cox [VGS V ( y ) Vt ]

I D = Qn v W
v = E

I D = Cox [VGS V ( y ) Vt ] E W
R. Dutton, B. Murmann EE114 (HO #5) 6

First Order IV Characteristics (2)

I D = Cox [VGS V ( y ) Vt ] E W

E=

I D dy = WCox [VGS V ( y ) Vt ] dV
I D dy = WCox [VGS V ( y ) Vt ] dV
0 0 L VDS

dV ( y ) dy

I D = Cox

W L

V (VGS Vt ) DS VDS 2

For VDS/2 << VGS-Vt, this looks a lot like a linear resistor: I=1/R V Lets plot this IV relationship...

R. Dutton, B. Murmann

EE114 (HO #5)

Plot of First Order IV Curves

ID

VGS-Vt VDS

Something is wrong here... Current should never decrease with increasing VDS What happens when VDS>VGS-Vt? VGD = VGS-VDS becomes less than Vt, i.e. no more channel or "pinch off"

R. Dutton, B. Murmann

EE114 (HO #5)

Pinch-Off
VGS + + VDS

Qn(y), V(y) y y=0

y=L

Voltage at the end of channel Is fixed at VGS-Vt

Effective voltage across channel is VGS - Vt After channel charge goes to 0, there is a high lateral field that sweeps the carriers to the drain*, and drops the extra voltage (this is a depletion region of the drain junction)

*It is important to remember what a reverse biased PN junction does to minority carriers.
Electrons (in the p-type material) get swept back into the n-region
R. Dutton, B. Murmann EE114 (HO #5) 9

To first order, current becomes independent of VDS

Modified Plot and Equations

Triode Region Active Region

ID

VGS-Vt VDS

Triode Region: g

I D = Cox

V W (VGS Vt ) DS VDS L 2

Active Region:

I D = Cox

W L

1 W (VGS Vt ) (VGS Vt ) (VGS Vt ) = Cox (VGS Vt ) 2 2 L 2

R. Dutton, B. Murmann

EE114 (HO #5)

10

First-Order MOS Model Summary

VDS
1 W I D Cox (VGS Vt )2 2 L

"VCCS"

SATURATION VGS-Vt TRIODE

I D Cox W L (VGS Vt ) VDS VDS 2

VGS

Vt

R. Dutton, B. Murmann

EE114 (HO #5)

11

Model Limitations (1)

The above equations constitute the most basic MOS IV model "Long channel model", "quadratic model", "low field model" U Unfortunately f t t l this thi model d ld doesn't 't d describe ib modern d MOSFETS accurately Pushing towards extremely small geometries has resulted in very high electric fields
Some of the assumptions on slide 5 become invalid

Around VGS=Vt the device physics become very complex, and our simply derivation also loses accuracy
In EE114, we restrict VGS Vt + 150mV to avoid pitfalls f due to non-physical model behavior around this region (more later)

R. Dutton, B. Murmann

EE114 (HO #5)

12

Model Limitations (2)

Key point: We will NOT treat Sub-Threshold behavior in EE114. Below Vt current does NOT go to zero. It does however fall of exponentially with VGS<Vt. For ultralow-power circuits this can be a good thing, but Design equations are messy in the transition region We want you to be able to easily get the right answers, ones that you fully understand, before doing more complex modeling (either sub-threshold or 2nd/3rd-order MOS models above Vt)
R. Dutton, B. Murmann EE114 (HO #5) 13

Model Limitations (3)

Despite its shortcomings in terms of accuracy, we will use this simple model in EE114 to develop basic circuit intuition Important p to note that working g with a more complicated p and accurate model changes only the numbers, not the fundamental design tradeoffs and considerations Lets look at some examples of our model (so far) and parameter dependencies

R. Dutton, B. Murmann

EE114 (HO #5)

14

(Simplified) MOS Level 1 Equations (Saturation)

I DS =

KP W 2 (VGS Vt ) (1 + VDS ) 2 Leff

Vt = VTO + 2 VBS 2
' KP COX

SPICE P Parameter Names: t N VTO TOX KP LAMBDA () GAMMA () PHI (2)

GAMMA = 2kT N bulk 2 = ln ni q

' COX =

2 S qN bulk ' COX

Leff=Lmask Leff = Lmask 2 X J lateral

R. Dutton, B. Murmann

OX tOX

Ignore XJ-lateral

EE114 (HO #5)

15

IDS-VDS Plots*-- Where is the Saturation Region?

Effect of changes in VTO

*These plots are for an old (obsolete) technology; but, they illustrate key modeling points
R. Dutton, B. Murmann EE114 (HO #5) 16

Linear region (small VDS, before Saturation)

R. Dutton, B. Murmann

EE114 (HO #5)

17

IDS-VDS Plot -- Effect of KP

R. Dutton, B. Murmann

EE114 (HO #5)

18

Linear Region and KP Dependence

Comment: These are TECHNOLOGY Parameters. The fab guys set them and as a designer you dont mess with them

KP = 1t OX
R. Dutton, B. Murmann EE114 (HO #5)

OX
tOX

19

Effect of Oxide Thickness on Vt

R. Dutton, B. Murmann

EE114 (HO #5)

20

10

Effect of Oxide Thickness on I-V

R. Dutton, B. Murmann

EE114 (HO #5)

21

Summary Comments about Parameters

(can you change it ??) Design Parameters W (always) L (most of the time*, yes) VGS-Vt (always) versus Technology Parameters Vt (only with VBSnot yet!) tox (never)-->Cox (never) (never) KP (neverper above)
*for very advance digital MOS processes if you vary L it changes Vt. We will IGNORE this effect
R. Dutton, B. Murmann EE114 (HO #5) 22

11

P-Channel MOSFET
VGS<0
G D

VDD VDS<0 ID
Sometimes the notation g gets confusing and math can also be messy (minus signs all over the place) One easy fix is to use the NChannel equations and simply use VSG and VSD as positive potentials. Also Vt=|V | tP| (they obviously must be positive since the source potential is at the highest valueVDD)
EE114 (HO #5) 23

G D S

P+ N-type (well)
R. Dutton, B. Murmann

P+

12