Fundamental of Boost Converter

Among the dc-dc power converters, boost converter topology is used to step-up the input voltage. Depending upon the conversion ratio, the output voltage is either equal to the input or higher than the input. Fig.1 shows the circuit for a boost converter.

Fig. 1: Boost converter circuit We will make following assumptions while analyzing fig.2 circuit: The converter operates in steady state Inductor current is always positive meaning that the converter operates in continuous conduction mode (CCM) Circuit when the MOS switch is ON, is shown in fig. 2 (top). Application of Kirchoffs voltage and current laws yields following equations:

Fig.2: Top MOS switch ON (diode in reverse bias) Bottom MOS switch OFF (diode conducting) When the MOS switch is OFF, as shown in fig. 2 (bottom), the energy stored in inductor is getting transferred to the capacitor.

Using capacitor charge balance, we know that the average capacitor current over one period in steady state is zero. That is,

Solving the above algebraic equation gives us the average value of the inductor current over one cycle in steady state.

Once again applying inductor-volt second balance, we know that the average inductor voltage over one cycle in steady state is zero. That is,

Substituting for

and solving for the output voltage

yields

Notice that, if the MOS and inductor are considered to be ideal, then we get the ideal conversion equation:

Fig. 3: Relationship between duty cycle and output voltage Fig. 3 shows a plot of duty cycle vs. output voltage using the ideal conversion equation. Heres the input voltage is taken to be . Notice that when the duty cycle is zero, the output voltage is equal to that of the input voltage. As the duty cycle increases, the output voltage increases as well. Ideally, the output voltage can reach infinity.

Fig. 4: Inductor current waveform (Steady State) We can now determine the ripple in inductor current as well as the output voltage. As shown in Fig. 4, in steady state, the inductor current changes from to for . The relationship for inductor ripple current is simply given by the line-segment, that is,

Above relationship can be used to determine the inductance during the design process, if the inductor current ripple constraint is known. The criteria that the converter operates in CCM is that the minimum inductor current stays positive, that is

The above relationship determines the minimum value for the inductance such that the converter operates in CCM. Usually, the choosen value of inductance is at least 15 to 20 % greater than . This is just to ensure that the converter doesnt enter into discontinuous mode in the presence of disturbances.

Last but not the least is the output voltage ripple. Using the equations for voltage as shown in Fig. 5

, we get the plot for capacitor

Fig. 5: Capacitor voltage waveform (Steady state) Capacitor voltage ripple = slope * time period

Above equation determines the selection of the capacitance. Notice that as the switching frequency increase, the capacitance goes down, which makes them ideal to be integrated into ICs.