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VMAX Architecture

Currently there are 3 types of EMC Vmax available EMC Vmax 10K,EMC Vmax 20K and EMC Vmax 40K
!he main ar"hite"tural differen"e bet#een $M% and Vmax model is that vmax has engine "on"ept &n $M% model,#e have different hard#are for front end'() dire"tor*,ba"+ end'$) dire"tor* and memory modules ,ut in Vmax all these hard#ares are inte-rated to-ether and is +no#s as Vmax Engine

) EMC Vmax stora-e array support from 1 to maximum of . Vmax en-ines Ea"h en-ines "ontains t#o dire"tors Ea"h dire"tor in"ludes - . multi/"ore C01s 'total 12 per en-ine* 3 Ca"he memory'-lobal memory* 3 (ront end &45 modules 3 ,a"+ end &45 modules 3 6ystem &nterfa"e Module'6&,* )part from this,ea"h en-ine has redundant po#er supplies,"oolin- fans,standby po#er supplies'606* and environmental modules )ll these en-ines are inter"onne"ted usin-Vmax Matrix Interface Board Enclosure(MIBE).Ea"h dire"tor has t#o "onne"tion to M&,E via system interfa"e module'6&,* ports as sho#n belo#

Multi-core CPUs: Multi/Core C01s deliver ne# levels of performan"e and fun"tionality in a smaller footprint #ith redu"ed po#er and "oolin- re7uirements Ea"h dire"tor has . multi "ore C01s and a total of 12 C01s per en-ine Cache memor (glo!al memor ): Ea"h dire"tor "an be "onfi-ured #ith 12, 32 or 24 8, of physi"al memory 5f this, a small portion '4 8,* is reserved for lo"al pro"essin-, and the rest "onstitutes 8lobal Memory 8lobal Memory on any -iven dire"tor is al#ays mirrored to another dire"tor in the system 6o the minimum usable memory #ill be 12 8,'total 328,, on a sin-le en-ine "onfi-uration* and maximum #ill be 9128, 'total 10248,,fully loaded ei-ht VM)% En-ines system* Memory is a""essible by any dire"tor #ithin the system: &f a system has a sin-le VM)% En-ine, physi"al memory mirrors are internal to the en"losure &f a system has multiple VM)% En-ines, physi"al memory mirrors are provided bet#een en"losures "ront End I#$ Module : "ront end modules are used for host connecti%it .;ost "onne"tivity via (ibre Channel, i6C6& and (&C5< are supported Bac& End I#$ Module : ,a"+ end module provide a""ess to the dis+ drives $is+s drives are "onfi-ured under these &45 modules ' stem Interface Module('IB): 6&,s are responsible for inter"onne"tin- the Vmax en-ine=s dire"tors throu-h Matrix Interface Board Enclosure(MIBE).Ea"h Vmax en-ine has t#o 6&,s and ea"h has t#o ports 'imilar to (M)* and (M)+ arra s,Vmax has t-o t .es of !a s /. ' stem !a : 6ystem bay "ontains all Vmax en-ines )part from Vmax en-ines,it "ontains system bay standby po#er supplies('P'), 1ninterrupted 0o#er 6upply(UP'),Matrix &nterfa"e ,oard En"losure (MIBE), and a 6erver ('er%ice Processor) #ith Keyboard/ Video/ Mouse (0VM) assembly 1. 'torage !a : !he 6ymmetrix V/Max array 6tora-e ,ay is similar to the 6tora-e ,ay of the $M%/3 and $M%/4 systems &t "onsists of ei-ht to sixteen $rive En"losures, 4. to 240 drives, ei-ht '.* 606 modules, and uni7ue "ablin- #hen "ompared #ith the $M% 6eries !he 6ymmetrix V/Max array 6tora-e ,ay is "onfi-ured #ith "apa"ities of up to 120 dis+ drives for a half populated bay or 240 dis+ drives for a fully populated bay $rives, >CCs, po#er supplies, and blo#er modules are fully redundant and hot s#appable and are en"losed inside $is+ )rray En"losure'$)E* 5ne $)E holds 19 physi"al dis+ drives and one stora-e bay has total 12 $)Es'hen"e a stora-e bay has maximum of 240 dis+, 12?19* Vmax Engine "ront Vie- : ,elo# is a Vmax en-ine front vie# )s des"ribed above,Vmax en-ines are lo"ated in

Vmax system bay @e "an see the po#er supplies lo"ated at t#o sides and "oolin- fan module lo"ated in middle

Vmax Engine 2ear Vie- : !his example displays the rear vie# of the V/Max En-ine

)s explained earlier ea"h V/Max En-ine "ontains t#o dire"tor boards named here as 5dd and Even dire"tor, four (ront End &45 Modules, four ,a"+ End &45 Modules and t#o 6ystem &nterfa"e ,oards '6&,* !he ,a"+ End &45 Modules are numbered as Module

3 and Module / !he 6ystem &nterfa"e ,oards are named as Modules 1 and * !he (ront End &45 Modules are numbered as Module + and Module 4 !he top dire"tor board "ombined #ith the left (ront End &45 Modules 4 and 9 represents the even numbered dire"tor !he bottom dire"tor board "ombined #ith the ri-ht (ront End &45 Modules 4 and 9 represents the odd numbered dire"tor (or example, if this is en-ine 4 the top dire"tor #ould be dire"tor number . and the bottom dire"tor #ould be dire"tor number A Vmax Engine Port 5ssignment : !his is a typi"al Vmax port assi-nment dia-ram

)bove dia-ram "ontains port assi-nment of 6ystem &nterfa"e ,oard, the ,a"+ End &45 Modules, and the (ront End &45 Modules )s & explained earlier Vmax en-ines are inter"onne"ted usin- M&,E usin- 6ystem &nterfa"e ,oard ports 0ort ) and 0ort , 1sin- these ports all dire"tors "ommuni"ate throu-h the Virtual Matrix via redundant "onne"tions Ea"h dire"tor #ithin a V/Max En-ine "ontains t#o ,a"+ End &45 Modules Ea"h ,a"+ End &45 Module has a sin-le port, #hi"h holds a sin-le 6uad 'mall "orm-"actor Plugga!le (6'"P) connector !he B6(0 "onne"tor "able "ontains 4 smaller "ables ,ea"h have a "onne"tion to four $rive En"losures, providin- ,a"+ End (ibre Channel "onne"tivity to the dis+ drives 5n ,a"+ End &45 Module 0 these "onne"tions are desi-nated as 53, 5/, B3, and B/ 5n ,a"+ End &45 Module 1, these "onne"tions are desi-nated as C3, C/, (3, and (/. Ea"h dire"tor also "ontains t#o (ront End &45 Modules !he port desi-nations on the (ront End &45 Module #ill vary based on the interfa"e type !his example represents four (ibre Channel (ront End &45 Modules &n this ,"onfi-uration module 4 #ill "ontain ports E3, E/, "3, and "/ Module 9 #ill "ontain ports 73, 7/, 83, and 8/

)s #e dis"ussed previously, the left t#o (ront End &45 Modules are "onne"ted to the even numbered dire"tor &f it is En-ine 4'dire"tor number asso"iated #ith en-ine 4 is dire"tor A and .*, then the first port on the left most module 4 #ould be dire"tor . port E0 !his is a si-nifi"ant departure from other 6ymmetrix systems and is a result of the overall in"reased port "ount in the 6ymmetrix V/Max array Vmax Engine Configuration -ith 'torage Ba s: <o# lets have a loo+ at ho# the vmax en-ine "onfi-ures alon- #ith stora-e bay & am -ivin- pi"torial representation, from one vmax en-ine to . vmax en-ine "onfi-uration alon- #ith stora-e bays !his is the standard EMC re"ommended "onfi-uration layout /. $ne Vmax engine -ith storage !a :

!he 6ymmetrix V/Max array re7uires at least one V/Max En-ine in the 6ystem ,ay )s sho#n, the first engine in the ' stem Ba -ill al-a s !e Engine + as counted starting at / from the !ottom of the ' stem Ba &n this example,En-ine 4 has t#o half populated 6tora-e ,ays 5ne bay isdirectl attached and the se"ond is a dais chain attached 6tora-e ,ay !his allo#s for a total of 240 drives !o populate the upper half of these 6tora-e ,ays #ith drives you #ill need to add another V/Max En-ine 2 9-o Vmax engine -ith storage !a :

&n this example, the system has been expanded to in"lude En-ine 9 !his allo#s the top half of both 6tora-e ,ays to be populated #ith drives !his represents the "orre"t order for addin- V/Max En-ines to the 6ystem ,ay V/Max En-ines are added from the middle, startin- #ith 4, then 9, then 3 3 9hree Vmax engine -ith storage !a :

)-ain, #or+in- from the middle out the system has been expanded !he next V/Max En-ine is 3, allo#in- the atta"hment of t#o additional 6tora-e ,ays !his allo#s for a total of A20 drives + "our Vmax engine -ith storage !a :

4 "i%e Vmax engine -ith storage !a :

: 'ix Vmax engine -ith storage !a :

; 'e%en Vmax engine -ith storage !a :

< Eight Vmax engine -ith storage !a : ("ull .o.ulated)

<o# that #e have the -eneral idea, let=s ta+e a loo+ at ho# a system -ets fully populated 6till #or+in- from the inside,out alternatin- above and belo# En-ine 4, ea"h en-ine is added until the 6ystem ,ay is fully populated #ith . V/Max En-ines )s more en-ines are added the "orrespondin- 6tora-e ,ays are added &n this example, the "olor "odinindi"ates the relationship bet#een the en-ines and their asso"iated 6tora-e ,ays (ully populated, this "onfi-uration allo#s for a total of 2,400 Cou #ill noti"e that En-ines 1, 2, A, and . ea"h mana-e t#o daisy "hain atta"hed 6tora-e ,ays !his represents a supported system implementation, not a desi-n limitation @e have "overed only the EMC Vmax ar"hite"tural part in this post,not all Vmax features & #ill be #ritin- more post related to Vmax features later ;ope no# you -ot an idea about Vmax ar"hite"ture

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VM5) architecture
The Symmetrix V-Max family includes 2 options for scalability and growth. The V-Max series scales from 48 to 2 4!! dis"s and pro#ides 2 $eta bytes of usable protected capacity when configuring all %T& S'T' dis"s. The V-Max S( scales from 48 to )*! dis"s and is intended for smaller capacity needs that re+uire Symmetrix performance a#ailability and functionality. The V-Max architecture is comprised of up to 8 engines. (ach engine is a pair of directors. (ach director is a 2-

way +uad-core ,ntel -eon .4!! system with up to *4/& memory.,t pro#ides support for 0ibre 1hannel iS1S, /igabit (thernet and 0,123 connected hosts. 0ront-end and bac"-end connecti#ity has doubled o#er the 4M--4 with up to %28host ports and %28 dis" channels. The V-Max also le#erages 2.) /igahert5 multi-core processors. The new Virtual Matrix pro#ides the interconnect that enables resources to be shared across all V-Max engines to enable massi#e scale out The Virtual Matrix 'rchitecture replaces indi#idual function-specific directors with Symmetrix V-Max (ngines each containing a portion of /lobal Memory and two directors capable of managing front end bac" end and remote connections simultaneously.. Scalability has impro#ed in all aspects6 frontend connecti#ity /lobal Memory bac"-end connecti#ity and usable capacity. The increased usable dis" capacity is the result of an increase in /lobal Memory combined with a significant reduction in metadata o#erhead allowing 24!! de#ices to be configured with 7',4 types other than 7',4 % resulting in a dramatic increase in usable capacity. The Virtual Matrix is redundant and dual acti#e and supports all /lobal Memory references allmessaging and all management operations including internal disco#ery and initiali5ation path management load balancing fail o#er and fault isolation within the array. The Symmetrix VMax array is comprised of % to 8 V-Max (ngines. (ach V-Max (ngine contains two integrated directors .(ach director has two connections to the V-Max Matrix ,nterface &oard (nclosure 8M,&(9 #ia the System ,nterface &oard or S,& ports. Since e#ery director has two separate physical paths to e#ery other director #ia the Virtual Matrix this is a highly a#ailable interconnect with no single point of failure

(ach director also has 8 bac"-end 4/b:s 01 ports 8comprised of +uad-port ;&'s9 and #arious options for the front-end including 8 4/b:s 01 ports. ,n the full configuration of %28 4/b:s 01 ports on the front and bac" ends the expectation is that this system could deli#er 4!/&:s if there a no bottlenec"s in the system architecture.

V-Max Engine Architecture

The full VMax system comprises %% rac"s<

The center rac" is for the VMax engines the other %! are storage bays. (ach storage bay can hold up to 24! dri#es. There are %*! dis" array enclosures *4 directly connected and =* daisy chained. There are 8 VMax engines as denoted by each color. >hen configuring the Symmetrix there are different types of ;yper de#ices that can be configured.0or example6 Standard de#ices 8ST49 are configured for normal production operations &usiness 1ontinuance 8&1V9 de#ices are configured for Time0inder:Mirror replication Virtual 4e#ices 8V4(V9 are configured for Time0inder:S3'$ local pointer-based replication 4ynamic 7eallocation Volumes 847V9 de#ices are configured for Symmetrix 2ptimi5er hyper re-location

T4(V de#ices are #irtual cache-only de#ices that can grow in capacity Sa#e 4e#ices are configured for Time 0inder:S3'$ and:or T4(V de#ices 7% and 72 for remote replication Virtual de#ices can reduce wasted dis" space because the actual data is "ept in a common pool ?only what is used is allocated in the common pool and the pool is shared by many T4(V de#ices. (g6 the host has a %!! /& Virtual T4(V de#ice the T4(V de#ice uses no dis" space the Sa#e pool contains the actual data and only 2! /& is allocated until more space is re+uired. The allocated capability is managed by (M1 software

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