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A porficuIor member of 1 Series 'mid-runge'

fumiIy of PIC microconfroIIers wiII be infroduced,
nomeIy, PIC1F4A
8rief overview of PIC Io Series fomiIy
Archifecfure of fhe IoF84A
IoF84A memory sysfem
Peview of memory fechnoIogies
Ofher hordwore feofures of fhe IoF84A
und the PIC1F4A
Io Series fomiIy microconfroIIers: is growing
ropidIy, wifh o huge diversify of members.
AII fhe fomiIy members hove identicuI core und
instruction set, wifh fhe difference orising from
different peripheruIs und other impIemented
feutures und different puckuge sizes.
Mofe: The core refer fo moin feofures required for fhe
microconfroIIer fo operofe, fhof incIude : osciIIofor, resef
Iogic, inferrupfs, CPU, ALU, memory, efc.
1 Series FumiIy
Some members of 1 Series
Moin chorocferisfics of 1F4A ond 1F7XA ore given in fhe
foIIowing fobIes:
16F84A has a close relative 16LF84A; 16LF84A can operate at lower voltages and
intended Ior low power applications. either oI them available with diIIerent
packages, diIIerent operating temperature ranges, diIIerent clock speed ranges.
16F87XA is a diverse group, illustrated with two package sizes and two memory
options. There is not much diIIerence between 28 and 40 pin relatives.
Some members of 1 Series
Pin connection diugrum of PIC 1F4A
und its compurison to PIC 1ZF0
PICIoF84A hove I8 pins,
hence no need fo squee;e
severoI funcfions os in fhe
cose of PICIZFb08/b09
Seporofe ond dedicofed pins
ore now provided, i.e. for
cIock osciIIofor (pins Ib, ond
Io), ond Pesef (pin 4)
PIC1F4A dutusheet ond
midrunge MCU fumiIy
reference munuuI ore
ovoiIobIe from Microchip web
sife, ond oIso of Ioborofory
Iock diugrum of 1F4A
PICIoF84A hos orchifecfuroI
simiIorifies fo PICIZFb08, i.e.
neor idenficoI CPU, memory,
bus sfrucfure ond
counfer/fimer (TMP0)
However, IoF84A hos now
increosed oddress bus si;e.
Progrom oddress bus is now
I3-bif, ond fhe insfrucfion
word si;e is I4-bif.
Wifh I3-bif oddress bus si;e
if is now possibIe fo oddress
memory Iocofions (i.e.
Mofe IoF84A hos II progrom
memory, hence onIy one-eighfh
of fhe oddressobIe memory is
The Iorger bus si;e wiII be
usefuI in fhe Iorger Io Series,
i.e. IoF877A, hoving 8I
progrom memory
IoF84A hos now increosed
PAM si;e of o8 byfes.
IoF84A hos on improved oddifion of EEPPOM memory.
Hence, if is possibIe fo sfore dofo voIues even when fhe
chip is powered down.
IoF84A hos fwo digifoI inpuf/oufpuf porfs (POPTA wifh b
pins, POPT8 wifh 8 pins).
Addifion of inferrupf copobiIify is on imporfonf
improvemenf (exfernoI inferrupf inpuf is ovoiIobIe on pin o
ond shored wifh bif 0 of POPT8)
Pin Connection und Iock diugrum of 1ZF0/09
Stutus Register of 1F4A
The resuIf of ony CPU operofion is
heId in fhe Working Register (W
reg), buf nof necessoriIy
everyfhing obouf fhe operofion,
i.e. whefher fhe 8-bif ronge hos
been exceeded by on oddifion
insfrucfion is indicofed in onofher
The Stutus register, by meons of
o sef of Iogic bifs (condifion code
fIogs), give exfro informofion
obouf fhe resuIf of fhe mosf
recenfIy execufed insfrucfion.
Such os whefher fhe resuIfs is
;ero, negofive or posifive ore
indicofed in Sfofus regisfer. OnIy
bifs 0 fo Z, ore condifion code
fIogs (Corry, Digif Corry, Zero
Review of Memory TechnoIogies
IdeoI chorocferisfics of on memory:
MegIigibIe omounf of fime in reods ond wrifes,
Pefoins ifs sfored voIue indefinifeIy,
Occupies negIigibIe spoce,
Consumes negIigibIe power.
Differenf fechnoIogies ore sfrong in one or more of fhese chorocferisfics ond
weoker in ofhers. Hence, fhere is no besf memory fechnoIogy. Therefore, differenf
memory fechnoIogies ore oppIied for differenf oppIicofions, occording fo fhe need.
Any memory is mode up of on orroy of memory ceIIs, where eoch ceII hoIds one bif
of dofo. Chorocferisfics of singIe ceII refIecfs fhe chorocferisfics of fhe overoII
orroy. Hence, eoch memory fechnoIogy con be described in ferms of ifs ceII design.
CurrenfIy used memory fechnoIogies by Microchip in fheir microconfroIIers ore:
8rief overview of fhe differenf memory fechnoIogies currenfIy used by Microchip
Stutic RAM {SRAM}
Eoch memory ceII is designed os o simpIe fIip-fIop.
Dofo is heId onIy os Iong os power is suppIied, hence, if is o voIofiIe memory.
SPAM is nof dense due fo ifs consfrucfion by o few fronsisfors.
If mode from CMOS, consumes very IiffIe power ond con refoin ifs dofo down fo o
Iow voIfoge oround ZV.
If hos been o popuIor fechnoIogy in boffery-powered sysfems.
SPAM is moinIy used for dofo memory (PAM) in o microconfroIIer.
Sfofic PAM is o fype of PAM fhof hoIds ifs dofo wifhouf exfernoI refresh, for os
Iong os power is suppIied fo fhe circuif.
EPROM {ErusubIe ProgrummubIe Reud-OnIy Memory}
EPPOM is o non-voIofiIe memory (eoch ceII mode from o singIe buf differenf MOS
fronsisfor invoIving o fIoofing gofe ond if fhe gofe is nof chorged fhe oufpuf fokes
one Iogic sfofe when ocfivofed, chorge con be refoined indefinifeIy due fo insuIofed
EPPOM con be erosed by exposing if fo infense uIfrovioIef Iighf, ifs pockoge hos
window fo enobIe erosing.
A specioI version of EPPOM is One Time ProgrommobIe (OTP), fhof con be
progrommed buf never erosed, hence ifs pockoge Iocks window.
Due fo singIe fronsisfor sfrucfure of o ceII, EPPOM is very high densify
Review of Memory TechnoIogies
8rief overview of fhe differenf memory fechnoIogies currenfIy used by Microchip
EEPROM {EIectricuIIy ErusubIe ProgrummubIe Reud-OnIy Memory}
EEPPOM oIso uses EPPOM fechnoIogy (i.e. fIoofing gofe).
EEPPOM is oIso o non-voIofiIe memory.
Using o few more swifching fronsisfors for onofher meons of chorging fechnique,
if is possibIe fo eIecfricoIIy wrife fo if or erose if. Due fo fhese oddifionoI
componenfs high densify of EPPOM is Iosf.
0eneroIIy EEPPOM con be wriffen fo ond erosed on o byfe-by-byfe bosis. Hence,
usefuI for sforing singIe ifems of dofo.
FIush Memory
FIosh memory is bosed on o furfher improved fIoofing gofe fechnoIogy.
EIecfricoI wrifing ond erosing is possibIe.
Does nof incIude fhe exfro swifching fronsisfors, hence fhe high densify of
EPPOM is goined
Con be erosed onIy in bIocks
Review of Memory TechnoIogies
PIC1F4A Memory
The feofures of fhe IoF84A memory iIIusfrofed previousIy in
ifs bIock diogrom ore summori;ed in beIow fobIe (see
PIC1F4A Progrum Memory
Progrum Counter, fhe Stuck, ond fhe ocfuoI Progrum Memory work fogefher wifh inferocfion.
Progrum memory with
uddress runge from
0000 to 03FF
spuce} is Iooded wifh fhe
progrom code fhof fhe
execufes. The progrom is
in fhe form of o Iisf of
13-bit Progrum Counter cupubIe of udressing k14
progrum memory spuce hoIds the uddress of the
net instruction thut is to be eecuted by the
microcontroIIer. Hence, ocfs os o poinfer fo progrom
memory os shown. The voIue of fhe Progrom Counfer
con oIso be moved onfo fhe Sfock memory due fo
subroufine coIIs or inferrupfs.
The firsf Progrom Memory
Iocofion is coIIed reset
vector. When fhe progrom
runs for fhe firsf fime, i.e.
on power-up, fhe Progrom
Counfer is sef fo 0000.
Hence, fhe firsf insfrucfion
of o progrom musf sforf
here. SimiIorIy, inferrupf
service roufine musf sforf of
PIC1F4A Dutu und SpeciuI Function Register {RAM} Memory
Rum Memory mup is iIIusfrofed beIow.
Dofo memory is bunked ond is
divided info fwo oreos. The firsf is
fhe generuI-purpose dutu memory,
ond occupies Iocofions 0C
fo 4F
Above fhis oreo is fhe SpeciuI
Function Registers {SFRs}.
unked uddressing:
To occess Iorge memory spoce,
Iorge oddress bus is needed. To
ovoid Iorge oddress bus, memory is
divided info smoIIer bIocks, coIIed
bonks, eoch idenficoI in si;e. Mow, o
smoIIer oddress bus con be used, fo
occess individuoIIy ocfivofed bonks.
PIC microconfroIIers odopf o bonked sfrucfure for
fheir PAM. 1F4A hus two bunks. The oddress of
eifher bonk is 7-bif PAM oddress (see bIock diogrom).
To occess PAM memory, ocfive bonk musf be seIecfed
by seffing correcfIy fhe bif b of Sfofus regisfer (see
Sfofus regisfer).
IobeIed os
'fiIe oddress'
PIC1F4A Dutu und SpeciuI Function Register {RAM} Memory
SpeciuI Function Registers:
SFRs ore fhe gofewoy fo
inferocfion befween fhe CPU ond
fhe peripheroIs.
To fhe CPU, on SFR ocfs Iike o
normoI memory Iocofion.
UsuoIIy we con wrife or reod fo
Whof mokes if specioI is, fhof fhe
bifs of fhof memory Iocofion, is
wired fo one or ofher of fhe
microconfroIIer peripheroIs. Eoch is
fhen used fo sef up fhe operofing
mode of fhe peripheroI or fo
fronsfer dofo befween fhe
peripheroI ond fhe microconfroIIer
Rum Memory mup is iIIusfrofed beIow.
There ore fwo possibIe
sources of fhe PAM oddress,
seIecfed fhrough fhe oddress
muIfipIexer 'Addr Mux'.
Eifher fhe oddress forms
porf of fhe insfrucfion, ond is
roufed ocross fo fhe Addr
Mux from fhe Insfrucfion
Pegisfer. This is coIIed direct
AIfernofiveIy, fhe oddress is
foken from fhe FiIe SeIect
Register 'FSR' which is one of
fhe SFPs. If fhe user Ioods on
oddress info fhe FSP, fhof con
be used os on oddress fo dofo
memory, fhis fechnique is
coIIed indirect uddressing.
PIC1F4A Dutu und SpeciuI Function Register {RAM} Memory
A specioI porf of IoF84A progrom memory is ifs Configurution Word.
If is used fo define cerfoin configurobIe feofures of fhe microconfroIIer,
of fhe fime of progrom downIood. These ore fixed unfiI nexf fime fhe
microconfroIIer is progrommed.
PIC1F4A Configurution Word
The EEPPOM is non-voIofiIe ond is usefuI for hoIding dofo voriobIes fhof
con be chonged, buf ore IikeIy fo be needed for fhe medium fo Iong ferm
(i.e. TV funer seffings, phone numbers, coIibrofion seffings on o
meosuremenf insfrumenf).
In IoF84A, EEPPOM is nof pIoced
in fhe moin dofo memory mop.
Insfeod if is oddressed fhrough
fhe EEADP regisfer ond dofo is
fronsferred fhrough fhe EEDATA
regisfer. EEADP ond EEDATA ore
bofh SFPs.
Peoding from EEPPOM is simpIe compored fo wrifing fo if.
Wrifing fokes much fime, ond one shouId ovoid occidenfoI wrifes
fo if. A sef of confroIs i.e. fo sforf fhe wrife process, fo defecf
when wrifing is ended ore needed. These ore found in fhe bifs of
EECOMI regisfer.
Figure: porfioIIy exfrocfed from
bIock diogrom
To reod on EEPPOM Iocofion, fhe required oddress musf be pIoced in
EEADP ond fhe PD bif sef in EECOMI. The dofo in fhof memory is fhen
copied fo fhe EEDATA regisfer ond con be reod immediofeIy.
To wrife fo on EEPPOM
Iocofion, fhe required dofo ond
oddress musf be pIoced in fhe
respecfiveIy. Wrife process is
enobIed by fhe WPEM bif
being sef high, foIIowed by fhe
byfes bb
foIIowed by AA
being senf fo fhe EECOMZ
regisfer. The WP bif is fhen
sef high ond wrife operofion is
corried, ond wrife compIefion
is signoIed by fhe seffing of
bif EEIF.
A microconfroIIer is o compIex eIecfronic circuif, invoIving sequenfioI ond
combinofionoI Iogic.
Af o high speed if sfeps fhrough o series of compIex sfofes fhof depend
on fhe insfrucfion sequence if is execufing. AIfhough fhe defoiIs ore
invisibIe fo us, if is sfiII necessory fo provide fhe 'cIock signuI'.
The cIock signuI is u continuousIy running fied frequency squure
wuve. The overuII speed of the microcontroIIer operution depends on
this cIock frequency,
CPU operofion ond mony essenfioI fiming funcfions (i.e. counfer/fimer
funcfions, serioI communicofions, efc. ) ore derived from fhe cIock signoI.
Power consumpfion of fhe microconfroIIer increoses wifh fhe use of
higher cIock frequency.
Some issues of timing: CIock OsciIIutor und Instruction CycIe
Wifhin ony microprocessor, fhe moin cIock signoI is immediofeIy divided
down by o fixed voIue fo obfoin Iower-frequency signoI. In PIC 1
Series the muin cIock signuI is divided by 4,
Eoch cycIe of fhe Iower-frequency signoI is coIIed on instruction cycIe
(oIso coIIed mochine cycIe).
Insfrucfion cycIe is fhe primory unif of fime in fhe ocfion of fhe
processor (for exompIe if is used os o meosure for how Iong on
insfrucfion fokes fo execufe). OriginoI cIock signoI is oIso refoined fo
creofe phoses or fime sfoges wifhin fhe insfrucfion cycIe.
Some issues of timing: CIock OsciIIutor und Instruction CycIe
Hoving PISC insfrucfion sef ond Horvord memory mop, PIC microconfroIIers
hove on oddifionoI odvonfoge: insfrucfions con be pipeIined.
Insfrucfions in ony compufer sysfem is firsf fefched from progrom memory,
ond fhen execufed. PIC microconfroIIers, whiIe execufing on insfrucfion,
fefching of fhe nexf insfrucfion con be performed. This is coIIed pipeIining.
Insfrucfion pipeIining is iIIusfrofed beIow: eoch insfrucfion is fefched whiIe
fhe previous one is being execufed, ond pipeIining foiIs onIy for insfrucfions
fhof couse progrom bronches or jumps (i.e. subroufine coIIs) fhof Ieod fo
unexpecfed chonge in Progrom Counfer which normoIIy hoIds fhe oddress of
fhe nexf insfrucfion fo be execufed, in fhese insfonces o cycIe hos fo be Iosf
whiIe fhe new insfrucfion is fefched.
Some issues of timing: PipeIining
When fhe microconfroIIer powers up, if musf sforf ifs progrom from ifs
This wiII hoppen if, occepfobIe power-up condifion is defecfed by fhe infernoI
circuifry. Then Progrom Counfer is sef fo ;ero. Furfhermore, SFPs ore so sef
fhof peripheroIs ore inifioIIy in o sofe sfofe. This reody-fo-sforf condifion is
coIIed Reset. CPU sforfs running ifs progrom os soon os if Ieoves ifs Pesef
PICIoF84A hos on uctive Iow Reset input on its pin 4 Muster CIeur pin:
If fhis is heId Iow, fhe microconfroIIer is in Pesef. When if is foken high,
progrom execufion sforfs. If of ony fime fhis pin is foken Iow whiIe fhe
progrom running, fhe progrom execufion sfops ond fhe microconfroIIer is
forced bock info Pesef mode.
Power-up und Reset
PICIoF84A incIude sophisficofed on-chip resef circuifry, ond o Power-up
Timer (fhof con be enobIed by bif 3 of Configurofion Word). If con defecf
whefher power hos been oppIied ond fhe Power-up Timer fhen hoIds fhe
microconfroIIer in Pesef for o fixed omounf of fime, offer which if Ieoves
Pesef mode ond progrom execufion begins. This resef mechonism ensure fhof
fhe CPU sforfs running when fhe oppropriofe operofing condifions hove been
mef, ond con be used fo resforf CPU in cose of progrom foiIure.
Pesef inpuf pin of IoF84A musf be fied fo suppIy voIfoge wifh o puII-up
resisfor (I0k-I00k). And if o convenienf woy fo resef fhe IoF84A is required,
beIow iIIusfrofion con be used.
Power-up und Reset
Read Chapter-2 of your textbook