1

A microconfroIIer is essenfioIIy mode up of:

microprocessor core + memory + peripheruIs
Up fo now, we deoIf wifh PICIoF84A. More powerfuI MCUs wiII
invoIve enhoncemenfs in ony of fhe essenfioI componenfs i.e.
core, memory or peripheruI.
More power con be obfoined by:
I. moking fhe microprocessor core, confoining fhe CPU fosfer, or
improving ifs infernoI ochifecfure, or insfrucfion sef
Z. ufiIi;ing enhonced fechnoIogy for fhe memory fo increose ifs
copocify ond speed
3. odding more peripheroIs or enhoncing ovoiIobIe ones
Most drumutic udvunces ure by meuns of Z
nd
und 3
rd
items not by the 1
st
item,
More PowerfuI MCUs {Chupter 7}
More PowerfuI MCUs
IoF84A, IoF873A, IoF874A, IoF87oA, IoF877A MCUs
ore:
fhe members of fhe some fomiIy, nomeIy Io Series
fhe core ond fhe insfrucfion sef remoin consfonf
IoF87XA ore enhonced compored fo IoF84A in ferms
of oddifion of o ronge of new peripheroIs.
Eoch of fhe obove MCUs hos on LF version, i.e.
IoLF873A, fhof con run of o Iower power suppIy fhon
fhe sfondord device.
2
Moin Feofures of
IoF84A,
IoF873A,
IoF874A,
IoF87oA,
IoF877A,
(Texfbook: TobIe Z.I)
Pin Diugrums of 1F4A 1F73A 1F74A 1F7A 1F77A
Extra pins 16F873A vs 16F874A
Extra pins 16F876A vs 16F877A
3
Compurison of muin feutures 1F4A 1F73A und 1F77A
Compurison of muin feutures 1F73/4A und 1F7/7A
4
Compurison of 1F4A 1F73A und 1F77A
16F87XA CPU (made up essentially oI ALU, Working register and Status
register) is similar to that oI 16F84A
Three peripherals namely Timer 0, Port A and Port B remains same
16F87XA have extra peripherals, increased number oI interrupt sources and
SFRs.
16F87XA memory structure is similar to that oI 16F84A however, greatly
increased in capacity. 16F873/4A and 16F876/7A has two and Iour pages oI
program memory, respectively. Note that program memory paging is required
even though program counter (13-bit) is capable oI addressing the whole
memory, since contents oI program counter can be changed in diIIerent ways
(i.e. call, goto instructions that provide 11-bit addressing and hence 2
11
2K
words).
16F87XA data memory is divided into Iour banks.
16F87XA have increased sharing oI Iunctions on many pins
There are three important extra Ieatures Iound in 16F87XA, these are:
brown-out detect, in-circuit debugger and low-voltage programming Ieatures.
1F7XA Dutu Memory SFRs SPRs
Limited use of upper
2 banks. No GPRs,
and most SFRs are
mirrored over from
the other banks
Dofo memory in four bonks, increosed number of SFPs wifh oImosf eoch hoving 8 ocfive bifs,ond 0PPs
5
Configurution Word
The configurofion word of o Io Series PIC microconfroIIer
defermines some of fhe progrommobIe feofures of fhe MCU fhof
con be chonged onIy when fhe device is progrommed.
Sume us in 1F4A
PorfioI Ioss of power
Mew operofing modes
SpeciuI Memory Operutions
Accessing EEPROM und Progrum Memory
Progrom memory is non-voIofiIe ond is bosed on FIosh memory fechnoIogy.
Due fo fhe FIosh memory chorocferisfics, IoF87XA oIIows, under cerfoin
resfricfions 7, progrom memory fo be wriffen fo whiIe fhe progrom is
running. If wonfed, if oIso oIIows fhe progrom memory fo be progrommed
serioIIy, whiIe fhe IC is in fhe forgef Iocofion. If oIso oIIows ifs EEPPOM
dofo memory fo be occessed, fhrough ifs specioI confroI regisfers.
6
SpeciuI Memory Operutions
In-Circuit SeriuI Progrumming {ICSP}
IoF87XA MCUs con be progrommed whiIe in fhe forgef circuif. For exompIe
wifhouf removing fhe MCU from on embedded sysfem, soffwore updofes con
be insfoIIed in if. ICSP requires cerfoin pins of fhe MCU fo be commiffed for
ifs use, or of Ieosf corefuIIy designed in order fo oIIow ICSP. ICSP uses LVP
mode fhof oIIows fhe memory fo be progrommed using Iow voIfoge of
VDD (power suppIy voIfoge) rofher fhon obouf usuoI I3V progromming
voIfoge.
ICSP requires hordwore connecfions, ond specioI soffwore fo
fronsfer dofo serioIIy info fhe MCU.
Interrupts
PICIoF87XA fomiIy hos up fo Ib sources of inferrupf, fhe inferrupf
sfrucfure (inferrupf sources, individuoI inferrupf fIogs ond enobIe bifs)
of fhis fomiIy is iIIusfrofed beIow.
SpeciuI Memory Operutions / Interrupts
SimiIur to 1Ff4A
interrupt structure
PreviousIy it wus EEPROM write compIete in
1Ff4A, Now with PeripheruI EnubIe bit
ucts Iike u secondury SIobuI EnubIe bit
7
Interrupt Registers
Wifh Ib inferrupf sources PICIoF87XA fomiIy uses inferrupf
confroI regisfer INTCON, ond four specioI funcfion regisfers
SFPs (PIE1 PIEZ PIR1 PIRZ)
INTCON regisfer
is a readable and writable register
hos individuoI ond gIoboI inferrupf enobIe bifs.
records individuoI inferrupf requesfs in fIog bifs.
contains enable and flag bits for the TMR0 register overflow, RB
port change, external RB0/NT pin interrupts; and Global and
Peripheral nterrupt Enable bits.
Inferrupf reIofed SFPs (PIE1 PIEZ PIR1 PIRZ)
The peripheral interrupt flags are contained in the Special Function
Registers, PR1 and PR2. The corresponding interrupt enable bits
are contained in Special Function Registers, PE1 and PE2, and the
peripheral interrupt enable bit is contained in Special Function
Register, NTCON.
SpeciuI Memory Operutions / Interrupt Registers
INTCON register
nterrupt flag bits are set
when an interrupt condition
occurs regardless of the
state of its corresponding
enable bit or the global
enable bit
8
PeripheruI Interrupt EnubIe und PeripheruI Interrupt Request Registers
16F87XA PE1/PR1 Registers
16F87XA PE2/PR2 Registers
Interrupt Identificution und Contet Suving
f more than one interrupt source is
enabled, it is necessary for the SR to
contain a program section at its
beginning to identify which is the calling
interrupt.
Context Saving: When an SR is called
only the return address is saved on the
stack. t is up to the programmer to save
any other registers that are needed (i.e.
W and Status registers) at the start of
SR, and then retrieve them at the end
of SR.

n CCS PIC-C identification of the calling interrupt and
Context saving is automatically taken care of by the
compiler

In AssembIy Lunguuge:
Progrummer {Youme
others,} must tuke cure of
the identificution of the
cuIIing interrupt und
contet suving,|||
9
OsciIIutor Reset und Power SuppIy
IoF87XA MCUs hos:
Some osciIIofor sfrucfure ond ronge of opfions os fhe
IoF84A. OsciIIofor fype is seIecfed by fhe Iowesf fwo
bifs of Configurofion Word.
Pesef sfrucfure simiIor fo IoF8A. A new resef source
is odded which is coIIed rown-out Reset. 8rown-ouf
Pesef meons porfioI Ioss of power, such os o dip in fhe
power suppIy. If fhis condifion is unnoficed, moy yieId
moIfuncfioning of fhe MCU, becouse in fhe cose of o
porfioI Ioss of power, porf of o circuif moy keep going
whiIe onofher porf moy fempororiIy foiI or Iose dofo.
8rown-ouf Pesef is enobIed by fhe OREN bif of fhe
Configurofion Word.
SimiIor power-suppIy requiremenfs fo fhof of IoF84A
PuruIIeI Ports
IoF87XA 8Iock Diogrom

1F77A hus ports:

PortAPortPortCPortDPortE
PortA: bit
Port: bit
PortC: bit
PortD: bit
PortE: 3 bit
idirectionuI
I/O Ports
+
33 generuI purpose
I/O pins
Some pins for these I/O ports
are muItipIexed with an
aIternate function for the
peripheraI features on the
device. In generaI, when a
peripheraI is enabIed, that
pin may not be used as a
generaI purpose I/O pin.
10
PuruIIeI Ports / PortA
IoF877A PortA is o-bif wide
bidirecfionoI digifoI I/O porf.
PorfA pins ore oIso shored wifh fhe
AnoIog-fo-DigifoI Converfer (ADC)
moduIe (os onoIog inpuf pins) ond
comporofors. Pin PA4 is muIfipIexed
wifh fhe Timer0 moduIe cIock inpuf. The
PA4/T0CIIpin is o Schmiff Trigger
inpuf ond on open-droin oufpuf. AII
ofher POPTA pins hove TTL inpuf IeveIs
ond fuII CMOS oufpuf drivers.
Not onIy TRIS register but other SFRs {i,e, ADCON1 CMCON}
must be configured uccording to whut is needed,|||
ON POWER-UP PORTA PINS ure
SET us ANALOS INPUTS,|||
If pins ure used us AnuIog Inputs
then DigituI Input puths wiII be
DISALED,
PuruIIeI Ports / Port
IoF877A Port is 8-bif wide
bidirecfionoI digifoI I/O porf.
Three pins of POPT8 hove oIfernofe
funcfions fo be used for In-Circuif
Debugger ond Low-VoIfoge Progromming
funcfions P83/P0M, P8o/P0C ond
P87/P0D (Iow voIfoge progromming
mode pin, serioI progromming cIock ond
dofo)
Eoch of fhe POPT8 pins hos o weok
infernoI puII-up. A singIe confroI bif con
furn on oII fhe puII-ups. This is
performed by cIeoring bif P8PU
(OPTIOM_PE07). The weok puII-up is
oufomoficoIIy furned off when fhe porf
pin is configured os on oufpuf. The puII-
ups ore disobIed on o Power-on Pesef.
11
PuruIIeI Ports / PortC
IoF877A PortC is 8-bif wide
bidirecfionoI digifoI I/O porf.
POPTC is fhe mosf compIex porf of
IoF877A.
POPTC is muIfipIexed wifh severoI
peripheroI funcfions incIuding fhose
deoIing wifh serioI communicofion ond
Copfure-Compore-PWM (CCP).
AII POPTC pins hove Schmiff Trigger
inpuf buffers.
PuruIIeI Ports / PortD
IoF877A PortD is 8-bif wide
bidirecfionoI digifoI I/O porf.
POPTD hos Schmiff Trigger inpuf
buffers.
POPTD con be configured os on 8-
bif wide microprocessor porf
PuruIIeI SIuve Port {PSP) by seffing
confroI bif, PSPMODE (TPISE4).
In fhis mode, fhe inpuf buffers ore
TTL.
The purpose of PSP mode is fo oIIow
fhe MCU fo inferfoce os o sIove fo o
dofo bus. The 3 bifs of PorfE musf
be sef os inpufs wifh digifoI mode
seIecfed in ADCOMI fo suppIy fhree
confroI Iines in fhis PSP mode.
12
PuruIIeI Ports / PortE
IoF877A PortE is 3-bif wide
bidirecfionoI digifoI I/O porf hoving
Schmiff Trigger inpuf buffers.
POPTE pins ore muIfipIexed wifh onoIog
inpufs. On o Power-on Pesef, fhese pins
ore configured os onoIog inpufs.
The POPTE pins become fhe I/O
confroI inpufs for fhe microprocessor
porf when bif PSPMODE (TPISE4) is
sef. In fhis mode, fhe user musf moke
cerfoin fhof fhe TPISEZ:0 bifs ore
sef ond fhof fhe pins ore configured os
digifoI inpufs. AIso, ensure fhof
ADCOMI is configured
for digifoI I/O. In fhis mode, fhe inpuf
buffers ore TTL.
PuruIIeI Ports Output Churucteristics
IoF87XA porf oufpuf
chorocferisfic, for o suppIy
voIfoge of bV ore
iIIusfrofed. TypicoI oufpuf
voIfoge for Logic I is bV
when fhe oufpuf currenf is
0, ond foII fo obouf 4.3V
when fhe oufpuf currenf is
I0mA Ilowing out oI the gate.
TypicoI oufpuf voIfoge for
Logic 0 is 0V when fhe
oufpuf currenf is 0, buf
rises fo obouf 0.ZZV when
fhe oufpuf currenf is I0mA
fIowing info fhe gofe.
=

70

22

V
OH
I
OH
V
OL
I
OL
13
Humun und PhysicuI Interfuces {Chupter }
keypud oIIows numeric or oIphonumeric
informofion fo be enfered.
A keypod is bosed on swifches.
In order fo moke good use of ovoiIobIe
Iimifed porf pins, swifches of fhe keypod
is connecfed in o mofrix.
keypud urrunged in 4 3 mutri
{4 Rows und 3 CoIumns}
4 3 mutri
urrungement of
the keypud
requires onIy 7
MCU pins ruther
thun 1Z MCU pin
connections if
sepurute switches
ure used for euch
key,
How to reud the keypud
keypud urrunged in 4 3 mutri
{4 Rows und 3 CoIumns}
Suppose key 7 is pressed:
I
sf
phose yieIds:
3
rd
Pow Iine (porf bif b) wiII be Iow.
Z
nd
phose yieIds:
I
sf
CoIumn (porf bif 3) wiII be Iow.
I
sf
phose
Z
nd
phose
X is don'f core
condifion,
since unused
FIow Diogrom
14
Seven Segment DispIuy
Seven Segment dispIoy is o porficuIorIy
versofiIe sfondord configurofion of LEDs
pocked in o compocf woy. 8y Iighfing
differenf combinofions of fhe seven
segmenfs, oII numericoI digifs con be
dispIoyed, os weII os o number of
oIphobefic chorocfers. A decimoI poinf is
oIso ovoiIobIe in some unifs.
Two fypes of connecfions ore ovoiIobIe
nomeIy common-onode ond common-
cofhode.
There ore 8 LEDs in fhe pockoge
incIuding fhe dof poinf. Due fo common
onode/cofhode configurofion onIy 9
connecfions ore required. Pockoge hos
I0 pins in oII, wifh common onode or
cofhode foking fwo pins.
Seven Segment DispIuy
DigituI muItipIeing to drive severuI seven segment dispIuys
Each oI the digit common-cathode
lines is connected to a logic-
compatible MosIet transistor.
When the gate voltage oI the
transistor goes high, the transistor
conducts and the common cathode
terminal goes low, and any segment
whose anode is at logic high
illuminates
Digits are activated continuously in
turn. With the right speed, a 4 digit
number will be seen without
noticeable Ilickker
Common-cathode type 7-segments
15
Liquid CrystuI DispIuys
Liquid CrystuI DispIuy {LCD} is o very versofiIe dispIoy unif
ovoiIobIe in vorious fypes (oIphonumeric, grophic, serioI, poroIIeI,
efc.)
Driving LCD direcfIy is nof enfireIy simpIe. Hituchi deveIoped o
microconfroIIer (HD44780) specioIIy designed fo drive
oIphonumeric moduIes. This microconfroIIer defined on inferfoce
fhof hos become oImosf sfondord for LCD dispIoys. Wifh fhis
inferfoce, LCD inferfocing fo generoI-purpose microconfroIIers
such os PICMicro MCUs become quife eosy.
Liquid CrystuI DispIuys {LCD} ovoiIobIe in our Ioborofory is fhe
mosf common ond economic fype, known os poroIIeI LCD. LCD
dispIoys wifh Z row x Io coIumn, Z row x Z0 coIumn ore commonIy
used in MCU oppIicofions.
Liquid CrystuI DispIuys
Certuin Churucteristics of puruIIeI LCD:
Dofo is fronsferred on o 4-bif or 8-bif dofo bus, defermined by fhe user.
4-bif mode oIIows inferfocing of LCD fo MCU wifh onIy 7 connecfions, buf
somewhof sIower fhon 8-bif mode.
The 3 confroI Iines (Pegisfer seIecf, Peod/Wrife, EnobIe) of fhe 7
connecfions ore used fo confroI fhe LCD operofion.
AddifionoIIy on LCD moduIe suppIy ond ground connecfions musf be mode,
fhere moy be oIso confrosf, bockIighf connecfions.
There is o simpIe insfrucfion sef (i.e. inifioIi;ing ond cIeoring dispIoy,
Iocofing cursor, efc.)
There ore Z LCD-moduIe infernoI regisfers (dofo regisfer, insfrucfion
regisfer), which ore used fo fronsfer dispIoy dofo ond fo fronsfer
insfrucfions.
InfernoI resources of LCD invoIve dispIoy PAM ond chorocfer generofor
POM.
On-power up, HD44780 musf undergo specific inifioIisofion process,
hence usuoIIy cerfoin omounf of deIoys ore required for fhe HD44780-
driven LCD fo operofe wifhouf ony probIems.
16
Liquid CrystuI DispIuys
8 data lines
3 control lines
Power supply connection
Contrast connection
Ground connection
MCU Interuction with the PhysicuI WorId
To inferfoce wifh physicoI worId,
MCU musf be obIe fo defecf fhe sfofe of fhe physicoI voriobIes
ond,
MCU musf be obIe fo confroI fhese physicoI voriobIes
This inferocfion wifh fhe physicoI worId is by done by fronsducers.
Inpuf fronsducers, oIso coIIed sensors, defecf ond converf physicoI
voriobIes info eIecfricoI signoIs (i.e. Iighf or femperofure sensors,
or sensors fhof defecf Iineor or onguIor posifion, dispIocemenf,
efc.).
Oufpuf fronsducers converf eIecfricoI voriobIes fo physicoI, ond
fhose cousing physicoI movemenf ore oIso coIIed ocfuofors (i.e.
soIenoids ond mofors of vorious fypes, efc.)
17
MCU Interuction with the PhysicuI WorId
There ore numerous ronge ond fypes of sensors ovoiIobIe fodoy
incIuding 'smorf' or infeIIigenf sensors fhof ore infegrofed onfo on
IC hoving on-chip signoI condifioning.
Some SimpIe Sensor ExompIes
Microswitch
{bump-sensor}
used for
mechonicoI
posifion sensing
LDR {Iight-sensing}
PefIecfive-opficoI
sensor used os o
shoff encoder
PefIecfive-opficoI sensor consisfs of on
infrored LED, ond o phofofronsisfor
mounfed side by side.
We'II use
CNY70
{Vishuy}
1F7XA DigituI Input Churucteristics
The chorocferisfics for o IoF87XA (using bV suppIy) porf bif shown
beIow iIIusfrofes fhof inpuf voIfoge Iying befween 0 ond 0.8V is
inferprefed os o Logic 0, ond inpuf voIfoge Iying befween Z ond bV
is inferprefed os Logic I. An inpuf befween fhese is undefined.
Logic inpufs, hove infernoI profecfion
diodes (connecfed reverse biosed-
from inpuf fo ground ond from inpuf fo
bV). These profecfion diodes become
ocfive when inpuf is eifher of b.3V or
of -0.3V, wifh fhe moximum inpuf
cIomp currenf of Z0mA. If obsoIufe
rofings greofIy exceeded, MCU wiII be
domoged.
18
Ensuring IeguI Iogic IeveIs input protection; Switch debouncing
VoIfoge spikes in signoIs,
excessiveIy sIow edge signoIs, DC
offsef in signoIs ore possibIe
sources fhof con couse probIems
during MCU inpuf. Some simpIe
remedies moy invoIve os iIIusfrofed
beIow:
Ensuring IeguI Iogic IeveIs input protection; Switch debouncing
In digifoI circuifs mechonicoI
swifches moy hove o swifch bounce
probIem (when swifch is ocfivofed
mechonicoIIy fhere occurs mony
confocfs ond disconnecfions).
Hordwore soIufions fo swifch
bounce probIem incIude use of PC
Iow poss fiIfers, fIip-fIops,
Schmiff friggers, ond soffwore
remedies moy invoIve simpIe deIoy
Ioops.
19
Actuutors
In on embedded sysfem, physicoI movemenfs (Iineor or onguIor mofions)
con be required. SoIenoids, DC, Sfepper ond Servo mofors ore common
ocfuofor exompIes.
OnIy very smoII eIecfricoI Ioods, Iike LEDs con be direcfIy driven by o
microconfroIIer. Lorger Ioods, drowing beyond obouf Z0mA, or powered
from o voIfoge higher fhon fhe Iogic suppIy voIfoge, need fo be inferfoced
using power swifching devices.
Current is fIowing uIwuys in sume direction,
ReversibIe Switching of Actuutors by using H-ridge
H-8ridge invoIves fwo-poirs (A ond 8) of swifching devices
(fronsisfors) befween suppIy ond ground IeveIs. Eoch poir hos o
high-side ond Iow-side swifch confroIIed by confroI inpufs (X, Y)
The Iood (mofor) is connecfed befween fwo poirs fo form on overoII
H configurofion. The swifches in o poir musf never be on of fhe
some fime, becouse fhis wiII shorf fhe power suppIy fo ground.
Therefore, if is common fo drive fhe swifches fhrough Iogic
inverfers fhof ensure onIy one swifch be on of o fime in eoch poir.
Current flow when High-side
A and Low-side B is on
Current flow when High-side
B and Low-side A is on
We'II use LZ93D
H-ridge
{ST MicroeIectronics}