Nyquist-Rate D/A Converters

David Johns and Ken Martin University of Toronto (johns@eecg.toronto.edu) (martin@eecg.toronto.edu)

University of Toronto

slide 1 of 20
D.A. Johns, K. Martin, 1997

D/A Converter Basics.

B in V ref B in is a digital signal (or word), B in = b 1 2
1 2 N
D/A

V out

+ b2 2

+ + bN 2

(1)

b i equals a 1 or a 0 (i.e. a binary digit). V ref an analog reference; V out output . V out = V ref ( b 1 2
1 2 N

+ b2 2

+ + bN 2

)
N

(2)

Define V LSB to be LSB signal change, V LSB V ref 2

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slide 2 of 20
D.A. Johns, K. Martin, 1997

D/A Converter Basics

For errors, define units of LSB 1 LSB = 1 2
N

A multiplying D/A allows V ref to be a varying input V out proportional to multiplication of V ref and B in . For ideal D/A , output signal is a well defined value no quantization error!
V out -------V ref
1 3/4 1/2 1/4 0 00 01 10 11 (100)

V LSB --------- = 1/4 = 1 LSB V ref B in

University of Toronto

slide 3 of 20
D.A. Johns, K. Martin, 1997

D/A Resistor-String (Hamad, JSSC, Dec. 1978)

V ref
b3 b3 b3 b3
Resistors

Guaranteed monotonic
b2

Integrated with better than 10-bits absolute accuracy.

b2 b1

V out

Delay through the switch network major speed limitation Resistors might be realized using polysilicon If n-channel only used, can be laid out small

b3 b3 b3 b3 b2 b1 b2

Requires 2N resistors

3-bit

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slide 4 of 20
D.A. Johns, K. Martin, 1997

D/A Resistor-String Digital Decoding

V ref
Higher speed implementation (less resistance thru transistors)
3 to 1 of 8 decoder

b1 b2 b3

Large cap load on buffer input Can pipeline digital decoding for faster speed Requires 2N resistors

Resistors

V out 3-bit
University of Toronto
slide 5 of 20
D.A. Johns, K. Martin, 1997

Folded-resistor-string D/A
(Abrial, JSSC, Dec. 1988) V ref
word lines

b1 b2

2 to 1 of 4 decoder

Less capacitance load over the single bus approach Requires 2N resistors

bit lines

V out
2 to 1 of 4 decoder

b3 b4
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4-bit
slide 6 of 20
D.A. Johns, K. Martin, 1997

Binary-Weighted Resistor D/As.

RF b1 2R b2 4R b3 8R b4 16 R 4-bit
(3)

V out

V ref V out

b1 b2 b3 = R F V ref ------ ------ ------ 2R 4R 8R

Only N resistors Resistor and current ratios are on the order of 2N No guarantee of monotonicity. Prone to glitches (more later).
University of Toronto
slide 7 of 20
D.A. Johns, K. Martin, 1997

Reduced Spread Binary Resistor D/A

RF

V out 4R

2R

4R 3R

2R

4R

V ref

1 V A = -- ( V ref ) 4

4-bit

Reduced resistor spread Keep repeating this procedure > R-2R ladder

University of Toronto

slide 8 of 20
D.A. Johns, K. Martin, 1997

R-2R Based D/A Converters

R 1 R' 1 V ref 2R
V ref ----------2R

R 2 R' 2 R R

R 3 R' 3 R

R 4 R' 4 2R

2R
V ref ----------4R

2R
V ref ----------8R

2R
V ref ----------16R

R' 4 = 2 R R 4 = 2 R || 2 R = R R' 3 = R + R 4 = 2 R R 3 = 2 R || R' 3 = R Small size, good matching (only R and 2R)

(4)

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slide 9 of 20
D.A. Johns, K. Martin, 1997

R-2R Based Resistor Ladders

Example D/A converter RF

b1
Ir 2R R Ir Ir -2

b2
2R R Ir -4

b3
2R R Ir 4 Ir -8

b4
2R 2R

V out

V ref

Ir 2

Ir 8

4-bit

Currents through the switches are scaled Should scale switch sizes for good accuracy No node voltage changes except for output > fast
University of Toronto
slide 10 of 20
D.A. Johns, K. Martin, 1997

R-2R Based Resistor Ladders

Slower circuit having equal current through switches
R R 2R R 2R R

Rf

Vo
b4
I

b3
I

b2
I

b1
I

-5V

4-bit

Node voltages change slower circuit No need to scale switch sizes (smaller size)

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slide 11 of 20
D.A. Johns, K. Martin, 1997

Glitches
Different delays for switching the different currents MSB change often worst case I1 t I2 t I1 + I2 t Glitches can be minimized by limiting the bandwidth but that slows down circuit Use thermometer code to reduce glitches
University of Toronto
slide 12 of 20
D.A. Johns, K. Martin, 1997

Rf V out 1 I1 2 I2

Charge-Redistribution SC D/As
Programmable SC gain amplifier. 16 C 8C 4C 2C C b1 b2 b3 b4
2 ( 1 ) 1 1 2

V out

V ref

1 ( 2 )

C2

4-bit

Sign bit realized by interchanging input phases Carefully clock-waveforms required to minimize voltage dependency of clock-feed-through. Digital codes should be changed when input side of capacitors are connected to ground. Requires extra digital complexity.
University of Toronto
slide 13 of 20
D.A. Johns, K. Martin, 1997

Thermometer D/A Converters

Decimal
0 1 2 3 4 5 6 7

b1
0 0 0 0 1 1 1 1

Binary

b2
0 0 1 1 0 0 1 1

b3
0 1 0 1 0 1 0 1
b2

d1
0 0 0 0 0 0 0 1
b3

d2
0 0 0 0 0 0 1 1

Thermometer Code

d3
0 0 0 0 0 1 1 1

d4
0 0 0 0 1 1 1 1

d5
0 0 0 1 1 1 1 1

d6
0 0 1 1 1 1 1 1

d7
0 1 1 1 1 1 1 1

b1

Binary-to-thermometer code conversion d1 d1 R d2 d2 R d3 d3 R d4 d4 R d5 d5 R d6 d6 R d7 d7 R Rf

V out

ref

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slide 14 of 20
D.A. Johns, K. Martin, 1997

Thermometer Code D/A Converter

01 Vref 01 02 C Top Capacitors are Connected to Ground C Bottom Capacitors are Connected to Vref C 02 C 01 2N C + 02 Vout

C2
2 N unit sized caps Guaranteed monotonic Much lower glitching Low DNL

University of Toronto

slide 15 of 20
D.A. Johns, K. Martin, 1997

Current-Mode D/As
Vout

Thermometer-code High-speed, output feeds directly to resistor Important that delay to all the switches are equal. Overlapped clocks much better than having nonoverlapped clocks.

Col.

Vout

Column Decoder

di
Row

di

Row Decoder

di

I - Src Array

Bias

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slide 16 of 20
D.A. Johns, K. Martin, 1997

Current-Steered D/A [Colles, 88]

Operates as cascode current sources. For max speed, keep voltage swing at source of Q1 small (just turned off) Switching feed-through from the digital input enhances switching speed.
V ref

V V

d bias

1 Q 1 Q 2 V

2 V

ref R ref

bias

bias

V out
50

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slide 17 of 20
D.A. Johns, K. Martin, 1997

Segmented D/A
Schoeff, 79; Saul, 85; Grebene, 84
R/2 + Vout

Combine thermometer binary

and

Accuracy needed for LSB reduced Glitches reduced

2R Vref + Vref 2R 2R 2R 2R 2R R 2R R 2R R 2R R

Very popular

2 MSBs

4 Bit

Binary LSB - Segment

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slide 18 of 20
D.A. Johns, K. Martin, 1997

Dynamically-Matched Current Sources

Schouwenaar, 88
0 0 Shift Register 1 0 0 0

Each current source is with a I ref calibrated single reference 64 used so D/A can continue operating

Id1

Id2

Id3

Id4

Id5

I 64

Achieved 92 dB SNDR, and 20 mW with 3V. Used for application audio

Switch Network To D/A

Dynamic technique with current switching for realizing very well-matched current sources Up to 16 bit accuracy
University of Toronto
slide 19 of 20
D.A. Johns, K. Martin, 1997

Dynamically-Matched Current Sources

I ref
S2

I out Id1
S1

I ref
S2

I out Id1
0.9Iref Q1

Current source 0.9I added so a low gm device used (W/L equal to 10/75) Re-calibrate before leakage causes 0.5LSB error

Cgs S1 Q1 0.9Iref

Cgs

Calibration

Regular Usage

Minimize clock-feedthrough and charge-injection by having capacitance Cgs and bias voltage V GS large Implies voltage error causes less current deviation.

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slide 20 of 20
D.A. Johns, K. Martin, 1997