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Design and Simulation of Base Band Direct Sequence Spread Spectrum (DS/SS) System Using Matlab Simulink

Thamer M. Jamel and Sadiq K. Gharkan University of Technology/ Dep. Of Electrical Engineering / Baghdad Iraq Email:- thamerjamel@yahoo.com Key words: - Direct Sequence Spread Spectrum, Binary Phase Shift Keying, MATLAB Simulink.

ABSTRACT
Spread spectrum techniques were originated in answer to the needs of military communications. They are based on signaling schemes which greatly expand the transmitted spectrum relative to the data rate. This paper mainly concentrates on direct sequence spread spectrum (DS/SS) because it has some advantages over other types of spread spectrum technique. A MATLAB Simulink tool is used for designing DS/SS system to obtain system parameter and to test the influence of signals on the system. The simulated system was designed, with data rate (100kb/s) and pseudo noise (PN) code with code rate (4MHz), 127 bits maximal linear code with code rate 4MHZ and modulated as binary phase shiftkeying (BPSK) modulator. The receiver will be designed by using [correlator, BPSK demodulator, synchronization unit and PN local generator with controlled clock by VCO]. The system is equivalent base-band binary phase shift keying (BPSK) direct sequence spread spectrum (DS/SS) system. Then, the performance evaluation was tested by simulating the design to get the received data which compared with transmitted data, and also to study the effect of additive white Gaussian noise (AWGN) and calculate bit error rate (BER). The results shows that, the performance of the system in presence of AWGN is better when using Integrator and Dump in active correlator than using digital LPF in active correlator.

1. Introduction. A DS/SS system is one of the main spread spectrum systems and is the most common version use today, due to simplicity and ease of implementation, in which a modulation of a carrier is performed by a code sequence. In actual practice the baseband information is digitized and Modulo-2 added to the code sequence and then modulated by using phase modulation. A spread spectrum system is largely categorized by its coding scheme. The type of code employed, its length, and its chip-rate all define the overall system parameters. In order to alter the system's spreading capability it is necessary to alter the coding arrangement. In direct sequence system the encoding signal is used to modulate a carrier, usually by phase-shift keying (PSK) at the code rate. One modulation scheme used in this paper was Binary Phase Shift Keying [1, 2, 3, 4, 5]. A direct sequence spread spectrum system achieves its spreading capability by modulating a narrow bandwidth data signal with a wide bandwidth spreading signal. Figure (1 a, b) shows a functional block diagram of over all system for a binary phase modulated (BPSK) direct sequence system. The carrier is transmitted with one phase when the code is a one and a 180o phase shifted when the code is a zero. After being amplified, a received signal is multiplied by a reference with the same code and, assuming that the transmitters code and receivers code are synchronous, and the received signal can be represented by [3 ]:S SS t 2 ES m(t ) p (t ) cos(2 f c t ) .. (1) TS

where: m(t) is the data sequence, p(t) is the PN spreading sequence ,fc is the Carrier frequency, is the carrier phase angle at t=0 ,and Ts data symbol duration. The carrier inversions are removed 1

and the original data modulation restored. This narrowband restored data modulation can then flow through a band pass filter designed to pass only the baseband modulation carrier.

Digital data

DSSS Output SSS (t)

Clock

Pseudo Noise Generator RF Carrier

(a)

Received Dsss signal

Wideband filter

PSK Demodulato

received data

PN Generator

Synchronization system

(b) Fig. (1) Overall direct sequence system showing waveforms (a)Transmitter block diagram. (b) Receiver block diagram. 2. DS/ SS System Simulation using MATLAB-Simulink The DS/SS is designed by using MATLAB -Simulink version (6.5) [6,7] because its an attractive simulation tool provide the designer many facilities to rapidly design, implement and test the desired system .Also it gives the designer a clear imagination to the system parameters which is required to complete the design [8]. This information that is gained from MATLAB-Simulink implementation will help to optimize correctly the cost and speed in discrete component, like Microprocessor-Based or by using Field Programmable Gate Array (FPGA) implementation. The waveforms and spectra at any point of design can be obtained by using scope or frequency spectrum, this is very necessary to check the design .This paper uses communication block set, DSP block set, Simulink-Extras and other block set of MATLAB-Simulink. Figure (2) shows a block diagram of the over all system. The basic block diagram of the system shows the transmitter, additive white Gaussian noise (AWGN) channel and the receiver, in the following sections, each part of this system will be described in the next sections.

Fig. (2) Block diagram of over all DS/SS system 2.1 System Specification. The system specifications are as followings:- Data rate: 100 Kb/s. PN code rate: 4MHz. PN code length: 127 bits (maximal linear code). SNR: -10 dB. Modulation type: equivalent baseband BPSK. Acquisition method: serial search (dwell time scheme). Tracking method: delay locked loop (DLL). Processing gain is equal to :B.WRF clock rate 4MHZ Gp = = 40 B.Wdata data rate 100 KHZ (GP ) dB 10 log 40 = 16dB All waveforms shown in the next figures have the following (X- axis in Second, Y- axis in Volt). 2.2 The Transmitter. Figure (3) shows the block diagram of transmitter which contains, data generator, PN generators [ (PN1 and PN2) PN1wich is the same as in the receiver whereas PN2 that is the same length of PN1 but different sequence in order to test the performance of the system with wrong PN code] , mixer (multiplier) and baseband BPSK modulator (from communication Block set). Since modulation is performed in baseband, no radio frequency RF carrier is presented therefore the detection of the signal in the receiver uses low pass filter (LPF).
In the following subsections, a brief description of each subsystem will be explained.

2.2.1 Data Generator. Figure (3) above shows the block diagram of the transmitter which contains a data to be transmitted in data rate 100 kb/s generated by using binary data generator (Bernoulli. Binary) from communication block set with a probability of zero 50% and 50% ones. 2.2.2 PN Code Generator. The block diagram of implementing a PN1generator is shown in figure (4), PN1 sequence is generated as a maximal-linear code with a polynomial f(x) = 1+X+X7 , the PN is generated by using seven stages D Flip-Flop from Simulink-Extras with a two feedback

taped (X7,X) , Ex-ORed to the input of the first stage D Flip-Flop, in order to get 127 bit length maximal

Fig. (3) The block diagram of transmitter Linear code (2L-1), and the clock is gotten from digital clock 4MHZ.

Fig.(4) Block diagram of PN1 code generator The l00kb/s transmitted data are modul-2 adder with a PN generated to get a spreading data as shown in waveform in figure (5). The block diagram of implementing a PN2 generator is shown in figure (6), a PN2 sequence is generated as a maximal-linear code with a polynomial g(x) =1+ X3+X7, the PN is generated by using seven stage D Flip-Flop from simulinkExtras with a two feedback taped (X7,X3) Ex-ORed to the input of the first stage (J-K) FlipFlop, in order to get 127 bit length, 4

Fig. (5) Waveform of: (a) Transmitted data 100kb/s data

(b) PN1 code generator (c) Spreading

maximal- linear code (2L-1), and the clock is gotten from digital clock 4MHZ.The PN2 is generated in order to test the performance of the system at a different code and the wave form of the PN2 are shown in figure (7) with respect to the PN1.

Fig. (6) Block diagram of PN2 code generator

2.2.3 Base-Band BPSK Modulator. The baseband BPSK modulator modulated the output digital signal (multiplication the data with PN1 code generator), BPSK modulator converted spreading data from unipolar to Bipolar with reverse phase (0o or 180o) depending on the input to the BPSK modulator as shown waveform in figure (8). 2.3 The Channel The DS/SS system is transmitted through additive white Gaussian noise (AWGN) .The transmitted signal under AWGN at SNR equal to (-10 dB) is shown in figure (9) . 2.4 The Receiver. Figure (10) shows the Block diagram of the receiver, it consists of:5

Fig.(7) waveform of

(a) PN1 code generator

(b) PN2 code generator

Fig.(8) the waveform of: (a) Spreading data

(b) BPSK baseband modulator output

Fig. (9) Waveform of: (a) BPSK modulator output (b) Transmitted signal under AWGN at SNR =-10 dB 6

1- Active correlator. 2- Baseband BPSK demodulator. 3- Synchronization unit. 4- Local PN code generator with a clock is driven by voltage control oscillator (VCO).In the following section a brief description of each subsystem will be explained.

Fig. (10) Block diagram of the receiver

2.4.1 Active Correlator. Figure (11) shows the block diagram of the correlator which contains a mixer (Multiplier) and digital filter (fourth order Butterworth digital filter) from DSP block set .The received signal is despreaded only when received PN code and locally PN code generated have the same phase, and the cutoff frequency of digital LPF must be the same as the data rate (100kHZ). The total received signal is [9]: R (t ) A m(t ) p (t ) cos( wo t ) i (t ) n(t ) (2)

where m(t) is the data sequence , p(t) is the spreading code, wo is the angular carrier frequency, is the carrier phase , i(t ) Interference and n(t) is the additive white gaussian noise, and the output of multiplier is[9]: R1 (t ) A m(t ) cos( wo t ) i (t ) p (t ) n(t ) p (t ) ..(3) The waveform of the multiplier output when received code (correct PN1 code) is the same as the local generated code as shown in figure (12). The waveform of the multiplier output when received code (incorrect PN2 code) differs from local generated code which is shown in figure (13). The waveform of the output of LPF in active correlator with correct code is shown in figure (14) .
2.4.2 Synchronization Unit. Figure (15) shows the block diagram of the synchronization unit, it contains: Acquisition, tracking, search /lock control unit (SLCU) and voltage controlled oscillator (VCO). The operations of synchronization unit are as the follows:-The output of the correletor is compared to a preset threshold level in acquisition subsystem.

Figure (11) Block diagram of the correlator

Fig. (12) Waveform of (a) Received signal (b) PN local generator ( c ) 0utput of mixer

If the threshold exceeds no delay will be introduced in the local PN code , and initial synchronization will be declared otherwise local PN code clock is delayed by half chip and acquisition process is repeated, after the occurrence of acquisition, the SLCU enables the tracking loop. The parts of the synchronization unit are as follows:
2.4.2.1 Acquisition Subsystem. Figure (16) shows the block diagram of acquisition subsystem. It uses a serial search of an acquisition method (dwell single time scheme). It contains [square law (envelop detector) and (integrator and dump] to detect the correlated signal energy at constant test intervals (dwell time). The output of integrator and dump is compared with a preset threshold voltage .If the threshold is exceed then the phase of local PN code is corrected and tracking is initiated, otherwise a phase update signal is generated by SLCU for the next phase test operation.

Fig. (13)Waveform of (a) Received signal (b) PN local generator ( c )Output of mixer

Fig. (14) Waveform of (a) Input to the LPF (output of mixer) (b) Output of LPF (or output of correlator) 2.4.2.2 Tracking Subsystem. Figure (17) shows the block diagram of tracking subsystem .It uses a delay locked loop (DLL) method .The tracking subsystem consists of two branches; the common input to the branches is the received (DS/SS ) signal Rx , the second input to the upper branch is the output of the local PN code generator (Early), while the second input to the lower branch is the output of the 6th flip- flop of local PN code generator (Late).Each branch consists of [mixer (multiplier),digital LPF and square law (envelop detector) ].The cutoff frequency of low pass filter is100KHz, the same as the frequency of the data rate and the over all response of this filter. The detected energy from both branches is subtracted to generate an error signal to excite the voltage control oscillator (VCO) to correct the local generated frequency (4MHz).

Fig. (15) Block diagram of the synchronization unit

Fig. (16) Block diagram of acquisition subsystem


2.4.2.3 Voltage Control Oscillator (VCO). This part is taken from communication block set as a discrete time VCO (digital VCO) because its output must be digital .The phase error input to the VCO comes from tracking part to excite the VCO generated frequency 4MHz as shown in figure (18) below. 2.4.2.4 Search / Lock Control Unit (SLCU). Figure (19) shows the block diagram of search /Lock control unit subsystem. The pulse generator, generates a pulse width equal half chip period, after inversion this pulse is NANDed with output of acquisition subsystem to check the acquisition status.

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Fig. (17) Block diagram of tracking subsystem

Fig. (18) Waveform output of digital VCO (4MHZ Thus, the output of NAND gate is either a HIT (i.e. .acquisition declaration pulse) or not, such that a new phase replica is tested. A J-K flip-flop (from Simulink Extras) to connected as a T flip-flop to generate an extra half chip clock at each half chip period in case if there is no HIT has occurred .This is actually done after module-2 adding the VCO out put with T flip flop output. Since the VCO out put is polar, it must be converting to unipolar format to satisfy the requirement of XOR gate which produce the final update signal (local PN clock).However, the phase update signal either gives a clock pulse to local PN code at each chip duration (normal speed) when acquisition occurs or at each half chip duration (local PN code is faster than the received PN code) when acquisition process does not reach it is final decision. Figure (20) shows the output waveform of the SLCU.
2.4.2.5 Local PN Code Generator. The construction of PN in the receiver is the same as in the transmitter with the same code rate and length. 2.4.2.5 BaseBand BPSK Demodulator The baseband BPSK demodulator is taken from communication block set. Figure (21) shows the waveforms of the input and the output of the baseband BPSK demodulator.

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Fig.(19) Block diagram of search /Lock control subsystem

Fig. (20) Output Waveform of SLCU


3. Equivalent BaseBand (DS/SS) System Results From the over all DS/SS system design during the simulation process after (1ms) simulation time, the performance of the system design can be tested as follows:If correct PN code (PN1) is used in the transmitter, the received data from BPSK demodulator with respect to transmitted data will be shown in figure (23). The output of the demodulator represents the received data. It is clearly that the demodulator operates correctly as shown in figure (22) below. If incorrect PN code (PN2) is used in the transmitter, the received data from BPSK demodulator with respect to transmitted data will be shown in figure (24).

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Fig. (21)Waveform of (a) Output of the correlate (b) Output of the BPSK demodulator

Fig. (22) Waveform of

(a) Transmitted data

(b) Received data

Fig(23) Waveform of data at correct PN code (a) Transmitted data (b) Received data

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Fig(24) Waveform of data at incorrect PN code (a) Transmitted data (b) Received data From the block diagram of over all DS/SS system as shown in figure (25) below, during the

Fig. (25) Block diagram of over all DS/SS system during simulation process simulation process after (100ms) simulation time, the number of bits was (10000 bits) and the bit error rate was found (0.46 ) at SNR equal (-10 dB) ,if we take different values of signal to noise ratio (SNR) from AWGN block which are shown in figure(25),and calculate the bit error rate (BER) by using error rate calculation block from (communication block set ),the results of these calculations are shown in figure (26) which shows the relationship between SNR and BER. In order to improve the probability of error of the system, the Integrate and Dump [10] in the active correlator is used instead of digital LPF. From block diagram of over all DS/SS system as shown in figure (25) during the simulation process after (100ms) simulation time, the number of bits is (10000 bits) and the bite error rate was found (0.4367) at SNR equal (-10 dB) . 14

Fig. (26) Probability of error versus SNR under AWGN channel using digital LPF If we take different values of signal to noise ratio (SNR) from AWGN block, and calculate the bit error rate (BER) by using error rate calculation block from (communication block set ), the result of these calculations are shown in figure (27) which shows the relationship between SNR and BER .

Fig. (27) Probability of error versus SNR under AWGN channel using the Integrate and Dump

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4. Conclusions In this paper, MATLAB Simulink software was used to design and simulate the operation of equivalent base-band binary phase shift keying (BPSK) direct sequence spread spectrum (DS/SS) system. Then, the performance evaluation was tested by simulating the design to get the received data which compared with transmitted data, and also to study the effect of additive white Gaussian noise (AWGN) and calculate bit error rate (BER). MATLAB software is very good for implementing DS/SS system design for monitoring the flow of signals and deals with blocks set in flexibility in spite of it is limitations in some blocks. The simulation results shows that the performance of the system in presence of AWGN is better when using Integrator and Dump in active correlator than using digital LPF in active correlator. 5. References [1] R.C. Dixon "Spread spectrum system", 2nd edition JOHN WILEY and SONS, 1984.

[2] ." spread spectrum concept " , 2000 , http://www.labyrinth.net.au/~steve/papers/concepts.pdf , [3] T. S.Rappaport " Wireless Communications principle and practice " , second edition ,prentice-Hall,Inc. , 2000 [4] D.J.Morris,"Communication For command & control system" ,by International series on system and control volume 5, 1988. [5] S. Haykin,"Communication Systems", fourth edition ,John Wiley and Sons,Inc.,2001 [6] "simulink communication systems simulation for MATLAB", the math work, Inc. 2000. [7] Simulink block library of the communication tool boxes reference", the math work Inc. 2002. [8] A. B. laickner ,"system design and modeling with MATLAB SIMULINK" the math work, Inc. 2002. [9] D. J. Torrier ,"principle of secure communication system", Artech house, Inc. ,1985. [10]" CommSimm 2001, VisSim/Comm PE Version 4.5.25 " ,Eritek, Inc. http://electronicsworkbench.com , http:// www.eritek.com

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