Short Course On Phase-Locked Loops and Their Applications Day 1, AM Lecture Integer-N Frequency Synthesizers

Michael Perrott August 11, 2008

Copyright 2008 by Michael H. Perrott All rights reserved.

What is a Phase-Locked Loop (PLL)?

ref(t) out(t) e(t) v(t) ref(t) e(t) ref(t) out(t) e(t) v(t) out(t)

Phase Detect

v(t) Analog Loop Filter VCO

de Bellescize Onde Electr, 1932

VCO efficiently provides oscillating waveform with variable frequency PLL synchronizes VCO frequency to input reference frequency through feedback

- Key block is phase detector

Realized as digital gates that create pulsed signals

M.H. Perrott 2

Integer-N Frequency Synthesizers

ref(t) div(t) e(t) v(t) Fout = N Fref ref(t) Phase Detect e(t) v(t) Analog Loop Filter VCO div(t) Divider N out(t)

Sepe and Johnston US Patent (1968)

M.H. Perrott

Use digital counter structure to divide VCO frequency

- Constraint: must divide by integer values

Use PLL to synchronize reference and divider output

Output frequency is digitally controlled

Integer-N Frequency Synthesizers in Wireless Systems

Zin

From Antenna and Bandpass Filter

PC board trace

Mixer Package Interface RF in LNA LO signal VCO IF out To Filter

Zo

Reference ref(t) Frequency v(t) Frequency Synthesizer

out(t)

ref(t)

e(t) Charge PFD Pump

Loop Filter

v(t)
VCO

out(t)

div(t)

Divider N

Design Issues: low noise, fast settling time, low power

4

M.H. Perrott

Outline of Integer-N Frequency Synthesizer Talk

Fref ref(t) PFD e(t) v(t)
VCO

Fout = N Fref out(t)

Loop Filter Divider

div(t)

Overview of PLL Blocks System Level Modeling

M.H. Perrott

- Transfer function analysis - Nonlinear behavior - Type I versus Type II systems

5

Noise Analysis

Popular VCO Structures

LC oscillator VCO Amp
Vout C L Rp

-Ramp

Vin

Ring oscillator
Vout Vin

-1

M.H. Perrott

LC Oscillator: low phase noise, large area Ring Oscillator: easy to integrate, higher phase noise
6

Model for Voltage to Frequency Mapping of VCO

LC oscillator VCO Amp
Vout C L Rp

-Ramp

Vin

Fvco
Ring oscillator
Vout Vin

-1

VCO Frequency

fc

Fout slope=Kv

Vbias Input Voltage

vin

M.H. Perrott

Model for Voltage to Phase Mapping of VCO

Time-domain frequency relationship (from previous slide) Time-domain phase relationship

Intuition of integral relationship between frequency and phase:

1/Fvco= out(t) out(t) 1/Fvco= +

M.H. Perrott

Frequency-Domain Model for VCO

Time-domain relationship (from previous slide)

Corresponding frequency-domain model

Laplace-Domain v(t) out(t) v(t) 2Kv s VCO out(t)

Frequency-Domain v(t) Kv jf VCO out(t)

VCO

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Divider

Implementation
N out(t) out(t) div(t)

Counter count value out div(t)

Time-domain model

N=6

- Frequency: - Phase:

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10

Frequency-Domain Model of Divider

Time-domain relationship between VCO phase and divider output phase (from previous slide)

Corresponding frequency-domain model (same as Laplace-domain)

out(t)

Divider

div(t)

out(t)

1 N Divider

div(t)

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Phase Detector (PD)

XOR structure

- Average value of error pulses corresponds to phase error - Loop filter extracts the average value and feeds to VCO
ref(t) e(t) div(t)

ref(t) div(t)
1

e(t)
-1

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12

Modeling of XOR Phase Detector

Average value of pulses is extracted by loop filter

- Look at detector output over one cycle:

W 1

e(t)
-1 T/2

Equation:

M.H. Perrott

13

Relate Pulse Width to Phase Error

Two cases:
< ref div < 0
T/2 ref(t) div(t)
1

0 < ref div <

T/2 ref(t) div(t)
1

e(t)
-1 W

e(t)
-1 W

W=-

ref div T/2

W=

ref div T/2

M.H. Perrott

14

Overall XOR Phase Detector Characteristic

< ref div < 0
T/2 ref(t) div(t)
1

0 < ref div <

T/2 ref(t) div(t)
1

e(t)
-1 W

e(t)
-1 W

W=-

ref div T/2

W=

ref div T/2

avg{e(t)}
gain = -2/ 1 gain = 2/

/2
-1

/2

ref - div

phase detector range =

M.H. Perrott 15

Frequency-Domain Model of XOR Phase Detector

Assume phase difference confined within 0 to radians

- Phase detector characteristic looks like a constant gain

element
avg{e(t)}
gain = -2/ 1 gain = 2/

/2
-1

/2

ref - div

Corresponding frequency-domain model

ref(t) PD e(t) ref(t) 2 PD gain
16

e(t)

div(t)
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div(t)

Loop Filter

Consists of a lowpass filter to extract average of phase detector error pulses Frequency-domain model
Laplace-Domain Frequency-Domain e(t) H(f) H(s) VCO VCO v(t)

e(t)

Loop Filter

v(t)

e(t) H(s)

v(t)

First order example

e(t) R1 C1 v(t)

M.H. Perrott

17

Overall Linearized PLL Frequency-Domain Model

Combine models of individual components

Laplace-Domain Model
XOR PD

Loop Filter

VCO

ref(t)

e(t) H(s)
Divider

v(t)

2Kv s

out(t)

div(t)

1 N Frequency-Domain Model
XOR PD

Loop Filter

VCO

ref(t)

e(t) H(f)
Divider

v(t)

Kv jf

out(t)

div(t)

1 N
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M.H. Perrott

Open Loop versus Closed Loop Response

Frequency-domain model
XOR PD

Loop Filter

VCO

ref(t)

e(t) H(f)
Divider

v(t)

Kv jf

out(t)

div(t)

1 N

Define A(f) as open loop response

Define G(f) as a parameterizing closed loop function

- More details later in this lecture

M.H. Perrott

19

Classical PLL Transfer Function Design Approach

1. Choose an appropriate topology for H(f)

Usually chosen from a small set of possibilities

2. Choose pole/zero values for H(f) as appropriate for the required filtering of the phase detector output

Constraint: set pole/zero locations higher than desired PLL bandwidth to allow stable dynamics to be possible

3. Adjust the open-loop gain to achieve the required bandwidth while maintaining stability

M.H. Perrott

Plot gain and phase bode plots of A(f) Use phase (or gain) margin criterion to infer stability

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Example: First Order Loop Filter

Overall PLL block diagram

XOR PD

Loop Filter

VCO

ref(t)

e(t) H(f)
Divider

v(t)

Kv jf

out(t)

div(t)

1 N

Loop filter
e(t) R1 C1 v(t)

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21

Closed Loop Poles Versus Open Loop Gain

Evaluation of Phase Margin
Open loop gain increased 20log|A(f)|

Closed Loop Pole Locations of G(f)

Im{s} C

Dominant pole pair

0 dB

fp C B A

f A Re{s} 0 A

angle(A(f))
-90
o

-120

PM = 59o for A PM = 45o for B PM = 33o for C

-150o

-180o

M.H. Perrott

Higher open loop gain leads to an increase in Q of closed loop poles

22

Corresponding Closed Loop Response

Frequency Response of G(f)
5 dB 0 dB -5 dB

Step Response of G(f)

1.4

C B A

C B A

0.6

fp

Increase in open loop gain leads to

- Peaking in closed loop frequency response - Ringing in closed loop step response
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M.H. Perrott

The Impact of Parasitic Poles

Loop filter and VCO may have additional parasitic poles and zeros due to their circuit implementation We can model such parasitics by including them in the loop filter transfer function Example: add two parasitic poles to first order filter
e(t) R1 Parasitics C1 v(t)

M.H. Perrott

24

Closed Loop Poles Versus Open Loop Gain

Evaluation of Phase Margin
Open loop gain increased 20log|A(f)|

Closed Loop Pole Locations of G(f)

Im{s} C Dominant pole pair

0 dB

fp fp2fp3 C B A

f Non-dominant poles B A
PM = 72 for A PM = 51o for B
o

angle(A(f))
-90
o

Re{s} 0

A B

-165 o -180 -240

PM = -12 for C

-315

M.H. Perrott

25

Corresponding Closed Loop Response

Closed Loop Frequency Response

C

Closed Loop Step Response

0 dB

B A

Frequency

Time

Increase in open loop gain now eventually leads to instability

- Large peaking in closed loop frequency response - Increasing amplitude in closed loop step response

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Response of PLL to Divide Value Changes

XOR PD

Loop Filter

VCO

ref(t)

e(t) H(f)
Divider

v(t)

Kv jf

out(t)

div(t)

1 N N+1 N

Change in output frequency achieved by changing the divide value Classical approach provides no direct model of impact of divide value variations

- Treat divide value variation as a perturbation to a linear

system PLL responds according to its closed loop response

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27

Response of an Actual PLL to Divide Value Change

Example: Change divide value by one

Synthesizer Response To Divider Step
N (Divide Value)
93 92.8 92.6 92.4 92.2 92 91.8 40 60 80 100 120 140 160 180 200 220 240

Output Frequency (GHz)

1.87

1.86

1.85

1.84

1.83

40

60

80

100

120

140

160

180

200

220

240

Time (microseconds)

- PLL responds according to closed loop response!

M.H. Perrott 28

What Happens with Large Divide Value Variations?

PLL temporarily loses frequency lock (cycle slipping occurs)

Synthesizer Response To Divider Step
96

N (Divide Value)

95 94 93 92 40 60 80 100 120 140 160 180 200 220 240

Output Frequency (GHz)

1.92 1.9 1.88 1.86 1.84 40 60 80 100 120 140 160 180 200 220 240

Time (microseconds)

- Why does this happen?

M.H. Perrott 29

Recall Phase Detector Characteristic

avg{e(t)}
gain = -2/ 1 gain = 2/

/2
-1

/2

ref - div

To simplify modeling, we assumed that we always operated in a confined phase range (0 to )

- Led to a simple PD model

happens to be in

Large perturbations knock us out of that confined phase range

- PD behavior varies depending on the phase range it

30

M.H. Perrott

Cycle Slipping

Consider the case where there is a frequency offset between divider output and reference

- We know that phase difference will accumulate

ref(t) div(t)

Resulting ramp in phase causes PD characteristic to be swept across its different regions (cycle slipping)
avg{e(t)}
gain = -2/ 1 gain = 2/

M.H. Perrott

/2
-1

/2

ref - div

31

Impact of Cycle Slipping

Loop filter averages out phase detector output Severe cycle slipping causes phase detector to alternate between regions very quickly

- Average value of XOR characteristic can be close to zero - PLL frequency oscillates according to cycle slipping - In severe cases, PLL will not re-lock
PLL has finite frequency lock-in range!
XOR DC characteristic
cycle slipping 1 -1 3 n (n+2)

ref - div

M.H. Perrott

32

Back to PLL Response Shown Previously

PLL output frequency indeed oscillates

Synthesizer Response To Divider Step
96

- Eventually locks when frequency difference is small enough

N (Divide Value)
95 94 93 92 40 60 80 100 120 140 160 180 200 220 240

Output Frequency (GHz)

1.92 1.9 1.88 1.86 1.84 40 60 80 100 120 140 160 180 200 220 240

Time (microseconds)

- How do we extend the frequency lock-in range?

M.H. Perrott 33

Phase Frequency Detectors (PFD)

Example: Tristate PFD

1 ref(t)
R

up(t)
D Q Q

e(t)
R

1 div(t)

Q Q

down(t)

Ref(t) Div(t) Up(t) Down(t) E(t)

1 0 -1
34

M.H. Perrott

Tristate PFD Characteristic

Calculate using similar approach as used for XOR phase detector avg{e(t)}
1 gain = 1/(2) 2 2

ref - div

1 phase detector range = 4

Note that phase error characteristic is asymmetric about zero phase

- Key attribute for enabling frequency detection

M.H. Perrott

35

PFD Enables PLL to Always Regain Frequency Lock

Asymmetric phase error characteristic allows positive frequency differences to be distinguished from negative frequency differences

- Average value is now positive or negative according to sign of frequency offset - PLL will always relock
Tristate DC characteristic
cycle slipping 1

2n
lock

ref - div

-1

M.H. Perrott

36

Another PFD Structure

XOR-based PFD
D Q R Q

ref(t)

Q Q

ref/2(t)

e(t)

div(t)

Q Q

div/2(t)

D SQ Q

Divide-by-2

Phase Detector

Frequency Detector

ref(t) div(t) ref/2(t) div/2(t) e(t)

1 -1

M.H. Perrott

37

XOR-based PFD Characteristic

Calculate using similar approach as used for XOR phase detector

avg{e(t)}
1 gain = 1/

ref - div

1 phase detector range = 2

Phase error characteristic asymmetric about zero phase

cycle slipping depending on sign of frequency error

- Average value of phase error is positive or negative during

38

M.H. Perrott

Linearized PLL Model With PFD Structures

Assume that when PLL in lock, phase variations are within the linear range of PFD

- Simulate impact of cycle slipping if desired (do not

include its effect in model)

Same frequency-domain PLL model as before, but PFD gain depends on topology used
Tristate: =1 PFD XOR-based: =2

Loop Filter

VCO

ref(t)

e(t) H(f)
Divider

v(t)

Kv jf

out(t)

div(t)

1 N
39

M.H. Perrott

Type I versus Type II PLL Implementations

Type I: one integrator in PLL open loop transfer function

- VCO adds on integrator - Loop filter, H(f), has no integrators - Loop filter, H(f), has one integrator
Tristate: =1 PFD XOR-based: =2

Type II: two integrators in PLL open loop transfer function

Loop Filter

VCO

ref(t)

e(t) H(f)
Divider

v(t)

Kv jf

out(t)

div(t)

1 N
40

M.H. Perrott

VCO Input Range Issue for Type I PLL Implementations

0

DC output range of gain block versus integrator

Gain Block 0 Integrator K s

Issue: DC gain of loop filter often small and PFD output range is limited
VDD

- Loop filter output fails to cover full input range of VCO

No Integrator
Gnd

Output Range of Loop Filter

ref(t) PFD

e(t)

Loop Filter

v(t)

out(t)

VCO Divider N[k]

M.H. Perrott 41

Options for Achieving Full Range Span of VCO

Type I

- Add a D/A converter to provide coarse tuning

Adds power and complexity Steady-state phase error inconsistently set

Type II

- Integrator automatically provides DC level shifting

Low power and simple implementation Steady-state phase error always set to zero
Type I
Course Tune Output Range of Loop Filter

Type II
Output Range of Loop Filter
VDD

D/A
VDD

No Integrator
Gnd

Contains Integrator
Gnd

e(t) C.P.
M.H. Perrott

Loop Filter

v(t)

e(t) C.P.

Loop Filter

v(t)

42

A Common Loop Filter for Type II PLL Implementation

Use a charge pump to create the integrator

- Current onto a capacitor forms integrator - Add extra pole/zero using resistor and capacitor

Gain of loop filter can be adjusted according to the value of the charge pump current Example: lead/lag network
e(t) Charge Pump i(t) v(t) R1 C2

C1

M.H. Perrott

43

Charge Pump Implementations

Switch currents in and out:

Single-Ended Differential

Icp up(t) Iout(t) down(t) Icp

Icp

Icp Iout(t)

e(t)

e(t)

2Icp

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44

Modeling of Loop Filter/Charge Pump

Charge pump is gain element Loop filter forms transfer function

Charge Pump Loop Filter

e(t)

Icp

v(t) H(s)

Example: lead/lag network from previous slide

M.H. Perrott

45

PLL Design with Lead/Lag Filter

Overall PLL block diagram

Tristate: =1 PFD XOR-based: =2

Charge Pump Loop Filter

VCO

ref(t)

e(t)

Icp

v(t) H(f)

Kv jf

out(t)

div(t)

Divider

1 N

Loop filter

Set open loop gain to achieve adequate phase margin

- Set f lower than and f

z

higher than desired PLL bandwidth

46

M.H. Perrott

Closed Loop Poles Versus Open Loop Gain

Evaluation of Phase Margin
Open loop gain increased 20log|A(f)|

Closed Loop Pole Locations of G(f)

Im{s} C

B
0 dB

Dominant pole pair A

f fz fp C B A angle(A(f)) Non-dominant pole A

for B PM = 54o PM = 53o for A PM = 55o for C

Re{s} BC A 0

120

-140

-160

-180

M.H. Perrott

Open loop gain cannot be too low or too high if reasonable phase margin is desired
47

Impact of Parasitics When Lead/Lag Filter Used

We can again model impact of parasitics by including them in loop filter transfer function
e(t) i(t) Parasitics C1 R1 C2 v(t)

Charge Pump

Example: include two parasitic poles with the lead/lag transfer function

M.H. Perrott

48

Closed Loop Poles Versus Open Loop Gain

Evaluation of Phase Margin
Open loop gain increased 20log|A(f)|

Closed Loop Pole Locations of G(f)

Im{s} Dominant pole pair C

B
0 dB

f fz fp fp2 fp3 C B A Non-dominant poles A A

PM = 46o for A PM = 38o for B
o

A Re{s} BC 0

angle(A(f))
120
o

-140

-160

-180

PM = -7o for C

M.H. Perrott

Closed loop response becomes unstable if open loop gain is too high
49

Negative Issues For Type II PLL Implementations

|G(f)|
fcp fz 1 Peaking caused by undesired pole/zero pair Step Responses for a Second Order G(f) implemented as a Bessel Filter 1.4 Type II: fz/fo = 1/3
Type II: fz/fo = 1/8

Normalized Amplitude

1
Type I

0.6

fz fo Frequency (Hz)

1 2 3 Normalized time: t*fo

Parasitic pole/zero pair causes

- Peaking in the closed loop frequency response A big issue for CDR systems, but not too bad for wireless - Extended settling time due to parasitic tail response
Bad for wireless systems demanding fast settling time
50

M.H. Perrott

Summary of Integer-N Dynamic Modeling

Linearized models can be derived for each PLL block

- Resulting transfer function model of PLL is accurate for small perturbations in PLL - Linear PLL model breaks down for large perturbations
on PLL, such as a large step change in frequency Cycle slipping is key nonlinear effect

Key issues for designing PLL are

- Achieve stable operation with desired bandwidth - Allow full range of VCO with a simple implementation
Type II PLL is very popular to achieve this

M.H. Perrott

51

Noise Analysis of Integer-N Synthesizers

Frequency Synthesizer Noise in Wireless Systems

Zin

From Antenna and Bandpass Filter

PC board trace

Mixer Package Interface RF in LNA LO signal VCO IF out To Filter

Zo

Reference Frequency

Frequency Synthesizer

Phase Noise f

fo

Synthesizer noise has a negative impact on system

- Receiver lower sensitivity, poorer blocking performance - Transmitter increased spectral emissions (output spectrum
must meet a mask requirement)
53

Noise is characterized in frequency domain

M.H. Perrott

Noise Modeling for Frequency Synthesizers

Sout(f) Extrinsic noise (from PLL) vn(t) vin(t) Intrinsic noise out(t) Phase Noise

PLL dynamics set VCO carrier frequency vc(t) To PLL

fo

PLL has an impact on VCO noise in two ways

- Adds extrinsic noise from various PLL circuits - Highpass filters VCO noise through PLL feedback dynamics - Simpler than dealing directly with PLL sine wave output

Focus on modeling the above based on phase deviations

M.H. Perrott

54

Phase Deviation Model for Noise Analysis

Note: Kv units are Hz/V
PLL dynamics set VCO carrier frequency vc(t) To PLL Extrinsic noise (from PLL) vn(t) vin(t) Intrinsic noise 2Kv s vn(t) out Frequency-domain view Sout(f) Phase Noise

fo
2cos(2fot+out(t)) out(t)

Model the impact of noise on instantaneous phase

- Relationship between PLL output and instantaneous phase - Output spectrum (we will derive this in a later lecture)

M.H. Perrott

55

Phase Noise Versus Spurious Noise

Phase noise is non-periodic

Sout(f) dBc/Hz

Sout(f) f

- Described as a spectral density relative to carrier power

Spurious noise is periodic
Sout(f) dBc -fo 1 f fspur 1 dspur 2 2 fspur fo

-fo

fo

- Described as tone power relative to carrier power

M.H. Perrott 56

Sources of Noise in Frequency Synthesizers

Reference Jitter Reference Feedthrough Charge Pump Noise VCO Noise -20 dB/dec f T ref(t) 1/T f f f

e(t) Charge PFD Pump

Loop Filter

v(t)
VCO

div(t) Divider Jitter

Divider

N f

M.H. Perrott

Extrinsic noise sources to VCO

- Reference/divider jitter and reference feedthrough - Charge pump noise

57

Modeling the Impact of Noise on Output Phase of PLL

Divider/Reference Jitter S jit(f) Reference Feedthrough S Espur(f) Charge Pump Noise S cpn(f) VCO Noise S vn(f) -20 dB/dec
0

1/T

jit[k] ref [k]

PFD

espur(t) e(t) Icp

cpn(t)
v(t)

vn(t) H(f)
Loop Filter KV jf VCO

out(t)

div[k]

Charge Pump

1
N Divider

Determine impact on output phase by deriving transfer function from each noise source to PLL output phase

- There are a lot of transfer functions to keep track of!

58

M.H. Perrott

Simplified Noise Model

PFD-referred Noise S En(f) VCO-referred Noise S vn(f) -20 dB/dec
0

1/T

en(t) ref [k]

PFD

vn(t) e(t)
v(t)

Icp

H(f)
Loop Filter

KV jf VCO

out(t)

div[k]

Charge Pump

1
N Divider

Refer all PLL noise sources (other than the VCO) to the PFD output

- PFD-referred noise corresponds to the sum of these

noise sources referred to the PFD output

M.H. Perrott

59

Impact of PFD-referred Noise on Synthesizer Output

PFD-referred Noise S En(f) VCO-referred Noise S vn(f) -20 dB/dec
0

1/T

en(t) ref [k]

PFD

vn(t) e(t)
v(t)

Icp

H(f)
Loop Filter

KV jf VCO

out(t)

div[k]

Charge Pump

1
N Divider

Transfer function derived using Blacks formula

M.H. Perrott

60

Impact of VCO-referred Noise on Synthesizer Output

PFD-referred Noise S En(f) VCO-referred Noise S vn(f) -20 dB/dec
0

1/T

en(t) ref [k]

PFD

vn(t) e(t)
v(t)

Icp

H(f)
Loop Filter

KV jf VCO

out(t)

div[k]

Charge Pump

1
N Divider

Transfer function again derived from Blacks formula

M.H. Perrott

61

A Simpler Parameterization for PLL Transfer Functions

PFD-referred Noise S En(f) VCO-referred Noise S vn(f) -20 dB/dec
0

1/T

en(t) ref [k]

PFD

vn(t) e(t)
v(t)

Icp

H(f)
Loop Filter

KV jf VCO

out(t)

div[k]

Charge Pump

1
N Divider

Define G(f) as

Always has a gain of one at DC

- A(f) is the open loop transfer function of the PLL

M.H. Perrott 62

Parameterize Noise Transfer Functions in Terms of G(f)

PFD-referred noise

VCO-referred noise

M.H. Perrott

63

Parameterized PLL Noise Model

PFD-referred Noise S En(f) VCO-referred Noise S vn(f) -20 dB/dec
0

1/T

en(t)
N G(f)

vn(t)
1-G(f)

fo

fo

npfd(t) n(t)
Divider Control c(t) of Frequency Setting (assume noiseless for now)

nvco(t) out(t)

M.H. Perrott

PFD-referred noise is lowpass filtered VCO-referred noise is highpass filtered Both filters have the same transition frequency values

- Defined as f

64

Impact of PLL Parameters on Noise Scaling

Radians2/Hz
PFD-referred Noise S En(f) VCO-referred Noise S vn(f) -20 dB/dec
0

N S e n (f)

S vn(f) f
0

1/T

en(t)
N G(f)

vn(t)
1-G(f)

fo

fo

npfd(t) n(t)
Divider Control c(t) of Frequency Setting (assume noiseless for now)

nvco(t) out(t)

PFD-referred noise is scaled by square of divide value and inverse of PFD gain VCO-referred noise is not scaled (only filtered)

- High divide values lead to large multiplication of this noise

65

M.H. Perrott

Optimal Bandwidth Setting for Minimum Noise

Radians2/Hz
PFD-referred Noise S En(f) VCO-referred Noise S vn(f) -20 dB/dec
0

N S e n (f)

S vn(f) f
0

1/T

en(t)
N G(f)

vn(t) (fo)opt
1-G(f)

fo

fo

npfd(t) n(t)
Divider Control c(t) of Frequency Setting (assume noiseless for now)

nvco(t) out(t)

Optimal bandwidth is where scaled noise sources meet

- Higher bandwidth will pass more PFD-referred noise - Lower bandwidth will pass more VCO-referred noise

M.H. Perrott

66

Resulting Output Noise with Optimal Bandwidth

Radians2/Hz
PFD-referred Noise S En(f) VCO-referred Noise S vn(f) -20 dB/dec
0

N S e n (f)

S vn(f) f
0

1/T

en(t)
N G(f)

vn(t) (fo)opt
1-G(f)

fo

fo

npfd(t) n(t)
Divider Control c(t) of Frequency Setting (assume noiseless for now)

nvco(t) out(t)

Radians2/Hz

S npfd(f) S nvco(f)

f
0

(fo)opt

M.H. Perrott

PFD-referred noise dominates at low frequencies

- Corresponds to close-in phase noise of synthesizer - Corresponds to far-away phase noise of synthesizer
67

VCO-referred noise dominates at high frequencies

Analysis of Charge Pump Noise Impact

Charge Pump Noise S cpn(f) VCO Noise S vn(f) -20 dB/dec PFD-referred Noise
0

en(t) ref [k]

PFD

cpn(t) e(t)
v(t)

vn(t) H(f)
Loop Filter KV jf VCO

Icp

out(t)

div[k]

Charge Pump

1
N Divider

We can refer charge pump noise to PFD output by simply scaling it by 1/Icp

M.H. Perrott

68

Calculation of Charge Pump Noise Impact

Charge Pump Noise S cpn(f) VCO Noise S vn(f) -20 dB/dec PFD-referred Noise
0

en(t) ref [k]

PFD

cpn(t) e(t)
v(t)

vn(t) H(f)
Loop Filter KV jf VCO

Icp

out(t)

div[k]

Charge Pump

1
N Divider

Contribution of charge pump noise to overall output noise

- Need to determine impact of I

M.H. Perrott

cp

on SIcpn(f)
69

Impact of Transistor Current Value on its Noise

Ibias Id

2 id bias

M1

M2 Cbig current source

2 W id L

current bias

Charge pump noise will be related to the current it creates as Recall that gdo is the channel resistance at zero Vds

- At a fixed current density, we have

M.H. Perrott

70

Impact of Charge Pump Current Value on Output Noise

Recall

Given previous slide, we can say

- Assumes a fixed current density for the key transistors

in the charge pump as Icp is varied

Therefore

- Want high charge pump current to achieve low noise - Limitation set by power and area considerations
M.H. Perrott 71

Impact of Synthesizer Noise on Transmitters

Sx(f) Sy(f) reduction of SNR out-of-band emission fRF f

fIF

x(t)

y(t)

out(t) Synthesizer

Sout(f)

close-in phase noise far-away phase noise fLO f

Synthesizer noise can be lumped into two categories

- Close-in phase noise: reduces SNR of modulated signal - Far-away phase noise: creates spectral emissions outside
the desired transmit channel This is the critical issue for transmitters
72

M.H. Perrott

Impact of Remaining Portion of Transmitter

Sx(f) Sy(f) reduction of SNR out-of-band emission fRF f

fIF

Band Select Filter To Antenna

x(t)

y(t) PA out(t)
Sout(f) close-in phase noise far-away phase noise fLO f

Synthesizer

Power amplifier

- Nonlinearity will increase out-of-band emission and create

harmonic content

Band select filter

- Removes harmonic content, but not out-of-band emission

73

M.H. Perrott

Why is Out-of-Band Emission A Problem?

Transmitter 1

Interfering Channel Relative Power Difference (dB)

( Desired Channel)

Transmitter 2

Desired Channel

( Interfering Channel )

Base Station

Near-far problem

- Interfering transmitter closer to receiver than desired transmitter - Out-of-emission requirements must be stringent to
prevent complete corruption of desired signal
74

M.H. Perrott

Specification of Out-of-Band Emissions

Maximum RF Output Emission (dBm)
M2 dBm

M0 dBm M1 dBm

Integration Bandwidth = R Hz

M3 dBm

fRF
Channel Spacing = W Hz

Maximum radiated power is specified in desired and adjacent channels

- Desired channel power: maximum is M dBm - Out-of-band emission: maximum power defined as
0

integration of transmitted spectral density over bandwidth R centered at midpoint of each channel offset
M.H. Perrott 75

Calculation of Transmitted Power in a Given Channel

R Hz R Hz

Sx(fmid) fmid

Sx(fmid) fmid

For simplicity, assume that the spectral density is flat over the channel bandwidth

- Actual spectral density of signal often varies with

frequency over the bandwidth of a given channel

Resulting power calculation (single-sided Sx(f))

Express in dB ( Note: dB(x) = 10log(x) )

M.H. Perrott

76

Transmitter Output Versus Emission Specification

Piecewise Constant Approximation of Transmitter Output Spectrum
RF Output (dBm)
Y0 dBm

Emission Specification
Maximum RF Output Emission (dBm)

Channel Spacing = W Hz

M0 dBm M1 dBm M2 dBm

Y0+X1 dBm Y0+X2 dBm Y0+X3 dBm

Integration Bandwidth = R Hz

fRF
Channel Spacing = W Hz

M3 dBm

fRF
Channel Spacing = W Hz

Assume a piecewise constant spectral density profile for transmitter

- Simplifies calculations
calculations

Issue: emission specification is measured over a narrower band than channel spacing

- Need to account for bandwidth discrepancy when doing

77

M.H. Perrott

Correction Factor for Bandwidth Mismatch

Piecewise Constant Approximation of Transmitter Output Spectrum
RF Output (dBm)
Y0 dBm

Emission Specification
Maximum RF Output Emission (dBm)

Channel Spacing = W Hz

M0 dBm M1 dBm M2 dBm

Y0+X1 dBm Y0+X2 dBm Y0+X3 dBm

Integration Bandwidth = R Hz

fRF
Channel Spacing = W Hz

M3 dBm

fRF
Channel Spacing = W Hz

Calculation of maximum emission in offset channel 1

M.H. Perrott

78

Condition for Most Stringent Emission Requirement

Piecewise Constant Approximation of Transmitter Output Spectrum
RF Output (dBm)
Y0 dBm

Emission Specification
Maximum RF Output Emission (dBm)

Channel Spacing = W Hz

M0 dBm M1 dBm M2 dBm

Y0+X1 dBm Y0+X2 dBm Y0+X3 dBm

Integration Bandwidth = R Hz

fRF
Channel Spacing = W Hz

M3 dBm

fRF
Channel Spacing = W Hz

Out-of-band emission requirements are function of the power of the signal in the desired channel

- For offset channel 1 (as calculated on previous slide) - Most stringent case is when Y
0

maximum

M.H. Perrott

79

Table of Most Stringent Emission Requirements

Piecewise Constant Approximation of Transmitter Output Spectrum
RF Output (dBm)
Y0 dBm

Emission Specification
Maximum RF Output Emission (dBm)

Channel Spacing = W Hz

M0 dBm M1 dBm M2 dBm

Y0+X1 dBm Y0+X2 dBm Y0+X3 dBm

Integration Bandwidth = R Hz

fRF
Channel Spacing = W Hz

M3 dBm

fRF
Channel Spacing = W Hz

Channel Offset 0 1 2 3

Mask Power M0 dBm M1 dBm M2 dBm M3 dBm

Emission Requirements (Most Stringent) Y0 = M0 (for most stringent case) X1 = M1-M0 + dB(W/R) dB X2 = M2-M0 + dB(W/R) dB X3 = M3-M0 + dB(W/R) dB

M.H. Perrott

80

Impact of Synthesizer Noise on Transmitter Output

IF Input (dBm) RF Output (dBm)
M0 dBm

M0+X2 dBm

fIF

fRF foffset

Synthesizer Spectrum (dBc)

IF
0 dBc

RF PA Band Select Filter

To Antenna

X2 dBc

LO fLO foffset f

Consider a spurious tone at a given offset frequency

- Convolution with IF signal produces a replica of the

desired signal at the given offset frequency

M.H. Perrott

81

Impact of Synthesizer Phase Noise (Isolated Channel)

IF Input (dBm) RF Output (dBm)
M0 dBm

M0+X2 dBm

fIF

fRF foffset

Synthesizer Spectrum (dBc)

IF
0 dBc

RF PA Band Select Filter

To Antenna

X2 dBc

LO fLO foffset f

Consider phase noise at a given offset frequency

- Convolution with IF signal produces a smeared version

of the desired signal at the given offset frequency For simplicity, approximate smeared signal as shown
82

M.H. Perrott

Impact of Synthesizer Phase Noise (All Channels)

IF Input (dBm) RF Output (dBm)
M0 dBm

fIF

M0+X1 dBm M0+X2 dBm M0+X3 dBm

fRF
Channel Spacing = W Hz

Synthesizer Spectrum (dBc)

IF
0 dBc

RF PA Band Select Filter

To Antenna

X3 dBc

X0 dBc X1 dBc X2 dBc

LO f

fLO
Channel Spacing = W Hz

Partition synthesizer phase noise into channels

- Required phase noise power (dBc) in each channel is

related directly to spectral mask requirements Exception is X0 set by transmit SNR requirements
83

M.H. Perrott

Synthesizer Phase Noise Requirements

Synthesizer Spectrum (dBc)

IF
0 dBc

RF PA Band Select Filter

To Antenna

X3 dBc

X0 dBc X1 dBc X2 dBc

LO f

fLO

Channel Spacing = W Hz

Impact of channel bandwidth (offset channel 1)

Overall requirements (most stringent, i.e., Y0 = M0)

Channel Offset 0 1 2 3 Emission Requirements (Most Stringent) Y0 = M0 X1 = M1-M0 + dB(W/R) dB X2 = M2-M0 + dB(W/R) dB X3 = M3-M0 + dB(W/R) dB Maximum Synth. Phase Noise (Most Stringent) set by required transmit SNR X1 - dB(W) dBc/Hz X2 - dB(W) dBc/Hz X3 - dB(W) dBc/Hz
84

M.H. Perrott

Example DECT Cordless Telephone Standard

Standard for many cordless phones operating at 1.8 GHz Transmitter Specifications

- Channel spacing: W = 1.728 MHz - Maximum output power: M = 250 mW (24 dBm) - Integration bandwidth: R = 1 MHz - Emission mask requirements
o

M.H. Perrott

85

Synthesizer Phase Noise Requirements for DECT

Using previous calculations with DECT values

Channel Offset Mask Power 24 dBm -8 dBm Maximum Synth. Noise Power in Integration BW Maximum Synth. Phase Noise at Channel Offset

0 1.728 MHz

set by required transmit SNR -92 dBc/Hz X1 = -29.6 dBc X2 = -51.6 dBc X3 = -65.6 dBc -114 dBc/Hz -128 dBc/Hz

3.456 MHz -30 dBm 5.184 MHz -44 dBm

Graphical display of phase noise mask

Synthesizer Spectrum (dBc)
-92 dBc/Hz -114 dBc/Hz -128 dBc/Hz

fLO
Channel Spacing = 1.728 MHz

f
86

M.H. Perrott

Critical Specification for Phase Noise

Critical specification is defined to be the one that is hardest to meet with an assumed phase noise rolloff

- Assume synthesizer phase noise rolls off at -20

dB/decade Corresponds to VCO phase noise characteristic

For DECT transmitter synthesizer

- Critical specification is -128 dBc/Hz at 5.184 MHz offset

Synthesizer Spectrum (dBc)
0 dBc Phase Noise Rolloff: -20 dB/dec -92 dBc/Hz -114 dBc/Hz

Critical Spec.

-128 dBc/Hz

fLO
Channel Spacing = 1.728 MHz

f
87

M.H. Perrott

Receiver Blocking Performance

RF Input (dBm) -39 -58 -73 Band Select Filter Must Pass All Channels IF Output (dBm) Channel Filter Bandwidth

fRF Band Select Filter LNA

fIF Channel Filter

To IF Processing Stage
Synthesizer Spectrum (dBc/Hz) 0 dBc

Synthesizer fLO f

Radio receivers must operate in the presence of large interferers (called blockers) Channel filter plays critical role in removing blockers
Passes desired signal channel, rejects interferers
88

M.H. Perrott

Impact of Nonidealities on Blocking Performance

RF Input (dBm) -39 -58 -73 Band Select Filter Must Pass All Channels IF Output (dBm) Channel Filter Bandwidth Synthesizer Noise and Mixer/LNA Distortion Produce Inband Interference

fRF Band Select Filter LNA

fIF Channel Filter

To IF Processing Stage
Synthesizer Spectrum (dBc/Hz) 0 dBc Phase Noise (dBc/Hz) Spurious Noise (dBc)

Synthesizer fLO

Blockers leak into desired band due to

In-band interference cannot be removed by channel filter! M.H. Perrott

- Nonlinearity of LNA and mixer (IIP3) - Synthesizer phase and spurious noise

89

Quantifying Tolerable In-Band Interference Levels

RF Input (dBm) -39 -58 -73 Band Select Filter Must Pass All Channels IF Output (dBm) Channel Filter Bandwidth Synthesizer Noise and Mixer/LNA Distortion Produce Inband Interference

Min SNR: 15-20 dB

fRF Band Select Filter LNA

fIF Channel Filter

To IF Processing Stage
Synthesizer Spectrum (dBc/Hz) 0 dBc Phase Noise (dBc/Hz) Spurious Noise (dBc)

Synthesizer fLO

Digital radios quantify performance with bit error rate (BER)

- Minimum BER often set at 1e-3 for many radio systems - There is a corresponding minimum SNR that must be achieved
90

M.H. Perrott

Goal: design so that SNR with interferers is above SNRmin

Impact of Synthesizer on Blockers

RF Input (dBm) Y dB IF Output (dBm)

fRF Synthesizer Spectrum (dBc)

foffset RF IF

fIF

0 dBc

LO
fLO

Synthesizer passes desired signal and blocker

desired signal

- Assume blocker is Y dB higher in signal power than

91

M.H. Perrott

Impact of Synthesizer Spurious Noise on Blockers

RF Input (dBm) Y dB SNR: -X-Y dB fRF Synthesizer Spectrum (dBc) Spurious Tone X dBc f fIF f IF Output (dBm) X dB

foffset RF IF

0 dBc

LO foffset
fLO

Spurious tones cause the blocker (Y dB) (and desired) signals to leak into other frequency bands

- In-band interference occurs when spurious tone offset frequency is same as blocker offset frequency - Resulting SNR = -X-Y dB with spurious tone (X dBc)

M.H. Perrott

92

Impact of Synthesizer Phase Noise on Blockers

RF Input (dBm) Y dB SNR: -X-Y dB fRF Synthesizer Spectrum (dBc) f fIF f IF Output (dBm) X dB

foffset RF IF

0 dBc

X dBc

LO
fLO

foffset

Same impact as spurious tone, but blocker signal is smeared by convolution with phase noise

- For simplicity, ignore smearing and approximate as

shown above

M.H. Perrott

93

Blocking Performance Analysis (Part 1)

RF Input (dBm) Y dB SNR: -X-Y dB fRF Synthesizer Spectrum (dBc) f fIF f In-Channel IF Output (dBm)

foffset RF IF

0 dBc

X dBc

LO
fLO

foffset

Ignore all out-of-band energy at the IF output

- Assume that channel filter removes it - Motivation: simplifies analysis

M.H. Perrott

94

Blocking Performance Analysis (Part 2)

RF Input (dBm) Y1 dB Y2 dB SNRmin: 15-20 dB In-Channel IF Output (dBm) Channel Filter Bandwidth = W Hz Inband Interference Produced by Synth. Phase Noise

fRF
Synthesizer Spectrum (dBc)
Channel Spacing

fIF IF

RF
0 dBc

X0 dBc X1 dBc X2 dBc

LO f

fLO
Channel Spacing

Consider the impact of blockers surrounding the desired signal with a given phase noise profile

- SNR must be maintained - Evaluate impact on SNR one blocker at a time

min

M.H. Perrott

95

Blocking Performance Analysis (Part 3)

RF Input (dBm) Y1 dB Y2 dB SNRmin: 15-20 dB In-Channel IF Output (dBm) Channel Filter Bandwidth = W Hz Inband Interference Produced by Synth. Phase Noise

fRF
Synthesizer Spectrum (dBc)
Channel Spacing

fIF IF

RF
0 dBc

X0 dBc X1 dBc X2 dBc

LO f

fLO
Channel Spacing

Channel Relative Blocking Maximum Synth. Noise Offset Power Power at Channel Offset 0 1 2 3 0 dB Y1 dB Y2 dB Y3 dB X0 = -SNRmin dBc X1 = -SNRmin-Y1 dBc X2 = -SNRmin-Y2 dBc X3 = -SNRmin-Y3 dBc

Derive using the relationship SNR = -X-Y dB >= SNRmin

M.H. Perrott

96

Blocking Performance Analysis (Part 4)

RF Input (dBm) Y1 dB Y2 dB SNRmin: 15-20 dB In-Channel IF Output (dBm) Channel Filter Bandwidth = W Hz Inband Interference Produced by Synth. Phase Noise

fRF
Synthesizer Spectrum (dBc)
Channel Spacing

fIF IF

RF
0 dBc

X0 dBc X1 dBc X2 dBc

LO f

fLO
Channel Spacing

Convert power to spectral density

Maximum Synth. Phase Noise at Channel Offset X0 - dB(W) dBc/Hz X1 - dB(W) dBc/Hz X2 - dB(W) dBc/Hz X3 - dB(W) dBc/Hz

Channel Relative Blocking Maximum Synth. Noise Offset Power Power at Channel Offset 0 1 2 3 0 dB Y1 dB Y2 dB Y3 dB X0 = -SNRmin dBc X1 = -SNRmin-Y1 dBc X2 = -SNRmin-Y2 dBc X3 = -SNRmin-Y3 dBc

M.H. Perrott

97

Example DECT Cordless Telephone Standard

Receiver blocking specifications

- Channel spacing: W = 1.728 MHz - Power of desired signal for blocking test: -73 dBm - Minimum bit error rate (BER) with blockers: 1e-3 Sets the value of SNRmin Perform receiver simulations to determine SNRmin Assume SNRmin = 15 dB for calculations to follow Strength of interferers for blocking test

M.H. Perrott

98

Synthesizer Phase Noise Requirements for DECT

RF Input (dBm) -33 dBm -39 dBm -58 dBm -73 dBm In-Channel IF Output (dBm) Channel Filter Bandwidth W = 1.73 MHz Inband Interference Produced by Synth. Phase Noise

SNRmin: 15 dB

fRF
Synthesizer Spectrum (dBc)
Channel Spacing = 1.73 MHz

fIF IF

RF

0 dBc X0 dBc X1 dBc X2 dBc

X3 dBc

LO f

fLO
Channel Spacing = 1.73 MHz

Channel Relative Blocking Maximum Synth. Noise Offset Power Power at Channel Offset 0 1.728 MHz 3.456 MHz 5.184 MHz 0 dB Y1 = 15 dB Y2 = 34 dB Y3 = 40 dB X0 = -15 dBc X1 = -30 dBc X2 = -49 dBc X3 = -55 dBc

Maximum Synth. Phase Noise at Channel Offset -77 dBc/Hz -92 dBc/Hz -111 dBc/Hz -117 dBc/Hz

M.H. Perrott

99

Graphical Display of Required Phase Noise Performance

Mark phase noise requirements at each offset frequency

Synthesizer Spectrum (dBc)
0 dBc Phase Noise Rolloff: -20 dB/dec -92 dBc/Hz -111 dBc/Hz -117 dBc/Hz

Critical Spec.

fLO
Channel Spacing = 1.728 MHz

Calculate critical specification for receive synthesizer

- Critical specification is -117 dBc/Hz at 5.184 MHz offset

Lower performance demanded of receiver synthesizer than transmitter synthesizer in DECT applications!
M.H. Perrott 100

Summary of Noise Analysis of Integer-N Synthesizers

Key PLL noise sources are

- VCO noise (we will cover in detail tomorrow) - PFD-referred noise

Charge pump noise, reference noise, etc.

Setting of PLL bandwidth has strong impact on noise

- High PLL bandwidth suppresses VCO noise - Low PLL bandwidth suppresses PFD-referred noise

Noise performance required of PLL depends on application

- Wireless transmitter: must meek spectral mask - Wireless receiver: must suppress blockers and achieve
good SNR for received signal
101

M.H. Perrott