Sanyo Integrated Circuits For TV-VCR Use

Ordering number : EP58B
Digital TV, Analog TV, Flat Panel Display, and VCR ICs
'04-2
TOKYO OFFICE
Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN Telephone: 81-(0)3-3837-6339, 6340, 6342, Facsimile: 81-(0)3-3837-6377
URL; http://www.semic.sanyo.co.jp/index_e.htm
SANYO Electric Co.,Ltd. Semiconductor Company Homepage This catalog provides information as of February, 2004. Specifications and information herein are subject to change without notice.
Printed in Japan / February 2004 2k PC Plan
TV IC Lineup that Has Earned the Top Market Share

CONTENTS
Digital TV Decoder System Chipset ..................................................................3.4 Digital TV TS + Audio + Video Decoder IC with Built-in OSD Function ........................................5 Digital TV 32-Bit RISC Microcontroller ....................................................................................6 Flat Panel Display Video Signal-Processing ICs ............................................7.8 Scan Converter IC for Flat Panel Displays ...............................................................................9 Video Signal Processor .......................................................................................................10 8-Bit Flash Microcontroller ..............................................................................................11.12 Color TV I2C Bus System Chip Set .................................................................13.14 Built-in CTV Microcontroller Signal-Processing System ICs SUSOCTMLA76930 Series ....................................................................................15.16 Signal-Processing IC with Integrated Microcontroller .........................................................17.18 I2C Bus Control Lineup LA76810 Series .......................................................................19 to 23 Vertical Output ICs ...................................................................................................24 to 34 LC863 Series .....................................................................................................35 to 36 TV Control Microcontrollers (LC863 Series) .................................................................37 to 38 VHS Format VCR System Chip Set .................................................................39.40 Tuner IC .......................................................................................................................41.42 VIF/SIF Signal-Processing Circuit ...............................................................................43 to 49 PAL Hi-Fi Audio Signal Record and Playback Processing .......................................................50
Hi-Fi Signal Processing HiFi Processing with Built-in Audio Multiplex Decoder for US Market Products ..........................................................................................51 Hi-Fi Signal Processing HiFi Processing with Built-in Audio Multiplex Decoder for Japanese Market Products ................................................................................52 Video and Audio Signal-Processing IC ........................................................................53 to 55 VCR SECAM Chrominance Signal-Processing IC ..................................................................56 On-Screen Display Controller IC .................................................................................57 to 59 VPS/PDC Slicer IC .............................................................................................................60 .. ....................................................................................................61.62 VHF Band RF Module PWM Capstan + Sensorless Drum + Loading Motor Drivers ....................................................63
New proposals from SANYO, the industry leader in TV IC sales worldwide. SANYO has now developed the SUSOC(TM) series of on-chip microcontroller TV signal-processing ICs that support all TV signal standards worldwide. SANYO was also one of the first companies to respond to digital TV system needs with devices based on SANYO's industry-leading bipolar technology. SANYO provides powerful support as the curtain rises on full-scale adoption of digital TV. For worldwide TV, for next generation TV, SANYO ICs can help you open new markets worldwide.
Digital TV Decoder System Chip Set

SANYO 480i / 480p down decoder chipsets support both digital satellite broadcast and digital terrestrial broadcast reception, and are optimal for compact and popularly-priced TV sets.
Color TV I2C Bus System Chip Set

SANYO's extensive lineup of color TV I2C bus control system ICs support design and manufacture of products appropriate for any and all markets.
SUSOC
TM
Package Dimensions ............................................................................................64 to 66

: SUSOCTM is a trademark of SANYO Electric Co., Ltd. These flash memory products are manufactured and sold by SANYO Electric Co., Ltd. under license from Silicon Storage Technologies, Inc. (SST).
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products(including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co. , Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
Built-in CTV microcontroller TV signal-processing system ICs Full lineup that covers all worldwide markets Global pin-compatible series (Multiformat, PAL/NTSC, NTSC)
LC863 Series
The LC863 Series devices are multifunction high-speed 8-bit CMOS system microcontrollers that include OSD functionality. This series provides simple and easy support for frequent specification changes during production ramp up and specification changes by target application by providing flash ROM versions instead of the earlier erasable EPROM and one-time programmable PROM versions. In addition to the well-received large-capacity display RAM, the LC864 Series provides a high-performance OSD function that features increased CGROM capacity and provides a simple graphics function.
VHS Format VCR System Chip Set

These products support high quality and high reliability in end products by adopting adjustment-free technologies and furthermore integrate even more peripheral components on the same chip. This increased integration density promotes even further reductions in the required circuit board mounting area.
Digital TV Decoder System Chip Set

New product Development
SANYO 480i / 480p down decoder chipsets support both digital satellite broadcast and digital terrestrial broadcast reception and are optimal for compact and popularly-priced TV sets.
Satellite broadcast antenna BS Tuner
Single-chip AV decoder P 5 LC74152B
TS demultiplex
MPEG2 video decoder
Audio decoder
D/A
Audio output
Terrestrial broadcast antenna Terrestrial broadcast signals Tuner Encoder D/A Descrambler OSD controller Video scaler Video output
System-on-chip A/V decoder P 5 LC74152B

MP@HL stream support (down decoding) 480i/480p video output MPEG2 AAC/BC audio support Built-in OSD function NTSC encoder Uses two external 64 Mbit SDRAMs Supply voltage: 1.8 V/3.3 V Package: PGBA352
Host bus
Microcontroller for digital TV P 6 LC74186E
Digital TV microcontroller P 6 LC74186E

R
Peripheral
IBM PowerPC
IBM PowerPC Includes UART, I2C, Smart Card, SIO, and PIO interfaces Supply voltage: 3.3 V Package: PQFP208
: The following are trademarks of International Business Machines Corporation in the Unaited States,or other countries,or both. IBM,PowerPC R
Extensive Lineup Provides Full System Support

RF amplifier transistors
Ultrahigh frequency transistors 2SC4869, 2SC5225, 2SC5501, 2SC5503, SBFP420M
Power supply system peripheral transistors

High breakdown voltage MOSFET series Ultralow on-resistance MOSFET series Ultraminiature lightweight PicoMOSTM series Ultralow saturation voltage MBIT-II transistor series Low VF Schottky barrier diode series PicoTR series
Muting circuit block

Muting transistor series
TV tuner and VCR transistors

PicoGET Series 15GN01M, 55GN01M
SANYO TV . VCR
SANYO TV . VCR
Digital TV TS + Audio + Video Decoder IC with Built-in OSD Function
Digital TV 32-Bit RISC Microcontroller
LC74152B
Overview
The LC74152B is a digital TV decoder IC that integrates MPEG2 video decoder, AAC audio decoder, transport stream decoder, data broadcast OSD, video scaler, and NTSC encoder functions on the same chip. The video decoder down decodes the HDTV stream to 480i/480p. The digital TV backend block can be implemented by combining this IC with a system controller (CPU).
LC74186E
Overview
The LC74186E is 32-bit microcontroller for digital TV that uses the IBM PowerPC R as its CPU core and integrates on a single chip a wide range of peripheral functions, including UART, I2C bus control, timer, synchronous serial port, parallel port, external SDRAM control, and external bus control functions.
: The following are trademarks of International Business Machines Corporation in the Unaited States,or other countries,or both. IBM,PowerPC R
Functions
[TS Decoder Block]
Supports two TS channel inputs 8-bit parallel TS inputs Either internal or external synchronization can be selected Supports up to 55 indexes. The PID and channel number can be set for each index.
Functions
[OSD Block]
Supports both 480i and 480p display Supports both the 16 bits per pixel YUV 422 format and the 8 bits per pixel CLUT8 format
[IBM PowerPC (PPC405D4)]

Operation at clock frequencies up to 216 MHz 16 KB instruction cache 16 KB data cache
[Scaler Block]
Two scalers are provided, supporting two-screen structures or video recording output Supports satellite broadcast multi-view 3-screen display
[External SDRAM Control]

32-bit data bus Support for two logical banks (two chip select signals) Support for 4 MB to 256 MB per logical port
[Video Decoder Block]

Down decodes the HD stream to 480i/480p Supports two-channel HD down decoded playback, two-channel HD down decoded plus 480p normal playback, and three-channel 480p normal playback
[Encoder Block]
NTSC interlaced encoding Can generate two video output systems Supply voltage: 1.8 V (internal), 3.3 V (I/O) Package: PBGA352 (35 35)
[External Bus Control]

Up to 8 ROM, EPROM, SRAM, flash, and slave peripheral I/O banks (8 CS signals) Support for both burst and non-burst transfer devices 26-bit address bus, 16-bit data bus
SCP (synchronous serial port): 1 channel UART: 3 channels I2C bus controller: 1 channel (I2C) Smart Card interface: 1 channel General-purpose timer (GPT) General-purpose parallel port (GPIO) Interrupt controller (UIC) DMA controller (DMAC) System clock generator PLL circuit Supply voltage: 3.3 V Package: PQFP208 (0.5 mm lead pitch, 28 mm square)
[Audio Decoder Block]

MPEG AAC 5.1 channel decoding (with the output mixed down to two channels) MPEG BC decoding
Block Diagram
SDRAM (32bit 2M) SDRAM (32bit 2M) ROM/SRAM control SDRAM control
Block Diagram
DMA control
OPB
27MHz Arbiter ROM/SRAM external bus controller SDRAM controller DMA controller Parallel port Parallel port
Host CPU
CPUIF SCALER 16-bit digital video interface (SD input, main output) 8-bit digital video interface (Recording output) OSD with ISDB support Instruction cache
16KB
General-purpose timer Arbiter
Timer I/O
PLB
PLB/OPB bridge
TSIN1 TS TSIN2
Smart Card interface
Smart Card control
Data cache
16KB
Asynchronous serial port
Asynchronous serial port
TSOUT VIDEO
Synchronous serial port
Synchronous 3-wire serial port I2C bus control
VDAC NTSC encoder AUDIO VDAC
Three analog video channels (Main outputs: Y.Pb.Pr/Y.C) Three analog video channels (Subsidiary output : Y/C composite video)
Debugging interface
JTAG port
Memory management unit Execution unit Time Interrupt controller Clock generator PLL
I2C bus controller
Interrupt input Clock inpu
PPC405core
DAC I/F (Main output: video recording output)
DIT(PCM&encoded stream)
SANYO TV . VCR
SANYO TV . VCR
Flat Panel Display Video Signal-Processing ICs

Flat Panel Display System Chipsets Optimal for Flat Panel Displays
Home AV Equipment Related Devices

SANYO has created video signal processing ICs that adopt high image quality scan converter technology and are optimal for flat panel displays.
TV signal (NTSC or PAL)
FPD video signal-processing IC P 9 LC74986NWF
Decoder LA7605M
P 10
RGB ADC
Input processing
Scaling IP Resolution conversion
Picture quality adjustments
Output processing
LCD panel (up to WXGA resolution)
Conversion of TV signals and PC video signals to WXGA resolution using resolution conversion technology. Video signal processing IC for flat panel displays LC74986NWF P 9
Support for multiple signal sources NTSC/PAL and DTV (480i/480p) inputs Up to XGA progressive scan input Independent enlargement in the horizontal and vertical directions. Reduction in the horizontal direction is also provided. Interlaced to progressive scan conversion Built-in OSD function (On-chip 510-character, 8-color, font RAM 8 characters) I2C bus interface (The OSD function can also be controlled from a 3-wire bus) Supply voltage: Dual-voltage supply - I/O: 3.3 V, core: 2.5 V Maximum operating frequency: 85 MHz Package: SQFP144 (20 20)
Personal computer video signal (up to XGA resolution)
LA7605M
P 10
Data bus
Package: QIP80E (14 20) plastic package (flat package) Functions: I2C bus controller, adjustment-free VIF/SIF, audio bandpass filter and trap, Y, C, and deflection signal processing, CbCr internal (for DVD), dynamic contrast support, one crystal oscillator system (with built-in DDS circuit), external OSD input, HS, VS, and BGP outputs, RGB analog output Applications: PAL/NTSC color TV Supply voltage: 5 V single-voltage power supply Power consumption: About 1 W
Timing control
8-bit flash microcontroller P 11 LC87F57C8A

Flash ROM: 128 KB RAM: 3,072 bytes Minimum bus cycle time: 100 ns (10 MHz) UART and synchronous serial port ( bus compatible) 12-channel 8-bit A/D converter PWM: Two variable period 12-bit PWM circuits Package: QIP64E (14 14), SQFP64 (10 10)
Microcontroller LC87F57C8A LC87F5564A
P 11 P 12
8-bit flash microcontroller LC87F5564A P 12

Flash ROM: 64 KB RAM: 1,024 bytes Minimum bus cycle time: 100 ns (10 MHz) UART and synchronous serial port ( bus compatible) 12-channel 8-bit A/D converter PWM: Two variable period 12-bit PWM circuits Package: QIP48E (14 14), SQFP48 (7 7)
LCD TV
PDP TV
These flash memory products are manufactured and sold by SANYO Electric Co., Ltd. under license from Silicon Storage Technologies, Inc. (SST).

AC/DC Converter Transistors
High breakdown voltage MOSFET series 2SK2624LS, 2SK2625LS, 2SK2628LS
DC/DC Converter Transistors

Low saturation voltage transistors CPH3115, CPH3109 Ultralow on-resistance MOSFETs FSS140, FS132, FS134, CPH3314, CPH3414 Ultraminiature light weight PicoMOSTM series 2.5V drive: VDSS=30V system, N-channel and P-channel devices 2.5V drive: VDSS=50V system, N-channel and P-channel devices 4.0V drive: VDSS=50V system, N-channel and P-channel devices
Diodes SBS004, SBS005, SBS006, SBE001, SBE002
Backlight Inverter Transistors

Low saturation voltage transistors 2SC5566, 2SC5706, 2SC5707, CPH3216, CPH3205, CPH3212, CPH3223, CPH3115, CPH3109, CPH3116, 2SA2039 Dual device single package products (PNP 2) CPH5503, CPH5504 ,CPH5506, CPH5508 Dual device single package products (PNP + NPN) CPH5506 MOSFETs FW332, FW351, FW238, FW256 SANYO TV . VCR
SANYO TV . VCR
Scan Converter IC for Flat Panel Displays
Video Signal Processor
LC74986NWF
Overview
The LC75986NWF is a video signal processing IC that performs resolution conversion, IP conversion, and image quality corrections without requiring external memory. It can convert and display a wide variety of video signal formats for display on a flat panel display. In particular, its image quality correction function adjusts the image quality to be optimal for display on a flat panel. Its OSD function can display characters with a size optimal for the panel used. A video signal processing system for flat panel displays can be implemented easily by combining this IC with video converter, A/D converter, and microcontroller ICs and an LCD panel.
LA7605M
Overview
The LA7605M is a flat panel display color TV signal-processing I2C bus controller IC that supports all the broadcast standards used worldwide.
Functions and Features

VIF/SIF bloc Adjustment-free VCO, 4-mode audio trap/audio bandpass filter, buzz canceller RF AGC/video level Single crystal color system: PAL and NTSC Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap) Chrominance bandpass filter, demodulation ratio/angle control, support for CbCr input VS, HS, and BGP outputs, C-sync output, FSC output Dynamic contrast control VIF, SIF, video, and sync separator circuits with superlative weak field and nonstandard signal characteristics Adjustment-free VIF/SIF, audio trap, and audio bandpass filters Horizontal resonator-less adjustment-free system Supply voltage: VCC: 5 V Package: QIP80E (14 20)
Functions
NTSC/PAL and DTV (480i/480p) inputs: YCbCr digital 8-bit signal inputs Up to WXGA progressive scan input: RGB digital 8-bit signal input Independent enlargement in the horizontal and vertical directions. Reduction in the horizontal direction is also provided. Interlaced to progressive scan conversion Image quality adjustment function (sharpness, color, tint, black stretch, brightness, contrast, white balance, black balance) correction circuit (Look-up table system. Common characteristics for each 8-bit RGB color can be programmed.) Single RGB 24-bit or 18-bit signal output or dual RGB 48-bit or 36-bit signal output (with built-in bit depth simulation and conversion functions) No external frame memory required (Input and output have the same frame period) Built-in OSD function (On-chip 510-character 8-color, font RAM 8 characters) I2C bus interface (The OSD function can also be controlled from a 3-wire bus) Supply voltage: Dual-voltage supply - I/O: 3.3 V, core: 2.5 V Maximum operating frequency: 85 MHz Package: SQFP144 (20 20)
Block Diagram
VIDEO OUT INT-V IN (S-C:IN) EXT-V IN SVO
2.2F
0.01F
0.047P(M)
0.47F
1k
1k
1F
16P
680k 1F
Block Diagram
GOUT_2[7:0]*1 ROUT_2[7:0]*1 BOUT_2[7:0]*1
1000P 330
V/C GND
24k
VCO
1F 75
100F
0.47F
1000P
0.47F
24k
1k
CR_IN 0.1F 0.1F CB_IN
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42
41 40
GOUT[7:0]
ROUT[7:0]
BOUT[7:0]
DCLK0
DEH0
DEV0
HS0
VS0
0.47F EXT AUDIO INT S CARRIER OUT 600 10F
65 66 67 68 69
BPF TRAP
A2C PLL VIDEO AMP VIDEO DIT SPLL
CLMP
CLMP VXD DOD TINT PAL SW DEMO CLAMP SW APC2 VCO DC ADS CLAMP IH DELAY
24 Cb
Horizontal and vertical direction enlargement
24 OSD Output Timing
BPF DELAY LINE PEAKING CORING FM DET BLACK STRETCH DC REST SYNC SEP
10P
AOC
LPF ALC
36 35
10F
1000P
0.01F
51 61 71 44 54 64
Y Cr
89 99 107 82 92 100
1k 0.01F
SW TRAP
BPF (ON/OFF)
37
10F
41 40 39 38 34
VIDEO SW
APC1
38
+ +
100
39
VCC 5V GND
26
DCLKI
70 71 72
SW
LIM AMP
TINT
Bit depth conversion processing
HOR VCO 1/256 HOR C/D AFC1 PHASE SHIFTER HOR OUT
34 33 32 31 30 29 28 27
3.3k 1F 0.01F 10F (M) 15000P (METUL FILM) REF 4.7k
GND
Scaling Processing
SHARPNESS
25
Output Processing MIX
correction White balance Contrast, Black balance Brightness
XTAL AIC AIDA AICS*2
AUDIO OUTPUT
73 74
(M) 0.01F 0.022F
CD VOL
BGP
Input Processing
Horizontal direction reduction
19 18 17 14 13
8 G B Input Timing
COLOR
PM OUT
75 76 77 78
RF AGC IF AGC VIF
COLOR CLAMP CONTRAST ERIGHT OSD FIX GAIN ERIGHT RGB MATRIX
HS
RF AGC 30k
0.01F
Y RGB
Cb Y Cb Cr
Cr
OSD SW
VER SEP
HOR VCC
R
External voltage signals
G RGB
SCL SDA
1 IF IN
79 80
AFT
VER C/D DCS CL AMP IRIVE/OUT-OFF C_SYNC
VER OUT PSC
26 25
1F 10k 1k
VS FSC OUT
Y Cb Cr
Black stretch
Select Data 8 8 24 8 Select 24
BUS
+
0.01F(M) 0.01F(M) 0.01F(M)
4
Select
CLKIEN
6
27k
7
100k 100k
9
100 0.1F
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
10F 100 1k
10k
VPB1[7:0]*1
VPB2[7:0]*1
VPB3[7:0]*1
VPA1[7:0]
VPA2[7:0]
VPA3[7:0]
DEHI
DEVI
CLKI
HSI
VPBEN
VPBV*2
VPBCK
VPBH
VSI
*1, *2: Register selectable
AFT
R IN
G IN
B IN FB IN
R OUT G OUT B OUT C_SYNC OUT
30k
75
75
75
117 125 135 110 118 128
89 99 107 82 92 100
8 R
0.01F 100F
100P
100P
1F
1k
81
140 141 142 143 5 35 17 31
SANYO TV . VCR
SANYO TV . VCR
10
8-Bit Flash Microcontroller
8-Bit Flash Microcontroller
LC87F57C8A
Overview
The LC87F57C8A is an 8-bit microcontroller built around a CPU block that operates with a minimum bus cycle time of 100 ns and that integrates 128 KB of flash ROM (that supports onboard programming), 4 KB of RAM, and an extensive set of peripheral functions on a single chip. The peripheral functions include two multifunction 16-bit timer/counters (that can be used as separate 8-bit counters), four 8-bit timers with prescalers, a clock time base timer, two synchronous SIO channels that provide an automatic transfer function, one asynchronous/synchronous SIO channel, two 12-bit PWM circuits, a 12-channel 8-bit A/D converter, a highspeed 8-bit parallel interface, a high-speed clock counter, a system clock divider function, and an interrupt function that supports 20 interrupts and 10 vector locations.
LC87F5564A
Overview
The LC87F5564A is an 8-bit microcontroller built around a CPU block that operates with a minimum bus cycle time of 100 ns and that integrates 64 KB of flash ROM (that supports onboard programming), 1 KB of RAM, and an extensive set of peripheral functions on a single chip. multifunction 16-bit timer/counters (that can be used as separate 8-bit counters), four 8-bit timers with prescalers, a clock time base timer, two synchronous SIO channels that provide an automatic transfer function, one asynchronous/synchronous SIO channel, two 12-bit PWM circuits, a 12-channel 8-bit A/D converter, a high-speed 8-bit parallel interface, a high-speed clock counter, a system clock divider function, and an interrupt function that supports 20 interrupts and 10 vector locations.
Functions
Timers One 16-bit timer/counter with capture register (can also be used as two 8-bit timers) One 16-bit timer/counter with PWM/toggle output function (can also be used as two 8-bit timers) Four 8-bit timers with 6-bit prescaler function Clock time base timer High-speed clock counter (Can count a clock signal up to 20 MHz when a 10 MHz main clock frequency is used.) SIO Two 8-bit SIO channels with automatic transfer function - Two 8-bit baud rate generators included - Maximum clock: 4/3 tCYC One 8-bit asynchronous/synchronous SIO channel - Asynchronous: 8 to 2048 tCYC, Synchronous: 2 to 512 tCYC A/D converter: 12-channel 8-bit converter PWM: two variable-period 12-bit PWM circuits Block Diagram Parallel interface (switchable polarity, can perform read and write operations in 1tCYC) Remote control receiver (using the P73/INT3/T0IN shared function pin) Interrupt control Watchdog timer (Uses an external RC circuit) Standby control Interrupts 20 interrupt sources with 10 vector locations (Multiple interrupts CF supported using three interrupt levels: low level (L), high level (H), RC and maximum level (X)) X'tal High-speed multiply and divide instructions Bus 16 bits 8 bits (Execution time: 5 tCYC) SIO 0 interface 24 bits 16 bits (Execution time: 12 tCYC) SIO 1 Port 0 16 bits 8 bits (Execution time: 8 tCYC) SIO 2 Port 1 24 bits 16 bits (Execution time: 12 tCYC) System clock divider function Timer 0 Port 3 Standby functions Timer 1 Port 7 Halt mode: instruction execution stopped, peripheral circuit operation continues Timer 4 Port 8 Hold mode: instruction execution stopped, peripheral circuit ADC Timer 5 operation stopped INT0 to INT3 PWM0 Crystal hold mode: instruction execution stopped, peripheral noise rejection circuit operation stopped except for the clock time base timer Port 2 PWM1 INT4,5 Package: QIP64E (14 14), SQFP64 (10 10)
Clock generator Clock time base timer Timer 6 Timer 7 Parallel interface Port A Port B Port C
Functions
Timers One 16-bit timer/counter with capture register (can also be used as two 8-bit timers) One 16-bit timer/counter with PWM/toggle output function (can also be used as two 8-bit timers) Four 8-bit timers with 6-bit prescaler function Clock time base timer High-speed clock counter (Can count a clock signal up to 20 MHz when a 10 MHz main clock frequency is used.) SIO Two 8-bit SIO channels with automatic transfer function - Two 8-bit baud rate generators included - Maximum clock: 4/3 tCYC One 8-bit asynchronous/synchronous SIO channel - Asynchronous: 8 to 2048 tCYC, Synchronous: 2 to 512 tCYC A/D converter: 12-channel 8-bit converter PWM: two variable-period 12-bit PWM circuits Block Diagram Remote control receiver (using the P73/INT3/T0IN shared function pin) Watchdog timer (Uses an external RC circuit) Interrupts Interrupt control 20 interrupt sources with 10 vector locations (Multiple interrupts Standby control supported using three interrupt levels: low level (L), high level (H), and maximum level (X)) CF High-speed multiply and divide instructions RC 16 bits 8 bits (Execution time: 5 tCYC) X'tal 24 bits 16 bits (Execution time: 12 tCYC) Bus 16 bits 8 bits (Execution time: 8 tCYC) SIO 0 interface 24 bits 16 bits (Execution time: 12 tCYC) SIO 1 Port 0 System clock divider function SIO 2 Port 1 Standby functions Halt mode: instruction execution stopped, peripheral circuit operation Timer 0 Port 3 continues Timer 1 Port 7 Hold mode: instruction execution stopped, peripheral circuit operation stopped Timer 4 Port 8 Crystal hold mode: instruction execution stopped, peripheral circuit ADC Timer 5 operation stopped except for the clock time base timer INT0 to INT3 PWM0 Package: QIP48E (14 14), SQFP48 (7 7) noise rejection
Clock generator PWM1 Clock time base timer Timer 6 Timer 7 Port 2 INT4,5 Port A Port B Port C
IR
PLA
IR
PLA
Flash ROM
Flash ROM
PC
PC
ACC Register B Register C ALU
ACC Register B Register C ALU
PSW RAR RAM Stack pointer Watchdog timer
PSW RAR RAM Stack pointer Watchdog timer
This flash memory product is manufactured and sold by SANYO Electric Co., Ltd. under license from Silicon Storage Technologies, Inc. (SST).
This flash memory product is manufactured and sold by SANYO Electric Co., Ltd. under license from Silicon Storage Technologies, Inc. (SST).
11
SANYO TV . VCR
SANYO TV . VCR
12
Color TV Bus System Chip Set

Full lineup of system ICs that feature I2C bus control
Full lineup that responds to market needs PAL multiformat I2C bus control system ICs LA76810 Series P 19 LA76818A
(PAL/NTSC,YCbCr)
SANYO supports end product design and manufacture appropriate for all markets with a full product line of color TV I2C bus control system ICs.
I2C Bus Control for TV Signal-Processing ICs P 35~38 TV Control Microcontrollers LC8632 Series, LC8633 Series LC8634 Series, LC8635 Series LC838 Series
ROM: 12 to 64 KB RAM: 512 to 640 bytes Caption data slicer (LC8632/LC8634 Series) Simple graphics function OSD Multi-master I2C bus system ROM correction function On-chip flash memory microcontrollers for evaluation Packages:DIP42S (600mil), QIP48E (14 14) (LC8632/33 Series) DIP36S (400mil), MFP36SDJ (375mil) (LC8634/35 Series) DIP42S (600mil), QIP48E (14 14) (LC838 Series)
SUSOCTM ICs (LA76930 Series) P 15 (SANYO Ultimate Super One Chip LSI)
LA76930 (IF+VCD+CPU) with YcbCr LA76932 (IF+VCD+CPU) with YcbCr & E/W LA76936 (IF+VCD+Micon) with YcbCr SECAM LA76938 (IF+VCD+Micon) with YcbCr & E/W LA76950 (IF+VCD+Micon) with YcbCr LA76952 (IF+VCD+Micon) with YcbCr & E/W LA7695X (IF+VCD+Micon+3line Comb) with YcbCr & E/W
LA76828N LA76835A LA76835NM
P 20 P 21 P 22 P 23
TV control microcontrollers
P 35~38
Tuner U/V mixer/OSC. P 41 LA79106V U/V mixer/OSC.+PLL P 42 LV4512V CRT Video output
(PAL/NTSC,E/W,YCbCr) (NTSC,E/W support) (NTSC,E/W,YCbCr)
I2C bus control super single-chip system ICs P 19~ LA76810 Series
Full Lineup of I2C Bus Vertical Output ICs P 29~ LA7840/41/45N/46N/75/76 78040N/040/041/045
High reliability Low power consumption
j-C 4.0C/W 4.0C/W 4.0C/W 3.0C/W 3.0C/W
Output Output voltage (max) current
LA76843N
(NTSC)
VIF
I2C bus
Video /Chroma
RGB drive
Adjustment-free VIF/SIF Built-in trap and bandpass filter Single crystal chrominance system Built-in horizontal period (1H) delay line Supply voltage: VCC = 5 V/9 V Package: DIP54S (600mil)
Horizontal output
Type No. LA7840 LA7841 LA7845N
Package SIP7H SIP7H SIP7H SIP10H SIP10H
VCC 16 to 33V 16 to 38V
P 24 25 26 27
70V 70V 85V 85V 110V 110V 70V 70V 70V 92V
1.8APP 2.2APP 2.2APP 3.0APP 2.2APP 3.0APP
Signal-processing ICs with built-in microcontroller (CPU + VCD) P 17 LA76919M

(NTSC)
LC8632 Series LC8633 Series LC8634 Series LC8635 Series LC8638 Series LC863A Series LC863B Series
SIF
Hori. /Ver.
RGB input
Vertical output
P 24~34
LA7846N LA7875N LA7876N LA78040N LA78040 LA78041 LA78045
SIP10HD 4.0C/W T0220-7H 3.0C/W T0220-7H 3.0C/W T0220-7H 3.0C/W T0220-7H 3.0C/W
2
I2C Bus interface
LA7840 Series LA78040 Series LA7847/48 Series LA7849 Series
16 to 33V 32
1.8APP 16 to 33V 29 1.8APP 16 to 33V 28 2.2APP 16 to 33V 30 2.2APP 16 to 43V 31
Speaker
Remote control receiver block
Audio output
LA76922M
(NTSC E/W YCbCr)
P 18
Remote control transmitter microcontroller LC587XXX Series
On-Chip I C Bus and E/W Driver Circuits LA7847, LA7848, LA7849

For large-screen and flat-screen CRT TVs
Type No. LA7847 LA7848 LA7849 Package j-C
Output Output voltage (max) current
Built-in microcontroller TV signal-processing ICs VCC = 5 V or 9 V TV signal-processing functions TV system control microcontroller
: SUSOCTM is a trademark of SANYO Electric Co., Ltd. These flash memory products are manufactured and sold by SANYO Electric Co., Ltd. under license from Silicon Storage Technologies, Inc. (SST).
VCC
SIP10HD 4.0C/W SIP10HD 4.0C/W SIP10H 3.0C/W
72V 92V 92V
2.2APP 16 to 34V 33 2.2APP 16 to 43V 33 2.2APP 16 to 43V 34

Remote control transmitter microcontrollers
4-bit system-on-chip microcontrollers: LC587XXX series Built-in LCD display circuit: 92 to 140 segments ROM capacity: 2K 16 bits to 8K 16 bits 4-bit system-on-chip microcontrollers: LC573400 series Built-in LCD display circuit: Up to 120 segments ROM capacity: 4K or 6K 8 bits Flash microcontrollers LC58F7416A lineup 4-bit system-on-chip microcontrollers: LC573100 series Optimal for low-end remote controls that do not require LCD display ROM capacity: 1K, 2K, or 4K 8 bits
VHF/UHF Tuner Transistors

High-frequency MOSFET series High-frequency transistor series (fT=1 to 6 GHz) PicoGET series
Power Supply System Transistors

High breakdown voltage MOSFET series Ultralow on-resistance MOSFET series Ultraminiature light weight PicoMOSTM series Ultralow saturation voltage MBIT-II transistor series Low VF Schottky barrier diode series PicoTR series
Video Transistors
Horizontal deflection output transistor series Video output transistor series Ultralow on-resistance MOSFETs
13
SANYO TV . VCR
SANYO TV . VCR
14
Built-in CTV Microcontroller Signal-Processing System ICs
SUSOC LA76930 Series

Support for Worldwide Markets with All-in-One ICs
A newly-developed signal-processing IC, a microcontroller, and even a CCD. There is no one other than SANYO who has included so much functionality in a single package. Additionally, series deployment with pin-to-pin compatibility* means that users can handle TV signal standards in different markets around the world by changing only certain specific components. These ICs, which SANYO has named SUSOCTM (SANYO Ultimate Super One Chip), provide powerful support for design and manufacturing for all markets.
: This allows different models to be used with essentially no changes to the pin layout.
TM
Features
General features
Complete lineup that covers all markets worldwide Global pin-to-pin series (multiformat, PAL/NTSC, NTSC)
VIF/SIF
Adjustment-free VIF/SIF No VCO coil required Built-in audio bandpass filter, four-system audio trap Digital AFT system
V/C/D (Video/Chrominance/Deflection)
Blue stretching technology that creates high-quality images DDS technology single crystal VCO system DVD component signal inputs (YCbCr) Built-in SECAM demodulator (LA76936, LA76938) Special architecture and algorithms that create high-quality images
AV input SAW filter TUNER
Switch
CPU
SUSOC
CCD
TM
Up to 15 colors can be selected Four colors per character
1 chip
(IF/V/C/D)
CPU
Remocon RX
Audio power
V-out RGB drive CRT
SUSOC ICs (LA76930Series) LA76930 (IF+VCD+CPU) LA76950 (IF+VCD+Micon) with YcbCr with YcbCr LA76932 (IF+VCD+CPU) LA76952 (IF+VCD+Micon) with YcbCr & E/W with YcbCr & E/W LA76936 (IF+VCD+Micon) LA7695X (IF+VCD+Micon+3line Comb) with YcbCr SECAM with YcbCr & E/W LA76938 (IF+VCD+Micon) with YcbCr & E/W
: SUSOCTM is a trademark of SANYO Electric Co., Ltd.
AC
Pre drive H out Power supply
CPU
1 chip c hip 1 (I F/V/C/D) (IF/V /C/D) (IF/V/ C/ D)
CCD CCD
15
SANYO TV . VCR
SANYO TV . VCR
16
Signal-Processing IC with Integrated Microcontroller
Signal-Processing IC with Integrated Microcontroller
LA76919M
Overview
The LA76919M and LA76922M series are I2C bus controller ICs that support the NTSC format and aim for rationalization of color TV set design, improved manufacturability, and lower total costs.
LA76922M
Overview
The LA76919M and LA76922M series are I2C bus controller ICs that support the NTSC format and aim for rationalization of color TV set design, improved manufacturability, and lower total costs.

Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap) Chrominance bandpass filter, demodulation angle control Audio and video switching: three systems Built-in microcontroller video, chrominance, and deflection signal processing Adjustment- free horizontal resonator system Simplified SG Supply voltage: VCC = 11 V (built-in reference voltage for 5.7 V and 8.5 V regulators) Package: QIP80E (14 20)

Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap) Chrominance bandpass filter, demodulation angle control, CbCr input E/W support VM output Audio and video switching: three systems Built-in microcontroller video, chrominance, and deflection signal processing Adjustment- free horizontal resonator system Simplified SG Supply voltage: VCC = 11 V (built-in reference voltage for 5.7 V and 8.5 V regulators) Package: QIP80E (14 20)
Block Diagram
SAO SVO VCC:5V VCD IR-IN CSYNC P-SW P03/INT3 P02/INT2 P01/INT1 P16/PWM3 P15/PWM2 P14/PWM1 P00/INT0 P33 IR-IN EXT-V EXT-A C IN CSYNC P02/INT2 P01/INT1 P00/INT0 P33
Block Diagram
SVO VCC:5V VCD X-RAY X-RAY IN P-SW EXT V C IN REF
+ + + +
11V
P16/PWM3
P15/PWM2
P14/PWM1
P03/INT3
+
FSC X-RAY
+ + +
11V
+
FSC X-RAY
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
P17 P34 P35 P36 P37 P10/SDA0
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
P17
65 66 67 68 69 70
I/O PORT 1 I/O PORT 3 CLMP VXO VIDEO SW AUDIO SW ADC ROM RAM I IC-BUS BUS BUS TRAP V/Y SW DL SHARP BS SG RGB MATRIX CONTRAST ERIGHT COLOR CLAMP SYNC SEP VER SEP VER C/D DRIVE/OUT-OFF CLMP REG-SW CLOCK CONTROL RST 5V/8V-REG VER RAMP ABL-ACL HOR VOC TINT APC 1 FSC CLMP X-RAY HOR VCO 1/256 HOR C/D FEP AFC1 AFC2 PHASE SHIFTER HOR OUT REG SW
40 39 38 + 37 + 36
X-RAY V3 A3
+
P34 P35 P36 P37 HOR GND P10/SDA0
65 66 67 68 69 70
I/O PORT 1 I/O PORT 3 CLMP VXO VIDEO SW TINT APC 1 FSC CLMP X-RAY REG SW
40 39 38 + 37 36
EPF ADC ROM RAM I IC-BUS BUS BUS TRAP V/Y SW DL SHARP BS SG RGB MATRIX CONTRAST ERIGHT COLOR CLAMP SYNC SEP VER SEP VER C/D DRIVE/OUT-OFF CLMP REG-SW CLOCK CONTROL RST 5V/8V-REG VER RAMP ABL-ACL HOR VOC VER D/A YC SW ACC DEMO AF/D1 SW HOR VCO 1/256 HOR C/D AFC1 AFC2 PHASE SHIFTER HOR OUT X-RAY V3 CR CB HOR GND
EPF
YC SW
ACC
DEMO
AF SW
35 34 33 32 31 30 29 + 28 27 26 25
35 34 33
P11/SCK0 P12/SDA1 P13/SCK1
71 72 73 74 75 76 77 78 79 80 1
P11/SCK0 FEP P12/SDA1 P13/SCK1
71 72 73 74 75
(METUL FILM) FEP
FEP
TIMER 0
BASE TIMER
CPU CORE
OSD
DATA SLICER
LPF
ATT
DC REST
KILLER OUT H OUT
TIMER 0
BASE TIMER
CPU CORE
OSD
DATA SLICER
LPF
VM
DC REST
32 31 30 29 + 28 27 26 25
VER OUT VRAMP 8.47F H OUT
OSD CONTROL HS/VS I/O PORT 0
OSD SW
+
HOR VCC
OSD CONTROL HS/VS I/O PORT 0
OSD SW
+
HOR VCC
76 77 78 79 80 1
+
+
VER OUT VRAMP 8.47F
PLL
PLL
E/W AMP
3
P04/AN4
4
P05/AN5
5
P06/AN6
6
P07/AN7
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
+ +
ABLREF
3
P04/AN4
4
P05/AN5
5
P06/AN6
6
P07/AN7
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
+ +
YNR FIL
11V INT-V
+
INT-A
+ +
ATT OUT RGB 7.8V
11V INT-V
+ +
VM OUT ABL E/W OUT RGB 7.8V R G B OUT OUT OUT
R G B OUT OUT OUT
KEY-IN AFT
+
11V ABL
KEY-IN AFT
+
11V
VDD
VDD
17
SANYO TV . VCR
SANYO TV . VCR
18
I2 C Bus Control Lineup LA76810 Series
LA76818A
Overview
The LA76810 series are bus controller ICs that support the different TV broadcast formats used worldwide and aim for rationalization of color TV set design, improved manufacturability, and lower total costs Single crystal multiformat system that supports the different TV broadcast formats used worldwide ICs optimal for each individual broadcast standard deployed as a pin-to-pin compatible lineup Multiformat system: LA76818A (YCbCr support), LA76828N (YCbCr and E/W support) NTSC system: LA76843N/LA76835A (YCbCr and E/W support), LA76835NM (YCbCr and E/W support) Adjustment-free VIF/SIF, audio trap/audio bandpass filters Adjustment- free horizontal resonator system Simplified SG Supply voltage: VCC = 5 V/9 V Package: DIP54S (600mil), QIP80E (14 20) (LA76835NM only) I2C
LA76828N
Overview
The LA76810 series are I2C bus controller ICs that support the different TV broadcast formats used worldwide and aim for rationalization of color TV set design, improved manufacturability, and lower total costs Single crystal multiformat system that supports the different TV broadcast formats used worldwide ICs optimal for each individual broadcast standard deployed as a pin-to-pin compatible lineup Multiformat system: LA76818A (YCbCr support), LA76828N (YCbCr and E/W support) NTSC system: LA76843N/LA76835A (YCbCr and E/W support), LA76835NM (YCbCr and E/W support) Adjustment-free VIF/SIF, audio trap/audio bandpass filters Adjustment- free horizontal resonator system Simplified SG Supply voltage: VCC = 5 V/9 V Package: DIP54S (600mil), QIP80E (14 20) (LA76835NM only)
Functions and Features Functions and Features

VIF/SIF Adjustment-free VCO, 4-mode audio trap/audio bandpass filter, buzz canceller RF AGC/video level SIF system automatic discrimination (The LA7973 is used as the automatic discrimination IC.) Single crystal color system: PAL, NTSC, SECAM (The LA7642N is used as the SECAM decoder.) Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap) Chrominance bandpass filter, demodulation ratio and angle control Block Diagram
SVO V/C VCC 5V I IN-V IN EXT-V IN [S-C IN] [Y-IN] V/C GND ON SECAM DECODER SCP S CARRIER OUT EXT AUDIO IN VIDEO OUT SEOAM-KIL FBP IN V/C VCC 5V I IN-V IN EXT-V IN [S-C IN] [Y-IN] FSC/SYNC OUT CR IN CB IN CCD VCC5V 4M OUT
VIF/SIF Adjustment-free VCO, 4-mode audio trap/audio bandpass filter, buzz canceller RF AGC/video level SIF system automatic discrimination (The LA7973 is used as the automatic discrimination IC.) Single crystal color system: PAL, NTSC, SECAM (The LA7642N is used as the SECAM decoder.) Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap) Chrominance bandpass filter, demodulation ratio and angle control E/W support Block Diagram
FBP IN
S CARRIER OUT
EXT AUDIO IN
VIDEO OUT
+
VCO
+ + +
46 45 44 47
+ +
43 42
CLMP
+
38 37
+
36 35 34
CLAMP
CCD/ HOR GND
CCD VCC5V
+
REF VCO
+
32 31
+
30
+ + +
46 45 44 47
OVER MOD.
+ + +
43 42
V/C GND
+
38 37
+
36 35 34
CLAMP
CCD/ HOR GND
+
32 31
+
30
REF
+
54 53 52 51 50 49 48
A2C PLL SPLL VIDEO AMP
+
41 40 39 33 29 28
FBP 1H DELAY DC ADS. HOR VCO LPF ALC COLOR CLAMP 1/256 HOR C/D AFC1 DC REST CONTRAST ERIGHT RGB MATRIX OSD SW SYNC VER SEP VER C/D VER RAMP HOR VCC AFC2 IF AGC PHASE SHIFTER HOR OUT SW SW DC VOL RF AGC VIF BPF TRAP LIM AMP VIDEO DET FM DET
54
53
52
51
50
49
A2C PLL
48
41
FSC/ SYNC SW
40
39
33
29
28
FBP
CLMP
BPF
BPF SPLL VIDEO AMP S.TRAP SW
CLMP
CLMP
1H DELAY
VXO IF IDENT VIDEO SW SW
DDS
VXO VIDEO SW SW TRAP AFT DELAY LINE PEAKING CORING
DDS
APC2 VCO
APC2 VCO LPF ALC SW DC ADS. COLOR CLAMP HOR VCO 1/256 HOR C/D AFC1
APC1 EPF (ON/OFF) ACC SYNC SEP BLACK STRETOH
TINT PAL SW DEMO
APC1 BPF (ON/OFF) ACC SYNC SEP BLACK STRETOH DC REST OSD CONTRAST BRIGHT
TINT PAL SW DEMO
BPF TRAP LIM AMP VIDEO DET FM DET IF AGC SW VIF IFT TRAP DELAY LINE PEAKING CORING
CLAMP
SW
CLAMP
CONTRAST ERIGHT
RGB MATRIX OSD SW
VER SEP VER C/D VER RAMP HOR VCC
AFC2 PHASE SHIFTER HOR OUT
OSD CONTRAST BUS ABL CLAMP
DC VOL
RF AGC
BUS
ABL CLAMP
DRIVE/OUT-OFF
DRIVE/OUT-OFF
EW
1
AUDIO OUTPUT
4
VCC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
1
AUDIO OUTPUT
4
VCC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
+
SAW FILTER
+ +
R OUT ABL AFT R IN G IN B IN FB RGB IN V 9V CC G OUT B SYNC VER OUT OUT OUT
+
HOR OUT
+
SAW FILTER
+ +
R OUT ABL AFT R IN G IN B IN FB RGB IN V 9V CC G OUT B OUT E/W OUT VER OUT
+ +
HOR OUT HOR VCC 9V
IF VCC5V
IF VCC5V
SAO RF AGC IF IN
SAO HOR VCC 9V RF AGC IF IN
19
SANYO TV . VCR
SANYO TV . VCR
20
LA76835A
Overview
The LA76810 series are bus controller ICs that support the different TV broadcast formats used worldwide and aim for rationalization of color TV set design, improved manufacturability, and lower total costs. Single crystal multiformat system that supports the different TV broadcast formats used worldwide. ICs optimal for each individual broadcast standard deployed as a pin-to-pin compatible lineup. Multiformat system: LA76818A (YCbCr support), LA76828N (YCbCr and E/W support) NTSC system: LA76843N/LA76835A (YCbCr and E/W support), LA76835NM (YCbCr and E/W support) Adjustment-free VIF/SIF, audio trap/audio bandpass filters Adjustment-free horizontal resonator system Simplified SG Supply voltage: VCC = 5 V/9 V Package: DIP54S (600mil), QIP80E (14 20) (LA76835NM only) I2C
LA76835NM
Overview
The LA76810 series are I2C bus controller ICs that support the different TV broadcast formats used worldwide and aim for rationalization of color TV set design, improved manufacturability, and lower total costs. Single crystal multiformat system that supports the different TV broadcast formats used worldwide. ICs optimal for each individual broadcast standard deployed as a pin-to-pin compatible lineup. Multiformat system: LA76918A (YCbCr support), LA76828N (YCbCr and E/W support) NTSC system: LA76843N/LA76835A (YCbCr and E/W support), LA76835NM (YCbCr and E/W support) Adjustment-free VIF/SIF, audio trap/audio bandpass filters Adjustment-free horizontal resonator system Simplified SG Supply voltage: VCC = 5 V/9 V Package: DIP54S (600mil), QIP80E (14 20) (LA76835NM only)

VIF/SIF Adjustment-free VCO, buzz canceller RF AGC/video level/FM level control Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap) Chrominance bandpass filter, demodulation angle control E/W support

VIF/SIF Adjustment-free VCO, buzz canceller RF AGC/video level/FM level control Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap) Chrominance bandpass filter, demodulation ratio and angle control, blue stretch E/W support
Block Diagram
VIDEO OUT
Block Diagram
CWOUT X-RAY
1F (METUL FILM )
S EXT OARRIER AUDIO OUT IN
VIDEO OUT
EXT-V IN Y-IN
SVO
C_ IN
CR
CB
FBP IN VCC 5V
510 15H 16P 0.47F 24k 24k
+
600 510 24K 1000P 0.01F 16P 0.47F 0.047F (M) 47F
GND
0.01F
0.01F
39 2.2F 510 680k
0.01F
0.0471F
0.01F 3K
0.47F 330
680K
10P
10F
0.47F
2.2F
4.7K
+ +
44
CLMP
+
43 42
1F
24K
+
45
1F
VCO
0.47F
1H-DL/ HOR GND
1F
1F
1F
510
REF
VCC 9V GND
+
58 57
NC
+
54 53 52 51
+
50
+
47
64
63
62
61
60
59
56
55
1F
10k
VCC
+
54 53
+
52
CLMP
51
NC
50
49
V/C/D GND
48
1F
47
46
45
44
43
10k
1F
75
FSC OUT
EXT-V IN
INT-V IN [S-C : IN]
VM IN
SVO
42
GND
41 40
CR CB X-RAY
49
48
A2C PLL
46
41
40
39
38
37
36
35
34
33
32
31
30
29
28
330 0.47F
GND
+ 65 +
66 67 68 69 70 NC
EPF
A2C PLL VIDEO AMP SPLL EPF LIM ANP SW DC VOL FM DET
CLMP
CLMP FBP VXO CW H-OUT CONTROL ACC KIL X-RAY CLMP HOR VCO 1/256 HOR C/D AFC1 DC REST OSD FIX GAIN ERIGHT CONTRAST BRIGHT RGB MATRIX OSD SW E/W OUT VER SEP VER C/D VER RAMP HOR VCC AFC2
BPF SPLL VIDEO AMP TRAP SW SND TRAP
EXT AUDIO INT S OARRIER OUT 10P 660
VCO VIDEO DET VIDEO SW APC1 TINT
CW KIL X-RAY HOR VCO VM AMP FEP AFC2 RESET
+1F +1F +
5.6k 1F
39 38 37 36
10F
VCC 5V GND
3k 0.01F
VIDEO SW C SW
APC1
VM OUT
SW IST AMP BPF TRAP DELAY LINE PEAKING CORING BLACK STRETOH 2ND AMP BPF DEMO COLOR CLAMP CLMP DELAY CB.CR SW COLOR CONTRAST BRIGHT TINT AUTO FLESH ACC KILLER SYNC SEP
1000P
BPF LIM AMP
TRAP AFT DELAY LINE PEAKING CORING
BPF (BYPASS)
DEMO COLOR
CLAMP AUTO FLESH TINT
CB.CR SW
1/256 HOR C/D
35 34 33 32 31 30
HOR GND (METUL FILM) REF 4.7k VCC 9V GND FEP IN
VIDEO DET FM DET IF AGC VIF SW DC VOL RF AGC
SYNC SEP BLACK STRETOH
72 NC 73 74
AUDIO OUTPUT
HOR OUT
100F
+
0.01F
PHASE AFC1 SHIFTER
VDD
10k
10F
+ 71
CPU RESET
330 3.3k
(M) 15000P 1F 10F 0.01F 0.47F 150
HOR OUT
FM OUT
75 76 77
RF AGC IF AGC VIF
PHASE SHIFTER
RF AGC
0.01F(M) 0.022F(M)
DC REST
RGB MATRIX
VER SEP VER C/D
HOR VCC VER RAMP E/W
29 + 28 27 26 25
BUS
ABL CLAMP VCC
DRIVE/OUT-OFF
HOR OUT
0.47F
30k
78 79 80 IF GND
GND BUS ABL AFT
1
AUDIO OUTPUT FM OUT RF AGC
2
0.01F
4
0.022F (M)
5
0.01F
8
0.01F
10
100K 100
11
12
100
13
14
0.01F (M)
15
16
17
10F
18
19
0.01F
20
21
22
23
24
10F
25
H VCC
26
27
150
IF IN
OSD FIX GAIN ERIGHT
OSD SW
VER OUT EW OUT VSI ZE 0OMP
0.01F
0.01F (M)
100P
100P
1 30K SAW FILTER
100K
0.1F
3.0K
(M)
0.01F(M)
0.01F(M)
0.01F(M)
1F
0.01F
100F
0.0F (M)
OL AMP
HS/VS
DRIVE/OUT-OFF
12K
GND
1
0.33F 0.015F (M)
5
12K
6
100K
9
100 100P
10
100 100P
11
12
13
14
15
16
17
10F
18
19
20
21
22
23
24
IF IN 10k (M) 75 75 75
0.01F 100F
1F
0.33F
1F
100K
0.1F
+ +
10k
20k VS
AFT
IB IN
R IN
G IN
B IN
FB IN
R OUT
G OUT
B OUT
EW OUT
VER OUT
H OUT
AFT ABL R IN G IN B IN FB IN HS R OUT G OUT B OUT
21
20k
75
75
75
SANYO TV . VCR
SANYO TV . VCR
22
Vertical Output IC
LA76843N
Overview
The LA76810 series are bus controller ICs that support the different TV broadcast formats used worldwide and aim for rationalization of color TV set design, improved manufacturability, and lower total costs Single crystal multiformat system that supports the different TV broadcast formats used worldwide ICs optimal for each individual broadcast standard deployed as a pin-to-pin compatible lineup Multiformat system: LA76818A (YCbCr support), LA76828N (YCbCr and E/W support) NTSC system: LA76843N/LA76835A (YCbCr and E/W support), LA76835NM (YCbCr and E/W support) Adjustment-free VIF/SIF, audio trap/audio bandpass filters Adjustment-free horizontal resonator system Simplified SG Supply voltage: VCC = 5 V/9 V Package: DIP54S (600mil), QIP80E (14 20) (LA76835NM only) I2C
LA7840
Overview
The LA7840 is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system signalprocessing IC. The LA7840 provides a maximum deflection current of 1.8 A p-p, and thus is optimal for small to medium diameter CRTs.
Functions
Low power operation achieved by using integrated charge pump circuit Vertical output circuit Thermal protection circuit Excellent crossover characteristics Supports DC coupling Package: SIP7H

VIF/SIF Adjustment-free VCO, buzz canceller RF AGC/video level/FM level control Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap) Chrominance bandpass filter, demodulation angle control
Block Diagram
SVO V/C VCC 5V I IN-V IN EXT-V IN [S-C IN] [Y-IN] V/C GND HS FSC X-RAY VS FBP IN
S CARRIER OUT
EXT AUDIO IN VCO
Block Diagram
VIDEO OUT
+ +
40 39 38
+ +
54 53 52 51 50 49
+ + +
46 45 44
+ +
43 42
CLMP
CCD/ HOR GND
REF
48
A2C PLL
47
41
37
36
35
34
33
32
31
30
29
28
FBP
CLMP
BPF SPLL VIDEO AMP
VXO VIDEO SW
CW FILTER ADJ
X-RAY RESET HOR VCO 1/256 HOR C/D AFC1
Thermal Protection AMP +
Pump UP
APC1 SW BPF (BYPASS) AOC KIL SYNC SEP BLACK STRETOH DC REST WPL
TINT
BPF LIM AMP
SND TRAP AFT VIDEO DET
TRAP DELAY LINE PEAKING CORING
DEMO
COLOR CLAMP
FM DET IF AGC VIF SW DC VOL RF AGC
CONTRAST BRIGHT
RGB MATRIX OSD SW C_SYNC OUT
VER SEP VER C/D VER RAMP HOR VCC
AFC2 PHASE SHIFTER HOR OUT
OSD FIX GAIN BUS ABL CLAMP
1 GND
2 Ver.OUTPUT
3 OUTPUT STAGE VCC
4 NON INV.INPUT
5 INVERTING INPUT
6 VCC
7 PUMP UP OUT
DRIVE/OUT-OFF
1
AUDIO OUTPUT
4
VCC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
+
SAW FILTER
+ +
R OUT ABL AFT R IN G IN B IN FB RGB IN V 9V CC G OUT B SYNC VER OUT OUT OUT
+
HOR OUT HOR VCC 9V
IF VCC5V
RF AGC IF IN
23
SANYO TV . VCR
SANYO TV . VCR
24
Vertical Output IC
Vertical Output IC
LA7841
Overview
The LA7841 is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system signal-processing IC. The LA7841 provides a maximum deflection current of 2.2 A p-p, and thus is optimal for large diameter CRTs.
LA7845N
Overview
The LA7845N is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system signal-processing IC. The LA7845N provides a maximum deflection current of 2.2 A p-p, and thus is optimal for large diameter CRTs, and can drive the CRTs used in TV sets in the 33 to 37 inch range.
Functions
Functions
Block Diagram
Block Diagram
Pump UP
Pump UP
1 GND
2 Ver.OUTPUT
3 OUTPUT STAGE VCC
4 NON INV.INPUT
5 INVERTING INPUT
6 VCC
7 PUMP UP OUT
1 GND
2 Ver.OUTPUT
3 OUTPUT STAGE VCC
4 NON INV.INPUT
5 INVERTING INPUT
6 VCC
7 PUMP UP OUT
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SANYO TV . VCR
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26
Vertical Output IC
Vertical Output IC
LA7846N
Overview
The LA7846N is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled from the bus system when this IC is used in conjunction with a Sanyo LA768X or LA769XX series TV bus control system signalprocessing IC. The LA7846N provides a maximum deflection current of 3.0 A p-p, and thus is optimal for large diameter CRTs, and can drive the CRTs used in TV sets in the 33 to 37 inch range.
LA78040
Overview
The LA78040 is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system signalprocessing IC. The LA78040 provides a maximum deflection current of 1.8 A p-p, and thus is optimal for small to medium diameter CRTs.
Functions
Functions
Low power operation achieved by using integrated charge pump circuit Vertical output circuit Thermal protection circuit Excellent crossover characteristics Supports DC coupling Package: TO220-7H
Block Diagram
Block Diagram
Pump UP
Pump UP
1 N.C
2 GND
3 Ver.OUTPUT
4 OUTPUT STAGE VCC
5 NON INV.INPUT
6 INVERTING INPUT
7 VCC
8 PUMP UP OUT
9 N.C
10 N.C
1 GND
2 Ver.OUTPUT
3 OUTPUT STAGE VCC
4 NON INV.INPUT
5 INVERTING INPUT
6 VCC
7 PUMP UP OUT
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Vertical Output IC
Vertical Output IC
LA78040N
Overview
The LA78040N is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system signal-processing IC. The LA78040N provides a maximum deflection current of 1.7 A p-p, and thus is optimal for small to medium diameter CRTs.
LA78041
Overview
The LA78041 is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system signal-processing IC. The LA78041 provides a maximum deflection current of 2.2 A p-p, and thus is optimal for large diameter CRTs.
Functions
Functions
Block Diagram
Block Diagram
Thermal Protection -
Pump UP Thermal Protection AMP AMP + + Pump UP
1 GND
2 Ver.OUTPUT
3 OUTPUT STAGE VCC
4 NON INV.INPUT
5 INVERTING INPUT
6 VCC
7 PUMP UP OUT 1 GND 2 Ver.OUTPUT 3 OUTPUT STAGE VCC 4 NON INV.INPUT 5 INVERTING INPUT 6 VCC 7 PUMP UP OUT
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SANYO TV . VCR
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30
Vertical Output IC
Vertical Output ICs
LA78045
Overview
The LA78045 is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system signal-processing IC. The LA78045 provides a maximum deflection current of 2.2 A p-p, and thus is optimal for large diameter CRTs, and can drive the CRTs used in TV sets in the 33 to 37 inch range.
LA7875N/76N
Overview
The LA7875N and LA7876N were developed for Internet TVs and high-definition TVs that require a narrow vertical retrace period. In these products, SANYO succeeded in achieving a narrow vertical retrace period by adopting a new 3_ step-up charge pump circuit. Since this allows the supply voltage to be lowered relative to the earlier 2_ step-up ICs, it achieves significantly lower power in end product designs. Furthermore, since this IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output from the bus control system signal-processing IC, the shift operation required by wide-screen TV sets can be controlled over the bus control system.The LA7875N provides a maximum deflection current of 2.2 A p-p, and thus is optimal for medium diameter CRTs, and the LA7876N provides a maximum deflection current of 3.0 A p-p, and thus is optimal for large diameter CRTs.
Functions
Functions
3 voltage step up charge pump circuit Low power operation Operational amplifier type vertical output circuit Supports DC direct coupling deflection yoke drive Excellent crossover characteristics Packages: LA7875N: SIP10HD LA7876N: SIP10H
Block Diagram
Block Diagram
Pump UP1 Thermal Protection AMP AMP + + Pump UP2 Pump UP -
1 N.C 1 GND 2 Ver.OUTPUT 3 OUTPUT STAGE VCC 4 NON INV.INPUT 5 INVERTING INPUT 6 VCC 7 PUMP UP OUT
2 GND
3 Ver.OUTPUT
4 OUTPUT STAGE VCC
5 NON INV.INPUT
6 INVERTING INPUT
7 VCC
8 1st PUMP UP OUT
9 VCC2
10 2nd PUMP UP OUT
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32
Vertical Output ICs
Vertical Output IC
LA7847/48
Overview
The LA7847 and LA7848 are EW drive and vertical deflection output ICs for high-definition TV and CRT displays in systems that use a bus control system signal-processing IC. These ICs can directly drive (including DC component) the deflection yoke from the sawtooth wave output from the bus control system signal-processing IC. Similarly, the diode modulator block can be driven from the parabolic wave output. The color TV vertical deflection system and EW adjustment functions can be controlled from the bus system when either of these ICs is used in conjunction with a Sanyo LA768X or LA769XX series TV bus control system signal-processing IC. The LA7847 provides a maximum output block voltage of 72 V, a maximum deflection current of 2.2 A p-p, and an EW drive current of 0.4 A, and thus is optimal for large diameter CRTs. The LA7848 provides a maximum output block voltage of 92 V, a maximum deflection current of 2.2 A p-p, and an EW drive current of 0.4 A, and thus is optimal for large diameter CRTs.
LA7849
Overview
The LA7849 is an EW drive and vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output from the bus control system signal-processing IC. Similarly, the diode modulator block can be driven from the parabolic wave output.The color TV vertical deflection system and EW adjustment functions can be controlled from the bus system when this IC is used in conjunction with a Sanyo LA768X or LA769XX series TV bus control system signal-processing IC. The LA7849 provides a maximum output block voltage of 92 V, a maximum deflection current of 2.2 A p-p, and an EW drive current of 0.4 A, is provided in an SIP10H package, and thus is optimal for large diameter CRTs.
Functions
Built-in charge pump circuit for low power operation Vertical output circuit Excellent crossover characteristics Supports DC coupling EW drive circuit Package: SIP10HD
Functions
Built-in charge pump circuit for low power operation Vertical output circuit Excellent crossover characteristics Supports DC coupling EW drive circuit Package: SIP10H
Block Diagram
Block Diagram
Pump UP
Pump UP
+ AMP + AMP
+ -
1 GND
2 Ver.OUTPUT
3 OUTPUT STAGE VCC
4 NON INV.INPUT
5 INVERTING INPUT
6 VCC
7 PUMP UP OUT
8 NON INV.INPUT(EW)
9 INVERTING INPUT(EW)
10 EW OUT
1 GND
2 Ver.OUTPUT
3 OUTPUT STAGE VCC
4 NON INV.INPUT
5 INVERTING INPUT
6 VCC
7 PUMP UP OUT
8 NON INV.INPUT(EW)
9 INVERTING INPUT(EW)
10 EW OUT
33
SANYO TV . VCR
SANYO TV . VCR
34
LC863 Series
Flash E2PROM Microcontroller Series
LC86 Series (TV Microcontrollers) Product Lineup
New product
LC863AXX (NTSC)
LC86F3A48A LC86F3B48A
Overview
The LC863 Series products are high functionality high-speed 8-bit CMOS single-chip microcontrollers that provide OSD functionality. Since SANYO provides a full series of flash ROM versions instead of the earlier erasable EPROM and one-time programmable PROM versions, this series can easily respond to needs for rapid specification changes during mass production ramp up and for specification changes by target application. In addition to the large-capacity display RAM, the LC863 Series products provide a highperformance OSD function that features increased CGROM capacity and supports simple graphics functions. Since the LC8638XX, LC8632XX (DIP42, QFP48), LC863AXX, and LC8634XX (DIP36, SOP36) provide a built-in caption data slicer circuit, they can implement, in a single chip, end products that provide caption, XDS (Extended Data Service), and Vchip functions. Although the LC8633XX, LC8635XX, and LC863BXX do not include the built-in caption data slicer circuit, they are essentially pin and function compatible with the LC8632XX, LC8634XX, and LC863AXX. This allows creation of a unified chassis for NTSC and PAL format products. Since these series products are available in not only a DIP package, but in a flat package as well, they can contribute to end product chassis miniaturization.
36-pin products Display RAM : 352 9 bits
LC863BXX (PAL)
RAM 640 8 bits
LC8634XX (NTSC)
LC86F3448A
LC8635XX (PAL)
RAM 512 8 bits
LC86F3548A
640 8 bits
LC8638XX (NTSC/PAL)
RAM 468 8 bits
LC86F3864A
Functions
ROM: 16 to 64K bytes (The 36-pin versions have a maximum of 48K bytes.) CGROM: 16K bytes RAM: 512 to 768 bytes Display RAM: 352 9 bits (The LC8635XX models have 176 9 bits.) 16-bit timer/counter circuit PWM generator/16-bit timer circuit Clock time base timer Watchdog timer (Uses an external RC circuit) 8-bit synchronous serial interface (in 42-pin versions) Multi-master I2C bus serial interface Remote control receiver circuit Three 7-bit PWM output circuits Four-channel 8-bit A/D converter (The 36-pin versions have a 6-bit converter.) I/O ports: Up to 29 pins Powerful interrupt function 16 interrupt sources with 10 vector locations (LC8632XX) Multiple interrupts supported using three interrupt levels Standby function (halt and hold modes) High-speed operation Minimum cycle time: 0.848 s (bus cycle: 0.424 s) Powerful highly symmetric instruction set shared with the LC86 Series. Number of instructions: 68 OSD function 36 characters 8 lines (The LC8635XX models only support 4 lines.) Number of 16 32 dot characters: 252 characters (The number of characters can be expanded by using some characters as divided characters.) Display colors: 16 colors Simple graphics function Cells consisting of 16 16 dots can be formed from 4 colors. Extensive set of control functions that operate on a line basis 1. Vertical and horizontal position 2. Character size: Ten character sizes, including 1.5 in the horizontal direction, and 0.5 in the horizontal and vertical directions. 3. Character pitch 4. Display start or end line (shutter function) Data slicer function (LC8632XX, LC8634XX, and LC863AXX) Extracts closed caption and XDS data NTSC or PAL selectable and line can be specified ROM correction function

RAM 512 8 bits
LC8632XX (NTSC) LC8633XX (PAL)
LC86F3264A LC86F3364A
640 8 bits
ROM
16
20
24
28
32
40
48
56
64 KB
LC86F3448A TV Flash Microcontroller

Data slicer (Variable Line) XDS (Extended Data Service) Vchip functions
DIP36S (400mil)
High functionality OSD Characters in font: 252 (maximum) 36 character 8 lines (maximum) Simple graphics functions Shutter function Scrolling function And other functions
RAM: 640 bytes + Display RAM: 352 9 bits
MFP36SD (375mil)
Three 7-bit PWM channels
Multi-master support I2C bus serial interface

These flash memory products are manufactured and sold by SANYO Electric Co., Ltd. under license from Silicon Storage Technologies, Inc. (SST).
Four-channel 6-bit A/D converter ROM correction function
64 KB flash memory 48 KB (program area) 16 KB (character font area) 16-bit timer/counter Onboard programming
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SANYO TV . VCR
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36
TV Control Microcontrollers
TV Control Microcontrollers
LC8632/34/38/3A Series (NTSC)

Overview
The LC8632/LC8634/LC8638/LC863A Series are closed caption TV control 8-bit microcontrollers that integrate an extensive set of peripheral functions around a CPU core that operates with a minimum cycle time of 0.424 s. The peripheral functions include 16 to 64 KB of program ROM, 16 KB of CGROM, 384 to 640 bytes of RAM, 352 9 bits of CRT display RAM, as well as 16-bit timer/ counter, PWM, A/D converter, I2C bus compatible serial interface, closed caption data slicer, and closed caption OSD circuits. These microcontrollers can implement TV control and closed caption display in a single chip.
LC8633/35/3BXX Series (PAL)

Overview
The LC8633/LC8635/LC863BXX Series are TV control 8-bit microcontrollers that integrate an extensive set of peripheral functions around a CPU core that operates with a minimum cycle time of 0.424 s. The peripheral functions include 16 to 64 KB of program ROM, 16 KB of CGROM, 384 or 512 bytes of RAM, 176 or 352 9 bits of CRT display RAM, and two 16-bit timer/counter circuits, as well as PWM, A/D converter, I2C bus compatible serial interface, and OSD circuits. These microcontrollers can implement TV control in a single chip.
Functions
OSD function Screen display: 36 characters 16 lines (supported in software) Number of characters: 252 characters in a 16 32 dot font (Of these, 4 characters including one test character are fixed.) Simple graphics function (A font in which a single character is 16 16 dots and can be painted with 4 colors) I2C bus multi-master serial interface: One built-in circuit with two sets of pins Flash memory versions are available for each series and allow onboard programming
Functions
OSD function Screen display: 36 characters 8 lines (supported in software) Number of characters: 252 characters in a 16 32 dot font (Of these, 4 characters including one test character are fixed.) Simple graphics function (A font in which a single character is 16 16 dots and can be painted with 4 colors) I2C bus multi-master serial interface: One built-in circuit with two sets of pins Flash memory versions are available for each series and allow onboard programming
Block Diagram
Interrupt control Interrupt control
Block Diagram
IR ROM
PLA
IR ROM
PLA
Standby control
Standby control
Clock generator
RC VCO
RC VCO
PLL
PC
PLL
Clock generator
X'tal
X'tal
PC
2 IC
ROM correction control XRAM Bus interface Port 1 Port 6
ACC Register B Register C
I2C
ROM correction control XRAM Bus interface Port 1 Port 6 Port 7 Port 8
ACC Register B Register C
SIO 0 Timer 0 Timer 1 Clock time base timer ADC INT0 to INT3 noise rejection filters PWM
SIO 0 Timer 0 Timer 1 Clock time base timer
ALU
ALU
PSW Port 7 RAR Port 8 RAM
PSW RAR RAM
ADC INT0 to INT3 noise rejection filters PWM
Stack pointer Data slicer OSD control circuit CGROM control VRAM Watchdog timer Port 0 OSD control circuit CGROM control
Stack pointer Port 0 VRAM Watchdog timer
LC8632 Series
LC8633 Series
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38
VHS VHS Format Format VCR VCR System System Chip Chip Set Set
High quality and high reliability assured by adjustment-free technology
Partially adjustment-free, high functionality P 47 LA7567BM/BVA P 48 LA75676VA P 49 LA75665NM/NV Fully adjustment-free operation achieved LA75503V P 43 LA75505M P 44 P 45 LA75520VA P 46 LA75525VA
PAL multiformat: LA75503V, LA75520VA NTSC: LA75505M, LA75525VA
Tuner Mixer+OSC. P 41 LA79106V Mixer+OSC.+PLL LV4512V P 42
At the same time as providing high quality and high reliability with adjustment-free ICs, SANYO is striving for even further reductions in mounting area by incorporating even more peripheral components in the IC itself and by increasing integration densities.
Low-Power Design High fidelity signal processing with built-in canal switch. P 50 LA72648M
Audio output
VIF/SIF P 43 LA75503V LA75505M P 44 LA75520VA P 45 LA75525VA P 46 LA7567BM/BVA P 47 LA75676VA P 48 LA75665NM/NV P 49
External audio input
High fidelity signal processing LA72648M(PAL) P 50 LA72670M(US) P 51 LA72680M(JPN) P 52 Audio Video and audio signal processing P 53 LA71206M/7M P 54 LA71750EM P 55 LA71730EM
Cylinder Capstan motor motor
Built-in high-fidelity head amplifier Number of peripheral components reduced Input capacitors eliminated Built-in canal switch
Built-in sync separator and EDS circuits Built-in sync separator circuit OSD function with EDS function LC74785/M P 57
Built-in EDS
High fidelity signal processing with built-in SIF and audio demultiplexer P 51 LA72670M(US) P 52 LA72680M(JPN)
Built-in high-fidelity head amplifier Audio demultiplexer
P 63 P 63
External video input
Built-in sync separator circuit OSD LC74789/M/JM P 58

Support for the NTSC, PAL, PAL-N, PAL-M, NTSC 4.43, and PAL60 formats Sync separator circuit 12 18 dot font
Video output
On-screen display LC74785/M P 57 LC74789/M/JM P 58 LC74776/M P 59 LC74793/JM P 60 RF modulator LA7161NM/NV P 61 LA77000V P 62
SECAM color signal processing LA70100M P 56
3 in1 IC LB11885 (High voltage) LB11884 (Low voltage) PWM capstan + sensorless drum + loading motor drive
RF output
Built-in sync separator circuit OSD function with VPS/PDC functions LC74776/M P 59
Built-in VPS and PDC
VPS/PDC IC LC74793/JM
I2C bus support
VHF band RF modulator P 61 LA7161NM/NV P 62 LA77000V

PLL control
SECAM color signal processing LA70100M P 56

Built-in bell filters Number of peripheral components reduced
Built-in CCD delay line and Head Amplifier System-on-chip H.A, YCA, Canal switch + CCD AV signal-processing IC P 53 LA71206M/7M(NTSC) P 54 LA71750EM(PAL) P 55 LA71730EM(Multi)
Built-in CCD delay line Record and playback head amplifiers Fully adjustment free All filters built in PAL/SECAM discrimination circuit : LA71750EM/71730EM Canal switch : LA71750EM/71730EM
P 60

Power Supply Systems
Low saturation voltage power supplies: L88MSOOT series On/off function Multifunction power supplies: LA56XX series Satellite broadcast tuner power supplies: LA5606N/LA5607N
Power Supply System Peripreral Transistors

High breakdown voltage MOSFET series Ultralow on-resistance MOSFET series Ultraminiature light weight PicoMOSTM series Ultralow saturation voltage MBIT-II transistor series Low VF Schottky barrier diode series PicoTR series
VHF/UHF Tuner Transistors

High-frequency MOSFET series High-frequency transistor series (fT = 1 to 6 GHz) PicoGET series 15GNO1M, 55GNO1M
VCR Microcontrollers: LC870200 Series

Software and servo functions Built-in control amplifier VPS, PDC, and XDS data slicer OSD Flash version: LC87F02C8A
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Tuner IC
Tuner IC
LA79106V
Overview
The LA79106V is a voltage synthesized tuner IC that integrates mixers for three bands (VHF (low), VHF (high), and UHF) and an oscillator circuit on a single chip.
LV4512V
Overview
The LV4512V integrates local oscillator circuits for the VHF and UHF bands, mixers, an IF amplifier, and a PLL circuit for tuning on a single chip. It is controlled using an I2C bus.
Functions
Double balanced mixer (base input): VHF (low) Double balanced mixers (emitter input): VHF (high) and UHF Lo output pin Built-in mixer and oscillator regulator Supply voltage: VCC = 5 V Package: SSOP24 (275 mil)
Functions
PLL circuit for tuning I2C bus control Frequency steps (31.25, 50, and 62.5 kHz when a reference frequency of 4 MHz is used) Four on-chip Banol switches Can be controlled at any one of four I2C bus addresses Supply voltage: VCC = 5 V Package: SSOP30 (275mil)
Block Diagram
Block Diagram
GND2(PLL) VCC2(PLL) UOSCB2 UOSCE2 UOSCE1 UOSCB1 VOSCC2
VHOSC1
VHOSC2
VHOSC3
VLOSC1
VLOSC2
IFOUT1
IFOUT2
UOSC1
UOSC2
UOSC3
UOSC4
GND
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
24
23
22
21
20
19
18
17
16
15
14
13
Ref OSC Charge Pump 3V MOS Lock REG UHF OSC VHF OSC
Phase Det
VHFL
UHF
VHFH
1/512,640,1024
Programable DIV
SW
16/17
REG
S/R
1 IFT1
2 IFT2
3 GND
4 UIN1
5 UIN2
6 VLIN
7 VHIN1
8 VHIN2
9 VCC
10 OSCOUT1
11 OSCOUT2
12 BANDSW
1 SCL
I2C BUS I/F
2 SDA
3 ADR
4 FMT
5 BVL
6 BVH
7 BU
REG
1/8
8 VCC1
9 Mixout1
10 Mixout2
11 GND1A
12 VHFin1
13 VHFin2
14 UHFin1
15 UHFin2
41
VOSCC1
4MOSC
GND1B
IFOUT
REG3
VCC3
CPO
CPE
SANYO TV . VCR
SANYO TV . VCR
42
VIF/SIF Signal-Processing Circuit
LA75503V
Overview
The LA75503V is a completely adjustment-free PAL VIF/SIF signal-processing IC for TV sets and VCRs. It supports IF frequencies of 38, 38.9, and 39.5 MHz. It also provides on-chip audio carrier trap, and audio carrier bandpass filters to support PAL multisystem audio (M/N, B/G, I, and D/K). A reference frequency of 4 MHz is used for the adjustment-free circuits, and the VCO, AFT, and audio filters are controlled either by a crystal oscillator circuit or an external clock input.
LA75505M
Overview
The LA75505M is a completely adjustment-free NTSC VIF/SIF signal-processing IC for TV sets and VCRs. It supports IF frequencies of 45.75 and 58.75 MHz. It integrates both audio carrier trap and audio carrier bandpass filters on chip and thus is optimal for compact light weight tuners. A reference frequency of 4 MHz is used for the adjustment-free circuits, and the VCO, AFT, and audio filters are controlled either by a crystal oscillator circuit or an external clock input.

VIF amplifier VCO adjustment-free PLL detection circuit Digital AFT circuit RF AGC Buzz canceller Equalizer amplifier Audio carrier bandpass filter Audio carrier trap PLL FM detector Reference signal generator The built-in VCO has been made adjustment free so that VCO coil adjustment is not required. The integration on the same chip of the audio bandpass filter and trap make implementation of end products that support PAL multisystem audio easy and low cost. Achieves a significant reduction in the number of required peripheral components Obviates the problem of AFT tolerances by adopting a digital AFT system Package: SSOP30 (275 mil)

VIF amplifier VCO adjustment-free PLL detection circuit Digital AFT circuit RF AGC Buzz canceller Equalizer amplifier Audio carrier bandpass filter Audio carrier trap PLL FM detector Reference signal generator The built-in VCO has been made adjustment free so that VCO coil adjustment is not required. The integration on the same chip of the audio bandpass filter and trap significantly reduces the number of required peripheral components for lower total costs. Obviates the problem of AFT tolerances by adopting a digital AFT system Package: MFP24S (300mil)
Block Diagram
OPEN : PAL GND : NT 10k 2SC3134 100k 2.2k SAW(S) 0.01F 0.01F 30k 6.8k 0.01F
Block Diagram
0.01F IF INPUT
2.2k IF INPUT VCC(5V)
IF INPUT SAW(S) 0.01F 0.01F AUDIO OUT 7.5k 10K-B 1000pF 47k 47k AFT OUT 3k 0.01F 30k
VCC(5V)
VCC(9V)
RF AGC OUT
VCC(9V)
RF AGC OUT
+
21
1F SAW(P)
+ 100F
0.01F 0.022F
0.1F
47k
47k
0.01F AUDIO OUT
+
29
1F 10K-B 1000pF
3k
+
26
NE
1F SAW(P)0.01F
+ 100F
0.022F
0.1F
24
23
22
20
19
18
17
16
15
14
FM DET
13
AFT OUT
30
DEEMPHA
28
27
25
24
23
22
21
20
19
NE
18
17
FM DET
16
FM DET
S PLL
VIF AMP FIL CONT
IF AGC
1 st AMP
AGC
AFT AMP
FM DET
S PLL
VIF AMP
IF AGC APC DET
1 st AMP
AGC
AFT AMP LIM AMP
VIDEO DET
FIL CONT LIM AMP
APC DET
1 stSIF DET
VIDEO DET
1 stSIF DET BPF AMP SW
BPF
AMP SW EQ AMP EQ AMP TRAP LPF VCO FLL PAL SW VCC : 39.5MHz OPEN : 38.9MHz GND : 38.0MHz 220k A SYSTEM VCO COIL B SW 4MHz X tal BPF TRAP LPF VCO FLL
BPF NE NC
3
1F 3k 39pF 39pF
5
2k
10
11
1F
12
13
14
15
2
3k
3
2k
8
1F
10
11
12
220k IF SW OPEN : 45.75MHz GND : 58.75MHz
+
300k 0.01F 1F 300k VIDEO OUT 10H
+
1F 0.01F VIDEO OUT 330k
0.01F
VCO COIL
1F 39pF
4MHz X tal
CARRIER OUT
43
SANYO TV . VCR
SANYO TV . VCR
44
LA75520VA
Overview
The LA75520VA is a completely adjustment-free PAL VIF/SIF IC for TV sets and VCRs. It supports IF frequencies of 38, 38.9, and 39.5 MHz. It integrates an automatic adjustment circuit for the VCO, an AFT circuit, and an audio carrier trap circuit on the same chip and requires the input of either a 4 MHz or 4.43 MHz reference signal.
LA75525VA
Overview
The LA75525VA is a completely adjustment-free NTSC VIF/SIF IC for TV sets and VCRs. It supports IF frequencies of 45.75 and 58.75 MHz. It integrates an automatic adjustment circuit for the VCO, an AFT circuit, and an audio carrier trap circuit on the same chip and requires the input of either a 4 MHz or 3.58 MHz reference signal.
Functions
Automatic adjustment VCO (no external VCO coil is required) Built-in audio carrier trap supports the B/G, I, D/K, and M/N audio systems Digital AFT adopted Package: SSOP24 (275mil)
Functions
Automatic adjustment VCO (no external VCO coil is required) Built-in audio carrier trap; an external circuit may be used if desired Digital AFT adopted FM radio receiver function Package: SSOP24 (225mil)
Block Diagram
SOUND CARRIER OUTPUT VIF/SIF INPUT RF AGC OUTPUT SW15 AUDIO OUTPUT 1F 1F SAWF(P) 0.022F SAWF (S) V4 V3 V2 V1 SW13 SOUND CARRIER OUTPUT
Block Diagram
VIF/SIF INPUT RF AGC OUTPUT
*(Number)for VQFN
*(Number)for VQFN
AUDIO OUTPUT
SAWF(P) 0.01F 1F 0.022F SW15
SAWF (S) SW13
24
(24)
23
(23)
22
(22)
21
(21)
20
(20) RF AGC
19
(19,18)
18
(17) VIF AMP
17
(16)
16
(15)
15
(14)
14
(13)
13
(12)
24
(24)
23
(23)
22
(22)
21
(21)
20
(20) RF AGC
19
(19,18)
18
(27) VIF AMP
17
(16)
16
(15)
15
(14)
14
(13)
13
(12)
DEEMP IF AGC SPLI AMP AMP INT FM DET TRAP
TRAP
1 stSIF AMP AMP AGC IF AGC SPLI
1 stSIF AMP AGC
VIDEO DET
VIDEO DET
VCO AFT APC SW MODE CTRL
FM DET LIM AMP INT TRAP
INT
VCO AFT TV TV APC FM APC SW MODE CTRL
EXT
SIF AMP AGC EQ AMP
LIM AMP EQ AMP FM
(25)
(26)
(27)
(1,2)
(3)
(4)
(5)
(6)
(8)
(9)
(10)
(11)
1
0.01F 0.01F
3
3.3k 0.033F
8
150k 1000P
9
0.47F
10
11
12
(25) AFT OUTPUT
(26)
(27)
(1,2)
(3)
(4)
(5)
(6)
(8)
(9)
(10)
(11)
2
1F
10
11
12
AFT OUTPUT
330P
SW10
1000P V3 V2 V1 SW11 270k 4.43/4MHz
VCC 4.5M BPF 330k VIDEO OUTPUT 15F 330
560
SW10
1000P V4 V3 V2 V1 3.58/4MHz SW11 270k
VCC
VIDEO OUTPUT
SYSTEM SW A
SYSTEM SW B VIF FREQ
TV/FM
45
SANYO TV . VCR
SANYO TV . VCR
46
LA7567BM/BVA
Overview
The LA7567MB and LA7567BVA are PAL/NTSC multi-system VIF/SIF ICs that adopt a partially adjustment-free circuit structure. The LA7567BMV is provided in an SSOP24 (225 mil, 0.5 mm lead pitch) package that is optimal for miniature 2-in-1 tuners. The VIF block adopts a technique that makes AFT adjustment unnecessary by adjusting the VCO, thus simplifying the adjustment process. PLL detection is adopted for FM detection to handle audio multipath detection. These ICs include a on-chip SIF converter, making design of multi-system products easier. The supply voltage is the same 5 V used in multimedia systems. In addition, an on-chip buzz canceller suppresses Nyquist buzz for superb audio quality. These products provide improved video and audio signal-to-noise ratios and improved video signal amplitude as compared to the LA7567N/NM.
LA75676V/676VA
Overview
The LA7576V and LA7576VA are NTSC intercarrier VIF/SIF ICs that adopt a partially adjustment-free circuit structure. The LA7567VA is provided in a SSOP24 (225 mil, 0.5 mm lead pitch) package that is optimal for miniature 2-in-1 tuners. The VIF block adopts a technique that makes AFT adjustment unnecessary by adjusting the VCO, thus simplifying the adjustment process. PLL detection is adopted for FM detection. The supply voltage is the same 5 V used in multimedia systems. In addition, an on-chip buzz canceller suppresses Nyquist buzz for superb audio quality.

VIF amplifier PLL detector BNC RF AGC Equalizer amplifier AFT IF AGC Buzz canceller First SIF First SIF detector AGC Multi SFI converter Limiter amplifier PLL FM detector The AFT and SIF require no coils and are adjustment free PAL/NTSC multiformat audio systems can be implemented easily Built-in buzz canceller for excellent audio characteristics VCC = 5 V, low-power operation Packages: LA7567BM: MFP24S (300mil) LA7567BVA: SSOP24 (225mil)

VIF amplifier PLL detector BNC RF AGC Equalizer amplifier AFT IF AGC Buzz canceller Limiter amplifier PLL FM detector The AFT and SIF require no coils and are adjustment free Built-in buzz canceller for excellent audio characteristics VCC = 5 V, low-power operation Packages: LA7576VA: SSOP24 (225mil) LA7576V: SSOP24 (275mil)
Block Diagram
IN PUT TSF5220 5.6k AF OUT (M) 0.015F SAW (S) 1F 9V RF AGC OUT 30k 1000pF 0.01F (M) 0.022F 0.01F 100k AFT OUT 100k AF OUT 0.01F (M) 4.5MHz OUT 10k-VR 1000pF 7.5k
Block Diagram
IN PUT RF AGC OUT 120k 0.01F SAW(P) 0.015F (M) 0.01F (M) 1000pF 300pF AFT OUT
+
10k-B
SAW(P) GND 1k
1F 0-10k
GND
24
23
22
21
RF AGC
20
IF AGC
19
LIF AMP
18
17
16
15
1st AMP
14
13
24
23
22
21
20
19
18
17
16
6.8k
15
14 V 13
CC 30k AFT
AGC
FM DET VIDEO DET 1st DET AFT
FM DET
RF AGC
IF AGC
VIF AMP
HPF LIM AMP MIX HPF HPF EQ AMP VCO
LIM AMP
VIDEO DET 6 bB HPF EQ AMP VCO
120k
+
BPF
2
1F 330
3
10k
6
0.01F
8
150
10
0.47F
11
12
+
100F 560 15H 330 VCC GND VIDEO OUT BPF 4.5 MHz
2
1F 330
6
0.01F
+
1F
10
560 0.47F
11
12
15H 330
2.2k
2.2k
VCC GND VIDEO OUT
47
SANYO TV . VCR
SANYO TV . VCR
48
PAL Hi-Fi Audio Signal Record and Playback Processing
LA75665NM/NV
Overview
The LA75665NM and LA75665NV are PAL/NTSC multi-system VIF/SIF ICs that adopt a partially adjustment-free circuit structure. The VIF block adopts a technique that makes AFT adjustment unnecessary by adjusting the VCO, thus simplifying the adjustment process. PLL detection is adopted in the SIF block to handle audio multipath detection. The SIF input block provides four input systems and an internal input selection switch. This makes it easier to design products that handle multi-sound systems. Furthermore, this switch can also be used for video system sound trap switching. In addition, an on-chip buzz canceller suppresses Nyquist buzz for superb audio quality.
LA72648M
Overview
The LA72648M is a PAL format system IC that adds a CANAL switch to the Hi-Fi audio signal-processing functions of earlier devices and aims at even lower power operation in power saving modes.

The AFT and SIF require no coils and are adjustment free PAL/NTSC multiformat audio systems can be implemented easily Built-in buzz canceller for excellent audio characteristics Package: LA75665NM: MFP24S (300mil) LA75665NV: SSOP24 (275mil)
Functions
High fidelity audio signal record and playback processing Head amplifier for Hi-Fi Audio signal CANAL switch Package: QFP80 (14 14)
[VIF Block]
VIF amplifier PLL detector BNC RF AGC Equalizer amplifier AFT IF AGC Buzz canceller
[First SIF Block]

First SIF amplifier First SIF detector AGC
[SIF Block]
Multi-input selector switch Limiter amplifier PLL FM detector
FM audio for PAL
TUNER IN (R) / EXT1 IN (R) /SCART1 EXT2 IN (R) /FRONT EXT3 IN (R) /SCART2 EXT4 IN (R) /AUX MONITOR IN (R) 0.01F 4.7F
Block Diagram
10F
4.7F
0.1F
Block Diagram
330 330 330 330 8.2H 150 5.5MHz 6.0MHz 6.5MHz 15H 2.2k VIDEO OUT 3k
N.C. 0.1F 0.1F 61 10F

VCC(5V) GND-R VCC-R
+ +
22F
4700P
+
Logic-GND
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
R-CH PNR
6.5MHz 6.0MHz 5.5MHz 4.5MHz 2.2k 560 2.2k 2.2k 47F 30pF
C B A 0.01F 0.01F 0.01F
330
+ + +
62 63 64 65 66 67 68 69 70
VCC(9V) 13dB A GND 13dB
7dB
ALC R-CH IN SEL
39 38
AF SW CLOCK DATA
4.5MHz 150
+
1F
DEC OUT (R)
4.7F 1.0k 4.7F 1.0k
LIM NOISE DET DEV VCO SW NOISE COMP DO DET HOLD LOGIC PULSE R-CH BPF L-CH BPF LIM
VCC Logic
37 36 35 34 33
VCC HA
SW
ALC
24
23
22
21
20
19
18
17
0.47F
VCCL 5V (P.ON 5V) MONITOR 10F 0.01F 100F
DEC OUT (L)
SW
ALC
Simulcast
16
15
14
13
VCCH 9V (P.ON 9V)
7dB
Normal
LPF MIX
INPUT SW
EQ AMP
0.1F
32 31
VCCL 5V (P.SAVE 5V) (Setoff in power save modes)
TO RF MOD 10k
LIM AMP RF AGC IF AGC VIDEO DET F FM DET VIF 1ST AMP AFT 1ST SIF DET
4.7F
+ + +
71 72 73
7dB
LPF MUTE
ENV DET COMP V/I

REC-H PB AMP
30 N.C. 29 28 27 26
REC-AMP
+ +
OUT SEL
Normal Simulcast
VCO DEV
2.7k
LINE OUT (R)
4.7F 1.0k 4.7F 1.0k
13dB
74 75 76 77
13dB A GND
ALC
LIM
SW NOISE
0.01F 470 PRE GND
LINE OUT (L)

VCO
25
REC-H
PB AMP
24 23
Normal OUT
10F
78 79 80 1
N.C. 0.1F
7dB
L-CH IN SEL ALC VREF

GND-L VCC-L
22F
L-CH PNR
22 21
4700P 0.01F HiFi "High" Normal "LOW"
1
AUDIO OUT 1.5k 0.01F
2 +
3
1F
7
0.022F
10
11
12
100k
Normal IN
0.1F
3
N.C.
5
N.C.
7
N.C.
10 11 12 13 14 15 16 17 18 19 20
10F
SAW(P) VCC 100F
SAW(S)
30k 0.01F
RFAGC OUT
AFT OUT 0.01F 100k
MONITOR IN (L) TUNER IN (L) / EXT1 IN (L) /SCART1 EXT2 IN (L) /FRONT EXT3 IN (L) /SCART2 EXT4 IN (L) /AUX
+
22F 0.1F
+ +
10F 4.7F 0.01F
0.01F
REC MUTE
49
SANYO TV . VCR
SANYO TV . VCR
50
Hi-Fi Signal Processing HiFi Processing with Built-in Audio Multiplex Decoder for US Market Products
Hi-Fi Signal Processing HiFi Processing with Built-in Audio Multiplex Decoder for Japanese Market Products
LA72670M
Overview
The LA72670M is a system IC that adds SIF and US standard multi channel television sound(MTS)signal decoding functions to the Hi-Hi audio signal-processing functions of earlier devices. All adjustments have been implemented in the IC chip by either automatic adjustment, trimming, or some other technique, making this device is fully adjustment free.
LA72680M
Overview
The LA72680M is a system IC that adds SIF and Japanese standard multi channel television sound(MTS)signal decoding functions to the Hi-Fi audio signal-processing functions of earlier devices. All adjustments have been implemented in the IC chip by either automatic adjustment, trimming, or some other technique, making this device is fully adjustment free.
Functions
Hi-Fi audio signal record and playback processing Head amplifier for Hi-Fi Audio signal SIF demodulation US standards compliant audio multiplex decoder Package: QFP80 (14 14)
Functions
Hi-Fi audio signal record and playback processing Head amplifier for Hi-Fi Audio signal SIF demodulation Japanese standards compliant audio multiplex decoder Package: QFP80 (14 14)
Block Diagram
4.5MHz BPF SIF IN 0.033F 4.7F 2.2F 1F 1F 1F fsc IN 3.58MHz MUTE 4700P 10F 4.7F 1F 4.7F MTS VCC (9V) 0.01F 1F 2.2F 22F 4.5MHz BPF
Block Diagram
fsc IN 3.58MHz SIF DET IN MTS VCC(9V) 4.7F 2.2F 1F 4.7F 4.7F 2.2F
NC
MUTE 1F
+
47
AIC
10F 4.7F 0.01F 4700P
22F
+
1F 1F 0.1F 4.7F 22F 4.7F 22F EXT1 IN (R) MTS GND EXT2 IN (R) 4.7F
+ +
VRFF
+
LIM AMP SIF DEMOD
+
A GND PILOT DET STERO PII R-CH PNR
+ +
+
40 39 38 37
MTS MODE OUT AF SW CLOCK DATA 0.1F 0.1F D GND JUST IN CLOCK OUT MONITOR 10F 0.01F 0.1F EXT1 IN (R)
MTS GND
+
1F
+
59
+
58 57
+
56
+
55 54
+
52 51 50
A GND
+
49 48 46 45
+
44 43 42
+
41 40
MTS MODE OUT AF SW CLOCK DATA
+ + + + + + +
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 61 62 63 64 65 66 67 68 69 70 71
MATRIX D.C LPF R-CH IN SEL MIX
REC-H
60
53
PIPPLE FIITFR
PIPPLE FILTER STEREO FILTER
+
NC NC
61 62 63 64 65 66 JUST CLK 67
FIITFR Adj. IIM AMP SIF DEMOD 4.5fH TRAP 15kHz 15kHz LPF IPF MAIN DEEM SUB DEEM OUT SW SUB DEMOD
CUE BPF
AM DEMOD COMP
PLL
R-CH PNR
39 38 37
PILOT FIITER SAP Adj. FILTER CANCEL dbx DEC ST/SAP SW SAP DEMOD SAP DET CONT
L-R DEMOD LIM DFV
HOLD PULSE SW NOISE R-CH BPF L-CH BPF
LOGIC
36 35
SUB BPF SUB DET MATRIX
HOLD PULSE LIM DEV COMP VCO DO DET LPF R-CH BPF L-CH BPF SW NOISE
LOGIC
36 35
D GND MONITOR 10F
LIM
34 33
NC
CONTROL
LIM
34 33 32 31
NOISF 30 DET
ALC DET REC-H
68 69 70 71 72
VCO
COMP DO DET
32 31
NOISE DET
100F 39k
VCC (L) 5V
+ +
10F
0.01F
VCC (L) 5V
+ + + + + +
72 73 74 75
30 0.01F + 4.7F 29 28 27 26 25
2.7k 0.01F 470 PRE GND
EXT2 IN (R)
Monitor IN(R)
EXT3 IN (R)
1F 4.7F 1F
EXT3 IN (R)
PR AMP
1F
73
R-CH IN SEL
MIX
PB AMP
29 28 27 26 25
4.7F
39k
2.7k 0.01F 470 PRE GND HiFi Tracking DC (NORMAL:Low)
74 75
REC AMP
MONITOR IN (R) 0.01F NC HiFi "Tracking D (NORMAL:Low) 4.7F LINE OUT (R)
A GND
REC AMP
COMP
COMP
76 77 78 79 80 1
4.7F
MUTE
ALC
OUT SEL
LINE OUT (R)
4.7F 1.0k A GND 4.7F 10k 1.0k
ENV DET
76 77
MUTE
ALC
PB AMP REC-T
24 23 22 21
4700P
OUT SEL
ENV DET
+ +
PB AMP REC-H
24 23 22
4700P
L-CH VREF A GND
1.0k 10k 4.7F
78 79 80 1
4.7F
A GND
LINE OUT (L) TO RF MOD VCC (H) 9V Normal IN ALWAYS 5V Normal OUT EXT1 IN (L) EXT2 IN (L) EXT3 IN (L)
0.01F LINE OUT (L) REC MUTE TO RF MOD VCC(H) 9V Normal IN ALWAYS +B Normal OUT EXT1 IN (L) EXT2 IN (L) EXT3 IN (L)
L-CH VREF
10 11 12 13 14 15 16 17 18 19 20
22F
1.0k
21 11 12 13
1F
+
22F REC MUTE
5
0.47F
10
14
15
16
17
18
19
20
+ +
0.1F 10F 1F
+
1F
+ +
22F
+ +
10F 4.7F 0.01F
+
10F 1F
+ +
+
22F
+
10F
+
4.7F 0.01F
Monitor IN(L)
MONI TOR (L)
51
SANYO TV . VCR
SANYO TV . VCR
52
Video and Audio Signal-Processing IC
LA71206M/7M
Overview
The LA71206M and LA71207M are video and audio signal processing (Y/C/A) system ICs for NTSC VHS VCRs. Chip internal trimming is used to make these ICs fully adjustment free. These ICs significantly reduce the number of peripheral components required, thus providing substantial cost savings in the signalprocessing board.
LA71750EM
Overview
The LA71750EM is a video signal-processing system IC that supports the PAL (G, B and I) 4.43 NTSC, MESECAM, and NAP (G, B, and I) formats for VHS VCRs. Chip internal trimming is used to make this IC fully adjustment free. This IC significantly reduces the number of peripheral components required, thus providing substantial cost savings in the signalprocessing board. Additionally, this IC also supports the NAP standard (NTSC to PAL conversion) that is now common in Europe and China.
Functions
NTSC VHS VCR video signal record and playback processing VHS VCR audio signal record and playback processing I2C bus serial control Package: QFP80 (14 14)
Functions
PAL VHS VCR video signal record and playback processing VHS VCR audio signal record and playback processing I2C bus serial control Package: QIP100EJ (14 20)
Block Diagram
HA SW AUDIO-MUTE C-ROT RF SW 0.01F 10k COMP OUT 0.1F ENV DET 20k 1F 10k 8.2k 0.022F 20k S.C. IN DATA IN CLOCK IN C-VCC 1.8k 1F 1.2k
Block Diagram
OSD SERIAL CLOCK IN C SYNC OUT Video OUT 3 To SCART2(DEC) CHARA. INS. CANAL DECODER Video OUT 2 To SCART1(TV) Video IN 3 SCART2(DEC) V SYNC OUT AUD-MUTE C-ROT-IN
HA-SW-IN
MA IN EMPHA OUT 1.2k 220P
RF-SW-IN
Video IN 5 OSD(PB)
18k
10k
18k
4Fsc
0.01F
10k
3.58M NTSC
+
48
320FH VCO P R
680k
6.8k
ALWAYS 5V
+ 1F
47
SLD
0.01F
REC-MUTE CONTROL for H.A.
REC/PB Y-FM
SUB TITLE DECODER
Video IN 4 FRONT
PB C OUT REC C MONI
2.7k 130P
CCD VCC
SERIAL DATA IN
Video OUT 1 To OSD etc
VPS OUT (1Vpp)
60 61 62
0.047F 0.047F EP (Hch) KILL DET
59
ENV DET
58
57
56
55
54
SERIAL DECODER
53
52
C-VCC
51
50
49
VXO1
46
R
45
ALWAYS 5V
44
VDD
43
COMP OUT
AUDIO C-ROT C-GND MUTE RF-SW HA SW IN
4F sc
42
PLL
41
CLOCK VSS OUT OUT AUTO-BIAS VSS CLAMP VCC
4.7k
+
74 73
DRV
DRV
DRV
+
60 59 58
AGC TC2 VIDEO AGC
+
57
FBC3 DET
+
56
CLP5
4 3 2 SW1 1 Mute 5 4 SW2 3 Mute 5 2 SW3 1
GND
80
PHASE COMPEN fo-CTL
79
78
REC FM-EQ
R
77
FM AGC
76
75
72
71
70
69
68
67
66
65
64
Y-GND
63
62
61
55
54
53
52
51
FRAME
IN STANDBY MODE SW1 FIXED ON IN1 SW2 FIXED ON IN3 SW3 FIXED ON IN2
0.047F HA-GND
40 39 38
2.2k
HA GND CHROMA DET ACC DET R P R H P HA VCC I C-LPF Main CONV P REC APC
81
PHASE COMPEN Q-CTL

P
TIMMING REC AFC
63 64 65 66
PB APC
CCD LA89964
BGA BGA
82 HA GND
VCC 100k
DRIVER CCD
FM AGC REC FM-EQ
W/D NL CLIP EMPHA PB_FM EQ. PHASE FM MOD COMPEN
FBC1 Y-VCC DET DETAIL ENH
SERIAL R FBC1 P DECODER

P R
SYNC 6DB SEP AMP AGC BYPASS

P R
ALWAYS AGC 5V CLP4 TC1 CAR BAL CLP3 CLP2 CLP1
50
VCA DET 49
Video IN 2 SCART1(TV)
+
Video IN 1 TUNER
COMP OUT ENV DET REC CURRENT IS DECIDED BY THIS RESISTOR VALUE, AND A TOLERANCE OF THE RESISTOR VALUE WHICH WE RECOMMEND IS 1% EP (Hch)
83
ENV 84 DET 2.2k REC 85 FM AGC2 REF + REC 86 FM AGC2 FILT
Y-DELAY MAIN DE-EM FM DEM SUB LPF

P R
BEFORE
37 IN 36
VCA
+
1F 1F
100k
AGC NORMAL Chara FBC3 INS. Y 1/2 C
R P
AFTER P R 3.58M BPF2 B-DP AMP BGA R P
CNC PB AMP B.D.
VCA CLAMP
35 +
WHEN SQPB, DOUBLE LIM F-TEST EQ BYPASS Y P R R

H
Y/C PB_C MIX PB_Y PIC CTL NC1/2 NL DeEM
60B AMP 60B AMP
48
REG 47 4V
46
VCA FBC2 DET 45 PB H OUT 44 FBC2
+
PB H OUT
EP (Lch)
67
HA VCC TOLERANCE LESS THAN 1% for REC CURRENT 1.5k adjustment
68 69 70 71 72
34 + 1F + VCP 33 32 +
REG 4V 1F Video IN1 10F 75
87 88
Y-DELAY
Y-LPF REC:ON R Sub CONV

L
+
HA PRF GND P R P A-GND 1 2 3 A-VCC ALC DET H I
4.21M BPF Sub CONV
ACC AMP ACC DET
R PB-C P CLAMP P MAIN FMPHA FM MOD NORMAL DOUBLE LIM P R
3.58M RPF1 VIDEO AGC R N.L. DFFM PR-C NC1 Y/C MIX 1/2 FBC R P R P FM DEM SUB LPF MA IN DF-FM PB S-EQ FM-EQ VHS SQPB QV-QH
1 2 3
Use of commonness is possible
Y.N.R BPF2
P R
89
EP (Lch)
31
43 DELAYED Y_DELAY SIGNAL CCD 42 V CC NT/NT LC89984/85

1H/2H D.L FRAME 41 GND CCD GND 40
YNR/COMB
DFTAIL FNH NL FMPHA
BAL TC1
30 + 10F + 29 28 +
1F
0.1F
90
Video IN2 75
C KIL REC FM AGC2

H
H.A VCC
91 H.A.
R C-LPF
BPF3 P Main CONV R B-UP AMP
P ACC ACC DET
BPF1 D.L EQ
C-MAIN INV
SP (Hch)
VCC HA 92 PRE GND
Y C
73
SP (Lch)
Y-LPF R
HA
Video IN3 VCC 51
74
+B=5V A-GND 0.1F 100F BIAS OSC 560 2.2 2SD734 AE 0.022F (M) 47 1k 22k Audio IN1 47k 0.1F 3.9k Audio IN2 A-VCC
75 76 77 78 79 80
6DB SYNC SEP V.SYNC SEP
26 25 24
100
470F 75 VIDEO OUT C.SYNC OUT V SYNC OUT(REC) QV/QH INS(PB) Y-VCC
95 96
R P ATT R/P-EQ SEPARATE (REC) 100 PB/EE REC:LP/EP PB:EP PB REC/EE
SP (Lch) 560 AE FE
SYNC DET KIL B.D. NAP
P/S AFC 36 FILT
ALC
R P
LPF VREF
LINE AMP P REC AMP MUTE R
REC FM-EQ FM AGC
97 A.GND
LP/EP 47 1k 2.2
REC Vref REC AMP PB/EE
47k 0.1F + 3.9k Audio IN3 22F
Y-VCC
23 22
98 99 SP 100
INVERTER R/P-EQ SEPARATE EQ AMP SP/LP
R/P-EQ COMMON
ALC LINE ALC AMP DET 1 23 AUDIO HD-SW CTL
P R
FB.EE EQ AMP Vret 2.3V SP.LP
PB.EE REC:LP.EP PB :EP
1F
NAP BPF VCO SLD C-VCC CNC ACC DET
KIL SECAM DET DET PAL M DET 34 REC AFC PB 33 APC REC 32 APC VXO2 VXO1 FRAME
35 8200P
47k 0.1F 3.9k
AUTO BIAS
0.1F
12k
2SA1318
2SC3331 R/P 2.2k 1k 2SC3331
LINE OUT
Audio IN1
Audio IN2
TO MICOM (PB-Low) 1F
0.01F 150
R/P
1000P
2SC3331
1k 2SA1318
1200P 180
1k
53
REC:LOW C OUT (SECAM C IN) PB:FM OUT (SECAM FM OUT)
PB:C OUT (SECAM C IN)
27k
LINE OUT
REC/PB Y-FM
M EMPH PB EQ MONI
Audio IN3
10k 27k
330k
10F
4.7F
1F
200P
2SC3331
2k
1.2k 27k
12k 5.6k 0.01F
+ +
12k
8.2k
33F
22k 10k
1.5k
10k
1.2k
2200P
390P
0.1F
1200P
330k
FE
0.01F 0.033F 47F
PHASE PHASE EQ EQ fo-ADJ Q-ADJ
FM AGC FIL
Y-GND
MAIN EMPHA FIL
4.7k S DET
21
AUTO BIAS
Vref MUTE LPF 2.3V
CHROMA A-VCC DET C-GND
31
1 +
8.2k
10 +
11
12
13
14
15 +
16
17
18
19
20
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
GND
PAL-GBI PAL-MN
4.7k
R-EQ TEST
AGC TC2
27 +
10F 75
93
SP (Hch) +B(5V) Use of commonness is possible
P R
R
P
22F
94
REC:ON
R/PA
PB
REC BGA PB BGA-A PB BGA-B
R CCD LPF P
D.L EQ COMB AMP
C-DELAY
M/M
RD 39 Fsc CLK IN VCO 38 SYNC SLICE PED.SIDE 2FSC-OUT 37 3.9k +
SANYO TV . VCR
SANYO TV . VCR
54
VCR SECAM Chrominance Signal-Processing IC
LA71730EM
Overview
The LA71730EM is a video signal-processing system IC that handles VHS VCR formats other than SECAM. It supports the PAL (G, B, I, M, and N), NTSC-M, 4.4.3 NTSC, MESECAM, and NAP (G, B, I, M, and N) formats. Chip internal trimming is used to make this IC fully adjustment free. This IC significantly reduces the number of peripheral components required, thus providing substantial cost savings in the signalprocessing board. Additionally, this IC also supports the NAP standard (NTSC to PAL conversion) that is now common in Europe and China.
LA70100M
Overview
The LA70100M is a SECAM VCR chrominance signal processing IC. It integrates bandpass filter, SECAM discrimination, and Bell filter circuits to significantly reduce the number of peripheral components required and can supports adjustment-free designs.
Functions
Multi-format VHS VCR video signal record and playback processing VHS VCR audio signal record and playback processing I2C bus serial control Package: QIP100EJ (14 20)
Functions
Integrates all required filters on a single chip Automatic adjustment of the Bell filter f0 frequency Built-in SECAM discrimination circuit Package: MFP30SD (375mil)
Block Diagram
OSD SERIAL CLOCK IN C SYNC OUT Video OUT 3 To SCART2(DEC) CHARA. INS. CANAL DECODER Video OUT 2 To SCART1(TV) Video IN 3 SCART2(DEC) V SYNC OUT AUD-MUTE C-ROT-IN
HA-SW-IN
MA IN EMPHA OUT 1.2k 220P
RF-SW-IN
SERIAL DATA IN
Video OUT 1 To OSD etc
2.7k 130P
Video IN 5 OSD(PB)
18k
10k
18k
10k
REC-MUTE CONTROL for H.A.
REC/PB Y-FM
SUB TITLE DECODER
Video IN 4 FRONT
6.8k
VPS OUT (1Vpp)
Block Diagram
IN STANDBY MODE SW1 FIXED ON IN1 SW2 FIXED ON IN3 SW3 FIXED ON IN2
4.7k
+
74 73
DRV
DRV
DRV
+
60 59 58
AGC TC2 VIDEO AGC
+
57
FBC3 DET
+
56 55 54 53 52
ALWAYS AGC 5V CLP4 TC1 CLP5 CAR BAL
4 3 2 SW1 1 Mute 5 4 SW2 3 Mute 5 2 SW3 1
GND
80
PHASE COMPEN fo-CTL
79
78
REC FM-EQ
R
77
FM AGC
76
75
72
71
70
69
68
67
66
65
64
Y-GND
63
62
61
51
FRAME
81
PHASE COMPEN Q-CTL

P
2200pF
2200pF
0.47F
CLP3 CLP2 CLP1
COMP OUT ENV DET REC CURRENT IS DECIDED BY THIS RESISTOR VALUE, AND A TOLERANCE OF THE RESISTOR VALUE WHICH WE RECOMMEND IS 1% EP (Hch)
83
ENV 84 DET 2.2k REC 85 FM AGC2 REF + REC 86 FM AGC2 FILT
Y-DELAY REC FM-EQ PHASE FM MOD COMPEN FM DEM MAIN DE-EM SUB LPF
P R
BELL MONII4
SYNC-IN
S/H C2
S/H C1
SECAM DET SENS
SECAM DET OUT
S/H C3
DET C
PB-OUT
NoConnect
LIM EXC
WHEN SQPB, DOUBLE LIM F-TEST EQ BYPASS Y P R R

H
1/2
46
VCA FBC2 DET 45 PB H OUT 44
+
PB H OUT
REC /PB Buf fer PB-H
87 88
Y-DELAY
NC1/2 NL DeEM
Y-LPF REC:ON R Sub CONV

L
Use of commonness is possible
Y.N.R BPF2
P R
FBC2
89
EP (Lch)
43 DELAYED Y_DELAY SIGNAL CCD VCC 42 NT/NT LC89984/85

1H/2H D.L FRAME 41 GND CCD GND 40
SECAM DET SYNC GATE GEN /V-SEP BGR GEN MODE to MUTE CTL to MUTE to SYNC GATE to PB AGC to REC KILLER CONTROL LOGIC X2 CHOROMA 1.1MHz 2.2MHz BPF X2 2.2MHz TRAP 4.3MHz BELL ANTI BELL 4.3MHz BPF
PB MUTE 2.2MHz TRAP
REC PB SYNC GATE
90
H.A VCC
C KIL REC FM AGC2

H
91 H.A.
R C-LPF
BPF3 P Main CONV R B-UP AMP
P ACC ACC DET
BPF1 D.L EQ
C-MAIN INV
VCC HA 92 PRE GND
Y C
93
SP (Hch) +B(5V) Use of commonness is possible SP (Lch)
P R R P
R
P
95 96
SYNC DET KIL B.D. NAP
PB REC/EE ATT
P/S AFC 36 FILT
4.7k
94
REC:ON
R/PA
PB
REC BGA PB BGA-A PB BGA-B
R CCD LPF P
D.L EQ COMB AMP
C-DELAY
M/M
RD 39 Fsc CLK IN VCO 38 SYNC SLICE PED.SIDE 2FSC-OUT 37 3.9k +
AFC 4.43MHz VCO
Filter Adj.
560 AE FE
97 A.GND
LP/EP 47 1k 2.2
BELL MONII1
GND TEST MODE VCO MONIT
AFC FILTER
BGP DELAY
MODE
CLK IN
GND2
AUDIO HD-SW CTL
CHROMA A-VCC DET C-GND
VCO SLD C-VCC
ACC DET
VXO2
VXO1 FRAME
31
1
22k 10k
3
1200P
6
330k
10
11
12
10k
13
14
15
16
17
18
19
20
21
22
23
1.2k
24
25
26
27
28
8.2k
29
30
GND
1 MODE CTL
2 0.01F 0.01F
3 1k
BAL
CNC
6 1F
0.01F
2SC3331
2k R/P 1k 2SA1318 2SC3331
+
Audio IN1 Audio IN2 Audio IN3 12k REC:LOW C OUT (SECAM C IN) PB:FM OUT (SECAM FM OUT)
LINE OUT
1F
1.2k 27k 1200P
PB:C OUT (SECAM C IN)
12k 5.6k 0.01F
+ +
PAL-GBI PAL-MN
+ BGP DELAY CTL

H : +400n M : 0n L : -400n
180
4.43MHz CW MODECTL H:SECAM OPEN:AUTO DET L:EXCEPT SECAM
4.3MHz BELL FO CTL H : +80k REC-C OUT M : 0k L : +40k *PB ONLY
PB-C IN
55
0.47F
0.1F
PB-IN
3.58 NTSC
REC-OUT
1 23
NAP BPF
Buf fer
AGC FILTER
NoConnect
ALC INVERTER R/P-EQ 98 R/P-EQ REC COMMON LINE ALC SEPARATE AMP PB/EE 100 PB/EE DET AMP 99 SP EQ REC:LP/EP AMP AUTO SP/LP PB:EP 100 Vref BIAS LPF 2.3V MUTE
REC Vref
R/P-EQ SEPARATE (REC)
P R
KIL SECAM DET DET PAL M DET 34 REC AFC PB 33 APC REC 32 APC
35 8200P
REC LIM 4.3MHz PB BPF REC SYNC 1/4 1.1MHz GATE BPF 1.1MHz 2.2 PB ANTI BELL BELL BELL MHz REC PB ANTI BELL REC AGC AGC MUTE AMP DET Buf REG 4.3MHz BELL fer 4.0V FO CTL FO CTL REG 9 10 11 12 13 14 15
REC-IN
AGC NORMAL Chara FBC3 INS.
R P
Y/C PB_C MIX PB_Y PIC CTL
60B AMP 60B AMP
2.2F
82 HA GND
FM AGC
48
REG 47 4V
Video IN 1 TUNER
+
27
+
21 20
30
29
28
26
25
24 VCC2
23 VCC
22
0.01F
AGC BYPASS
VCA DET 49
19
18
17
0.01F 16
W/D NL CLIP EMPHA PB_FM EQ.
FBC1 Y-VCC DET DETAIL ENH
SERIAL R FBC1 P DECODER
SYNC 6DB SEP AMP
50
Video IN 2 SCART1(TV)
C.SYNC IN
SECAM HI
VCC 5V
VCC 5V
PB OUT RP CTL REC IN
SANYO TV . VCR
SANYO TV . VCR
56
On-Screen Display Controller IC
LC74785/M
Overview
The LC74785 and LC74785M are integrated EDS on-screen display CMOS ICs that display text and patterns on the TV screen under control of a microcontroller. The LC74785 and LC74785M display 12 18 dot characters in a display area of 12 lines by 24 columns.
LC74789/M/JM
Overview
The LC74789, LC74789M, and LC74789JM are on-screen display CMOS ICs that display text and patterns on the TV screen under control of a microcontroller. The LC74789, LC74789M, and LC74789JM display 12 18 dot characters in a display area of 12 lines by 24 columns.
Functions
Display structure: 12 lines 24 characters (up to 288 characters) Character structure: 12 18 dots (H V) Character sizes: Three sizes in each of the horizontal and vertical directions Number of characters: 128 characters Display start positions: Horizontal: 64 positions, vertical: 64 positions Blinking: Specified in horizontal units Types of blinking: Two: periods of 1.0 and 0.5 seconds Blinking of the whole character area (12 18 dots) Background color: 8 colors (internal synchronization operation) at 4 fsc 6 colors (internal synchronization operation) at 2 fsc Line background color: Can be set for up to 3 lines Line background color: 8 colors (internal synchronization operation) at 4 fsc Line background color: 6 colors (internal synchronization operation) at 2 fsc External control input: 8-bit serial interface Built-in sync separator circuit EDS support Video input: NTSC composite video signal Packages: LC74785: DIP24S (300mil) LC74785M: MFP24 (375mil)
Functions
Display structure: 12 lines 24 characters (up to 288 characters) Character structure: 12 18 dots (H V) Character size: Three sizes in each of the horizontal and vertical directions Number of characters: 256 characters (254 characters, one space character, one transparent space character) Display start positions: Horizontal: 64 positions, vertical: 64 positions Blinking: Specified in horizontal units Types of blinking: Two: periods of 1.0 and 0.5 seconds Blinking of the whole character area (12 18 dots) Background color: 8 colors (internal synchronization operation) at both 2 and 4 fsc Line background color: Can be set for up to 3 lines Line background color: 8 colors (internal synchronization operation) at both 2 and 4 fsc External control input: 8-bit serial interface Built-in sync separator circuit Video signal inputs: NTSC, PAL, PAL-N, PAL-M, NTSC 4.43, and PAL60 composite video signals Packages: LC74789: DIP24S (300mil), LC74789M: MFP24 (375mil), LC74789JM: MFP24S (300mil)
Block Diagram
Block Diagram
CS1 SIN SCLK
Serial parallel converter Data output buffe
8-bit latch + command decoder
CS SIN
Serial parallel converter
CPDT CS2 LN21
Output control
Horizontal Horizontal Vertical direction display direction character position character size register size register register Horizontal size counter Vertical size counter Horizontal dot counter
Vertical display position register Vertical dot counter
Blinking and inversion control register
Display control register
RAM write address counter Decoder
SCLK RST
8-bit latch + command decoder Horizontal direction character size register Horizontal size counter Vertical direction character size register Vertical size counter Horizontal display position register Horizontal dot counter Vertical display position register Vertical dot counter Blinking and inversion control register Blinking and inversion control circuit Display control register RAM write address counter Decoder
DATA SLICER
Blinking and inversion control circuit
Display RAM
VDD1 VSS1
Display RAM
VDD1 VSS1
VDD2 VSS2
Horizontal Vertical display display position position detection detection Decoder Character control counter Line control counter
VDD2 VSS2 SYNCJDG
Horizontal display position detection Sync discriminator Character output dot clock generator Timing generator
Vertical display position detection
Decoder
Character control counter
Line control counter
Font ROM
SYNCJDG
Sync discriminator DATA peak hold (slicer) circuit Pedestal clamp HSYNC peak hold (slicer) circuit Composite sync signal separator control
Font ROM
OSCIN OSCOUT
Timing generator
Sync signal generator
Character output dot clock generator
Character output control Background control Video output control
Shift register
SYNIN SEPC SEPOUT SEPIN
Character output control Background control
Shift register
Sync discriminator
Composite sync signal separator control
SYNIN
RST
SEPOUT OSCIN OSCOUT
SEPIN
XtalIN CTRL1 XtalOUT (CHABLK) (MUTE)
COLR CVIN CVOUT
CVCR CVOUT CTRL1 XtalIN XtalOUT HFTONOUT (MUTE) CVIN COLR (CHABLK)
57
SANYO TV . VCR
SANYO TV . VCR
58
VPS/PDC Slicer IC
LC74776/M
Overview
The LC74776 and LC74776M are integrated PDC/VPS/UDT interface circuit on-screen display CMOS ICs that display text and patterns on the TV screen under control of a microcontroller. The LC74776 and LC74776M display 12 18 dot characters in a display area of 12 lines by 24 columns.
LC74793/JM
Overview
The LC74793 and LC74793JM are PDC/VPS/UDT interface CMOS ICs. The operating mode can be set and the data acquired in the various modes can be read out by a microcontroller.
Functions
Display structure: 12 lines 24 characters (up to 288 characters) Character structure: 12 18 dots (H V) Character sizes: Three sizes in each of the horizontal and vertical directions Number of characters: 256 characters (256 characters, one space character, one transparent space character) Display start positions: Horizontal: 64 positions, vertical: 64 positions Blinking: Specified in character units Types of blinking: Two: periods of 1.0 and 0.5 seconds Blinking of the whole character area (12 18 dots) Background color: 8 colors (internal synchronization operation) at both 2 and 4 fsc Blue background only: NTSC Line background color: Can be set for up to 3 lines Line background color: 8 colors (internal synchronization operation) at both 2 and 4 fsc External control input: 8-bit serial interface Built-in sync separator circuit Video signal input: PAL or NTSC composite video signal Built-in PDC/VPS/UDT interface (I2C bus support) Packages: LC74776: DIP30SD (400mil) LC74776M: MFP30S (375mil)
Functions
VPS data acquisition (bytes 5 and 11 to 15) VPS: Video Program System PDC (8/30/2) data acquisition (bytes 13 to 25) PDC: Program Delivery Control UDT (8/30/1) data acquisition (bytes 13 to 25) UDT: Unified Date and Time Header (X/00) data acquisition (bytes 14 to 45) Status display (8/30/1, 8/30/2) data acquisition (bytes 26 to 45) Automatic VPS/PDC discrimination mode Sync separator and AFC circuits Sync discrimination circuit I2C bus support Packages: LC74793: DIP24S (300mil) LC74793JM: MFP24S (300mil)
Block Diagram
Block Diagram
CS SIN SCLK SRT
Serial parallel converter Data output buffer
8-bit latch + command decoder Output control Horizontal direction character size register Vertical direction character size register Horizontal display position register Vertical display position register Blinking and inversion control register Blinking and inversion control circuit Display control register RAM write address counter
SDA SCL
I2C bus interface
Data latch circuit
DAV
SLC SDA CPOUT VCOIN VCOR
SYNIN
Decoder
AFC circuit
Data slicer circuit
Horizontal size counter
Vertical size counter
Horizontal dot counter
Vertical dot counter
Display RAM
SEPC
Sync separator and data separator circuits
Data acquisition circuit
SEPOUT
Horizontal display position detection Sync discriminator Character output dot clock generator Timing generator Character control counter
Vertical display position detection
Decoder
SEPIN CTRL2
Vertical separation circuit AFC circuit (VCO) Timing generator
SYNCJDG OSCIN OSCOUT
Line control counter
Font ROM
VDD1,2
Sync discrimination circuit
SYNIN SEPC SEPOUT
Sync separator and data separator circuit

VDD1 VDD2 VDD3
Composite sync signal separator control

VSS1 VSS2 VSS3
Character output control Background control Video output control
Shift register
VSS1,2
SYNCJDG
CPOUT VCOIN VCOR HOUT VOUT
XIN
XOUT CTRL1 CDLR RST
CTRL1 XtalIN (CHABLK)
XtalOUT (MUTE)
CVCR CDLR CVIN CVOUT
59
SANYO TV . VCR
SANYO TV . VCR
60
VHF Band RF Module
VHF Band RF Module
LA7161NM/NV
Overview
The LA7161NM and LA7161NV are VHF band RF modules that support channels 3 and 4 in the US, channels 1 and 2 in Japan, and channel 13 in Taiwan.
LA77000V
Overview
The LA77000V is a VHF band RF module that supports channels 3 and 4 in the US.
Functions
RF VCO RF mixer RF buffer Video clamp White clipping FM audio demodulator 4 V regulator Reference oscillator Packages: LA7161NM: MFP16 (225mil) LA7161NV: SSOP16 (225mil)
Functions
RF VCO RF mixer RF buffer Video clamp White clipping FM audio demodulator 4 V regulator Reference oscillator Package: SSOP16 (225mil)
Block Diagram
ANT_DRV
Block Diagram
RF_LPF
ANT_DRV
RFOUT
16
15
14
13
12
11
10
16
15
14
13
12
11
10
REG 4V
BUF
RF MIXER
BUF
RF OSC off
REG 4V
BUF
RF MIXER
BUF
RF OSC off
BIAS
ANT SW DRIVER
off PLL BIAS ANT SW DRIVER
off PLL
FM OSC
PLL
WHITE CLIP
CARRIER OFF SW REF OSC CHANNEL
FM OSC
PLL
WHITE CLIP
CARRIER OFF SW REF OSC CHANNEL
+
1
PSADJ
CLAMP
+
8
CH
CLAMP
2
AUDIO_IN
3
FM_LPF
4
GND
5
VIDEO_IN
6
CARR_OFF
7
IN_XTAL
1
PSADJ
2
AUDIO_IN
3
FM_LPF
4
GND
5
VIDEO_IN
6
CARR_OFF
7
IN_XTAL
CH
PLL GND
RF GND
RF_LPF
OSC2
OSC1
VCC1
VCC2
RFOUT
REG
VCC1
VCC2
REG
61
SANYO TV . VCR
SANYO VCR SANYO TV TV ..VTR
62
PWM Capstan + Sensorless Drum + Loading Motor Drivers
Package Dimensions Dimensions Package

(Reference Drawing) (unit:mm)
LB11885/4
SIP7H SIP7H
Overview
The LB11885 and LB11884 are 3-in-1 motor driver ICs for VCR units.
18.0 3.4 3.0
SIP/DIP/SQFP/QIP
SIP10H SIP10H
26.8 20.0 (11.8) R1.7 13.2max 4.0
C 0.7 3.4
SIP10HD SIP10HD
25.6 (10.0) ( 2.0) 2.4 3.0 min 1.0 min 11.2 (11.8)
Functions and Features [Capstan Motor Drive Block]

Three-phase 120 round-trip excitation direct PWM drive PWM oscillator Current limiter function (fixed internal and externally settable) Forward/reverse function Two-stage FG amplifier (built-in gain resistor) Control amplifier output pin
13.4 10.8 15.0 max
[Loading Motor Drive Block]

H bridge forward/reverse function Motor voltage switching function Short-circuit braking function Three-value input control
7.0
1.0 min 6.0
1.0 min
1
(1.37) 2.54 0.5
10
1.15
5.8
1.4
0.5
2.54
10
4.5 0.4 1.2

19
(1.97)
1
1.38 2.54 0.6
7
1.0 0.6 1.2
0.4 2.0
[Drum Motor Drive Block]

Three-phase 120 round-trip excitation soft switching sensorless drive Sensorless FG function Two-stage PG amplifier function Mixed FG and PG output function (separate output is also possible) Block Diagram
C_FR C_HU+ C_HUC_HV+ C_HVC_HW+ C_HW2k C_FG IN 2.5k 2.5k C_FG OUT C_FG
[Common Circuits]
Thermal protection circuit (TSD)
24
DIP24S(300mil) DIP24S(300mil)
21.0
DIP30SD(400mil) DIP30SD(400mil)
27.0
32.4
13
7.62 6.4
30
16
36
0.25
10.16
Package: LB11885: HSSOP48 (375mil) LB11884: SSOP44J (275mil)

1
0.9
15.4 max
(8.4)
(13.9)
8.6
0.25
12
3.0 3.95max (3.25)
1
0.95
15
0.95 3.0 3.95max (3.25)
3.3 3.9max
(3.25)
0.51min
0.51min
C_VCC
0.51min
1.78
0.48
0.48 1.78
(1.1)
(0.71)
Rising voltage protect MATRIX & LOGIC

C_U OUT
1.78
0.48
0.95
(1.04)
C_V OUT C_W OUT VCC C_RFP 62k + +
37.7
47.58
SQFP48(7 7) 7) SQFP48(7
36 25 24
0.5 9.0 7.0
TSD
42 22
54
28
R S
+ -
C_CNT C_LIM
15.24
13.8
15.24
13.8
VCC
C_RFS
37
0.25
(4.0)
680pF C_PWM S GND D_FGO VCC
OSC
Rising voltage protect
C_MGND C_FC
21
0.25
1
1.05
27
48 1
(0.5)
13 12
0.18 0.15
0.95 3.8 5.1max (4.25)
D_VCC
3.8 5.0max
0.51min
1.78
0.48
(0.75) 1.7max (1.5)
0.51min
Rotor position Detect Masking Start up Control

D C1 D C2
D_COM
1.78
0.48
(0.65)
2200p
Timing Control
Soft switching Drive circuit
D_U OUT D_V OUT
SQFP64(10 10) 10) SQFP64(10

0.5 12.0 10.0
SQFP144(20 20) 20) SQFP144(20

22.0 0.5 20.0
0.1
(1.05)
QIP48E(14 14) 14) QIP48E(14

17.2
2200p
560k 0.47 0.022 D_CNT 0.1 D_FC
PLL
D PC OUT D VCO IN D CX
VCO
8 frequency
D_W OUT
48
0.022F D_RF
33 32
108 109
73 72
36 37
25 24
TSD
+ + 1k
49
0.5
14.0
20.0
200
D_MGND L_VCC
64 1
(0.5) (1.25)
17 16
0.18 0.15
144 1
0.5 (1.25) (1.4) 3.0max 0.2
22.0
Upper side non saturatc circuit
10.0 12.0
48 37 36
0.145 (1.5) (2.7)
13 1
1.0 0.35
+ 200 D_PG+ 200
Rising voltage protect

L_GND (1.5)
12
0.15
0.1
1.6max
D_PGO1
D_PGO2
L_IN
L_VREI
L_OUT1
L_OUT2
1.7max
D_PG-
63
0.1
0.1
17.2
0.8
14.0
7.0 9.0
SANYO TV . VCR
SANYO TV . VCR
0.25
18
64
10.16
8.6
Output drive circuit Output drive Composite
Package Dimensions Dimensions Package

(Reference Drawing) (unit:mm) (Reference Drawing) (unit:mm)
QIP/QFP/MFP/SSOP
QIP64E(14 14) 14) QIP64E(14
0.8 17.2 14.0
SSOP/HSSOP/TO
QIP100EJ(14 20) 20) QIP100EJ(14
23.2
QIP80E(14 20) 20) QIP80E(14

0.8 23.2 20.0
SSOP24(225mil) SSOP24(225mil)
6.5
0.8
7.8
30 16
48 49
33 32
20.0
64 65
41 40
24
13
80 81
51 50
24
5.6
4.4
6.4
5.6
14.0
17.2
14.0
17.2
14.0
17.2
0.5
7.6
1
0.15 (0.8) 3.0max 0.8 0.35
24
0.15
1
0.65 (0.58) 0.25
30
0.15
0.5 (0.5)
0.22 1.5max
0.15
1
1.5max (0.33) 0.65 0.22 (1.3)
1
0.8 (1.0) (2.7) 0.35
16
0.15
9.75
0.1 (2.7)
3.0max
3.0max
0.1 (2.7)
(1.3)
0.1
QFP80(14 14) 14) QFP80(14

17.2 0.8 14.0
MFP16(225mil) MFP16(225mil)
10.0
MFP24(375mil) MFP24(375mil)
15.2
SSOP44J(275mil) SSOP44J(275mil)
TOP VIEW 15.0 Exposed Die-Pad BOTTOM VIEW
0.1
HSSOP48(375mil) HSSOP48(375mil)
17.8 (6.2)
3.6
0.1
0.22
0.65
(0.33)
TO220-7H TO220-7H
10.4 max 10.0 2.7 4.5 1.3
60 61
41 40
16
24
13
44
48
25
23
4.4 6.4
10.5
(4.9)
7.9
10.5
7.9
5.6 7.6
15.0
0.1
0.65
1
80 1
(0.83) 3.0max (2.7) 0.65 0.25
8
1.27 0.35 (1.5) 0.15
(0.62)
1
(0.68)
0.65
0.22
22
0.65
0.2 1.7max
0.7
21 20
0.15
(0.56)
1.27
0.35
12
2.35max
0.15
1
0.65 (0.45) 1.3 0.2
24
2.4 max
0.2
SIDE VIEW (1.5)
(2.2)
1.27
0.6
0.45 8.23
3.15
1.7max
(2.15)
0.1
0.1
0.1
MFP24S(300mil) MFP24S(300mil)
24 13
MFP30S(375mil) MFP30S(375mil)
15.2
MFP30SD(375mil) MFP30SD(375mil)
15.2
0.1
1.5
30
16
30
16
1.7max
12.5
0.15
0.63
12
1
1.0 (0.6) 0.4
15
0.15 2.35max (0.6)
1.0
0.4
15
2.45max
Notes on Package Types and Naming The package names used in this documentation are designed to indicate rough classification of the packages used,and do not necessarily indicate the formal name of each individual package. Refer to the delivery specifications document for the particular product for the package dimensions figure and the formal name of the package.
5.4
7.6
10.5
10.5
7.9
7.9
0.65
0.25
0.1 1.5
0.35
1.0
(0.75)
MFP36SD(375mil) MFP36SD(375mil)
15.2
MFP36SDJ(375mil) MFP36SDJ(375mil)
15.2
0.1 (2.15)
5.2
36
19
36
19
16
10.5
7.9
10.5
7.9
4.4
0.1 (2.25)
0.65
0.65
0.8 (0.8)
0.4 2.45max
0.25
(0.8) 2.45max
8
0.1 (1.3)
1.5max
18
0.8
0.3
18
0.25
0.15
0.1 (2.25)
0.1 (2.25)
0.22
0.65
(0.33)
0.5
6.4
0.65
14.5 17.0 21.5 22.3
14.0 17.2
0.63
0.5
8.8
(1.3) 1.5max
64
17
80
25
1
100 31
12
0.5
15
0.15
0.5
7.6
65
SANYO TV . VCR
SANYO TV . VCR
66

Sanyo Integrated Circuits For TV-VCR Use

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Sanyo Integrated Circuits For TV-VCR Use

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Ordering number : EP58B

TV IC Lineup that Has Earned the Top Market Share

Digital TV Decoder System Chip Set

Color TV I2C Bus System Chip Set

Package Dimensions ............................................................................................64 to 66

VHS Format VCR System Chip Set

Digital TV Decoder System Chip Set

Satellite broadcast antenna BS Tuner

Single-chip AV decoder P 5 LC74152B

MPEG2 video decoder

System-on-chip A/V decoder P 5 LC74152B

Microcontroller for digital TV P 6 LC74186E

Digital TV microcontroller P 6 LC74186E

Extensive Lineup Provides Full System Support

Power supply system peripheral transistors

Muting circuit block

TV tuner and VCR transistors

Digital TV TS + Audio + Video Decoder IC with Built-in OSD Function

Digital TV 32-Bit RISC Microcontroller

[IBM PowerPC (PPC405D4)]

[External SDRAM Control]

[Video Decoder Block]

[External Bus Control]

[Audio Decoder Block]

General-purpose timer Arbiter

Smart Card interface

Smart Card control

Asynchronous serial port

Asynchronous serial port

Synchronous serial port

Synchronous 3-wire serial port I2C bus control

VDAC NTSC encoder AUDIO VDAC

I2C bus controller

Interrupt input Clock inpu

DAC I/F (Main output: video recording output)

Flat Panel Display Video Signal-Processing ICs

Home AV Equipment Related Devices

TV signal (NTSC or PAL)

FPD video signal-processing IC P 9 LC74986NWF

Scaling IP Resolution conversion

Picture quality adjustments

LCD panel (up to WXGA resolution)

Personal computer video signal (up to XGA resolution)

8-bit flash microcontroller P 11 LC87F57C8A

8-bit flash microcontroller LC87F5564A P 12

Extensive Lineup Provides Full System Support

DC/DC Converter Transistors

Diodes SBS004, SBS005, SBS006, SBE001, SBE002

Backlight Inverter Transistors

Scan Converter IC for Flat Panel Displays

Video Signal Processor

Functions and Features

CR_IN 0.1F 0.1F CB_IN

0.47F EXT AUDIO INT S CARRIER OUT 600 10F

A2C PLL VIDEO AMP VIDEO DIT SPLL

24 OSD Output Timing

Bit depth conversion processing

XTAL AIC AIDA AICS*2

Horizontal direction reduction

VER C/D DCS CL AMP IRIVE/OUT-OFF C_SYNC

VER OUT PSC

Select Data 8 8 24 8 Select 24

1, 2: Register selectable