Criterion VI: Continuous Improvements VI-P.1 Improvement in Success Index of students (10) From III-P.

2 Items 2008-2012 2007-2011 Success Index 0.7251 0.75

2006-2010 0.575

Success Index
Success Index 0.7251 0.75 0.575

2008-12

2007-11

2006-10

VI-P.2 Improvement in academic performance of students (10) From III-P.3 Year 2011-12 2010-11 API 7.718 7.529

2009-10 8.80045

API 8.80045

7.718

7.529

2011-12

2010-11

2009-10

VI-P.3 Enhancementoffacultyqualifications and retention(15) FromIV-P.3 andIV-P.4 Items FQI RPI 2011-12 2010-2011 4.77 2009-2010 4.8

4.96 75

76

53

5 4.95 4.9 4.85 4.8 4.75 4.7 4.65 2009-10 2010-11 2011-12 FQI

RPI
80 70 60 50 40 30 20 10 0 2009-10 2010-11 2011-12 RPI

VI-P.4 Improvement in Faculty activities in research publication, R & D work and consultancy, and interaction (15) From IV-P.5 and IV-P.6 Items FPPR FPPC IP Sum 2011-2012 2008-2009 2007-2008

36 9

7 5

8 2

50 45 40 35 30 25 20 15 10 5 0 2009-10 2010-11 2011-12 FPPR FPPC IP Sum

FPPR FPPC IP Sum 8

VI-P.4 Improvement in Faculty activities in research publication, R & D work and consultancy, and interaction (15) From IV-P.5 and IV-P.6 Items FPPR FPPC IP Sum 2011-2012 2008-2009 2007-2008

36 9 45

7 5 12

8 2 10

50 45 40 35 30 25 20 15 10 5 0 2009-10 2010-11 2011-12 FPPR FPPC IP Sum

VI-P.5 Continuing education (10) Specify the contributory efforts made by the faculty by developing the course/lab modules and conducting short-term courses/workshops etc. for continuing education
Module Description Workshop on Multisim & Ultiboard Any other contributory Inst./Industry Developed/ organized by Deptt. Of E&Tc. Duration 2 Days Resource Persons Ms. Raksha Iyer Lecturer in E&Tc. Deptt. CSIT, Durg Mrs.Vijeta Verma Lecturer in E&TC. Deptt. CSIT, Durg Mr. Maheedhar Dubey Lecturer in E&Tc.Deptt. CSIT,Durg Target Audience Usages and Citation etc.

Faculty & Participants should gain students good hence on experience on the various steps involve in building process of Multisim & Ultiboard Designing Faculty & Participants should gain students good hence on experience on the various steps involved in building process of VLSI Designing

workshop on Digital Logic Design using VHDL

Deptt. Of E&Tc.

3 Days

Workshop on Advanced Electronic Simulation

Deptt. Of E&Tc.

2 Days

Mr. Dushyant Gupta Application Engineer in Trident Techlabs Pvt. Ltd.,Pune

Faculty & Participants should students acquainted with Advanced Electronic Simulation process

Workshop on Basics of microprocessor & its Applications

Deptt. Of E&Tc.

2 Days

Mr. Deepak Sharma Sr.Lecturer in E&Tc. Deptt. CSIT, Durg

Faculty & Pre-final year students

Participants should get acquainted with microprocessor and aware with its applications

Workshop on Digital Logic Design using VHDL

Deptt. Of E&Tc.

2 Days

Mr. Maheedhar Dubey Lecturer in E&Tc. Deptt. CSIT, Durg

Faculty & Participants should gain students good hands on experience on the various steps involved in building process of VLSI Designing Faculty & Student will gain students Essential Knowledge of concepts of Image Processing like Image Acquisition, Processing, Practical Applications etc.

Workshop on Image Processing Using Matlab

Deptt. Of E&Tc.

2 Days

Mr. R. K. Sahu Reader in E&Tc. Deptt. CSIT, Durg

VI-P.6 New facility created (10) Specify the new facility created to strengthening the curriculum and/or to meet the PEOs: Module Description Any other contributory Inst./Industry Developed by Duration Resource of Consumed Develop ment 2009-10 1yrs Institute takes the consolidated membership of all the students Target Audienc e Usage and Citation etc.

ISTE Student Chapter

ISTE Centre, Delhi

Institute

Students

Advanced VLSI lab

Wi-Fi facility

1.Ms.Sonika Arora 2.Mr.Deepak Sharma Institute

3months

1yrs

Computer systems, CPLD, FPGA Kits Wireless Routers, Cables

7th& 8th B.E. Students All B.E. Students and faculty All Students

Students will be exposed with Latest Technological Development and professional skills in the field of Electronics & Communications by participating in Technical Events such as Seminars, Quizzes, and symposium. Most useful for the students to gain experience on VLSI Technology Students can avail this facility any corner of the college.

Electronic workshop

Institute

Mr. R.K. Sahu

3months

Electronics circuits designing equipment

A platform to motivate the students to design/develop basic electronics circuits

Module Description

Any other contributory Inst./Industry -

Developed by

Duration of Development

Resource Consumed

Target Audience

Usage and Citation etc.

Multisim Ultiboard Multi MCU Campus License of MS Windows.

Deptt. of E&TC.

2010-11 1 month Computer systems

All Students

Institute

Computer systems

All Students

Micro controller & Embedded System Lab Individual IETE membership for Faculties

Mr. Deepak Sharma

3months

IETE Centre, Delhi

Institute

1yrs

Individual IEEE membership for Faculties

Institute

1yrs

Computer All systems, Students Embedded development trainer kit Institute pays the consolidated amount for membership of all faculties which is then recovered from their monthly salary Institute encourages the faculties to take IEEE membership for their incessant development & for their Research & Development work.

A platform to motivate the students to design/develop basic electronics circuits Windows provide a very user friendly & time saving environment for all the users to use a pc in efficient manner as well as to load and run many applications, softwares etc very easily. A platform to motivate the students to design/develop embedded circuits Faculties will be exposed with Latest Technological Development and professional skills in the field of Electronics & Communications.

Faculties will be exposed with Latest Technological Development and professional skills in the field of Electronics & Communications.

Module Description

Any other contributory Inst./Industry Open courseware consortium, NPTEL .etc -

Developed by

Duration of Development 2011-12 12 months

Resource Consumed

Target Audience

Usage and Citation etc.

Self Learning portal

Deptt. of E&TC.

Xilinx, Spartan 6

Deptt. of E&TC.

1 month

PCs with internet, faculty course files of all Deptt. Computer systems

All Students

All Students

Labview Core + Control & Embedded Software MATLAB

Deptt. of E&TC.

1 month

Computer systems

All Students

Supplementary course materials including question papers, articles, publications, lecture videos.etc of all courses A platform to motivate the students to design/develop basic FPGA based Digital Electronics Circuits A platform to motivate the students to program for various projects. A platform to motivate the students to program for various Instrumentation 7 automation based circuits For safety of data & softwares loaded in PCs. Faculties & students will be exposed with Latest Technological Development and professional skills in the field of Electronics & Communications. Faculties will be exposed with Latest Technological Development and professional skills in the field of Electronics & Communications.

Deptt. of E&TC.

1 month

Computer systems

All Students

Antivirus E- Library

GIST, Gurgaon

Deptt. of E&TC. Institute

2 months

Computer systems

All Students & Faculties

ISTE Individual Membership for faculties

ISTE Centre, Delhi

Deptt. of E&TC.

1yrs

IETE Organizational membership

IETE Centre, Delhi

Institute

1yrs

Institute pays the consolidated amount for membership of all faculties which is then recovered from their monthly salary . Institute has taken Organizational membership for the benefit of all staff members & students.

All Students

All Students

Students & Faculties will be exposed with Latest Technological Development and professional skills in the field of Electronics & Communications, various Technical Events such as Seminars, Quizzes, and symposium can be organized.

VI-P.7 Overall improvements (5) Specify the overall successive improvements in curriculum and others:
Specify the improvement Improvement brought in Contributed by List the PEO(s),which are strengthened Comments,if any

Guest lecturers

Project Exposure

2011-12 Mr. Gopa Vrinda Pala Dasa Mr. G. Tiwari (Reliance Optical Fiber Communication Communication) Dr. K. Vishwanath (SIT, Image Signal Processing Tumkur) Mr. S.R. Bhattacharya (AGM, Stress Management BSP) Analog & digital Mr.Bikesh Singh (NITE, communication Raipur) Law of Infallible Justice Mr. Gopa Vrinda Pala Dasa Competition & Self Mr. Gopa Vrinda Pala Dasa Confidence Vegetarianism Mr. Gopa Vrinda Pala Dasa A.V. Shrinivas Chandresh Deshmukh Analysis of Abhay Kumar Phonocordiograhm Amit Verma Project Supervisor:Mr. Abhishek Misal Abhishek Thakur David Kumar Multisensing gas detector Akash Yadav using Microcontoller Neha Sharma Project Supervisor:Mr.S. K. Agrawal Deepak Kr. Verma Comparision of various Gaurav Pandey segementation technique in Vishwajeet Pujapanda Iris Recognition Project Supervisor:Mr.Ashish Dewangan Alka Pandey Anita Chobey Intelligent Power saving Chetna device Mily Nashine Project Supervisor:Mr. Deepak Sharma Ruhi Khetrapal Shefali Sawaria FPGA implementation of DES Smita Sharan Algorithm Sheetal Deshmukh Project Supervisor:Mr. Rahul Sinha GATE 01 IQ,SQ,EQ GRE 00 TOFEL - 00 Deptt. of E&TC.

P2,P3,P5

P1,P2,P3

P1,P2,P3

P1,P2,P3

P1,P2,P3

P1,P2,P3

GATE/GRE/TOFEL

P2

Mock CAT organized on 15/11/11 by COMET

Add on Course

Add on Lab Course

Micro Controllers and Embedded System Cellular & Mobile Communications Digital signal Processing Digital Communications VLSI Design Microcontroller and Embedded System Lab Microprocessor Lab MATLAB Qualification of Faculties

Mr. Deepak Sharma Mr. Mangal Singh Mr. Navneet Sahu Mrs.Yojana Yadav Ms. Sonika Arora Mr. Deepak Sharma P1,P2,P3 Mr. Shashikant Agrawal Mr. Mangal Singh Institute FQI for the session 2009-10 was 4.8 RPI for the session 2009-10 was 53 SI of students who passed out in Yr. 2010 was 0.575 API in Year 2009-10 was 8.80045 1) 2 Days Workshop on Digital Logic Design using VHDL 2) 2 days Workshop on Image Processing Using MATLAB For Faculties & Students For Faculties & Students. Advance Experiments & Design based experiments were designed by respective Lab Incharge P1,P2,P3

Faculty Qualification Index

Retention Point

Retention of faculties in Institute

Institute

Success Index of Students

No. of Students who completed B.E. in 4 yrs.

Deptt. of E&TC

P3

Academic Performance of Students

Percentage of Marks of all students

Deptt. of E&TC

P3

1) Workshops

2)

Mr. Maheedhar Dubey Lecturer in E&Tc. Deptt. CSIT, Durg. Mr. R. K. Sahu Reader in E&Tc. Deptt. CSIT, Durg

P1, P2, P3

Continuing Education

Lab Modules

Faculty Incharge of respective Lab

P3

Guest lecturers

Project Exposure

2010-11 Preparation of Management Mr. Ankur Singh (Director Entrance Test TIME, Bhilai) Anuradha Kumari Gaurav Verma Gundhar Jain Head Controlled Mouse Himanshu Jaiswal Project Supervisor:Mr. Deepak Singh Dinesh Kr. Jain Akshay Kr. Ratnakar Ankit Swarnkar Real Time color Detector Jainandra Jangre Project Supervisor:Mr. Om Prakash Yadav Venuka Sahu Saurav Verma Prema Verma Wireless Heart Rate Meter Tikesh Verma Project Supervisor:Mr. Abhishek Misal Richa Tiwari Saumya Agrawal Shresth Gupta Image Stitching Neetin Sahu Project Supervisor:Mr. Deepak Singh Urwashi Manikpuri Yogesh Dewangan Propeller Display based on Kumkum Mittal Microcontroller Mohanish Kr. Thakur Project Supervisor:Mrs. Yojana Yadav GATE 01

P2,P3,P5

P1,P2,P3

P1,P2,P3

P1,P2,P3

P1,P2,P3

P1,P2,P3

GATE/GRE/TOFEL

GRE 00 TOFEL - 00

Deptt. of E&TC.

P5

Guest lecture on preparation of management enterance test 15/09/10

Add on Course

Add on Lab Course

Linear Integrated Circuit and Applications Digital IC Applications C Programming VLSI Design MATLAB Basic Electronics Lab Microprocessor Lab Communication System Lab Qualification of Faculties

Mr. Pushpendra Singh Mrs.Yojana Yadav Mr. Yashwant Kanetkar Ms. Sonika Arora Mr.Mangal Singh Mr. Tomesh Verma Mr. Shashikant Agrawal Mr. Navneet Sahu Institute

P1,P2,P3

P1,P2,P3

Faculty Qualification Index

FQI for the session 2010-11

was 4.77 RPI for the session 2010-11 was 76 SI of students who passed out in Yr. 2010 was 0.75 API in Year 2010-11 was 7.529 1) 3 Days Workshop on Digital Logic Design using VHDL 2) 2 Days Workshop on Advanced Electronic Simulation 3)2 Days Workshop on Basics of microprocessor & its Applications For Faculties & Students

Retention Point

Retention of faculties in Institute

Institute

Success Index of Students

No. of Students who completed B.E. in 4 yrs.

Deptt. of E&TC

P3

Academic Performance of Students

Percentage of Marks of all students

Deptt. of E&TC

P3

Workshops

Continuing Education

1) Mr. Maheedhar Dubey Lecturer in E&Tc.Deptt. CSIT,Durg 2) Mr. Dushyant Gupta Application Engineer in Trident Techlabs Pvt. Ltd.,Pune 3) Mr. Deepak Sharma Sr.Lecturer in E&Tc. Deptt. CSIT, Durg

P1, P2, P3

Lab Modules

Faculty Incharge respective Lab

of

P3

Advance Experiments & Design based experiments were designed by respective Lab Incharge

2009-2010 Embedded systems VLSI Guest lecturers Mr. R. M. Poddar (BIT, Durg)

Anurag Srivastava (SSCET, Bhilai) Mr. G. R. Sinha (SSCET, Image processing Bhilai) Mr. Mohan Avasthi (SSCET, Microcontroller Bhilai) Communication &Computer Mr. Gaurav Tiwari (Reliance Networks Communication)

P2,P3,P5

Project Exposure

Mahesh soni Abhishek mishra Aditya ambasth Bijo joseph Autonomous Parallel Car Project Supervisor:Parking Mr. R. K. Sahu Ravi shrivastava Rajdeep singh Dhiogra Microcontroller based Staff Krishna singh Attendance Suyash sinha Project Supervisor:Mr.N.K. Sahu Ajay ku.Roy DiwakarPuri goswami Intelligent Traffic Control & Hari mani Sharma VIP Security Chandrakanti Prachi Project Supervisor:Mr. Abhishek Misal Manisha dewangan Bharti verma Car System with Automatic Dehuti Thakur Features Jaya Rawat Project Supervisor:Mrs. C. K. Sao Bipin Sing Sengar Bhavesh Nirmalkar Monitor & Control of Green Divyansh Sinhr House Environment Amit ku. Sahu Project Supervisor:Ms. Sonika Arora GATE 04

P1,P2,P3

P1,P2,P3

P1,P2,P3

P1,P2,P3

P1,P2,P3

GATE/GRE/TOFEL

GRE 00 TOFEL - 00 Signals & System C & C++Programming Analog Electronics Network Analysis Signals & System C & C++Programming Analog Electronics Network Analysis Qualification of Faculties

Deptt. of E&TC.

P5

Mock GATE Organized by COMET 28/01/1004/02/10

Add on Course

Add on Lab Course

Mr R.K.Sahu Ms. Vinti Nanda Mr O.P.Yadav Mr. Ashish Dewangan Mr R.K.Sahu Ms. Vinti Nanda Mr O.P.Yadav Mr. Ashish Dewangan Institute

P1,P2,P3

P1,P2,P3 FQI for the session 2011-12 was 4.96 RPI for the session 2011-12 was 75 P3 SI of students

Faculty Qualification Index

Retention Point

Retention of faculties in Institute No. of Students who completed B.E. in 4 yrs.

Institute

Success Index of

Deptt. of E&TC

Students

who passed out in Yr. 2012 was 0.7251 API in Year 2010-11 was 7.718 Workshop on Multisim & Ultiboard for Faculty & students

Academic Performance of Students

Percentage of Marks of all students

Deptt. of E&TC

P3

Workshops

Ms. Raksha Iyer Lecturer in E&Tc. Deptt. CSIT, Durg Mrs.Vijeta Verma Lecturer in E&TC. Deptt. CSIT, Durg

P1, P2, P3

Continuing Education

Lab Modules

Faculty Incharge of respective Lab

P3

Advance Experiments & Design based experiments were designed by respective Lab Incharge