Course: Analog Circuit Design Time schedule: Mo 11.00-13.00 We 14.00-16.00 Th 14.00-16.00 Office hours: Th 16.00-18.00 Exams: Feb.

(2), Jun.-Jul. (2), Sep. (2) Oral examination Additional course material: ftp://ftp.dii.unisi.it/pub/users/vignoli/Analog_Circuit_Design

References: F. Maloberti Analog Design for CMOS VLSI Systems Kluwer 2001 J. Millman, C. Halkias Integrated Electronics: Analog and Digital Circuit and Systems McGraw-Hill 1972 R. Spencer, M. Ghausi Introduction to Electronic Circuit Design Prentice Hall 2003 P. Gray, R Meyer Analysis and Design of Analog Integrated Circuits (3rd ed.) Wiley 1993 M.S. Tyagi Introduction to Semiconductor Material and Devices Wiley 1991

MATERIALS: electric behavior

semiconductor

Insulator

conductor

SEMICONDUCTORS: electric behavior

Fermi-Dirac distribution: occupation probability for the energy level E

f (E ) =

1 1+ e
E EF kT

In semiconductors EF is in the Band-Gap

Intrinsic Semiconductors: free carriers

1 2md ni = pi = N e ( E ) f ( E ) dE kT 2 4 h'

3/ 2

Ec E F kT

= NC e

Ec E F kT

where Ne(E) is Energetic State Density function in the material.

NC is the number of available states (per cm-3) in the conduction band

DOPING

ACCEPTOR

DONOR

EF n-type The Fermi energy moves with doping T effect EF p-type

Materials: Si substrate
Monocrystalline silicon is produced from purified polycrystalline silicon by pulling an ingot polysilicon is melted using radio frequency induction heaters seed crystal of monocrystalline silicon is dipped into melt silicon grows around structure of seed as seed is slowly withdrawn Sawed into wafers about 600 microns thick only a few microns are actually used for IC devices then etched, polished, and cleaned stacked in carriers

Also PVD

Materials
Single crystal silicon SCS
Anisotropic crystal Semiconductor, great heat conductor

Silicon dioxide is created by interaction between silicon and oxygen or water vapor
Si + O2 = SiO2 or Si + 2H2O = SiO2 + 2H2 Excellent thermal and electrical insulator protects surface from contaminants forms insulating layer between conductors

forms barrier to dopants during diffusion or ion implantation grows above and into silicon surface Thermal oxide, LTO, PSG: different names for different deposition conditions and methods

Polycrystalline silicon polysilicon

Mostly isotropic material Semiconductor also a conductor, but with much more resistance than metal or diffused layers created when silicon is epitaxially grown on SiO2 commonly used (heavily doped) for gate connections in most MOS processes Excellent electrical insulator

Silicon nitride Si3N4 Aluminum Al

Metal excellent thermal and electrical conductor

PHOTOLITOGRAPHY Photoresist Thick film: 1 mm

spin.-coating

Uv - X-ray

EXPOSITION: The mask is transferred to the photoresist

 The photoresist chemically reacts and dissolves in the developing solution, only on the parts that were not masked during exposure (positive method). Development is performed with an alkaline developing solution. After the development, photoresist is left on the wafer surface in the shape of the mask pattern.
Masked photoresist

solvents remove exposed (unexposed) resist Etching removes material from wafer surface where resist has been removed

Dry etching

Wet etching

EFFECT OF FLATBAND VOLTAGE VFB (VFB < 0)

VGB = 0

GATE Polisilicon

OXIDE SiO2

SUBSTRATE P-type Si

SUBSTRATE CONTACT Polisilicon

VGB

VOX

-VFB

- +

Space charge regions

-tOX

xD

Potential VGB-VFB
VOX s(0)

-tOX

xD

STRONG INVERSION CONDITION

SMALL SIGNAL EQUIVALENT CIRCUIT OF A MOS TRANSISTOR