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A New Double-Ended Fault-Location Scheme for Utilization in Integrated Power Systems

Ke Jia, Member, IEEE, David W. P. Thomas, Senior Member, IEEE, and Mark Sumner, Senior Member, IEEE
AbstractA new double-ended algorithm for fault location in an integrated power system (IPS) is presented. This method can be applied to real-time fault location because of its simplicity and its ability to self-synchronize. Experimental tests have been undertaken on both ac and dc power systems and both hard (step) faults and restriking transient faults (bouncing faults) have been investigated. The method is also shown to work in the presence of nonlinear loads. The performance of the proposed algorithm has been compared with a common synchronized double-ended fault-location method. Index TermsDouble end, fault location, measurements, transients.

I. INTRODUCTION

AST and accurate fault location on power distribution lines is of vital importance to expedite service restoration and improve the reliability of the power system. In an integrated power system (IPS), such as those found in more electric vehicles (MEVs) [1], such as trains, ships, and aircraft, which have no exposed distribution lines, it is difcult to remove or restore the faulted line sections without accurately knowing the fault position. The speed of fault location also improves system stability, enables rapid reconguration, and reduces damage. Fault-location methods based on impedance measurement for a certain distance of transmission line can commonly be classied as single-ended [2][4] and double-ended schemes [5][11]. In [2] and [3], the single-ended technique based on measured prefault and postfault information does not require a communication channel, but the fault-location accuracy may be affected by the assumptions used, such as a lossless transmission line, no fault current owing to the load side, and faults not occurring on reclosing (no prefault data can be measured). Accurate fault location can be achieved under the condition of a preknown source impedance for the method presented in [4]. Double-ended schemes as described in [5] and [6] present simple and robust fault-location methods but global positioning
Manuscript received May 27, 2011; revised June 22, 2012, October 04, 2012, and December 11, 2012; accepted January 03, 2013. Date of publication January 28, 2013; date of current version March 21, 2013. Paper no. TPWRD-004482011. The authors are with the Department of Electrical Engineering, University of Nottingham, Nottingham NG7 2RD, U.K. (e-mail: ke.jia@nottingham.ac.uk; david.thomas@exmail.nottingham.ac.uk; mark.sumner@exmail.nottingham.ac.uk). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TPWRD.2013.2238560

system (GPS)-based synchronization is required to produce accurate fault-location results. An unsynchronized two-terminal method as presented in [7] reduces the synchronization errors by using the prefault steady-state information. This does not work when there is no prefault data (reclosing) and is not easy to automatically realize in a real system. Other double-ended methods, such as [8] and [9], do not require a GPS but involve the assumption that the voltage decreases linearly from the measured point and faults occur close to the middle of the line. The algorithm discussed in [10] and [11] only uses measured voltage information for fault location due to the possibility of current-transformer saturation after fault inception. However, this method requires the knowledge of the system impedance and may be inuenced by the fault impedance. The fault-location methods discussed before use power frequency measurements and are mostly employed on long-distance transmission lines so that for accurate fault location, normally more than 1 cycle of the steady-state information is needed. Very fast and accurate fault location can be achieved by using traveling waves [12][14]. However, these methods require high-performance data-acquisition units and normally cannot be utilized in an IPS since they have short power distribution cables. The techniques which involve harmonic current injection can be used in a small power distribution system and by using the injected high-frequency harmonic information, the time to locate the fault is short [15][19]. However, this active approach requires additional electronic equipment, and the current injection has to wait until the fault transient has died out. Also, the current created by a PWM converter adds noise to the system that affects the accuracy of the fault location. This paper discusses a new double-ended fault-location scheme which is particularly suited to an IPS which directly uses the transients generated by the faults themselves. This method has a simple and straight forward algorithm which is easy to realize in a real-time system and does not require GPS synchronization. By using the high-frequency (up to 3 kHz) information from the fault transients, the fault-location time is reduced to as little as 4 ms after the fault occurs and an accuracy of typically 1 m can be provided. II. DOUBLE-END ALGORITHM OVERVIEW A double-ended fault-location algorithm based on impedance measurement will be discussed and demonstrated using a distribution power system. The basis of this method can be introduced by considering a single-phase circuit with a short-circuit fault is the supply impedance and as shown in Fig. 1, where is the load impedance. Let the total line impedance between the is the part of line impedance supply and load be , such that

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Fig. 3. Experimental system. Fig. 1. Single-phase circuit with a phase-to-ground short-circuit fault.

Fig. 2. System at the nonfundamental frequency during the fault situation.

between supply to the point of fault and is the remaining part of the impedance. The fault can be considered to be a transient voltage source which creates the voltage and current fault transients and contains information in a wide frequency range. The Thevenins equivalent circuit, at a nonfundamental frequency, (with the supply as a short circuit and the fault as the transient source) is depicted in Fig. 2. As shown in Fig. 2, the fault transient acts as a voltage source that provides voltage transients at nonfundamental frequencies. There are two measurement points located separately at the supply end and the load end. The voltage and current are measured at both measurement points during the fault situation. The following is derived by using Kirchhoffs circuit law according to the circuit in Fig. 2: (1) where and are the measured voltage and current information from both ends as in Fig. 2. The total line impedance . Thus (2) Equation (2) is then used to estimate the line impedance between the supply and the fault point. By dividing the estimated line impedance by the known per-unit length impedance of the line, the fault location can be found. It follows that this double-ended scheme does not require information about the fault resistance itself or about the waveform of the fault transient or knowledge of the system impedance other than the line impedance and the calculation is also simple to implement. For phase-to-phase faults or phase-to-ground faults in a three-phase system, only the faulted phase information is required to locate

the fault. This is demonstrated in the experimental and simulation section. In an IPS, the synchronization of information from the two ends is realized by the trip signal sent along the communication channel (after receiving this signal, the FPGA starts to record the measured information). When used in larger distribution power systems, the related nonlinear equations are solved to cancel the unsynchronized errors, and this is discussed in the simulation section in this paper. In this analysis, the fault inductance is ignored. It is expected that the fault inductance will be comparable to the stray inductance of the physical faults in the experiment or proportional to the fault arc length which will be small compared to the line length [21]. As with the arc resistance, it should have a negligible effect. III. EXPERIMENT SETUP This experimental test circuit consists of distribution cables, a load resistance and a programmable ac voltage supply (Chroma) as depicted in Fig. 3. The three-phase system was built as depicted in Fig. 3 with a 50-Hz ac voltage source of amplitude 50 V (peak-to-peak line voltage value) which keeps the fault current within the limitation (25 A, ac and 10 A, dc) of the Chroma supply. The distribution cables connected by connecters are two lengths of 10 m and one of 1-m SY-type cable which has an impedance similar to the impedance range of power transmission cables used in aircraft. The system also has a star-connected resistance load (6.8 per phase) located at the end of the distribution line. Phase-to-phase and phase-to-neutral short-circuit faults are imposed at the four connecters separately to create faults at different distances from the source. The voltage and current are measured at and which are the start and end of the line. The total experimental setup is shown in Fig. 4(a) and (b). In Fig. 4(a), the Chroma voltage source is used for the ac voltage supply. The dc voltage source with a high output current limitation (40 A) is used for testing the fault-location algorithm with a dc supply. The eld-programmable gate-array (FPGA) unit is used to send the trigger signal for the fault and initialize data acquisition. A Three-phase rectier feeding a resistor with a cooling fan is used to produce a nonlinear load when required. A three-phase resistor bank with a heat sink acts as the passive load. The fault unit creates faults with a variable fault resistance. The cables located on the cable tray, as shown in Fig. 4(b), act as the system distribution line.

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TABLE I 10-m LINE IMPEDANCE CALIBRATION RESULTS

Fig. 5. Cut section of the SY cable.

Fig. 4. (a) The experiment equipments 1. Chroma voltage source. 2 H series dc voltage source. 3 FPGA. 4 nonlinear load. 5 resistor load. 6 fault unit. 7 cable trays; (b) cables on the cable tray.

The calibrated impedance of the distribution line impedance plays an important part (as a reference) in this method of system fault location. As described before, the fault distance is estimated by comparing the calculated line impedance between the measurement point and the point at which faults occur with the calibrated line impedance. The line impedance data has to be known precisely before the fault location can be estimated and this can be achieved through calibration. The cross section of the SY cable used in this experiment is shown in Fig. 5. Cables are cut into different lengths (1.2, 2, 5, and 10 m), and the cable impedance is calibrated by using impedance measurement equipment (the impedance analysis interface (IAI)) and by injecting a sinusoidal current (6 A and 8 A separately at 1000 and 1500 Hz) into the cable. Comparing the results, the two

methods of calibration produce a very small difference (within 7%). The average results of both methods are shown in Table I. The line inductance between two close phases (for example, the Gray cable and the Black cable in Fig. 5) is smaller than for the separate phases (such as the Gray cable and the Blue cable in Fig. 5) because of different mutual inductance associated with that cable pair. However, the line resistance does not change with the position of the cores within the SY cable. The per meter value of line inductance is about 0.63 H for close phases and 0.85 H for the separated phases and the per meter value of line resistance is 7.16 m . Comparing the results derived using different lengths of cable presented before, this cable impedance increases according to the lengths linearly and this gives condence in the later estimation results. IV. EXPERIMENTAL RESULTS The experimental test involves both phase-to-phase faults and phase-to-ground faults. The measured data from both ends for the typical short-circuit faults are shown in Fig. 6(a) and (b). According to (2), only the data of the faulted phases are required for fault localization. The data of the measured faulted phases will be presented in the following results for both phase-to-phase faults and phase-to-earth fault situations. Short-circuit faults with a nite fault resistance are imposed in the system by either a controlled insulated-gate bipolar

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Fig. 8. Bouncing fault transient created by the mechanical switch.

Fig. 6. Measured data from both ends for the phase-to-phase and phase-to-earth fault. (a) Measured data for the earth fault. b) Measured data for the phase-tophase fault.

Fig. 9. Comparison of estimated reactance with the calibrated one.

Fig. 7. Four different locations in the experiment system.

transistor (IGBT) switch or a mechanical switch depending on the test type. A. Bouncing Fault Results Short-circuit faults within a power system are commonly considered to be a suddenly imposed hard fault which creates a step change in the measured voltage. This type of fault is emulated here using a power-electronic switch to turn on the fault. However, other different fault transients may still exist and the genuine nature of fault initiation is at present unknown. This type of fault is emulated using a mechanical switch which creates a bouncing transient. The rst test is carried out with an ac voltage supply and a resistive load as described in the experiment setup. The faults with different fault resistances were imposed at different locations of the transmission cable as shown in Fig. 7. The measured voltage and current from both measurement points are presented in Fig. 8 for a fault situation with a 1- fault resistance (in order to limit the fault current within the safety operation of the Chroma).

Applying the measured voltage and current data to (2), the line impedance between measurement point1 and the fault position can be calculated. In this work, only the line reactance is used because it is the more signicant impedance in the frequency range considered. For the highly inductive system (cables and transformers) considered here, the best signal-to-noise ratio (SNR) will be at low frequencies. A frequency range up to 3 kHz is chosen to a) obtain good SNR, b) be within the bandwidth of standard instruments used for this type of operation, c) to restrict sample frequencies to those used by standard data acquisition equipment and to ignore system parasitic capacitance effects. After being ltered with a low-pass lter with a cutoff frequency of 4 kHz, the data length needed to produce an accurate result is very short. Typically, it is only 6 ms after the fault occurs because the transients contain relatively high frequencies. As an example of the technique, when fault 4, in Fig. 7, occurs, the estimated result compared with calibrated one is shown in Fig. 9. In Fig. 9, the solid line which increases with frequency and contains noise is the estimated result. The dashed line is obtained using the value of inductance from the calibration tests. The experimental result has been processed using a rst-order least-squares curve t. The oscillation in the original estimated result is due to system noise. The system phase to phase peak voltage is 24 V as shown in Fig. 8. In a real IPS, with a much

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Fig. 11. Estimated fault location in dc. Fig. 10. Estimated results with 1fault resistance between phase to phase.

TABLE II FAULT-LOCATION RESULTS FOR BOTH PHASE-TO-PHASE AND PHASE-TO-EARTH FAULT

higher voltage level, larger transients are generated by a fault and the SNR is higher so that the error will be greatly reduced to give a more accurate result. This will be demonstrated in a dc test presented later. The estimated results for different fault locations are presented in Fig. 10. When a phase-to-phase (Gray-Blue in Fig. 5) 1 fault occurs, Fig. 10 shows the measured voltage and current at the two ends (V1, I1, V2, I2), the estimated line reactance (solid line) for different fault locations and the data from calibration (dashed line). As expected, the estimated line reactance value increases with distance to fault. Compared with the calibrated value, the estimated values show good accuracy and can distinguish faults within an error of 5% (the distance between fault 3 and fault 4). As the fault resistance increases, the fault transient is attenuated and this situation brings a slight increase in errors on the estimated results. For the system initially investigated, the required accuracy was 5% for a 20-m line (i.e., 1 m_). The actual accuracy derived for most fault locations is about 1% as shown in Table II.

With a 3- fault resistance, the measured fault transient (voltage and current) is smaller than the situation with a 1fault resistance. The 3- fault transients have smaller SNR, and the results are less accurate. This is true for both phase-to-phase faults and phase-to-earth faults. However, the error in the fault location is still within a distance of 1 m. The fault resistance limitation within this experiment is 5 . This is a very high resistance fault compared with 6.8- load resistance and is not a common short-circuit fault situation. Four-hundred more tests (including both phase fault and earth faults) have been carried out during the experiment and the standard deviation is close to 4%. This new double-ended fault-location method can provide accurate fault location by using fault transients so that it works no matter if the supply voltage is ac or dc. During the fault situation, the fault is considered as a voltage source for the transient which has information over a large a frequency range, and at non-steady state (dc or ac 50 Hz or other steady-state frequency). The Thevenin equivalent circuit of the supply is then a short circuit, leaving only the source impedance, line impedance, and load impedance as in Fig. 2. The fault transient and fault-location results for a dc voltage supply are presented as in Fig. 11. In Fig. 11, a 1- fault is imposed between phases (Brown and Black) and a 10-V dc voltage (limit of the fault current is within 10 A dc for the safety of Chroma) is used. The estimated results (solid line) match the calibrated ones (dashed line) within 1-m distance error (between fault 3 and fault 4). When fault resistances are increased, the errors in the results also increase slightly but are still within the accuracy requirement. B. Step Fault (Hard Fault) Results Normally, a short-circuit fault on the cable creates a step change in the voltage and current waveform. This situation can be simulated using an IGBT switch. The measured voltage and current transient at both ends is as shown in Fig. 12. Comparing Fig. 12 with the bouncing fault transient in Fig. 8, the fault transient created by the IGBT switch is just a step. This hard fault transient can also create useful information up to 3 kHz which is more than enough for accurate fault location. As with the bouncing fault situation, the estimated fault location for

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Fig. 15. Fault current measured at both ends with a nonlinear load. Fig. 12. Measured voltage and current at both ends for the IGBT fault.

Fig. 16. Fault-location results with a nonlinear load. Fig. 13. Estimated results of step fault. (a) The results of the 1result of the 3- fault. fault. (b) The

Comparing Figs. 14 and 9, it is clear that the original calculated results from the system with a higher supply voltage level have much less noise than the result produced by the low voltage system for the same fault resistance. In a real IPS, with a much higher voltage level (for example 440 V phase-to-phase rms for ships) the fault-location accuracy will be further improved. C. Results With Nonlinear Load Considering the application of the real IPS may have loads with power-electronic converters, a test with a nonlinear load is performed. The original three-phase 6.8- load was replaced with a three-phase 12- load in parallel with a 6.8- resistor which is connected to the system through a three-phase diode rectier. The distorted current waveforms, including fault transients which are measured at both ends, are shown in Fig. 15. In Fig. 15, the current distortion is smaller than the fault transient. Even the errors within the estimate are larger than the results with just the passive resistance load. The data can be preprocessed by a low-pass lter and with a short data segment (4 ms after fault), the system is still able to resolve a 1-m fault distance as shown in Fig. 16. V. SIMULATION VERIFICATION A computer simulation was carried out using Matlab/ Simulink software. The simulation system was built with exactly the same parameters as calibrated from the experiment

Fig. 14. Fault location with high dc voltage.

four different fault positions with 1- and 3- fault resistances are presented in Fig. 13. As expected, in Fig. 13, the fault-location results are accurate and the errors increase slightly with fault resistance. The step fault can also be identied on the dc system and since the dc voltage source has a higher current limit (40 A), the supply voltage is increased to 39 V dc and the data to be processed is reduced to 4 ms after fault transient. When fault 4 occurs, the results of the calculated line reactance compared with the calibrated one are as shown in Fig. 14.

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Fig. 19. Conguration of the zonal marine power system.

Fig. 17. Estimated line reactance results for different fault locations for the simulation system.

Fig. 18. Estimated line reactance when changes from 0 to 1 . (a) Line reactance. (b) Estimated line reactance divided by calibration value.

Fig. 20. Fault-location results within two zones: (a) Estimated line reactance. (b) Estimated fault distance.

system with the ac supply voltage. The fault-location results using a 1- fault resistance are depicted in Fig. 17. Comparing Fig. 17 with Fig. 10, the estimated line reactance between fault position and measurement point1 (the solid line) has less error with the calibrated line reactance (dash line). This is because the simulation has no system noise [the only noise in the simulation system is from the analog-to-digital converter (ADC)] and the SNR is high enough to provide a very accurate result within the required frequency range (03 kHz). For the safety of the experimental equipment, even in the low-voltage tests (25 V), the low resistance (01 ) faults that commonly occur in power systems are not included. Faults with low resistance create a larger fault current transient which provides better SNR and more accuracy in the fault-location results as shown in Fig. 18. As shown in Fig. 18(a), when fault f2 occurs, the doubleended fault-location scheme provides accurate results for fault resistance in a range of 0 to 1 . In Fig. 19(b), the results are divided into the calibrated value (dashed line) to present a detailed view of the changes of the results, the estimation error slightly increases with fault resistance as expected. The main application of this method is for line sections of a distribution system which have voltage and current measurement at both ends. However, it is useful to examine the errors

created by load connections distributed along the line section. The proposed method is applied on a 440-V three-phase six-load zonal marine power system as presented in Fig. 19. Fig. 20 shows the fault-location results when this method is used to cover two zones, covering a distance of 40 m and including three load connections with one between the two measurement points. A 1- short-circuit fault is imposed on the cable every 10 m, and the error in the fault-location measurement is still within 5% for each fault location. This method can also be used to cover more zones but the error would be larger than 5% as more of the fault current ows into the loads between the two measurement points. When it is used to cover the 3 zones, the largest error can be up to 11% and to cover the entire 6 zones, the largest error can be up to 25%. VI. SYNCHRONIZATION PROBLEM If this double-ended fault-location scheme is to be used on a large power system, the problem of unsynchronized measurement from both ends may cause inaccurate fault location. In a larger distribution system, the synchronization trigger signal sent in a communication channel may have a delay or, for some situations, this signal may not be available. In this case, the calculation errors introduced can be cancelled by solving the following nonlinear equations.

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If the synchronization angle between the two sets of measured phase information ( and ) is , then (1) can be rewriten as (3) ( is the distance of fault and the line Putting impedance value is linear with distance), (3) can be separated into its real part and imaginary part as

(4) (5) In (4) and (5), are dened as (6) (7) (8) (9) Eliminating the one unknown in (4) and (5) by dividing (4) by (5), leaves (10) The following equations dene the values , , and in (10)
Fig. 22. Postfault circuit. Fig. 21. Proceeding results after iteration.

(11) (12) (13) The unknown in (10) can be solved by using a NewtonRaphson iteration (14) (15) (16) The value of is small in most situations and in the rst guess of the iteration . The iteration process stops when the meets the required accuracy. For example, the minimum requirement for this simulation is . In the frequency range, for each frequency selected, is calculated. Normally, when the measured phase has synchronizing errors, the calculated will increase with frequency as (17) where is the time delay causing the phase difference.

In the simulation system, when fault F3 occurs, a 1 phaseangle difference between the measured and was introduced to emulate a synchronization delay. The calculated results of line reactance for each NewtonRaphson iteration described before are shown in Fig. 21. As shown in Fig. 21, for a 1 phase difference, only four steps of iteration are enough to produce accurate results. The experimental test results show a similar trend as the simulation results. VII. COMPARISON WITH A TRADITIONAL DOUBLE-ENDED SCHEME The traditional double-ended fault-location scheme as described in [5] has been tested on the same simulation system, and the results will be shown: This algorithm uses postfault-synchronized double-ended voltage and current as in Fig. 22 at the system frequency (50 Hz). The fault location can be estimated by calculating the line impedance between the measurement point and the fault point and then divided by the value of impedance per meter (18) (19) The value of can be derived by substituting (18) and (19) (20) where all values are at the system frequency only.

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power frequency techniques and traveling-wave techniques. The approach has been validated against a range of fault types, fault conditions (hard and bouncing), fault resistance, and system conditions. It is shown that good accuracy can be achieved for a wider range of conditions and the approach may also be applicable to lines with distributed loads (depending on the level of acceptable accuracy) The approach has been demonstrated on a small cable-based IPS system. However, it is totally general and could be applied to overhead lines and a transmission system. The accuracy and range of the validity on a transmission system will form part of a future work. REFERENCES
[1] A. Emadi, M. Ehsani, and J. M. Miller, Vehicular Electric Power Systems. Boca Raton, FL: CRC, 2004, pp. 1535. [2] T. Takagi, Y. Yamakoshi, J. Baba, K. Uemura, and T. Sakaguchi, A new alogrithm of an accurate fault location for EHV/UHV transmission lines part IFourier transformation method, IEEE Trans. Power App. Syst., vol. PAS-100, no. 3, pp. 13161323, Mar. 1981. [3] T. Takagi, Y. Yamakoshi, M. Yamaura, R. Kondow, and T. Matsushima, Development of a new type fault locator using the one-terminal voltage and current data, IEEE Trans. Power App. Syst., vol. PAS-101, no. 8, pp. 28922898, Aug. 1982. [4] L. Eriksson, M. M. Saha, and G. D. Rockefeller, An accurate fault locator with compensation for apparent reactance in the fault resistance resulting from remote-end infeed, IEEE Trans. Power App. Syst., vol. PAS-104, no. 2, pp. 423436, Feb. 1985. [5] A. T. Johns and S. Jamali, Accurate fault location technique for power transmission lines, Proc. Inst. Elect. Eng., Gen., Transm. Distrib., vol. 137, pp. 395402, Nov. 1990. [6] C. Chuang, J. Jiang, Y. Wang, C. Chen, and Y. Hsiao, An adaptive PMU-based fault location estimation system with a faultTolerance and load-balancing communication network, in Proc. IEEE Lausanne Power Tech Conf., 2007, pp. 11971202. [7] E. Schweitzer, Evaluation and development of transmission line fault-locating techniques which use sinusoidal steady-state information, in Proc. 9th Annu. Western Protective Relay Conf., Oct. 1982, pp. 269278. [8] A. L. Dalcastagne, S. N. Filho, H. H. Zurn, and R. Seara, A twoterminal fault location approach based on unsynchronized phasors, in Proc. Int. Power Syst. Technol. Conf., 2006, pp. 17. [9] A. L. Dalcastagne, S. N. Filho, H. H. Zurn, and R. Seara, An iterative two-terminal fault-location method based on unsynchronized phasors, IEEE Trans. Power Del., vol. 23, no. 4, pp. 23182329, Oct. 2008. [10] I. Zamora, J. F. Minambres, A. J. Mazon, R. Alvarez-lsasi, and J. Lazaro, Fault location on two-terminal transmission lines based on voltages, Proc. Inst. Elect. Eng., Gen., Transm. Distrib., vol. 143, pp. 16, Jan. 1996. [11] P. Balcerek and J. Izykowski, Improved unsynchronized two-end algorithm for locating faults in power transmission lines, in Proc. IEEE Bologna Power Tech Conf., 2003, pp. 16. [12] D. W. P. Thomas, R. J. Corvalho, and E. L. Pereira, Fault location in distribution systems based on travelling waves, in Proc. IEEE Power Tech Conf., 2003, pp. 59. [13] A. Borghetti, M. Bosetti, M. D. Silvestro, C. A. Nucci, and M. Paolone, Continuous-wavelet transform for fault location in distribution power networks: Denition of mother wavelets inferred from fault originated transients, IEEE Trans. Power Del., vol. 23, no. 2, pp. 380388, May 2008. [14] D. P. Coggins, D. W. P. Thomas, B. R. Hayes-GiII, Y. Zhu, E. T. Pereirat, and S. H. L. Cabralt, A new high speed FPGA based travelling wave fault recorder for MV distribution systems, in Proc. Inst. Elect. Eng. Develop. Power Syst. Protect. Conf., 2008, pp. 579583. [15] M. Sumner, B. Palethorpe, D. W. P. Thomas, P. Zanchetta, and M. Piazza, A technique for power supply harmonic impedance estimation using a controlled voltage disturbance, IEEE Trans. Power Del., vol. 17, no. 2, pp. 207215, Apr. 2002. [16] M. Sumner, B. Palethorpe, and D. W. P. Thomas, Impedance measurement for improved power qualityPart 1: The measurement technique, IEEE Trans. Power Del., vol. 19, no. 3, pp. 14421448, Jul. 2004.

Fig. 23. Results of the traditional fault location.

The calculated resistance (Rx) and reactance (Xx) for different fault positions as shown in Fig. 6 are shown in Fig. 23. As shown in Fig. 23, the prefault data were set to zero because during the healthy state, the numerator and denominator are zero in (20). It is not possible to identify the fault location using the estimated reactance, because it is too small as shown in Fig. 23. Only the resistance results provide a fault location 1 cycle (20 ms) after the fault transient dies out. The time period used is ve times more than the method presented in this paper. The traditional method is required to have about 1% to distinguish 1-m distance in this paper as shown in Fig. 23. This is not practical in the experimental test. The proposed algorithm takes about 20 ms to execute on a TMS 3206713 DSP. However, the DSP code has not been optimized and this could be easily improved by a factor of 2, making it comparable to traditional schemes in response time, but offering much higher accuracy. VIII. CONCLUSION A double-ended fault-location algorithm using the high-frequency fault transient frequencies up to 3 kHz has been tested on an IPS demonstrator. It works with both ac and dc voltage supplies and is able to provide fault position quickly (with a 4-ms data sample) and accurately (within 1-m error as the experimental test system demonstrates). This method is suitable for both a step fault which was experimentally created by an IGBT switch, and a bouncing fault which was imposed using a mechanical switch. This fault-location scheme can identify the fault position over a range of fault resistances (from 0 approximate up to load impedance) using the fault transients. As results are obtained over a broad frequency range and any synchronization error can be removed by solving the nonlinear equations presented in this paper, the proposed algorithm is straightforward to implement without requiring GPS synchronization. The key novelty of the proposed scheme is the direct use of the fault transients over a broad frequency which is within the bandwidth of convention transducers. This creates a robust and accurate fault-location scheme compared with conventional

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[17] M. Sumner, B. Palethorpe, and D. W. P. Thomas, Impedance measurement for improved power qualityPart 2: A new technique for stand-alone active shunt lter control, IEEE Trans. Power Del., vol. 19, no. 3, pp. 14571463, Jul. 2004. [18] J. Huang and K. A. Corzine, AC impedance measurement by line-to-line injected current, in Proc. IEEE Ind. Appl. Conf., 2006, pp. 300306. [19] J. Wang, M. Sumner, D. W. P. Thomas, and R. D. Geertsma, Fast fault detection and location for a marine power system using system power converters and active impedance estimation, in Proc. Inst. Elect. Eng., Develop. Power Syst. Protect.Conf., 2008, pp. 597601. [20] D. Novosel, D. G. Hart, E. Udren, and J. Garitty, Unsynchronized two-terminal fault location estimation, IEEE Trans. Power Del., vol. 11, no. 1, pp. 130138, Jan. 1996. [21] J. L. Blackburn and T. J. Domin, Protective Relaying Principles and Applications. Boca Raton, FL: CRC, 2006, pp. 450451.

David W. P. Thomas (M94SM09) received the B.Sc. degree in physics from Imperial College of Science and Technology, London, U.K., in 1981, the M.Phil. degree in space physics from Shefeld University, Shefeld, U.K., in 1987, and the Ph.D. degree in electrical engineering from Nottingham University, Nottingham, U.K., in 1990. In 1990, he joined the Department of Electrical and Electronic Engineering, University of Nottingham, Nottingham, as a Lecturer, where he is currently an Associate Professor and Reader. His research interests include power system transients, power system protection, electromagnetic compatibility, and electromagnetic simulation. Dr. Thomas is a member of CIGRE and a Convenor for CIGRE JWG 4.207. He is also Vice-Chair for IEEE EMC Technical committee 7 Low frequency EMC.

Ke Jia (M10) was born in China in 1986. He received the M.Sc. and Ph.D. degrees in electrical engineering from Nottingham University, Nottingham, U.K., in 2008 and 2011, respectively. He has been working as a Research Fellow in Nottingham University since 2011. His research interests include power system protection and fault location, microgrid automation, and renewable energy.

Mark Sumner (SM05) received the B.Eng. degree in electrical and electronic engineering from Leeds University, Leeds, U.K., in 1986 and the Ph.D. degree in induction motor drives from the University of Nottingham, Nottingham, U.K., in 1990. He was with Rolls Royce Ltd., Ansty, U.K. After working as a Research Assistant, was appointed Lecturer at the University of Nottingham in 1992. Currently, he is Professor of Electrical Energy Systems, Department of Electrical Engineering, University of Nottingham. His research interests cover the control of power-electronic systems, including sensorless motor drives, diagnostics and prognostics for drive systems, power electronics for enhanced power quality, and novel power system fault-location strategies.