Ch 11: Interrupts Programming in Assembly [Book]

Tuesday, November 05, 2013 10:34 AM

Interrupts vs. Polling

Interrupt method Device sends microcontroller an interrupt signal Microcontroller stops what it was doing previously and handles the interrupt signal i.e. it serves the device Done with interrupt service routine / interrupt handler Has priority Microcontroller continuously monitors status of a device When certain conditions are met, it serves the device However this wastes a lot of time Not efficient Time could be spent doing something else No priority; checks with round -robin order

Polling method

Interrupt service routine / interrupt handler Program associated with the interrupt

Steps in Executing an Interrupt (generally speaking; no code)

1. 2. 3. 4. 5. Finish its last instruction Saves address of next instruction (PC) onto stack Saves current status of all interrupts internally (not on the stack) Jumps to fixed location in memory that holds addresses of interrupt service routines Gets address of ISR and jumps to it i. Executes service routine until RETI (return from interrupt) 6. Returns to where it was last interrupted 7. Pops PC from stack 8. Executes instructions from that point

6 Interrupts in 8051
1. One for Reset i. ROM address 0, 1, and 2 2. Two for Timer 0 and Timer 1 i. 000Bh and 001Bh, respectively 3. Two interrupts for hardware external hardware interrupts i. 0003h and 0013h, respectively 4. One interrupt for serial communication for both receiving and transmitting i. 0023h

Upon reset all interrupts are disabled Must be activated by software IE register (interrupt enable) enables and disables them Disable (masking) Enable (unmasking) Bit-addressable

Steps in Enabling an Interrupt

Table of IE register and its Bits
D7 D0

EA
IE.7

-IE.6

ET2
IE.5

ES
IE.4

ET1
IE.3

EX1
IE.2

ET0
IE.1

EX0
IE.0

0 = interrupt disabled 1 = each interrupt is enabled/disabled by setting/clearing its enable bit

Not Timer 2 overflow or implement capture interrupt ed (8052 only)

Serial port interrupt

Timer 1 overflow interrupt

External interrupt 1

Timer 0 overflow interrupt

External interrupt 0

1. Bit D7 of IE must be set to allow rest of IE to take effect 2. If EA = 1 1. Interrupts are enabled and will be handled with corresponding bits in IE are high 3. If EA = 0 1. No interrupt will be handled even if associated bits in IE are high

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Example:
MOV IE, #10010110b ;enable serial, Timer 0, and EX1 interrupts

CLR IE.1
CLR IE.7

;disable Timer 0 interrupt

;disable all interrupts

Programming Timer Interrupts

Some points:
Avoid using code space set aside for interrupt vector table by using LJMP at the very beginning for RESET

Example:
ORG 0000h

LJMP Main
ORG 000Bh

;bypass vector interrupt table

;Timer 0 interrupt vector table

CPL P2.1
RETI

;Toggle P2.1 pin

;Return from ISR

ORG 0030h
MAIN: MOV TMOD, #02h ;timer 0, mode 2

MOV P0, #0FFh

MOV TH0, #-92

;P0 as input
;set frequency

MOV IE, #82h

SETB TR0

;enable timer 0
;start timer 0

BACK:

MOV A, P0
MOV P1, A

;move P0 to P1 ;stay there till interrupt

SJMP BACK
END

If ISR is too long to fit in the vector table, you can place a LJMP to the routine instead.

Level-triggered vs. edge-triggered external hardware interrupts

Level-triggered If you hold down the pin, the signal is kept low, and the interrupt continues to be re-activated as long as it is low Ex: If you hold down a pin, the LED is kept on. Once you let go, the LED is off. Edge-triggered If you hold down the pin, the signal is kept low, but the interrupt will only be activated ONCE To execute the interrupt again you have to let go of the pin and then hold it down again Ex: If you hold down a pin, the LED is kept on only for a certain period of time This period of time is determined by the programmer Once the LED is off, it is off until the user holds down the pin again

Programming Serial Interrupts

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Switch Debouncing
Thursday, November 28, 2013 3:38 PM

Switch Bouncing

When you push a switch, the 'contacts' open and close rapidly for about 30ms. Look at actual switch output. This causes 8051 to think that the switch was pushed multiple times since several 0s will be read. Switch Debouncing Most debouncing methods is at its core filtering bounces through time; i.e. waiting until the bouncing stops Debouncing Using a Loop

Debouncing Using a Shift Register

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Ch 13: ADC, DAC, and Sensor Interfacing

Wednesday, December 04, 2013 5:57 PM

ADC Devices
Analog-to-Digital converters Used for data acquisition Physical world is all analog while computers are binary Transducer / sensors Device that converts physical quantity to electrical N bit resolution N can be 8, 10, 12, 16, or 24 bits Higher resolution produces smaller step size Step size Smallest change that can be discerned by the ADC Conversion time Time it takes the ADC to convert the analog input to digital (binary) number Either parallel or serial Parallel 8 or more pins for bringing out binary data Serial 1 pin for data out

Step Size
Step size = Vref / 2n = Vref / 256 N = n-bit resolution

Digital Output to Vin

Dout = Vi n / step size [NOTE]: If you are given Vref(-) then you MUST offset that when calculating step size and Dout by adding the positive value of Vref Example Vref(-) = -2.75V Vref(+) = 4.00V Vref = 6.75V But in your calculations you do Vref + 2.75V to offset (?) Need confirmation

Resolution vs. Step Size for ADC

n-bit 8 10 12 16 Number of steps Step Size (mV) 256 1024 4096 65536 5/256 = 19.53 5/1024 = 4.88 5/4096 = 1.2 5/65536 = 0.076

ADC0848
8 bit resolution 8-channel ADC Monitors up to 8 different analog inputs CS Active low input Must be low to access 848 RD (read) Input signal Active low CS = 0 & RD is asserted low, data output appears in D0-D7 data pins Referred to as OE Vref Step size = Vref / 256 Vref (V) Step size (mV) 5 4 2.56 1.26 0.64 19.53 15.62 10 5 2.5

ADC0804 Chip
+5 volts 8 bit resolution Conversion time varies depending on clocking signals applied to CLK IN pin Cannot be faster than 110 us

CS
Chip select Active low input Must be low to access ADC0804 RD (read) Input signal, active low Used to get converted data out of ADC0804 chip When CS = 0 and H-L pulse applied to RD pin, 8-bit digital output appears in the D0-D7 pins Also referred to as OE (output enable) WR (write / "start conversion") Active low input Inform ADC to start conversion process CS = 0 and L-H pulse applied, ADC starts converting analog input (Vi n ) to 8-bit digital number Forced low again when conversion is complete CLK IN and CLK R CLK IN - Input pin connected to external clock source when external clock is used for timing INTR (interrupt / "end conversion") Output pin, active low Normally high when conversion finished Goes low to signal CPU that converted data is ready to be picked up CS = 0 when it goes low and send H-L to RD pin to get the data

DB0 - DB7 Digital data output pins MA0 - MA4 (multiplexed addresses) Data pins to select the channel WR (write / "start conversion") Two roles 1. Latches address of selected channel present on D0-D7 pins 2. Informs ADC to start conversion of analog input at that channel CH1 - CH8 8 channels of the Vin analog inputs Single-ended mode Vcc

Vi n (+) and Vi n (-) Vi n = Vi n (+) - Vi n (-) Differential analog inputs Vi n (-) connected to ground Vi n (+) used as analog input to be converted into digital

5 volt power supply AGND, DGND (analog ground and digital ground)
INTR

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VCC +5 volt power supply Also reference voltage Vref / 2 input (pin 9) is open (not connected). Vref / 2 Pin 9 = 9 input voltage used for reference voltage If open then input voltage range for ADC is 0 to 5 volts Vref / 2 used to implement analog input voltages other than 0 to 5 volts Such as 0 to 4V Vref / 2 (V) 2.0 1.5 1.28 Vin (V) 0 to 4 0 to 3 Step Size (mV) 5/256 = 19.53 4/256 = 15.62 3/256 = 11.71

Not connected 0 to 5

0 to 2.56 2.56/256 = 10

D0 - D7 D7 is MSB Digital data output pins ADC0804 is parallel Output voltage Dout = Vin / step size Dout = digital data output (in decimal) Vin = analog input voltage Step size = smallest change = (2 x Vref / 2)/256 for ADC0804 Analog ground and digital ground Input pins providing ground for both analog and digital signal Analog ground connected to analog Vin Digital ground connected to ground of Vcc pin Isolate analog Vin signal from transient voltages In real world, analog and digital grounds are handled separately

Data conversion for ADC0804 chip

1. CS = 0 2. Send L-H pulse to WR to start conversion 3. Monitor INTR pin i. If low, conversion is finished ii. If high, keep polling till low 4. CS = 0 when INTR is low 5. Send H-L pulse to RD pin to get data from ADC0804 chip

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Ch 14: 8051 Interfacing to External Memory

Wednesday, December 04, 2013 7:31 PM

Semiconductor Memory
Connected directly to CPU Memory CPU asks for information (code and data) Primary memory Most common are ROM and RAM

Memory capacity
Number of bits that a semiconductor memory chip can store Can be in units of kbits, mbits, and so on Distinguished from storage capacity of computer systems Computer storage given in BYTES

Memory Organization
Memory chips organized into number of locations in IC Location can hold 1, 4, 8, or 16 bits Number of bits that each location can hold = number of data pins on a chip Number of locations = number of address pins Number of locations = 2 number of address pins

Memory chip contains 2 x locations, x = number of address pins Each location contains y bits, y = number of data pins on chip Entire chip contains 2 x * y bits

Speed
Aka access time Time it takes to access data

Powers of 2
10 20 30 1K 1M 1G

Example [Finding organization and capacity based on # of address and data pins]
A memory chip has 12 address pins and 4 data pins. Find the organization and the capacity. Organization = 2^x * y = (2^12) * 4 = 4096 x 4 = 4K x 4 Capacity = 16K A 512K memory chip has 8 pins for data. Find the organization and number of address pins for this memory chip. We know that organization = 2x * y Y = 8 pins Capacity = 512K We also know that Capacity = organization multiplied against each other Capacity = 512K = 2 x(y) = 2x(8) We can generalize this to just 512 = 8x, so divide both sides by 8 X = 64 So the organization is 64K x 8

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Number of address pins = 2 x? = 64K 210 = 1K 64K = (210) * (64) = (210) * (26) = 216 x = 16 So there are 16 address pins

Banks [Finding # of memory chips, banks, and chips per bank for a module]
Given an N x M memory model and an L x K memory chip

Example [Determining what address lines of a module go to a decoder]

You have a 16G x 64 memory module with 1G x 16 memory chips. Find the number of banks, chips per bank, total number of chips, and the decoder that it uses. Banks = 16G / 1G = 16 banks Chips per bank = 64 / 16 = 4 chips per bank Total number of chips = 16 * 4 = 64 total chips The memory module has 34 address lines. The memory chip has 30 address lines. This leaves 4 address lines leftover, so it will use a 4-to-16 decoder.

You have an 8G x 32 memory module with 512M x 8 memory chips. What address lines go to the decoder? First, we need to determine the number of address and data lines for both the module and memory chips. Memory module Address lines = 33. Notated as A[32:0] Data lines = 32 Notated as D[31:0] Memory chip Address lines = 29 Data lines = 8 Subtract the number of address lines for the chip from the memory module's address lines, i.e. Memory module - memory chip This will give you the number of address lines left over. 33 address lines for module - 29 address lines for chip = 4 lines leftover The lines leftover all go to the decoder. The decoder is always n-to-2n , n being the number of lines leftover. The decoder then is 4-to-16.

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So, A[32:29] will go to a 4-to-16 decoder. Remember that it is counted as address lines 32, 31, 30, and 29.

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