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PSR-SYSTEM
Data sheet
FEATURES
The "Fieldbus Coupler 32 I/O" belongs to the PSR2 family of devices and is in turn, a
member of the remote peripherals with a connection to the Fieldbus.
32 digital inputs for connection to a passive opto-interface.
32 digital, short-circuit proof outputs suitable for direct connection of passive relay interface
with 16 channels.
The device is intended for both wall-mounting as well as insertion in standard cubicles (to
snap on a top-hat rail).
The connection on the bus side is carried out using a BNC-coaxial connector whereas on the
customer side is by means of a flat cable; with 16 channels per cable.
SHORT DESCRIPTION
Purpose
The "Fieldbus Coupler 32 I/O" is a node on the ARCnet-Fieldbus with 32 digital inputs and outputs.
It transmits in serial, the 32 input/output signals to and from the processing controller via Fieldbus
(coaxial cable). In this way, a remote acquisition and transmission of control signals is achieved
with a minimum amount of wiring effort.
Function
The process input signals on the customer side are cyclically read by a micro-controller
(C), pre-processed and stored in the RAM. On the other side, the control commands of the
processing controllers are received, saved and output in parallel via Fieldbus.
The data transfer on the bus is only performed by the ARCnet-controller and in asynchronous to
C. The bus control as well as error handling are integrated in the system protocol. A driver is
installed on the bus side which is able to drive a medium size remote system in a bus or star
topology.
Rev.
a
Rev.
b
Department 1
IAEG
Department 2
Issued:
94-07-28 Rubi
Check 1:
94-07-28 Spielh.
Check 2:
Released:
94-07-28 Roth A.
Document
Format
Language
Page
TA
A4
HIEE 420289 E
No. of
pages
18
-2-
UP C090 AE
TABLE OF CONTENTS
FEATURES ...................................................................................................................................... 1
SHORT DESCRIPTION ................................................................................................................... 1
1.
2.
2.1
2.2
2.3
2.4
2.5
2.6
3
3.1
3.2
3.3
3.4
3.5
CONFIGURATION......................................................................................................... 8
Required Hardware Components.............................................................................. 8
Address Selection ..................................................................................................... 8
Memory Partitioning .................................................................................................. 8
Input/output Memory Assignment ............................................................................. 9
Software Interface ................................................................................................... 10
4.
4.1
4.2
5.
5.1
5.2
5.2.1
5.3
5.3.1
5.3.2
5.4
5.4.1
5.4.2
5.4.3
5.5
5.6
5.7
5.7.1
5.7.2
5.7.3
5.8
5.8.1
5.8.2
5.8.3
5.8.4
5.8.5
5.8.6
5.8.7
5.9
HIEE 420289 E
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UP C090 AE
6.
6.1
6.2
6.3
6.4
6.4.1
6.4.2
6.4.3
7.
ORDER INFORMATION.............................................................................................. 18
HIEE 420289 E
-4-
1.
UP C090 AE
X61
UP C090 AE
HEX:
ARCnet
OPEN=1
MSB
RELEASE
LSB
RUN
X51
F101
+5V
2,5AF
2
3
-5V
4
5
ARCnet
1....16
X1
18,20,22,24,26
16 IN
17,19,21,23,25
1....16
X2
18,20,22,24,26
16 IN
17,19,21,23,25
1..16
X3
ARCnet
16 OUT
17..26
1..16
X4
16 OUT
HIEE 420289 E
17..26
2.
FUNCTIONAL DESCRIPTION
2.1
Schematic Diagram
UP C090 AE
Free
Reset
16 MHz
Free
Run
Int1
Release
80C31
PORT 1
KS1
KS2
1
Disable
Driver
HYC 9088
RUN
X61
Reset
+24V
0V
+24V
2
5
2,5AF
24 V
4
0
RXIN
D0...7
EPROM
Reset
S201 NODE-ID
X2: 17
18
19
20
21
22
23
24
25
26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
COM 20010
5 V
X1: 17
18
19
20
21
22
23
24
25
26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A0...7
Release
20 MHz
+24 Volt Z0
+
OPEN
CHIP-SELECT
RAM
Imax 200 mA
KS1
0V
ADDRESS
LATCH
Latch
_
OPEN = log. 1
Enable
24 Volt
5 Volt
Latch
Latch
Latch
Latch
24 Volt
5 Volt
+ Imax 200 mA
_
Imax
+24 Volt
KS2
+24V
DATA-BUS
X51
1
AD0...7
PORT 0
ADDRESS-BUS
ALE
PULSE 1
PULSE 2
A8...15
PORT 2
WD
FIELDBUS
-5-
Z0
Enable
24 Volt
5 Volt
Imax
R
5 Volt
Latch
Latch
Latch
Latch
24 Volt
HIEE 420289 E
X3: 17
18
19
20
21
22
23
24
25
26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
X4: 17
18
19
20
21
22
23
24
25
26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
-6-
2.2
UP C090 AE
Power Supply
2.3
The combination of the micro-controller 80C31 and ARCnet-controller COM 20020 controls the
whole function of the network nodes. The micro-controller accesses the software saved in EPROM
via its ports 0 and 2. The software on one hand, controls the Interface to hardware, on the other
hand, the data transfer to the bus-controller. This in turn controls the complete traffic on the
Fieldbus. For the bus-protocol, it should be referred to the software specification which is not
discussed in this paper.
Memory
The 8-bit micro-controller 80C31 provides a maximum memory range of 64 kBytes of program
code as well as 64 kBytes RAM. The RAM memory is in addition to the controller memory, used
for the I/O interface and node addresses. The corresponding memory partitioning is shown in the
following diagram:
EPROM
FFFFH
RAM
FFFFH
F000H
node addresses
E000H
I/O Interface 4. Byte
D000H
I/O Interface 3. Byte
C000H
B000H
A000H
9000H
not used
8000H
RAM 32kx8
3FFFH
RAM 8kx8
2000H
0000H
0000H
HIEE 420289 E
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UP C090 AE
Node Addresses
Each node in the network must have a unique address. The address is selected by means of a
DIP-switch S201 in range 1..63 and can be chosen on-will as long as it is unique within the
network. It should be noted that the nodes are processed in the order of their addresses.
2.4
Line Driver
The line driver Hybrid HYC 9088 converts the digital signals of the serial output of the ARCnetcontroller into electrically-isolated and DC-free "dipulses" which are then transferred to the bus.
Besides, it also receives dipulse signals sent by other nodes and converts them into mCcompatible digital signals. It is also able to drive a coaxial cable (RG 62). The link from one device
to another is carried out using a BNC-T through which the device can be mechanically separated
from the bus without disturbing the rest of it. On both ends, the bus cable must be terminated by a
93 Ohm surge impedance. The bus driver is electrically compatible with the standard ARCnet
systems. The bus partitioning which avoids the data collision is implemented in the software
protocol.
2.5
Interface to Hardware
Inputs
The status of the 32 input channels are read by the two connectors X1 and X2, converted into 5
Volt and transferred onto the internal bus via four 8-bit transparent latches. These are always read
8-bit in parallel. During reading, the input latches are blocked in order to keep the data consistency
within one byte. On these connectors there are at the same time, +24 Volt and 0 Volt outputs
which are used to directly read either passive opto-interface or galvanically-isolated contacts.
Outputs
As outputs, there are also four 8-bit latches which are individually written by the data bus. After
conversion to 24 Volt, they are transferred to 16 channels of the two output connectors X3 and X4.
The output connection is suitable for direct control of a passive relay interface. Each output is
individually monitored against short-circuit. If a fault occurs, the corresponding channel is disabled
and this is read by the controller and reported on the bus as a fault alarm. After the fault clearance,
the channel can be enabled again using the release key S101.
2.6
Monitoring
The following hardware supervisory circuits are included in the device. The power supply
supervision or watchdog alarm is indicated by clearing the green LED.
Power Supply Monitoring
This supervises the failure of +5 Volt and -5 Volt power supply as well as undervoltage and at the
same time, by power-up creates a power-up signal through which the bus driver and controller are
set to stillstand (hold).
HIEE 420289 E
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UP C090 AE
Watchdog
The device contains a watchdog which supervises the correct program sequence and in case of a
malfunction restarts the controller via an interrupt routine as a first step. If this doesn't clear the
fault, it creates a "Reset" signal to block the bus driver so that the network detects the fault. This
error is saved and can be only reset either by the power supply or the release key (S101).
Besides, there is a time-out (ARCnet-condition) which forces a bus initialization, if the node doesn't
receive the token for longer than 840ms. The bus initialization takes ca. 2s. Furthermore, if a
device is defected, the network detects it automatically, but the rest of the bus traffic is not
disturbed. The same applies when the device is put back into operation in which it automatically
returns into the logical ring.
Short-circuit Monitoring
This is described in chapter 2.5 "Interface to Hardware".
CONFIGURATION
3.1
HIER 466264
HIER 466587
HIER 466608
HIEE 405127
Address Selection
The address switch S201 is used to determine the node address of the device within the whole
ARCnet bus network which must be unique. The allowed address range is 1 to 63.
node address for Fieldbus
selected via 8-fold DIP-switch S201 "Node-ID"
permitted setting (software condition)
1...255
1...63
3.3
8
7
128 64
MSB
6
32
5
16
4
8
Memory Partitioning
HIEE 420289 E
3
4
2
2
1
1
LSB
-9-
3.4
UP C090 AE
The 32 inputs (connectors X1 and X2) as well as the 32 outputs (connectors X3 and X4) each
occupies 4 bytes of memory. The address assignment of the required data is carried out in FUPLA
configuration as shown below:
Inputs (signals from the process to the controller)
The Size_IN defines the number of the bytes to be transferred. The offset can be assigned in
FUPLA, otherwise, it is inactive meaning that the transfer always begins from byte 0.
Byte-Offset
Size
Offset
Size
3
1
0
Bit
7 6 5 4 3 2 1 0
Byte-Offset
Size
Offset
Size
3
1
0
Bit
7 6 5 4 3 2 1 0
HIEE 420289 E
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UP C090 AE
The assignment of the connector/pin to the data byte/bit is given in the following table:
Input/output connectors X1 ... X4
connector/pin
byte offset
bit
connector/pin
byte offset
bit
X1/1, X3/1
X2/1, X4/1
X1/2, X3/2
X2/2, X4/2
X1/3, X3/3
X2/3, X4/3
X1/4, X3/4
X2/4, X4/4
X1/5, X3/5
X2/5, X4/5
X1/6, X3/6
X2/6, X4/6
X1/7, X3/7
X2/7, X4/7
X1/8, X3/8
X2/8, X4/8
X1/9, X3/9
X2/9, X4/9
X1/10, X3/10
X2/10, X4/10
X1/11, X3/11
X2/11, X4/11
X1/12, X3/12
X2/12, X4/12
X1/13, X3/13
X2/13, X4/13
X1/14, X3/14
X2/14, X4/14
X1/15, X3/15
X2/15, X4/15
X1/16, X3/16
X2/16, X4/16
3.5
Software Interface
HIEE 420289 E
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UP C090 AE
Address
00
01
02
03
04
05
06
Slave Ready
Param Ready
Identifikation
Identifikation
Functionality
Device Status
Debug Flags
0001 hex
0001 hex
HIEE xxxxxx
HIEE xxxxxx
0022 hex
0011 hex
not used
4.
4.1
Commissioning Hints
select the node address; this should correspond with the configuration in FUPLA
connect the bus cable; if the device is the last one on the bus, a termination
resistor must be connected to the free end of the BNC-T.
4.2
Function Control
after switching on the power supply the green LED must come on after a short
delay (ca. 6s).
if the LED is not on, it could be that it is not yet initialized by the master and/or has
not received valid data. To find out whether the device is serviced correctly by the
master, the software must be checked.
if the LED is not on, although the master runs correctly, the fuse must be
this is ok then the device is defective and must be exchanged.
HIEE 420289 E
checked. If
- 12 -
5.
TECHNICAL DATA
5.1
Power Supply
rated voltage Us
current consumption (unloaded outputs)
typical
maximum
UP C090 AE
+24 Volt 10 %
ca.125 mA
200 mA
10 ms
1,2/50 s
630 V pk
5 Volt / 500 mA
3W
5.2
Input Characteristics
5.2.1
24 Volt signals
"1" signal
"0" signal
input resistor
output test voltage 24 Volt (short-circuit proof)
max. load per connector (X1,X2)
Us - 2,5 V
200 mA
5m
5.3
Output Characteristics
5.3.1
24 Volt signals
11,3...30 V
<3V
10 kOhm
"1" signal
"0" signal
HIEE 420289 E
Us - 2,2 V
open
- 13 -
UP C090 AE
Iout max
300
250
200
150
25C
100
50C
50
0
70C
0
3
4
5
Number of active outputs
By thermal overload as well as short-circuit all 16 channels of a connector are switched off.
max. cable length per connector
5.3.2
2m
Total Load
5.4
Interface
5.4.1
2,2 A
ANSI/ATA 878.1
Input Characteristics
sinus pulse
frequency
HIEE 420289 E
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5.4.2
UP C090 AE
Output Characteristics
sinus pulse
frequency
5.4.3
Transfer Characteristics
transfer rate
2,5 MBaud
255
65...435 m
19
1m
D = ( 22 - N)*
N = 22 *(1-
Nodes
N
22
20
19
18
16
14
12
10
8
6
4
2
50
100
150
200
250
300
350
400 435
meter
HIEE 420289 E
478m
22
D
)
478m
- 15 -
5.5
UP C090 AE
Setting Values
5.6
Transfer Characteristics
not applicable
5.7
Monitorings
5.7.1
+5 Volt, threshold by
+4,5...+4,6 V
-5 Volt, threshold by
-4,5...-4,6 V
5.7.2
Input Protection
5.7.3
each ca. 60 ms
2,5A fast
70 ms
150 ms
5.8
Environmental Characteristics
5.8.1
0...+70 C
operational range
0...+70 C
storage temperature
5.8.2
-25...+85 C
Climate Stability
accord. to IEC-Publ.68-2-1
0 C
accord. to IEC-Publ.68-2-2
70 C
accord. to IEC-Publ.68-2-3
21 days
by relative humidity
93 +2/-3 %
HIEE 420289 E
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5.8.3
UP C090 AE
Mechanical Stability
10...150 Hz
2g in each axis
5.8.4
1...33 Hz
5g in each axis
5.8.5
10V/m, 27..1000MHz
Altitude of Installation
5.8.6
Protection Means
5.8.7
2 kV peak
250V peak
IP 10
Test Voltages
5.9
Reliability
failure rate
2000 FIT
HIEE 420289 E
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6.
CONSTRUCTION DATA
6.1
Dimensions
UP C090 AE
dimensions (LxWxH)
mounting:
top-hat rail mounting according to DIN EN 50 022
6.2
Weight
weight
6.3
0,94 kg
8-pole
ready
reset
6.4
Connectors
6.4.1
Fieldbus
X61
6.4.2
coax-coupling
Binary I/O
connector X3, X4
inputs
outputs
E1
E2
A1
A2
E3
E4
A3
A4
E5
E6
A5
A6
E7
E8
A7
A8
E9
E10
A9
A10
11 E11
E12
A11
A12
13 E13
E14
A13
A14
15 E15
E16
A15
A16
17
19
21
23
25
HIEE 420289 E
26-pole
- 18 -
6.4.3
UP C090 AE
1
supply volt. bus 1
0V
PE
0V
protective earth
24V_2
7.
ORDER INFORMATION
HIEE 300661 R1
HIEE 420289 E