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CMOS IC
LC75411ES, 75411WS
Electronic Volume Controller for Car Audio Systems
Overview
The LC75411ES and 75411WS are electronic volume controllers that enable control of volume, balance, fader, bass/treble, loudness, input switching, and input gain using only a small number of external components.
Features
On-chip buffer amplifier cuts down number of external components Low switching noise generated by on-chip switch through use of silicon gate CMOS process, for low switching noise when there is no signal Low switching noise when there is a signal due to use of on-chip zero-cross switching circuit On-chip 1/2 VDD reference voltage circuit Controls performed with serial input (CCB)
Functions
Volume: 0 dB to 79.5 dB in 0.5-dB steps, and (161 positions) Balance function with separate L/R control Fader: rear output or front output can be attenuated across 16 positions (in 1-dB steps from 0 dB to 2 dB, 2-dB steps from 2 dB to 20 dB, 10-dB steps from 20 dB to 30 dB, and 45 dB, 60 dB, ) Bass/treble: Both bass and treble can be controlled in 1-dB steps from 0 dB to 6 dB, and in 2-dB steps from 8 dB to 12 dB. Input gain: 0 dB to +18.75 dB (1.25-dB steps) amplification is possible for the input signal. Input switching: four input signals can be selected for Left and for Right Loudness: A tap is output from the 32 dB position of a 2 dB step volume control resistor ladder. A loudness function can be implemented by connecting an external RC circuit.
CCB is a trademark of SANYO ELECTRIC CO., LTD. CCB is SANYOs original bus format and all the bus addresses are controlled by SANYO.
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircrafts control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
LC75411ES, 75411WS
Package Dimensions
unit: mm 3148-QIP44MA
[LC75411ES]
13.2 10.0 1.0 0.8 0.35
33 34 23
unit: mm 3163A-SQFP48
[LC75411WS]
1.6 1.0
22
9.0 7.0
1.6
0.2
0.75
36 37
0.5
0.18
25
0.75
0.15
9.0 7.0
0.5
0.75
24
44
0.1 2.5
12
11.6
0.8
0.5
0.1 0.5
SANYO: QIP44MA
33
32
31
30
29
LTIN
LCT
28
27
26
25
24
LC75411ES
LFIN
RSELO
RVRIN
RCT
RCOM
RVROUT
RTIN
RF1C1
RF1C2
RF1C3
RF3C1
RTOUT
1.7max
12 11
2.8max
1.0
48
13
0.75
SANYO: SQFP48
No. 6928-2/33
4.7k 0.1F 0.1F 0.1F 10F 220pF 68k 1F 10F 10F LF1C1 LF1C2 LF1C3 LTIN LVRIN LCT LTOUT LCOM LVROUT LSELO
34 33 32 31 30 29 28 27 26 25 24 23
[LC75411ES]
[BASS fo=100Hz]
[TREBLE]
1F 4 LVref
22
L4 LVref
10F
PA
35
L3
36
L2 LVref
37
20
VSS CL
19
10F
L1
Multiplexer
ZEROCROSS DET
38
CL
CCB INTERFACE
18
VDD LVref
CONTROL CIRCUIT LOGIC CIRCUIT Multiplexer
ZEROCROSS DET
39
DI CE
17
DI CE VDD
NO SIGNAL TIMER
16
Microcontroller
22F RVref
Vref
40
LC75411ES, 75411WS
R1 RVref
41
TEST TIM
15
R2
42
R3 RVref
RROUT
14
0.033F
PA
43
R4
RFOUT RVref
13
10F
PA
44
12
RFIN
10F
10
11
RTIN
RF1C1
RF1C2
RF1C3
RCT
RCOM
RTOUT
RVROUT
RF3C1 2700pF
220pF
RSELO 1F
No. 6928-3/33
[TREBLE]
0.1F 4.7k 68k 1F 220pF LVROUT LVRIN LCOM 10F 10F 0.1F LF1C1 LF1C2
2700pF
0.1F LTOUT
24
10F LF3C1
LTIN
LF1C3
33
32
31
30
29
28
27
26
25
LFIN
23 22 21 20 19 18
LCT
34 35 36 37 38 39 40 41 42 43 44 1 2 3 4 5 6 7 8 9 10 11
10F
PA PA
10F
Microcontroller
LC75411ES
17 16 15 14 13 12
0.033F 10F
PA PA
10F
RSELO
RCT
RCOM
RVROUT
RF1C1
RF1C2
RF1C3
RF3C1
RTOUT 10F
RVRIN
10F
RTIN
0.1F 0.1F
2700pF
No. 6928-4/33
LVROUT
LCOM
LTIN
LCT
LTOUT
26
LSELO
LF1C1
LF1C2
LF1C3
LF3C1
LVRIN
36
35
34
33
32
31
30
29
28
27
L4 37 L3 38 L2 39 L1 40 NC 41 VDD 42 Vref 43 NC 44 R1 45 R2 46 R3 47 R4 48
1 2 3 4 5 6 7 8 9 10 11 12
LC75411WS
NC
18 CE 17 TEST 16 TIM 15 RROUT 14 RFOUT 13 RFIN
RSELO
RCT
RCOM
RVROUT
RF1C1
RF1C2
RF1C3
RF3C1
RTOUT
RVRIN
RTIN
NC
No. 6928-5/33
[LC75411WS]
0.1F
[BASS fo=100Hz]
[TREBLE]
1F LF1C1 LF1C2 LF1C3 LF3C1 LTOUT LTIN LSELO LCOM LCT LVROUT LVRIN
36 35 34 33 32 31 30 29 28 27 26
1F 4
24
L4 LFOUT LROUT
22
37
LFIN 10F
PA
LVref
L3
23
38
L2
LVref
39
PA
L1 LVref
40
21
VSS CL
20
10F
NC 41
Multiplexer
ZEROCROSS DET
CL
CCB INTERFACE
19
VDD LVref
CONTROL CIRCUIT LOGIC CIRCUIT Multiplexer
ZEROCROSS DET
42
DI CE
18
DI CE VDD
NO SIGNAL TIMER
17
Microcontroller
Vref
43
NC 44
TEST TIM
16
LC75411ES, 75411WS
R1
45
R2 RVref
RROUT
15
0.033F
PA
46
R3
RFOUT RVref
14
10F
PA
47
R4
48
13
RFIN
10F
10
11
12
NC
RTIN
RVROUT
RF1C1
RF1C2
RF1C3
RF3C1
RCT
RCOM
RVRIN 10F
RTOUT
2700pF
1F 68k 220pF
RSELO 4.7k
0.1F
No. 6928-6/33
[BASS fo=100Hz]
[TREBLE]
0.1F 4.7k 68k 220pF 1F LVROUT LSELO LVRIN LCOM 10F 10F 0.1F LF1C1 LF1C2
2700pF
0.1F LTOUT
26
10F LF3C1
LTIN
LF1C3
LCT
36
35
34
33
32
31
30
29
28
27
25 24 23 22 21 20 19
1F 1F 1F 1F
L4 L3 L2 L1
NC
37 38 39 40
LFIN LFOUT LROUT VSS CL DI CE TEST TIM RROUT RFOUT RFIN 10F 10F
PA PA
10F
PA PA
10F
LC75411WS
Microcontroller
18 17 16 15 14 13
NC 44 1F 1F 1F 1F R1 R2 R3 R4
45 46 47 48 1 2 3 4 5 6 7 8 9 10 11 12
RSELO
RVRIN
RVROUT
RTIN
RTOUT
RCT
RCOM
RF1C1
RF1C2
RF1C3
RF3C1
1F 220pF 68k
10F 10F
0.1F 0.1F
10F
NC
No. 6928-7/33
LC75411ES, 75411WS
Specifications
Absolute Maximum Ratings at Ta = 25C, VSS = 0 V
Parameter Maximum supply voltage Maximum input voltage Allowable power dissipation Operating temperature Storage temperature Symbol VDD max VIN max Pd max Topr Tstg VDD All input pins Ta 85C, when mounted on board LC75411ES LC75411WS Conditions Ratings 11 VSS 0.3 to VDD + 0.3 600 550 40 to +85 50 to +125 Unit V V mW C C
No. 6928-8/33
LC75411ES, 75411WS
Continued from preceding page.
Parameter [Fader Block] Input resistance Rfed LFIN, RFIN 0dB to 2dB Step setting error ATerr 2dB to 20dB 20dB to 30dB 30dB to 60dB L/R balance [General] Total harmonic distortion Input crosstalk L/R crosstalk Maximum attenuated output THD (1) THD (2) CT CT VIN = 10dBV, f = 1 kHz VIN = 10dBV, f = 10 kHz VIN = 1Vrms, f = 1 kHz VIN = 1Vrms, f = 1 kHz 80 80 80 90 0.004 0.006 88 88 88 95 5 7 33 CL, DI, CE, VIN = 9 V CL, DI, CE, VIN = 0 V THD = 1%, RL = 10 k flat overall, fIN = 1 kHz 10 2.5 2.9 10 15 40 10 0.01 0.01 % % dB dB dB dB V V mA A A Vrms BAL 25 50 100 0.5 1 2 3 0.5 k dB dB dB dB dB Symbol Pin Name Conditions Ratings min typ max Unit
Vomin (1) VIN = 1Vrms, f = 1 kHz VIN = 1Vrms, f = 1 kHz Vomin (2) INMUTE, fader VN (1) VN (2) IDD IIH IIL VCL Flat overall, IHF-A filter Flat overall, 20 to 20 kHzBPF
Output noise voltage Current drain Input high-level current Input low-level current Maximum input voltage
Control Timing and Data Format To control the LC75411ES and LC75411WS input specified serial data to the CE, CL, and DI pins. The data configuration consists of a total of 52 bits broken down into 8 address bits and 44 data bits.
CE DI CL
B0 B1 B2 B3 A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D38 D39 D40 D41 D42 D43
CE
1s min
1s min
CL
DI
1s min TDEST
No. 6928-9/33
LC75411ES, 75411WS Address code (B0 to A3) The LC75411ES and 75411WS use 8-bit address code and can be used in common with ICs that support SANYOs CCB serial bus. Address Code
(LSB) B0 1 B1 0 B2 0 B3 0 A0 0 A1 0 A2 0 A3 1 (81HEX)
0 1
1 1
1 1
D3
No. 6928-10/33
No. 6928-11/33
No. 6928-12/33
No. 6928-13/33
No. 6928-14/33
D20 0
D21 0
D22 0
D23 0
D41 0 Set to 0
Setting
No. 6928-15/33
Loudness Control
D35 0 1 Setting OFF ON
Zero-Cross Control
D36 0 1 D37 0 1 Setting Data write through zero-cross detection Zero-cross detection stopped (data write at falling edge of CE)
No. 6928-16/33
L1 L2 L3 L4 R1 R2 R3 R4
VDD
LSEL0 RSEL0
34 1
36 1
VDD
LVRIN RVRIN
33 2
35 2
LVref RVref
VDD
LCT RCT 32 3 34 3 Loudness pins. Connect high-pass compensation RC between LCT (RCT) and LVRIN (RVRIN), and connect low-pass compensation RC between LCT (RCT) and GND.
VDD
LCOM RCOM 31 4 33 4 2-dB stop volume output pins. Connect these pins to GND through coupling capacitors to reduce switching noise.
VDD
LVROUT RVROUT 30 5 32 5 0.5-dB step volume output pin
VDD
LTIN RTIN 29 6 31 6
No. 6928-17/33
LC75411ES, 75411WS
Continued from preceding page.
Pin Name Pin No. LC75411ES LC75411WS Function Equivalent circuit
28 27 26 7 8 9
30 29 28 7 8 9 Equalizer F1 band filter configuration capacitor connection pins. Connect capacitor between LF1C1 (RF1C1) and LF1C2 (RF1C2) LF1C2 (RF1C2) and LF1C3 (RF1C3)
Vref
VDD
FnC2
VDD
LF3C1 RF3C1
25 10
27 10
Equalizer F3 band circuit filter configuration capacitor connection pins. Connect high-pass compensation capacitor between LF3C1 (RF3C1) and VSS.
VDD C1
VDD
LTOUT RTOUT 24 11 26 11 Equalizer output pins
VDD
LFIN RFIN 23 12 24 13 Fader block input pins Drive at low impedance.
VDD
LFOUT LROUT RFOUT RROUT 22 21 13 14 23 22 14 15 Fader output pins. Attenuation is possible separately for the front end and rear end. The attenuation amount is the same for L and R.
VDD
Vref
40
43
Connect a capacitor of a few tens of F between Vref and VSS as a 0.55 VDD voltage generator, current ripple countermeasure.
No. 6928-18/33
LC75411ES, 75411WS
Continued from preceding page.
Pin Name Pin No. LC75411ES LC75411WS Function Equivalent circuit
VDD
39
42
VSS
20
21
Ground pin
VDD
TEST 16 17 Dedicated IC test pin Normally this pin is used connected to GND.
VDD
TIM 15 16 Timer pin when there is no signal in the zero-cross circuit. Forcibly set data when there is no zero-cross signal, from the time the data is set until the timer ends.
CL DI
19 18
20 19
Input pin for serial data and clock used for control
VDD
CE
17
18
Chip enable pin. Data is written to the internal latch and the analog switches are operated when the level changes from High to Low. Data transfer is enabled when the level is High.
No. 6928-19/33
LC75411ES, 75411WS Internal Equivalent Circuit Block Diagram Selector Block Equivalent Circuit Block Diagram
L4 50k LVref L3 50k LVref L2 50k LVref L1 50k LVref INMUTE SW 0dB 6.702k 1.25dB 5.804k 2.50dB 5.026k 3.75dB 4.352k 5.00dB 3.769k 6.25dB 3.264k 7.50dB 2.826k 8.75dB 2.447k 10.0dB LVref 11.25dB Total resistance: 50 k Same for right channel Unit (Resistance: ) 1.835k 12.5dB 1.589k 13.75dB 1.376k 15.0dB 1.192k 16.25dB 1.032k 17.5dB 0.894k 18.75dB 5.774k LVref 2.119k
LSELO
No. 6928-20/33
LVRIN 0dB 41.139k 32.678k 25.957k 20.618k 16.378k 13.009k Total resistance of 195 k over tap 10.334k 8.208k 16dB 6.520k 18dB 5.179k Initial setting switch 4.114k 22dB 3.268k 2.596k 2.062k 1.638k 1.301k LCT 6.344k 5.040k 5.750k 4.003k 3.180k 2.526k 2.006k 1.594k 1.266k Total resistance of 30.847 k under tap 1.006k 0.799k 52dB 0.634k 0.504k 0.400k 0.318k 60dB 0.253k 0.201k 64dB 0.159k 0.127k 68dB 0.101k 0.080k 72dB 0.063k 0.050k 76dB 0.040k 78dB 0.154k dB LVref 74dB 70dB 66dB 62dB 56dB 58dB 54dB 48dB 50dB 40dB 42dB 44dB 46dB 32dB 34dB 36dB 38dB 24dB 26dB 28dB 30dB Same for right channel Unit (Resistance: ) 20dB 2dB 4dB 6dB 8dB 10dB 12dB 14dB To left channel 0.5dB block
No. 6928-21/33
LCOM
No. 6928-22/33
LTOUT
SW2 SW1
SW3 SW1
SW2
SW3
0.027k 12dB 3.373k 10dB 4.246k 8dB 5.346k 6dB 3.172k 5dB 3.558k 4dB 3.993k 3dB 4.480k 2dB 5.027k 1dB 5.640k 0dB
SW4
12.840k 12dB 3.373k 10dB 4.246k 8dB 5.346k 6dB 3.172k 5dB 3.558k 4dB 3.993k 3dB 4.480k 2dB 5.027k 1dB 5.640k 0dB
SW4
6.50k
LF1C1
LF1C2
LF1C3
LF3C1
Unit: Total resistance: 38.861 k Same for right channel During boost, SW 1 and SW 3 are ON, during cut SW 2 and SW 4 are ON, and when 0 dB, 0 dB SW and SW 2 and SW 3 are ON.
No. 6928-23/33
LC75411ES, 75411WS Tone Circuit Constant Calculation Example Bass Band Circuit The equivalent circuit and the formula for calculating the external RC with a mean frequency of 100 Hz are shown below. Bass band equivalent circuit block diagram
C1
R1
R2
C2
R3
Calculation example Specification Mean frequency: f0 = 100 Hz Gain during maximum boost: G = 12 dB Let us use R1 = 0, R2 = 38.861 k, R3 = 6.5 k (assuming R1 = 0 during maximum boost) , and C1 = C2 = C. 1. We obtain C from mean frequency f0 = 100 Hz, as follows.
f0= C=
1 2 R3R2C1C2
2. We obtain Q as follows.
Q=
No. 6928-24/33
LC75411ES, 75411WS Treble Band Circuit The shelving characteristics for the treble band can be obtained. The equivalent circuit and the calculation formula during boost are shown below.
R1
R2
Calculation example Specification Setting frequency: f = 26000 Hz Gain during maximum boost: G = 12 dB Let us use R1 = 12.840 k and R2 = 38.861 k The above constants are inserted in the following formula.
G = 20 LOG10 1 +
R2 R12 + (1 / C ) 2
C= 2f ( 10
1 R2
G / 20
) 2 R12 1
= 2 26000
38861 3.981 1
2700(pF) 12840 2
No. 6928-25/33
LVref When data is sent to the main volume 0.5dBSTEP, S1 and S2 become open, and S3 and S4 simultaneously become ON.
No. 6928-26/33
LC75411ES, 75411WS Usage Cautions (1) Data transmission at power ON The status of internal analog switches is unstable at power ON. Therefore, perform muting or some other countermeasure until the data has been set. At power ON, initial setting data must be sent once in order to stabilize the bias of each block in a short time.
(2) Description of zero-cross switching circuit operation The LC75411ES and 75411WS have a function to switch zero-cross comparator signal detection locations, enabling the selection of the optimum detection location for blocks whose data is to be updated. Basically, the switching noise can be minimized by inputting the signal immediately following the block whose data is to be updated to the zerocross comparator, so it is necessary to switch the detection location every time.
Selector
Volume
Tone
Fader
No. 6928-27/33
LC75411ES, 75411WS (3) Zero-cross switching control method The zero-cross switching control method consists of setting the zero-cross control bits to the zero-cross detection mode (D36, D37 = 0), and specifying the detection blocks (D38, D39) before transmitting the data. These control bits are latched immediately following data transfer, that is to say beforehand in sync with the falling edge of CE, so when updating data of volumes, etc., it is possible to perform mode setting and zero-cross switching with one data transfer. An example of control when updating the data of the volume block is shown below.
D36 0 D37 0 D38 1 Volume block setting D39 0
(4) Zero-cross timer setting If the input signal becomes lower than the zero-cross comparator detection sensitivity, or if only low-frequency signals are input, zero-cross detection continues to be impossible, and data is not latched during this time. The zero-cross timer can set a time for forcible latch during such a status when zero-cross detection is not possible. For example, to set 25 ms, using T = 0.69CR and C = 0.033 F, we obtain
R=
25 10 3 0.69 0.033 10 6
1.1 M
(5) Cautions related to serial data transfer 1. To ensure that the high-frequency digital signals transferred to the CL, DI, and CE pins do not spill over to the analog signal block, either guard these signal lines with a ground pattern, or perform transmission using shielded wires. 2. The data format of the LC75411ES and 75411WS uses 8-bit addresses and 44-bit data. When sending data using multiples of 8 (when sending 48 bits), use the method described in Figure 1. Method for Receiving Data Using Multiple of 8 of LC75411ES and 75411WS
D0
D1
D2
D3
D36
D37
D38
D39
D40
D41
D42
D43
Dummy data
Figure 1
No. 6928-28/33
LC75411ES, 75411WS
Output level dB
Step setting dB
Output level dB
Step setting dB
Fader block
Attenuation dB
Attenuation dB
Fader block
Fader block
LC75411ES, 75411WS
Step setting dB
Step setting dB
Fader block
Frequency, f dB
Frequency, f dB
Fader block
THD METER
Fader block
Input gain gain block block Input Input gain gain block block Input
LC75411ES VDD=9V 80kHz LPF Input L1, Output LFOUT With MV=0dB
Main volume volume block block Main Main volume volume block block Main
Supply voltage V
Fader block block Fader Fader block block Fader LC75411ES 80kHz LPF Input L1 Output LFOUT
LC75411WS VDD=9V 80kHz LPF Input L1, Output LFOUT With MV=0dB
Supply voltage V
THD METER THD METER Input gain gain block block Input Main volume volume block block Main Graphicequalizer equalizerblock block Graphic Fader block block Fader THD METER LC75411WS 80kHz LPF Input L1 Output LFOUT
LC75411ES, 75411WS
THD METER
No. 6928-31/33
LC75411ES, 75411WS
Bass Control Characteristics
LC75411ES VDD=9V VIN=20dBV Input L1 Output LFOUT Level dB Level dB
Frequency, f Hz
Frequency, f Hz
Frequency, f Hz
Frequency, f Hz
Level dB
Frequency, f Hz
Level dB
Frequency, f Hz
Level dB
Frequency, f Hz
Level dB
LC75411ES, 75411WS
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customers products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customers products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the Delivery Specification for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of June, 2001. Specifications and information herein are subject to change without notice. PS No. 6928-33/33
This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.