Microcontroller PIC16F84

The PIC16F84 has a RISC architecture compared to Von-Neumann. In Har ard architecture! data "us and address "us are separate. Thus a #reater $%o& o$ data is possi"%e throu#h the centra% processin# unit! and o$ course! a #reater speed o$ &or'. Separatin# a pro#ram $rom data memor( ma'es it $urther possi"%e $or instructions not to ha e to "e 8-"it &ords. PIC16F84 uses 14 "its $or instructions &hich a%%o&s $or a%% instructions to "e one &ord instructions. It is a%so t(pica% $or Har ard architecture to ha e $e&er instructions than on-Neumann)s! and to ha e instructions usua%%( e*ecuted in one c(c%e. +icrocontro%%ers &ith Har ard architecture are a%so ca%%ed ,RISC microcontro%%ers,. RISC stands $or Reduced Instruction Set Computer. +icrocontro%%ers &ith on-Neumann)s architecture are ca%%ed )CISC microcontro%%ers). Tit%e CISC stands $or Comp%e* Instruction Set Computer. Since PIC16F84 is a RISC microcontro%%er! that means that it has a reduced set o$ instructions! more precise%( -. instructions. /%% o$ these instructions are e*ecuted in one c(c%e e*cept $or instructions &here the Pro#ram Counter does not mo e to the ne*t address 0e.#. 12T2! R3T4RN etc5. The PIC16F84 "e%on#s to a c%ass o$ 8-"it microcontro%%ers o$ RISC architecture. Its #enera% structure is sho&n in the $o%%o&in# dia#ram! representin# "asic "%oc's.

Program memory 0F6/SH5- $or storin# a &ritten pro#ram. Since memor( made in F6/SH techno%o#( can "e pro#rammed and c%eared more than once! it ma'es this microcontro%%er suita"%e $or de ice de e%opment. EEPROM - data memor( that needs to "e sa ed &hen there is no supp%(. It is usua%%( used $or storin# important data that must not "e %ost i$ po&er supp%( sudden%( stops. For instance! one such data is an assi#ned temperature in temperature re#u%ators. I$ durin# a %oss o$ po&er supp%( this data &as %ost! &e &ou%d ha e to ma'e the ad7ustment once a#ain upon return o$ supp%(. Thus our de ice %ooses on se%$-re%iance. RAM - data memor( used "( a pro#ram durin# its e*ecution. In R/+ are stored a%% inter-resu%ts or temporar( data durin# runtime.

PORTA and PORTB are ph(sica% connections "et&een the microcontro%%er and the outside &or%d. Port / has $i e! and port 8 has ei#ht pins. FREE-RUN TIMER is an 8-"it re#ister inside a microcontro%%er that &or's independent%( o$ the pro#ram. 2n e er( $ourth c%oc' o$ the osci%%ator it increments its a%ue unti% it reaches the ma*imum 09..5! and then it starts countin# o er a#ain $rom :ero. /s &e 'no& the e*act timin# "et&een each t&o increments o$ the timer contents! timer can "e used $or measurin# time &hich is er( use$u% &ith some de ices. CENTRAL PROCESSING UNIT has a ro%e o$ connecti e e%ement "et&een other "%oc's in the microcontro%%er. It coordinates the &or' o$ other "%oc's and e*ecutes the user pro#ram.