INDEX

EXPT. No.

NAME OF THE EXPERIMENT

PAGE NO.

1.

PSUEDO RANDOM SEQUENCE GENERATOR

2.

ARITHMETIC LOGIC UNIT DESIGN

3.

DESIGN OF AMPLITUDE MODULATOR AND DEMODULATOR

4.

DESIGN OF A 4-20 mA TRANSMITTER FOR A BRIDGE TYPE

TRANSDUCER.

5.

DESIGN OF FREQUENCY MODULATOR AND DEMODULATOR

6.

DESIGN OF AC/DC VOLTAGE REGULATOR USING SCR

7.

DESIGN OF PROCESS CONTROL TIMER

8.

DESIGN OF WIRELESS DATA MODEM

9.

PCB LAYOUT DESIGN USING CAD

10.

MICROCONTROLLER BASED SYSTEMS DESIGN

11.

DSP BASED SYSTEM DESIGN FOR ECHO CANCELLATION

Expt.No.1

PSEUDO RANDOM SEQUENCE GENERATOR

AIM:
To design and construct a Pseudo Random sequence for the length of N=15 by using IC 7474.
APPARATUS REQUIRED:

Sl. No
1
2
3
4
5
6
7
8

Apparatus Name
Timer IC
D Flip flop
Bread Board
Regulated Power Supply
Cathode Ray Oscilloscope (CRO)
Digital Multimeter
CRO Probes
Connecting Wires

Range
IC NE 555
IC 74LS74
-(0-5)V / 2 A
30 MHz.

Qty.
1
2
1
1
1
1
2
few nos.

THEORY:
The PN code sequence is a Pseudo-Noise or Pseudo-Random binary sequence of 0s and 1s,
but not a real random sequence (because periodic). Random signals cannot be predicted. The PN
sequence has the statistical properties of sampled white-noise. The longer the period of the PN
spreading code will the transmitted signal be a truly random binary wave, and harder it is to detect. The
PN sequence can be classified into two ways. One is called as short code and other is called as long
code. In the short code, the PN sequence period will be equal to data symbol and in long code, the PN
sequence period is much longer then the data symbol.
The PN sequence generator designed by using shift registers made up of m flip-flops (two
memory stages) and a combinational logic circuits as its feedback. The logic circuit determines the PN
words. The length of the PN sequence is calculated from the number of memory elements (shift
registers). The length of the PN sequence can be expressed as L PN = 2 m 1, where m is the number of
flip-flops used.
When the length is exactly equal to 2

1, the PN sequence is called a maximal length

sequence or simply m-sequence. A block diagram of a maximum-length PN generator is shown in

fig.(1) with 4 bit register and one modulo-2 adder. The clock signal required for this generator is
designed by timer in astable mode. The output sequence for PN sequence with m=4 and initial
condition 0001is as shown in table (1).

The m-sequences has the following properties:

In each period of a maximum-length sequence, the number of 1s is always one more than the
number of 0s. This property is called the balance property.
Among the runs of 1s and 0s in each period of a maximal length sequence, one half the runs of
each kind are of length one, one-fourth are of length two, one-eighth are of length three, and so on as
long as these fractions represent meaningful numbers of runs. This is called the run property. By a run
we means a sub sequence of identical symbols (1s or 0s) within one period of the sequence. The
length of this sub sequence is the length of the run. For a maximal length sequence, generated by a
linear feedback shift register of length m, the total number of runs is (N+1)/2, where N=2 m-1.
The autocorrelation function of a maximum-length PN generator is periodic and binary valued.
This is called the correlation property.
Modulo-2
adder

m1

m2

m3

m4
PN
sequence

Clock
Fig. 1. Maximum-length sequence generator for m = 4
Clock
m1
m2
m3
m4
output
1
0
0
0
1
1
2
1
0
0
0
1
3
1
1
0
0
1
4
1
1
1
0
1
5
1
1
1
1
0
6
0
1
1
1
1
7
1
0
1
1
0
8
0
1
0
1
1
9
1
0
1
0
1
10
1
1
0
1
0
11
0
1
1
0
0
12
0
0
1
1
1
13
1
0
0
1
0
14
0
1
0
0
0
15
0
0
1
0
0
16
0
0
0
1
1
17
1
0
0
0
1
18
1
1
0
0
1
19
1
1
1
0
1
20
1
1
1
1
0
Table 1 Output states for PN sequence generator (m=4)

The period of the PN sequence is Tb = NTc where, Tc is the duration assigned to symbol 1 or 0
in the maximal length sequence.
Feedback logic for a desired period N:
m

feedback taps

[2,1]

[3,1]

[4,1]

[5,2], [5,4,3,2], [5,4,2,1]

[6,1], [6,5,2,1], [6,5,3,2]

[7,1], [7,3], [7,4,3,2], [7,6,4,2], [7,6,3,1], [7,6,5,2],

[7,6,5,4,2],[7,5,4,3,2,1]

As m increases the number of alternative codes is enlarged.

Clock Generator:
The clock generator is designed by a timer IC NE555 using with astable multivibrator mode
operation. The output frequency is designed for 1KHz with 50% duty cycle.
For a 50% duty cycle, the resistors R 1 and R2 are to be connected as shown in the fig.(3). The
time period for output high (TON) can be calculated from the formula, TON = 0.69RAC. The time period for
output low (TOFF) can be calculated from the formula, TOFF = 0.69RBC
The frequency of oscillation is f = 1/(TON+TOFF). This circuit will not oscillate if R 2 is greater than
0.5 R1 because the junction of R1 and R2 cannot bring pin 2 down to 1/3 Vcc and trigger the lower
comparator.
Design:
frequency f = 1/T =1.45/(RA+RB)C,
TON = 0.69RBC, TOFF = 0.69 RAC
Total Time T = 0.69(RA+RB)C
Given frequency f = 1KHz., time = 1mS.
Let C = 0.1f, RA = RB= 7.5K.
Diode OA79 is used for obtain 50% duty cycle.
The values of R1, R2 and C are calculated as R1= 12.75K, R2 = 12.75K and C = 0.1F for the
frequency of 1 KHz, from the above formula.

PN Sequence Generator:
The PN sequence is obtained by using the four D type flip flops (memory elements) are used.
The length of the PN sequence is calculated from the formula, PN Length = 2(m) 1. So, the length of the
PN sequence will be 15. The implemented circuit diagram of the PN sequence generator is as shown in
fig. (5.5).
IC 7474 is a shift register which contains two D type flip flops and IC 7486 Ex-OR gate are
used in this circuit. The clock frequency is 1 KHz. so the period of the PN chip is T PN 1CHIP = 1/ 1000 = 1
msec. The total period of the PN sequence is TPN = 15x1msec = 15msec.
The output of the PN sequence is 111101011001000111101011001000. Every 15th bit, the
PN sequence will be repeated. The balance property and run property are satisfied for the obtained PN
sequence.
PROCEDURE:
1.

Make the connections as per the circuit diagram.

2.

Switch ON the power supply and CRO.

3.

Check the output signal at the pin 3 of the clock generator.

4.

Note down the amplitude and time period of a clock signal

5.

Connect the CRO at the pin 9 of the second D flip-flop IC7474

6.

Note down the amplitude and time period of a PN sequence.

7.

Find a chip period, total length and PN sequence.

8.

Switch OFF the equipments and disconnect the connections.

GRAPH:
The input and output waveforms are plotted between time Vs amplitude in x and y axis
respectively.

RESULT:

The pseudo random sequence generator is designed for the length of N=15 and the output
waveforms are plotted.

Expt.No.2

ARITHMETIC AND LOGIC UNIT (ALU)

AIM:
To design and construct 4 bit Arithmetic and Logic Unit (ALU) using IC 74S181
APPARATUS REQUIRED:

Sl. No
1
2
3
4

Apparatus Name
4 Bit ALU
Digital IC trainer kit
Digital Multimeter
Connecting Wires

Range
74S181
-

Qty.
1
1
1
few nos.

THEORY:

An Arithmetic Logic Unit (ALU) is a device that can AND, OR, add, subtract and perform a
variety of other operations on binary words. This device can perform any one of 16 logic functions or
any one of 16 arithmetic functions on two 4bit binary words. The function performed on the two words
is determined by the logic level applied to the mode input M and by the 4 bit binary code applied to the
select inputs So to S3.
The truth table for the 74S181 is as shown in mode select function table. In this table, A
represents the 4 bit binary word applied to the A o to A3 inputs and B represents the 4 bit binary word
applied to the Bo to B3 inputs. F represents the 4 bit binary word that will be produced on the F 0 to F3
outputs. If the mode M is high, the device will perform one of 16 logic functions on the two words
applied to the A and B inputs. For example, if M is high and we make S 3 high, S2 low, S1 high and S0
high, the 4 bit word on the A inputs will be ANDed with the 4 bit word on the B inputs. The result of this
ANDing will appear on the F outputs. Each but of the A word is ANDed with this corresponding bit of
the B word to produce the result on F.
For another example, of the operations of the 74S181 suppose that the M input is high, S 3 high,
S2 high, S1 high andS0 low. According to the truth table, the device will now OR each bit in the A word
with corresponding but in the B word and give the result on the corresponding F output.
If the M input of the 74S181 is low, then the device will perform one the 16 arithmetic functions
on the A and B words. Again the result of the output will be put on the F outputs. Several 74S181 can
be cascaded to operate on words larger than 4 bits.
The ripple carry input Cn allows a carry from an operation on previous words to be included in
the current output. If the Cn input is asserted low, the carry will be added to the result of the operation
on A and B. For example, if the M input is low, S 3 high, S2 low, S1 low, S0 high and Cn is low the F
output will have the sum of A plus B plus carry.

Mode Select Function Table:

The real importance of an ALU such as the 74S181 is that it can be programmed with a binary
instruction applied to its mode and select inputs to perform many different functions on two binary
words applied to its data inputs.
Examples:
Input A = A3 A2 A1 A0,

(i) A+B

Input B = B3 B2 B1 B0,

M = H, S3 = H, S2 = H, S1 = H, S0 = L

Output F = F3 F2 F1 F0

A=1010
B=0110
F=1110

(ii) A.B

M = H, S3 = H, S2 = L, S1 = H, S0 = H

A=1010
B=0110
F=0010

(iii) A

M = H, S3 =L, S2 = H, S1 = H, S0 = L

A=1010
B=0110
F = 11 0 0

PROCEDURE:
1. Connect +5V supply to the IC 74S181.
2. Select the mode input M and select inputs S0 to S3 as per the required operation.
3. Connect the logic low/high switches to the input A0 to A3 and B0 to B3 in the IC trainer kit
4. Connect output Fo to F3 to the LEDs.
5. Select the logic switches as per the input data and verify the output from LEDs.
6. Switch OFF the trainer kit and disconnect the wires.

RESULT:

The various arithmetic and logical operations are performed with Arithmetic Logic Unit (ALU) IC
74s181. The results are verified with theoritical values.

Expt.No.3

DESIGN OF AMPLITUDE MODULATOR AND DEMODULATOR

AIM:
To design and construct a amplitude modulator circuit using an analog multiplier IC AD633 and
demodulate the signal using an envelope detector. And also calculate modulation index.
APPARATUS REQUIRED:
Sl. No
1
2
3
4
5
6
7
8
9
10
11

Apparatus Name
Analog Multiplier
Diode
Decade Resistance Box (DRB)
Capacitor
Dual Regulated Power Supply
Function Generator
Cathode Ray Oscilloscope (CRO)
Digital Multimeter
Breadboard
CRO Probes
Connecting Wires

Range
AD633
OA79
0.1F
(0-30)V / 2A
3 MHz
30Mhz
-

Qty.
1
1
1
1
1
2
1
1
1
3
few nos.

THEORY:
In the process of modulation, some characteristics of a high frequency sine wave (the carrier) is
varied in accordance with the instantaneous value of the low frequency (modulating) signal. Such a
sine wave may be represented by the equation e = E Sin (t+), where e is the instantaneous value
of the sine wave, called the carrier; E is its maximum amplitude, is the angular velocity or angular
frequency and is the phase relation with respect to some reference. Any of these last three
characteristics or parameters of the carrier may be varied by the modulating signal, giving rise to
amplitude, frequency or phase modulation respectively.
In amplitude modulation the amplitude of a carrier signal is varied by the modulating voltage,
whose frequency is invariably lower than that of the carrier. Formally AM is defined as a system of
modulation in which the amplitude of the antenna is made proportional to the instantaneous amplitude
of the modulating voltage.
Let the carrier voltage and the modulating voltage V c and Vm, be represented by v c = Vc Sin ct
and vm = VmSin mt respectively. Note that phase angle has been ignored in both expressions since it is
unchanged by the amplitude modulation process. The equation or the amplitude of the amplitude
modulated voltage is
A = Vc + vm
= Vc + Vm Sin mt
= Vc + mVc Sin mt
= Vc (1+mSin mt)

(since, m= Vm / Vc)

Amplitude of AM wave

Frequency Spectrum of AM signal

The instantaneous voltage of the resulting amplitude modulated wave is

v = A Sin
= A Sin ct
= Vc (1+m Sin mt) Sin ct

Modulation Index:
It is defined as the ratio of the maximum change in amplitude of the carrier signal to the
amplitude of the carrier signal. Modulation index is usually represented in percentage. If modulation
index is greater than 1, then it is called as over modulation. Modulation index can be represented as
m = Vm / Vc = (Vcmax Vcmin) / (Vcmax + Vcmin).
Frequency Spectrum:
AM is shown simply as consisting of three discrete frequencies of these are, the central
frequency i.e. the carrier, has the highest amplitude, and the other two are disposed symmetrically
about it, having amplitudes which are equal to each other, but which can never exceed half the carrier.
Envelope Detector:
Demodulation is the reverse process of the modulation technique. It is the process of extracting
the baseband signal from the modulated signal. The circuit used for demodulation is called as
detectors. This detector is used for high level demodulations. Here the output takes place under the
linear characteristics of the diode hence the name linear detectors. Since, this detector extracts the
envelope of the AM wave it is also called envelope detector. It is nothing but a half wave rectifier with a
RC filter.

Analog Multiplier (AD633):

The AD633 is well suited for such applications as modulation and demodulation, automatic gain
control, power measurement, voltage controlled amplifiers and frequency doublers. The AD633 is a
functionally complete, four-quadrant, analog multiplier. It includes high impedance, differential X and Y
inputs and a high impedance summing input (Z). The low impedance output voltage is a nominal 10V
full scale provided by a buried zener. The AD633 is the first product to offer these features in modestly
priced 8 lead plastic DIP and SOIC packages. The AD633 can be used a linear amplitude modulator
with no external components. The carrier and modulation inputs to the AD633 are multiplied to produce
a double-sideband signal. The carrier signal is fed forward to the AD633s Z input where it is summed
with the double-sideband signal to produce a double-sideband with carrier output.
PROCEDURE:
1. Make the connections as per the circuit diagram.
2. Switch ON the power supply, function generators and CRO.
3. Check the modulating and carrier signals at pin 1and 3 of the IC AD633.
4. Connect the CRO at the pin 7 of the multiplier IC AD633 and observe AM signal.
5. Note down the amplitude and time period of a amplitude modulated signal.
7. Connect the AM signal to input of the envelope detector.
8. Observe the demodulated signal and compare it with modulating signal.
9. Switch OFF the equipments and disconnect the connections.
10. Determine the modulation index from tabulated readings.

GRAPH:
The input and output waveforms are plotted between time Vs amplitude in x and y axis
respectively.

RESULT:

The amplitude modulator and demodulator circuits are constructed and obtained the outputs
signals. The modulation index is determined as

Expt.No.4

DESIGN OF A 4-20mA TRANSMITTER FOR A BRIDGE TYPE TRANSDUCER

AIM:
To design and construct a 4-20 mA transmitter for a bridge type transducer using resistive
transducer and operational amplifier. And plot the curve between temperature vs output current.
APPARATUS REQUIRED:
Sl. No
1
2

Apparatus Name
Operational Amplifier
Thermistor

Resistor

4
5
6
7
8
9
10
11

Dual Regulated Power Supply

Regulated power supply
Digital Multimeter
DC Voltmeter
DC Ammeter
Breadboard
Soldering Iron
Connecting Wires

Range
IC 741
100
1 K
10 K
(0-30)V / 2A
(0-30)V /2A
(0 5) V
(0 50) mA
25W
-

Qty.
4
1
1
4
7
1
1
1
1
1
1
1
few nos.

THEORY:
Wheatstone Bridge:
The Wheatstone bridge has four resistive arms, together with a source of emf (a battery)
and a null detector. The current through the null detector depends on the potential difference between
points c and d. The bridge is said to be balanced when the potential difference across the null detector
is 0V, so that there is no current through the detectors. This condition occurs when the voltage from
point c to point a equals the voltage from point d to point a or by referring to the other battery terminal,
when the voltage from point c to point b equals the voltage from point d to point b. Hence the bridge is
balanced when,
IiR1 = I2R2

. (1)

If the detector output is zero, the following condition also exist

and

I1 = I3 = V / (R1+R3)

. (2)

I2 = I4 = V / (R2+R4)

. (3)

combining and simplifying eqns. (1), (2) and (3),

R1 / (R1+R3) = R2 / (R2+R4)

. (4)

from which
R1R4 = R2R3
Equation (5) is the well known expression for balanced condition of the Wheatstone bridge.

. (5)

If three of the resistors are known values, the fourth maybe determined from eqn. (5). Hence if
R4 is the unknown resistor, its resistance Rx can be expressed in terms of the remaining resistor values
as follows Rx = R2R3/R1. Resistor R3 is called the standard arm of the bridge and resistor R 2 and R1 are
called the ratio arms.
A Thermistor is a metal oxide semiconductor whose resistance varies with temperature. For a
conductor, as its temperature is increased, its resistance will increase. However, the resistance of a
semiconductor will decrease with an increase in temperature. Over a wide range of temperature, this
change in resistance is very non-linear. However, in a restricted range of 10 C or less, it may appear
fairly linear. Because of this, Thermistors are employed in a wide range of applications as temperature
sensors.
Instrumentation Amplifier:
The instrumentation amplifier follows standard classical operational amplifier 7 resistor
configuration. Op-amps A1 and A2 are connected basically in non-inverting amplifier configuration. The
only change in that instead of grounding inverting terminals of both op-amps as in non-inv fashion, they
are connected to the resistor Rg effectively. The inverting terminal of op=amp A1 is fed by a voltage Vin1
through Rg and the inverting terminal of op-amp A 2 is fed by a voltage Vin 2 through Rg. This is obvious
by virtual ground concept. Applying the current, the output of op-amp A1 and A2 can be written as,
Vout1 = (1+R2/Rg) Vin1 (R2/Rg) Vin2

. (6)

Vout2 = (1+R2/Rg) Vin2 (R2/Rg) Vin1

. (7)

The differential gain of the stage containing op=amp A1 and A2 is,

(Vout2 Vout1) / (Vin2 Vin1) = 1 + (2R2/Rg)

. (8)

Op-amp A3 is connected as a differential amplifier with a gain of R f / R1. The overall gain of the
two stage cascade is,
Vout /(Vin2 Vin1) = (1+2R2/Rg) (Rf/R1)

.(9)

Select resistor values of R1,R2 and Rf as equal for the sake of simplicity, then
Vout /(Vin2 Vin1) = (1+2R2/Rg) (Rf/R1)
or

G = (1+2R2/Rg) or Rg = 2R/(G-1)

. (10)

The gain may be easily adjusted without disturbing circuit symmetry by varying the resistance Rg.
Current Amplifier:
In many applications one may have to convert a voltage signal to a proportional output current.
For this there are two types of circuits possible.
(i)

V-I converter with floating load

(ii)

V-I converter with grounded load.

V-I converter with floating load

Since, voltage at node a is v, therefore vi = iLR1 = (as IB+ = 0)
or iL = vi/R1
That is the input voltage vi is converted into an output current of vi/R1. It may be seen that the
same current flows through the signal source and load and therefore, signal source should be capable
of providing this load current.

PROCEDURE:
1. Make the connections as per the circuit diagram.
2. Switch ON the power supply and set +Vcc and Vcc for op-amps.
3. Apply + 3V DC voltage to bridge circuit.
4. Connect the ammeter at the output of V-I converter.
5. Connect voltmeter at the output of instrumentation amplifier.
6. Switch ON the soldering iron and keep near to Thermistor.
7. Touch the Thermistor by multimeter (in temperature mode) leads.
8. Observe the temperature value and corresponding out put current.
9. Tabulate the readings and switch OFF the equipments.
GRAPH:
The waveform is plotted between temperature Vs current in x and y axis respectively.

Result:

The 4-20mA transmitter for a bridge type transducer is designed and constructed. The output
current is measured for various temperatures and the curve is plotted.

Expt.No.5

DESIGN OF FREQUENCY MODULATOR AND DEMODULATOR

AIM:
To design and construct a frequency modulator and demodulator circuits using VCO and PLL
ICs.
APPARATUS REQUIRED:
Sl. No
1
2

Apparatus Name
Voltage Controlled Oscillator (VCO)
Phase Locked Loop (PLL)

Resistor

Capacitor

5
6
7
8
9
10
11

Breadboard
Function Generator
Dual Regulated Power Supply
Regulated Power Supply
CRO
CRO Probes
Connecting Wires

Range
LM 566
NE 565
500 , 10 K
1.5 K, 2.2 K,
33 K
471pF
0.1F, 0.01 F
3 MHz
(0-30V) / 2A
(0-30V) / 2A
30 MHZ
-

Qty.
1
1
2
1
3
1
1
1
1
1
1
3
few nos.

THEORY:

In the process of modulation, some characteristics of a high frequency sine wave (the carrier) is
varied in accordance with the instantaneous value of the low frequency (modulating) signal. Such a
sine wave may be represented by the equation e = E Sin (t+), where e is the instantaneous value
of the sine wave, called the carrier; E is its maximum amplitude, is the angular velocity or angular
frequency and is the phase relation with respect to some reference. Any of these last three
characteristics or parameters of the carrier may be varied by the modulating signal, giving rise to
amplitude, frequency or phase modulation respectively.
Frequency Modulation:
Frequency modulation is the process of varying the frequency of a carrier wave in proportion to
the instantaneous amplitude of the modulating signal without any variation in the amplitude of the
carrier wave. Because the amplitude of the wave remains unchanged, the power associated with an
FM wave is constant. When the modulating signal is zero, the output frequency equals fc (centre
frequency).When the modulating signal reaches its positive peak, the frequency of the modulated
signal is maximum and equals(fc + fm). At negative peaks of the modulating signal, the frequency of
the FM wave becomes minimum and equal to (fc - fm).Thus, the process of frequency modulation
makes the frequency of the FM wave to deviate from its centre frequency (fc). By an amount ( + or - f)
where f is termed as the frequency deviation of the system. During this process, the total power in the
wave does not change but a part of the carrier power is transferred to the side bands.

The frequency modulated waveform has the following characteristics:

1. It is constant in amplitude but varies in frequency.
2. The rate of carrier deviation is the same as the frequency of the modulating signal.
3. The amount of carrier deviation is directly proportional to the amplitude of the modulating
signal.
There are basically two methods of generating an FM signal: the direct method and the indirect
method. In the direct method, the carrier frequency is directly varied in accordance with the input
modulating signal. In the indirect method, a narrowband FM signal is generated using a balanced
modulator, and frequency multiplication is used to increase both the frequency deviation and the carrier
frequency to the required level.
Direct Method:
In this method, voltage-controlled oscillators (VCOs) are used to vary the frequency of the
carrier signal in accordance with the baseband signal amplitude variations. These oscillators use
devices with reactance that can be varied by the applications of a voltage, where the reactance causes
the instantaneous frequency of the VCO to change proportionally. The stability of the VCO can be
improved by incorporating a phase locked loop which locks the center frequency to a stable crystal
reference frequency.
Voltage Controlled Oscillator (LM566):
The LM566 is a general purpose voltage controlled oscillator which may be used to generate
square and triangular waves, the frequency of which is a very linear function of a control voltage. The
frequency is also a function of an external resistor and capacitor.
The output of the VCO can be changed either by (i) RT (ii) CT or (iii) the voltage vc at the
modulating input terminal pin 5. The voltage v c can be varied by connecting a resistor R 1 and R2. The
components of RT and CT are first selected so that VCO output frequency lies in the center of the
operating frequency range. The voltage vc at the modulating input terminal pin 5 is calculated from the
following formula
vc = [R3 /(R2+R3)] VCC
The VCO output frequency fO can be calculated as
fo = (2/RTCT) (VCC vc / VCC)
Side Bands:
The quantity it is carried the frequency deviation, represents the maximum departure of
the instantaneous frequency of the FM signal from the carrier frequency f c. The ratio of the deviation f
to the modulation frequency fm is commonly called the modulation index () of the FM signal.
= f / fm

Depending on the value of the modulation index , we may distinguish two cases of frequency
modulations. Narrowband FM, for which is small compared to one radiation and wideband FM, for
which is large compared to one radiation
Bandwidth:
The FM signal contains an infinite number of side frequencies so that the band width required to
transmit such a signal is similarly infinite in extent.

The transmission bandwidth of an FM signal

generated by a single tone modulating signal of frequency fm as follows;

BT = 2f + 2fm = 2f (1+1/ )
FM Detection Techniques:
There are many ways to recover the original information from an FM signal. The objective of all
FM demodulators is to produce a transfer characteristic that is the inverse of that of the frequency
modulator. That is, a frequency demodulator should produce an output voltage with instantaneous
amplitude that is directly proportional to the instantaneous frequency of the input FM signal. Various
techniques such as slope detection, zero crossing detection, phase locked discrimination and
quadrature detection are used to demodulate FM.
PLL for FM Detection:
The PLL method is one of the popular techniques to demodulate an FM signal. The PLL is a
closed loop control system which can track the variations in the received signal phase and frequency.
The output of the VCO is compared with the input signal using a phase comparator, which produces an
output voltage proportional to the phase difference. The phase difference signal is then fed back to the
VCO to control the output frequency. The feedback loop functions in a manner that facilities locking of
the VCO frequency to the input frequency. Once the VCO frequency is locked to the input frequency,
the VCO continues to track the variations in the input frequency. Once this tracking is achieved, the
control voltage to the VCO is simply the demodulated FM signal.
Phase Locked Loop (LM565):
The LM565 is a general purpose phase locked loops containing a stable, highly linear voltage
controlled oscillator for low distortion FM demodulation, and a double balanced phase detector with
good carrier suppression. The VCO frequency is set with an external resistor and capacitor, and a
tuning range of 10:1 can be obtained with the same capacitor. The characteristics of the closed loop
system bandwidth, response speed, capture and pull in range may be adjusted over a wide range with
an external resistor and capacitor. The loop may be broken between the VCO and the phase detector
for insertion of a digital frequency divider to obtain frequency multiplication. The free running frequency
of the VCO is determined by fo = 0.3 / RTCT

PROCEDURE:
1. Make the connections as per the circuit diagram.
2. Switch ON the power supply, function generator and CRO.
3. Set the modulating signal (sine) in the function generator.
4. Observe modulating and carrier signals from the VCO IC in CRO.
5. Connect the CRO at appropriate points to measure the amplitude and time period of the above
signals.
6. Connect the CRO at the VCO output point and observe the waveform.
7. Connect the FM signal to PLL circuit as a input signal.
8. Observe the demodulated signal and compare it with modulating signal.
9. Switch OFF the equipments and disconnect the connections.

GRAPH:
The input and output waveforms are plotted between time Vs amplitude in x and y axis
respectively.

RESULT:

The frequency modulator and demodulator circuits are constructed and the outputs signals are
obtained.

Expt.No.6

DESIGN OF AC/DC VOLTAGE REGULATOR USING SCR

AIM:
To construct and obtain the output s for AC and DC voltage regulator circuits using SCR.
APPARATUS REQUIRED:
Sl. No
1
2
3
4
5
5
6
7
8
9

Apparatus Name
Transformer
SCR
Diode
Resistor
Capacitor
Breadboard
Digital Multimeter
CRO
CRO Probes
Connecting Wires

Range
(0-12)V / 500mA
TY 604
IN 4007
220/0.5W
1F/ 25V
30 MHZ
-

Qty.
1
1
5
2
1
1
1
1
2
few nos.

THEORY:
Both AC and DC voltages can be regulated using SCR. The SCR is switched ON and OFF to
regulate the output voltage both in AC and DC voltage regulators. There are two different types of
thyristor control used in practice to control the ac power flow

On-Off control
Phase control

These are the two ac output voltage control techniques.

In On-Off control technique Thyristors are used as switches to connect the load circuit to the ac
supply (source) for a few cycles of the input ac supply and then to disconnect it for few cycles. In phase
angle control, thyristor switches connect the load to the AC source for a portion of each cycle of input
voltage.
TYPE OF AC VOLTAGE CONTROLLERS
The ac voltage controllers are classified into two types based on the type of input ac supply
applied to the circuit.
Single Phase AC Controllers.
Three Phase AC Controllers.
Single phase ac controllers operate with single phase ac supply voltage of 230V RMS at 50Hz
in our country. Three phase ac controllers operate with 3 phase ac supply of 400V RMS at 50Hz supply
frequency.
Each type of controller may be sub divided into

Uni-directional or half wave ac controller.

Bi-directional or full wave ac controller.

In brief different types of ac voltage controllers are

Single phase half wave ac voltage controller (uni-directional controller).

Single phase full wave ac voltage controller (bi-directional controller).
Three phase half wave ac voltage controller (uni-directional controller).

Three phase full wave ac voltage controller (bi-directional controller).

APPLICATIONS OF AC VOLTAGE CONTROLLERS

Lighting / Illumination control in ac power circuits.

Induction heating.

Industrial heating & Domestic heating.

Transformer tap changing (on load transformer tap changing).

Speed control of induction motors (single phase and poly phase ac induction motor control).

AC magnet controls.

AC voltage regulator:
The circuit of a 180 variable half wave rectifier is as shown in fig. It is also called 180 variable
phase control circuit. In this circuit, a capacitor (C) has been added between the variable resistance (R)
and the cathode of SCR. The combination of resistance (R) and capacitor (C) forms a phase shift
network. This network delays the point at which SCR will trigger on the positive half of the applied
voltage. The delay is provided by charging of the capacitor through the resistance R. This allows the
firing angle to be controlled from 0 upto a maximum of 180.
The waveforms of input voltage (Vin), capacitor voltage (Vc) and load voltage (IL) are as shown in
graphical representation. It may be noted that capacitor voltage lags behind the input voltage. Their
phase relationship is given by the relation, VC = Vin / (1+RC).
It may be noted from the above expression that if the value of RC is much smaller than unity,
then the capacitor voltage (Vc) and the input voltage (Vin) are in phase with each other. As a result of
this, the firing will occur almost immediately after the input voltage is positive (i.e. =0, =180). On the
other hand, if the value of RC is much larger than unity, then capacitor voltage is delayed by
practically 90 from the input voltage and is much reduced in amplitude. This allows the firing to be
delayed to almost the end of half a cycle (i.e. =180, =0).
DC voltage regulator:
The DC voltage regulator is constructed with the help of full wave rectifier and SCR. The
working of SCR full wave rectifier circuit may be understood from the following discussion. When the
terminal A is positive, the current will flow through the diode D 1 through SCR, then through load
resistance and then finally through diode D2 it passes to terminal B. However, if the terminal B is
positive, the current will flow through diode D 3, SCR, load resistance, diode D4 and then finally to
terminal A. Thus the four diodes forming a bridge provide full-wave rectification, while the SCR controls
the amount of voltage applied to the load. The amount of voltage applied to the load may be controlled

by adjusting the firing angle of the SCR. This can be achieved by adjusting the gate current supplied by
the control circuit.

Silicon Controlled Rectifier (SCR):

A thyristor is a four layer PNPN device, which has three PN junctions. It has two stable
switching states, namely the ON or conducting state and the OFF or non conducting state. There is no
other stale state in between these two, as in bipolar and field effect transistor, The thyristors are used
as switches in a variety of industrial applications such as control of ac power top the load, motor speed
control, light dimmers etc.
Unidirectional:
The thyristor, which conduct in forward dimensions only are known as unidirectional thyristors.
Examples of such thyristors are silicon controlled rectifier (SCR), Light Activated Silicon Controlled
Rectifier (LASCR) and Silicon Controlled Switch (SCS).
Bidirectional:
The thyristor which can conduct in forward as well as reverse directions are known as
bidirectional thyristors. The examples of the thyristors are Triode AC switch (TRIAC). The thyristors
require a control signal to switch from the non- conducting to the conducting state. The devices which
generate such signals are called triggering devices.
PROCEDURE:
1. Make the connections as per the circuit diagram.
2. Switch ON the transformer and CRO.
3. Connect the CRO at the appropriate points to observe the input voltage, load voltage and capacitor
Voltage.
4. Note down the amplitude and time period for the above waveforms.
5. Tabulate the reading and calculate the following parameters; Vm, Vdc, Idc, and .
GRAPH:
The wave forms of input voltage, across load resistance and across SCR are plotted between
time Vs amplitude in x and y axis respectively.

RESULT:

The AC and DC voltage regulator circuits using SCR are constructed and obtained the outputs.
The firing angle () and conduction angle () for AC voltage regulator is obtained as () ..and ()
. And for DC voltage regulator () ..and ().

Expt..No. 7

DESIGN OF PROCESS CONTROL TIMER

AIM:

To design and construct a sequential timer to switch ON and OFF for three relays

in a

particular sequence using timer IC.

APPARATUS REQUIRED:
Sl. No
1
2
3
4
5

Apparatus Name
Timer IC
NAND Gate
Decade Counter
Relay
Diode

Resistor

7
8
9
10
11
12
13

Capacitor
Transistor
Breadboard
Mini Fan
Dual Regulated Power Supply
Digital Multimeter
Connecting Wires

Range
NE555
74LS00
CD 4017
12V
IN 4007
OA 79
72 K
10 K
0.01F, 10 F
BC 547
12V
(0-30)V / 2A
-

Qty.
1
1
3
3
3
1
2
3
1
3
1
3
1
1
few nos.

THEORY:

Process control timers are used in industries in a variety of applications. Customized timer
configurations are required to undertake specific tasks. Sequential timer is the simplest form of the
process control timer in which many timing operations carried out sequentially one by one. Each timing
operation is kept in active condition for a predefined amount of time and then goes to off condition.
Similarly the controller activates all the operations as per the defined timings. This type of sequential
controller is required for injection moulding machine, back sealing experiments where it required to
activate solenoids, relays other activating mechanism for a predefined time sequentially one by one.
This process control timer circuit consists of One second timer, three decade dividers and three relays
with driver circuits.
Three different devices can be controlled or make to ON one by another with time based. Time
ranges, 1 Sec to 10 Sec. for first sequence devices, then 10 Sec to 100 Sec for second device and

100 Sec to 1000 Sec for third device. The One second clock pulse is applied to CD4017B counter IC
through a gated logic control circuit.

One second timer:

The one second timer (clock generator) is designed by a timer IC NE555 using with astable
multivibrator mode operation. The output frequency is designed for 1Hz (1 Sec.) with 50% duty cycle.
For a 50% duty cycle, the resistors R 1 and R2 are to be connected as shown in the circuit. The
time period for output high (TON) can be calculated from the formula, TON = 0.69RAC. The time period for
output low (TOFF) can be calculated from the formula, TOFF = 0.69RBC.
The frequency of oscillation is f = 1/(TON+TOFF). This circuit will not oscillate if R 2 is greater than
0.5 R1 because the junction of R1 and R2 cannot bring pin 2 down to 1/3 Vcc and trigger the lower
comparator.
Design:
frequency f = 1/T =1.45/(RA+RB)C,
TON = 0.69RBC, TOFF = 0.69 RAC
Total Time T = 0.69(RA+RB)C
Given frequency f = 1Hz., time = 1Sec.
Let C = 10f, RA = RB= 72.7K. (i.e. 68K + 4.7K)
Diode OA79 is used for obtain 50% duty cycle.
The values of R1, R2 and C are calculated as R1= 72.7K, R2 = 72.7K and C = 10F for the
frequency of 1 Hz, from the above formula.
Decade Counter:
CD4017B is a high voltage type decade counter with 10 decoded outputs. It is 5 stage Johnson
counter having 10 decoded outputs. Inputs include a clock, a reset, and a clock inhibit signal. Schmitt
trigger action in the clock input circuit provides pulse shaping that allows unlimited clock input pulse rise
and fall times.
This counter is advanced one count at the positive clock signal transition if the clock inhibit
signal is low. Counter advancement via the clock line is inhibited when the clock inhibit signal is high. A
high reset signal clears the counter to its zero count. Use of the Johnson counter configuration permits
high speed operation, 2 input decode-gating and spike free decoded outputs. Anti lock gating is
provided thus assuring proper counting sequence. The decoded outputs are normally low and go high
only at their respective decoded time slot. Each decoded output remains high for one full clock cycle. A

carry-out signal completes one cycle every 10 clock input cycles in the CD4017B is used to ripple clock
the succeeding device in a multi device a counting chain.

When the Nth decoded output is reached (Nth clock pulse) the S_R flip- flop (constructed from
two NOR gates of the CD4017B) generates a reset pulse which clears the CD4017B to its zero count.
At this time, if the N th decoded output is greater than or equal to 6 in the CD4017B, the C OUT line goes
high to clock the next CD4017B counter section. The 0 decoded output also goes high at this time.
Coincidence of the clock low and decoded 0 output low resets the SR flip-flop to enable the CD4017B.
If the Nth decoded output is less than 6, the COUT line will not go high and therefore, cannot be used. In
this case 0 decoded output may be used to perform the clocking function for the next counter.
Relay driver circuits and Relays:
A relay is an electrically operated switch. Many relays use an electromagnet to operate a
switching mechanism mechanically, but other operating principles are also used. Relays are used
where it is necessary to control a circuit by a low-power single (with complete electrical isolation
between control and controlled circuits), or where several circuits must be controlled by one signal.
A simple electromagnetic relay consists of a coil of wire surrounding a soft iron core, an iron
yoke which provides a low reluctance path for magnetic flux, movable iron armature, and one or more
sets of contacts. The armature is hinged to the yoke and mechanically linked to one or more sets of
moving contacts. It is held in place by a spring so that when the relay is de-energized there is an air
gap in the magnetic circuit. In this condition, one of the two sets of contacts in the relay is closed, and
the other set is open. The coil can be energized from a low power source such as a transistor while the
contacts can switch high powers such as the mains supply. The relay can also be situated remotely
from the control source. Relays can generate a very voltage across the coil when switched off. This can
damage other components in the circuit. To prevent this diode is connected across the coil. The
cathode of the diode is connected to the most positive end. The spring sets (contacts) can be a mixture
on N.O, N.C and C.O. The relays switch connections are usually labeled COM, NC and NO
COM : common, always connect to this, it is the moving part of the switch.
NC

: Normally closed, COM is connected to this when the relay coil is OFF.

NO : Normally open, COM is connected to this when the relay coil is ON.
Connect to COM and NO if you want the switched circuit to be ON when the relay coil is ON.
Connect to COM and NC if you want the switched circuit to be ON when the relay coil is OFF.
Relays require more current than many ICs can provide, so a low power transistor may be
needed to switch the current for the relays coil.

PROCEDURE:
1. Make the connections as per the circuit diagram.
2. Switch ON the power supply and check the output of the 1Sec. timer circuit.
3. Connect the clock signal to the divider circuit.
4. Check the sequential output of load devices.
5. Switch OFF the power supply and disconnect the components.

RESULT:
Thus, the process control timer circuit is constructed and the output is observed.

Expt..No. 8

DESIGN OF WIRELESS DATA MODEM

AIM:
To design and construct a wireless data modem using FSK modulation technique.

APPARATUS REQUIRED:
Sl. No
1
2
3
4
5

Apparatus Name
Timer IC
Function Generator IC
PLL IC

Resistor

7
8
9
10
11
12
13

Capacitor
Breadboard
Dual Regulated Power Supply
Digital Multimeter
Connecting Wires

Range
NE555
XR 2206
NE 565

Qty.
1
1
1

72 K
10 K
0.01F, 10 F

2
3
1

(0-30)V / 2A
-

1
1
few nos.

THEORY:
Modulation is defined as the process by which some characteristics of a carrier is varied in
accordance with a modulating wave. In digital communication, the modulating wave consists of binary
data or an M-ary encoded version of it. But the carrier, it is customary to use a sinusoidal wave. With a
sinusoidal carrier, the feature that is used by the modulator to distinguish the signal from another is a
step change in the amplitude, or frequency, or phase of the carrier. The resultant of the modulation
process is Amplitude Shift Keying (ASK), Frequency Shift Keying (FSK), or Phase Shift Keying (PSK)
respectively. Ideally, PSK and FSK signals have a constant envelope and much more widely used than
ASK signals.
Frequency-shift keying (FSK) is a method of transmitting digital signals. The two binary states,
logic 0 (low) and 1 (high), are each represented by an analog waveform. Logic 0 is represented by a
wave at a specific frequency, and logic 1 is represented by a wave at a different frequency. A modem
converts the binary data from a computer to FSK for transmission over telephone lines, cables, optical
fiber, or wireless media. The modem also converts incoming FSK signals to digital low and high states,
which the computer can understand. Whenever the message or information signal rides over the

carrier it is called modulation. In electrical sense the operation of riding over the amplitude of carrier
means to alter the amplitude of carrier. This is called amplitude modulation of the carrier. Thus the
message signal becomes the modulating signal and it is transmitted by variations in the amplitude of
the carrier. The transmission media suffers three major problems; Attenuation, Distortion and Noise.

Due to these inherent problems, it is very difficult to have wide range of frequency in the signals
that are transmitted. Therefore to transmit data over wireless medium, it is necessary to use a
modulator which restore the number of frequency in the transmitted signal by employing digital
modulation techniques like ASK, FSK or PSK. Also Binary PSK with non-coherent detection can also
be employed. A modem is a device that takes the digital electrical pulses from a terminal or computer
and converts them into continuous analog signal that is used for transmission. The binary FSK
technique is employed for modulating the digital signals. IC XR 2206 function generator IC is used for
FSK modulator circuit and PLL IC 565 can be used for demodulator. It consists of phase detection
LPF amplifier.
A typical pair of sinusoidal waves is described by
Si(t) = (2Eb / Tb)1/2 COS (2fit),
0

0 t Tb
elsewhere

where i=1,2 and Eb is the transmitted signal energy per bit and the transmitted signals equals
fi = (nc+i) / Tb for +ve fixed integer nc and I = 1,2
Thus symbol 1 is represent by Si(t) and symbol 0 by S2 (t).

Function Generator (XR2206):

The XR-2206 is a monolithic function generator integrated circuit capable of producing high
quality sine, square, triangle, ramp, and pulse waveforms of high-stability and accuracy. The output
waveforms can be both amplitude and frequency modulated by an external voltage. Frequency of
operation can be selected externally over a range of 0.01Hz to more than 1MHz. The circuit is ideally
suited for communications, instrumentation, and function generator applications requiring sinusoidal
tone, AM, FM, or FSK generation.
The XR-2206 can be operated with two separate timing resistors, R1 and R2, connected to the
timing Pin 7 and 8, respectively. Depending on the polarity of the logic signal at Pin 9, either one or the
other of these timing resistors is activated. If Pin 9 is open-circuited or connected to a bias voltage _
2V, only R1 is activated. Similarly, if the voltage level at Pin 9 is _1V, only R2 is activated. Thus, the
output frequency can be keyed between two levels. f1 and f2, as: f1 = 1/R1C and f2 = 1/R2C

IR TRANSMITTER:

Phase Locked Loop (LM565):

The LM565 is a general purpose phase locked loops containing a stable, highly linear voltage
controlled oscillator for low distortion FM demodulation, and a double balanced phase detector with
good carrier suppression. The VCO frequency is set with an external resistor and capacitor, and a
tuning range of 10:1 can be obtained with the same capacitor. The characteristics of the closed loop
system bandwidth, response speed, capture and pull in range may be adjusted over a wide range with
an external resistor and capacitor. The loop may be broken between the VCO and the phase detector
for insertion of a digital frequency divider to obtain frequency multiplication. The free running frequency
of the VCO is determined by fo = 0.3 / RTCT
PROCEDURE:
1. Make the connections as per the circuit diagram.
2. Switch ON the power supply and CRO.
3. Observe modulating and carrier signals in the CRO.
4. Observe FSK signal and measure the amplitude and time period for the above signals.
5. Observe the signal at the IR receiver circuit.
6. Observe the demodulated signal at the output of PLL circuit.
7. Compare the demodulated signal with modulating signal.

9. Switch OFF the equipments and disconnect the connections.

GRAPH:
The input and output waveforms are plotted between time Vs amplitude in x and y axis
respectively.

RESULT:

The frequency modulator and demodulator circuits are constructed and the outputs signals are
obtained.