Spectralwave™ V-Node: General Information

F5259_F04
SpectralWave V-Node
STM-16/ STM-4/ STM-1 Multiplexer RELEASE 3.10
GENERAL INFORMATION
NEC Corporation
7-1, Shiba 5-chome, Minato-ku, Tokyo 108-8001, Japan TEL +81-3-3454-1111 TELEX NECTOK J22686 FAX +81-3-3798-1510/9
F5259_F04 GENERAL INFORMATION
SpectralWave is a registered trademark of NEC Corporation.
Copyright 2005-2006 by NEC Corporation. All rights reserved. The information of this manual was approved by product manager of CND. This manual is subject to change without notice. 1st Issue July 2006 Printed in China
CONTENTS
1. OVERVIEW 2. REFERENCE STANDARDS 3. EQUIPMENT CHARACTERISTIC 4. NETWORK DESIGN USING V-NODE
4.1.1 4.1.2
1-1 2-1 3-1 4-1
4.1 Mounting Configuration of Interface Board and Modules............. 4-1

Package Configuration......................................................................... 4-3 Mounting Configuration ....................................................................... 4-4
4.2 Example of Network Configuration ............................................... 4-12

4.2.1 4.2.2 4.2.3 4.2.4 Point-to-Point ...................................................................................... 4-12 Linear ................................................................................................... 4-12 MS-SPRing........................................................................................... 4-13 Multi-Ring ............................................................................................ 4-14
5. SPECIFICATION
5.1.1 5.1.2 5.1.3 5.1.4 5.1.5 5.1.6 5.1.7 5.1.8 5.1.9
5-1
5.1 System Design Specifications......................................................... 5-1

System Parameters............................................................................... 5-1 Matrix type ............................................................................................. 5-1 Max NE connection number................................................................. 5-1 Crossconnect ........................................................................................ 5-1 Interface ................................................................................................. 5-2 Protection .............................................................................................. 5-2 Synchronization .................................................................................... 5-4 Performance Monitoring ...................................................................... 5-6 Fault management ................................................................................ 5-8
5.1.10 Alarm report ........................................................................................ 5-10 5.1.11 Loopback ............................................................................................. 5-10 5.1.12 HKA ...................................................................................................... 5-10 5.1.13 HKC ...................................................................................................... 5-10 5.1.14 User interface ...................................................................................... 5-10 5.1.15 Remote access by CID ........................................................................5-11 5.1.16 F/W and FPGA download ....................................................................5-11
Contents i
5.1.17 Data download/ data upload ...............................................................5-11 5.1.18 Layer 2 switch ..................................................................................... 5-12 5.1.19 FE ........................................................................................................ 5-12 5.1.20 GE........................................................................................................ 5-13 5.1.21 Security................................................................................................ 5-13 5.1.22 LOG ...................................................................................................... 5-13 5.1.23 Inventory.............................................................................................. 5-13
5.2 Optical Signal Interface.................................................................. 5-15

5.2.1 5.2.2 5.2.3 5.2.4 STM-1: 155M Optical Interface........................................................... 5-15 STM-4: 622M Optical Interface........................................................... 5-16 STM-16: 2.5G Optical Interface .......................................................... 5-17 Eye Diagram of Optical Transmission .............................................. 5-18
5.3 Electrical Signal Interface .............................................................. 5-19

5.3.1 5.3.2 5.3.3 5.3.4 5.3.5 Basic Parameters of Electric Interface ............................................. 5-19 2M interface ......................................................................................... 5-19 34M Interface ....................................................................................... 5-21 45M Interface ....................................................................................... 5-23 STM-1 Electrical Interface .................................................................. 5-25
5.4 Ethernet Interface ........................................................................... 5-29

5.4.1 5.4.2 5.4.3 10BASE-T interface specification...................................................... 5-29 100BASE-TX interface specification ................................................. 5-29 GBE interface specification ............................................................... 5-30
5.5 The Jitter Index of Interface........................................................... 5-32

5.5.1 5.5.2 5.5.3 5.5.4 Input Jitter and Wander Tolerance .................................................... 5-32 Jitter Generation ................................................................................. 5-34 Jitter Generation by Mapping ............................................................ 5-35 Combined Jitter and Wander ............................................................. 5-35
5.6 External Interface ........................................................................... 5-39

5.6.1 5.6.2 5.6.3 5.6.4 Orderwire ............................................................................................. 5-39 User Channel....................................................................................... 5-39 Office Alarm......................................................................................... 5-39 Housekeeping Alarm/Control ............................................................ 5-40
5.7 Environmental Conditions ............................................................. 5-41

5.7.1 5.7.2 5.7.3 Temperature ........................................................................................ 5-41 Humidity............................................................................................... 5-41 Vibration .............................................................................................. 5-41
5.8 Power Distribution.......................................................................... 5-42

Contents ii
5.8.1 5.8.2
Power Interface ................................................................................... 5-42 Power Consumption ........................................................................... 5-43
5.9 User Interface.................................................................................. 5-44

5.9.1 5.9.2 CID Interface........................................................................................ 5-44 NMS ...................................................................................................... 5-45
5.10 Physical Specification.................................................................... 5-45

5.10.1 V-NODE Subrack Dimensions............................................................ 5-45
Contents iii
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1. OVERVIEW
NECs SpectralWave Versatile Node Multiplexer (V-Node) offers various types of traffic interfaces such as PDH, SDH and Fast Ethernet with flexible network configurations of linear, ring, multiple rings, etc. The V-Node is also well suited for implementation in customer premises. V-Node has been developed as a part of NECs SpectralWave family products. V-Node also has the following features: Conforms to the correlative proposal of ITU-T and related SDH technical criteria of the country. Full time slot crossconnect functions, having powerful, convenient Add and Drop traffic functions and modes. Compliant system design: The equipment can configure either TM (Terminal Multiplexer) or ADM (Add Drop Multiplexer) mode flexibly. Offers system configuration for STM-1/STM-4/STM-16, with the methods of easy upgrading and reconfiguring networks. Provides multi-type tributary interfaces with excellent cost performance. Offers perfect network management system; flexible network configuration. Realizes a number of traffic protection modes. Provides multi-function orderwire telephone system. Offers electromagnetic compatibility performances (EMC and EMI) with appropriate measures. Well maintained; high-reliable operation.
Overview 1-1
2. REFERENCE STANDARDS
ITUT G.703 ITUT G.707 ITUT G.781 ITUT G.783 ITUT G.784 ITUT G.803 ITUT G.811 ITUT G.813 ITUT G.823 ITUT G.825 ITUT G.826 ITUT G.841 ITUT G.957 ITUT G.958 Physical/electrical characteristics of hierarchical digital interface. Network node interface for the Synchronous Digital Hierarchy (SDH). Synchronization layer functions. Characteristics of the SDH equipment functional blocks. SDH management. Architectures of transport networks based on the SDH. Timing requirements at the outputs of primary reference clocks. Timing characteristics of SDH equipment slave clocks. The control of jitter and wander within digital networks which are based on the 2048 kbit/s hierarchy. The control of jitter and wander within digital networks which are based on the SDH. Error performance parameters and objectives for international, constant bit rate digital paths at or above the primary rate. Types and characteristics of SDH network protection architectures. Optical interfaces for equipments and systems relating to the SDH. Digital line systems based on the SDH for use on optical fiber cables. Generic framing procedure. Link capacity adjustment scheme (LCAS) for virtual concatenated signals. Part 3: Media Access Control (MAC) Bridges. Virtual Bridged Local Area Networks. Carrier sense multiple access with collision detection (CSMA/CD) access method and physical layer specifications.
ITUT G.7041/Y.1303 ITUT G.7042/Y.1305 IEEE 802.1D-1998 IEEE 802.1Q-1998 IEEE 802.3-1998
IEEE 802.3ad-1998 Port Trunk
Reference Standards 2-1
IEEE 802.1p-1998 ITU-T X.86 RFC1213 RFC1058 CISPR22 (11/97) CISPR24 (09/97)
Quality of Service Link Access Procedure - SDH(LAPS)
ETSI prETS 300-386-2-2 (09/96) prEN50082-1 (1994) ETS 300 019-1-3 EN60825-2
Reference Standards 2-2
3. EQUIPMENT CHARACTERISTIC
11U-height compact-size designation. Provides 2016*2016 VC-12 level, or 96*96 VC-3 level, or 152*152 VC-4 level non-blocking crossconnection, supporting uni-directional, bi-directional and broadcasting. Provides sub-network connection protection (SNCP), multiplex section shared protection ring (MS-SPRing) and 1+1 multiplex section protection (MSP), supporting traffic communication between them. Applicable for a number of network configurations: point-to-point, linear, ring, star, tree, multi-ring, ring crossing, etc. Provides E12 (2M), E31 (34M), E32 (45M), FE (10M/100M Ethernet), GE (10M/100M/1G Ethernet), STM-1e, STM-1/4, STM-16 traffic interfaces. Provides three levels of VC-4, VC-3 and VC-12 cross connect for FE and GE board, supporting both LAPS and GFP EOS encapsulation and LCAS standard. Provides virtual concatenation function for FE and GE, and the maximum virtual concatenation quantity for FE: VC-3 level is 3, and VC-12 level is 63; for GE: VC-4 level is 7, and VC-3 level is 21. Capacity for interfaces: E12 interface: up to 352 channels E31 interface: up to 30 channels E32 interface: up to 30 channels FE Ethernet interface: up to 78 channels GE 1G optical Ethernet interface: up to 26 channels GE 10M/100M electric Ethernet interface: up to 52 channels STM-16 optical interface: up to 6 channels STM-4 optical interface: up to 13 channels
Equipment Characteristic 3-1
STM-1 optical interface: up to 26 channels STM-1 electrical interface: up to 20 channels Either way for the use of traffic: independent or protecting each other among optical interfaces. Configurations of complicated SNC-P network, such as 2.5G-622M Multi-Ring, 622M-155M Multi-Ring, 155M-155M Multi-Ring, etc. Allows configuring STM-1 system to/from STM-4 system only by replacing interface modules; simply upgrading. Provides orderwire interface (2-wire interface), with the functions of all-call, group calling and selected calling. Up to 6 channels of 64 kbit/s V.11 user data interface (on D_INF unit) per subrack. Provides timing synchronous interface: 2048 kbit/s or 2048 kHz external clock 2048 kbit/s tributary STM-1, STM-4 and STM-16 timing source inputs 2048 kbit/s or 2048 kHz external timing source output SSM function Provides DCC channel of D1 to D3 and D4 to D12; Using both OSI and TCP/IP communication protocol. Provides F (10BASE-T) and f (RS232) network management interfaces for configuration, alarm, performance, maintenance and security functions of ITU-T definition. Provides ports for eight Housekeeping Alarms, four Housekeeping Controls, and a set of Alarm Output interfaces. Provides local/remote firmware download: in-service upgrading is available for easy maintenance.
Allows upgrading hardware configuration data without replacing equipment. Provides the network management for remote connection via serial interface or LAN, which allows monitoring remote NE. Supports the following application of fiber transmission: Super Long-Distance (80km) Long-Distance (40km) Short Distance (15km) Provides layer 2 switch function: Supports 802.3x flow control for full-duplex mode and collision-based backpressure for half-duplex mode. Supports broadcast storm filtering Supports port-based VLAN and 802.1Q tag-based VLAN with IVL Supports 802.1d Spanning Tree Protocol Supports static priority and 802.1p Class of Service with 2-level priority queuing Supports static port trunking Supports by-port Egress/Ingress rate control Support Static MAC filter database Provides fans to disperse heat forcibly; provides the fans controlling temperature and inspecting their own status to guarantee the equipment running stably. Meet RoHS and lead-free design requirements.
4. NETWORK DESIGN USING V-NODE

4.1 Mounting Configuration of Interface Board and Modules
This section provides mounting configuration of interface packages and modules. Slot positions for each interface package are shown in Figure 4-1 and Figure 4-2 .
Figure 4-1 V-Node Front View
Network Design using V-Node 4-1
Figure 4-2 Slot-Position View
4.1.1
Package Configuration
Several kinds of packages are available as shown below:

STM-16: 1* STM-16 optical interface and SDH Signal termination STM-1/4: 1* STM-4 or 2*STM-1 optical interface and SDH Signal termination S1E: 2*STM-1electrical interface and SDH Signal termination E12: 32*2M PDH signal to/from VC-12 SDH signal mapping/demapping E31: 3*34M PDH signal to/from VC-3 SDH signal mapping/demaping E32: 3*45M PDH signal to/from VC-3 SDH signal mapping/demaping FE_4: 6*10/100M bit Ethernet (4 WAN) GE: GE interface unit (With L2SW) CS: Cross-connect + timing source unit TPS_S1E: 155M TPS Unit TPS_E3: 34M/45M TPS unit TPS_E12W: 2M TPS unit (for work slot) TPS_E12P: 2M TPS unit (for protection slot) THR_E12W: 2M through unit MCP: System control and communication P_INF: Power and clock interface unit D_INF: Data through interface unit (6 ports ) FAN: Fans
4.1.2
Mounting Configuration
Following table shows mounting configuration in Interface Packages.
Y: Yes (an available slot for the package) NOTE:

1. 2. 3. The slot #24 and #25 are not used. TPS_S1E, TPS_E3 packages occupy 2 slots. When using a package which needs TPS, the dedicated TPS must be used.(When using E12, TPS_E12W or TPS_E12P must be used. When using E31 or E32, TPS_E3 must be used. And when using S1E, TPS_S1E must be used.)
4.
When the GE board is inserted into slot5/ slot6/ slot7/ slot10/ slot11/ slot12, the number of AU port is 16, and if the GE board is inserted into other slot, the number of AU port is 8.
4.1.2.1 STM-16 Configuration Regardless of the use of Line Protection, TPS Package (Upper Row) is not required. The configuration of STM-16 is shown below:
21 22 23 26 27 28
P_INF
P_INF
4.1.2.2 STM-1/4 Configuration Regardless of the use of Line Protection, TPS Package (Upper Row) is not required. The configuration of STM-1/4 is shown below:
18 19 20 21 22 23 26 27 28 29 30 31 32
STM-16
5
Figure 4-3 STM-16 Configuration
STM-16
6
STM-16
7
10
STM-16
11
STM-16
12
STM-16
P_INF
P_INF
STM-1/4
2
STM-1/4
3
STM-1/4
4
STM-1/4
5
STM-1/4
6
Figure 4-4 STM-1/4 Configuration
STM-1/4
7
10
STM-1/4
STM-1/4
11
12
STM-1/4
13
STM-1/4
14
STM-1/4
15
STM-1/4
16
STM-1/4
4.1.2.3 FE Configuration
TPS Package (Upper Row) is not required. The configuration of FE is shown below:
18 19 20 21 22 23 26 27 28 29 30 31 32
P_INF
P_INF
4.1.2.4 GE Configuration
TPS Package (Upper Row) is not required. The configuration of GE is shown below:
FE
2
FE
3
FE
4
FE
5
FE
6
FE
7
10
Figure 4-5 FE Configuration
Figure 4-6 GE Configuration
FE
FE
11
12
FE
13
FE
14
FE
15
FE
16
FE
4.1.2.5 S1E Configuration When there are Package Protections, TPS_S1E Package (Upper Row) is necessary. The type of Package Protection is 1:1, and up to 5 Groups can be configured. The slot of Work and Prot is fixed in the each group. Group1 Group2 Group3 Group4 Group5
18
Slot2: Work, Slot3: Prot Slot4: Work, Slot5: Prot Slot11: Work, Slot12: Prot Slot13: Work, Slot14: Prot Slot15: Work, Slot16: Prot
20 27 29 31
TPS_S1E S1E (W)

2
TPS_S1E
TPS_S1E
TPS_S1E
TPS_S1E
S1E (P)
3
S1E (W)
4
S1E (P)
5
Figure 4-7 S1E (with TPS)
S1E (W)
11
S1E (P)
12
S1E (W)
13
S1E (P)
14
S1E (W)
15
S1E (P)
16
4.1.2.6 E31 Configuration When there are Package Protections, TPS_E3 Package (Upper Row) is necessary. The type of Package Protection is 1:1, and up to 5 Groups can be configured. The slot of Work and Prot is fixed in the each group. Group1 Group2 Group3 Group4 Group5 Slot2: Work, Slot3: Prot Slot4: Work, Slot5: Prot Slot11: Work, Slot12: Prot Slot13: Work, Slot14: Prot Slot15: Work, Slot16: Prot
Figure 4-8 E31 (with TPS)
4.1.2.7 E32 Configuration When there are Package Protections, TPS_E3 Package (Upper Row) is necessary. The type of Package Protection is 1:1, and up to 5 Groups can be configured. The slot of Work and Prot is fixed in the each group. Group1 Group2 Group3 Group4 Group5 Slot2: Work, Slot3: Prot Slot4: Work, Slot5: Prot Slot11: Work, Slot12: Prot Slot13: Work, Slot14: Prot Slot15: Work, Slot16: Prot
Figure 4-9 E32 (with TPS)
4.1.2.8 E12 Configuration 4.1.2.8.1 E12 (without TPS)
Where the Package Protection is not configured, THR_E12W Package (Upper Row) is required.
Figure 4-10
E12 Configuration (without TPS)
4.1.2.8.2
E12 (with TPS)
Where the Package Protection is configured, TPS_E12P Package (Upper Row) for Prot, and TPS_E12W Package (Upper Row) for Work are required. The type of Package Protection is 1: N (N=1~4), and up to 2 Groups can be configured. The value of N differs depending on the number of mounted packages on Work-side. The slots of Work and Prot are designated in the each group. Group 1: Slot #2 = Prot, Slots #3 thru #6 = Work Group 2: Slot #16 = Prot, Slots #12 thru #15 = Work
18 19 20 21 22 28 29 30 31 32
TPS_E12P E12 (P)

2
TPS_E12W E12 (W)

3
TPS_E12W E12 (W)

4
TPS_E12W E12 (W)

5
Figure 4-11
TPS_E12W E12 (W)

6
12
E12 Configuration (with TPS)
TPS_E12W E12 (W)
13
TPS_E12W E12 (W)
14
TPS_E12W E12 (W)
15
TPS_E12W E12 (W)
16
TPS_E12P E12 (P)
4.2 Example of Network Configuration

4.2.1 Point-to-Point
Figure 4-12
Point-to-Point Network Configuration
4.2.2
Linear
Figure 4-13
Linear Network Configuration
4.2.3
MS-SPRing
V-Node
STM-16 MS-SPRing
V-Node
V-Node
TPS_E12P TPS_E12W TPS_E12W TPS_E12W TPS_E12W
D_INF
P_INF
P_INF
V-Node
CS CS STM-4/16 STM-4/16
FE MCP
E12 E12 E12 E12 E12
2M(With TPS) 100Base-T
Figure 4-14
Multi-Ring
4.2.4
Multi-Ring
V-Node
V-Node
STM-16 MS-SPRing
V-Node
TPS_E12P TPS_E12W TPS_E12W TPS_E12W TPS_E12W
D_INF
P_INF
P_INF
V-Node
2M(With TPS) 100Base-T

STM-16 STM-16 FE MCP
CS CS E12 E12 E12 E12 E12 STM-4 STM-4
V-Node
STM-4 SNCP
V-Node
V-Node
Figure 4-15
Multi-Ring
5. SPECIFICATION
5.1 System Design Specifications
5.1.1 System Parameters
STM-16, STM-4 , STM-1o/e
Transmission Level:
Bit Error Rate: <1 10-10 Type of Tributary Interfaces: 2.048 Mbit/s, 34.368 Mbit/s 44.736 Mbit/s ( CEPT TU-3 mapping ) 10/100BASE-T Fast Ethernet, GE
Crossconnect Level:
VC-4, VC-3, VC-12
5.1.2
Matrix type
One way (includes hairpin) Two way Broadcast Drop & Continue
5.1.3
Max NE connection number
63 NEs
5.1.4
Crossconnect
Cross-connect level
VC-4 VC-3 VC-12
Size 152*152 96*96 2016*2016
Specification 5-1
5.1.5
Interface
STM-16 (I-16.1/S-16.1/L-16.1/L-16.2)(1ch/SLOT) STM-4 (S-4.1/L-4.1/L-4.2)(1ch/SLOT) STM-1 (S-1.1/L-1.1/L-1.2) (2ch/SLOT) S1E (2ch/SLOT) 2M (75 ohms / 120 ohms)(32ch/SLOT) 34M (3ch/SLOT) 45M (3ch/SLOT) FE (100BASE-TX/10BASE-T) (6CH/SLOT)(For FE_4 board) FE (100BASE-TX/10BASE-T) (4CH/SLOT)(For GE_A board) GE (1000 BASE-X)(2CH/SLOT)
5.1.6
Protection
1) STM-4/16 interface 2) Bi-directional direction revertive (See ITU-T G.841) 3) Switch time: < 50msec 4) switch criterion: SF/SD/MSW/FSW/LKOP SF: LOS, LOF, MS-AIS, RS-TIM, B2-EXC SD: B2DEG
2F MS-SPRing
MSP (linear protection) 1) Optical interface 2) 1+1 Uni-directional Non-Revertive (See ITU-T G.841) 1+1 Bi-directional Non-Revertive 1:1 Bi-directional Revertive
Specification 5-2
3) switch time:< 50msec 4) switch criterion: SF/SD/MSW/FSW/LKOP SF: LOS, LOF, MS-AIS, RS-TIM, B2-EXC SD: B2DEG SNC-P (path protection) 1) Protection unit: HOPath:VC-4 LOPath:VC-3/VC-12 2) 1+1 Uni-directional Non-Revertive/1+1 Uni-directional Revertive 3) switch time:< 50msec (SNC/N: when 504 path switch, switch time is less than 200ms) 4) switch criterion:SF/SD/MSW/FSW/LKOP SNC/I SSF(Server signal fail) a) VC-4 AU-LOP,AU-AIS TU-LOP,TU-AIS
b) VC-3/12
SNC/N TSF(Trail signal fail) TSD(Trail signal Degrade) a) VC-4 SF AU-LOP, AU-AIS HP-UNEQ, HP-TIM, HP-EXC SD b) VC-3/VC-12 SF HP-DEG TU-LOP, TU-AIS, LOM(VC12) LP-UNEQ, LP-TIM, LP-EXC SD LP-DEG 5) Non-revertive/revertive selectable PKG protection 1) CS: 1+1 non-revertive protection 2) 2M TPS: 1:4 revertive protection 3) 34M/45M TPS: 1:1 revertive protection 4) STM-1e TPS: 1:1 revertive protection
Specification 5-3
Timing source protection 1) Revertive/Non-Revertive 2) Switch time: timing source selected time 200msec + timing source switch time 300msec 3) Switch criterion: SF/MSW/FSW (Priority/Quality/SSM selectable)
5.1.7
Synchronization
1) Internal Free run 2) Internal Holdover 3) STM-N Line (any port) 4) 2 MHz PDH Line (any slot channel 1) 5) External port: 2 Mbps or 2 MHz (75 ohms / 120 ohms)
Timing source
Following table shows the basic parameter of all kinds of timing sources. 2MHz EXTCLK
Line Rate Frame Format Line Code Impedance 2.048 MHz NA NA 75 ohms unbalanced / 120 ohms balanced
2Mbps EXTCLK
Line Rate Frame Format Line Code Impedance 2.048 Mbps G.704 HDB3 75 ohms unbalanced / 120 ohms balanced
2M PDH
Line Rate Frame Format Line Code Impedance 2.048 Mbps NA HDB3 75 ohms unbalanced /120 ohms unbalanced
Specification 5-4
STM-1o
Line Rate Frame Format Line Code Impedance 155.520 Mbps G.707 -
STM-1e
Line Rate Frame Format Line Code Impedance 155.520Mbps CMI 75 ohm unbalanced
STM-4
Line Rate Frame Format Line Code Impedance 622.080 Mbps G.707 -
STM-16
Line Rate Frame Format Line Code Impedance 2,488.320 Mbps G.707 -
Specification 5-5
5.1.8
Performance Monitoring
SDH PM
PM Items
RST MST BBE, ES, SES, OFS, UAS BBE, ES, SES, UAS, FE-BBE, FE-ES, FE-SES, FE-UAS
MSA/HPA PJE-P, PJE-N MSP HPT LPT

MS-PSC, MS-PSD BBE, ES, SES, UAS, FE-BBE, FE-ES, FE-SES, FE-UAS BBE, ES, SES, UAS, FE-BBE, FE-ES, FE-SES, FE-UAS
Ethernet PM
LAN ETH-DropPkt, ETH-RxAlignmentErrorFrame, ETH-RxBroadcastPkt, ETH-RxFCSErrorFrame, ETH-RxMulticastPkt, ETH-RxOctet, ETH-RxUnderSizePkt, ETH-RxOverSizePkt, ETH-RxPkt1024toMax, ETH-RxPkt128to255, ETH-RxPkt256to511, ETH-RxPkt512to1023, ETH-RxPkt64, ETH-RxPkt65to127, ETH-TxCollisionFrame, ETH-TxDelayTransmission, ETH-TxExtCollisionFrame, ETH-TxLateCollisionFrame, ETH-TxMultiCollisionFrame, ETH-TxNUcastPkt, ETH-TxOctet, ETH-TxSingleCollisionFrame, ETH-TxUcastPkt ETH-DropPkt, ETH-RxAlignmentErrorFrame, ETH-RxBroadcastPkt, ETH-RxFCSErrorFrame, ETH-RxMulticastPkt, ETH-RxOctet, ETH-RxPkt1024toMax, ETH-RxPkt128to255, ETH-RxPkt256to511, ETH-RxPkt512to1023, ETH-RxPkt64, ETH-RxPkt65to127, ETH-TxNUcastPkt, ETH-TxOctet, ETH-TxUcastPkt
WAN
Encapsulation PM
GFP LAPS GFP_RxEXIErrorPkt, GFP_RxFCSErrorPkt, GFP_RxOctet, GFP_RxPkt, GFP_TxOctet, GFP_TxPkt LAPS_RxFCSErrorPkt, LAPS_RxOctet, LAPS_RxPkt, LAPS_TxOctet, LAPS_TxPkt
Specification 5-6
PM register 1) 15min register 2) 1day register NOTE: 1. 15min register capacity: 32 1day register capacity: 1 2. The guaranty performance value is referring to 2.9 Performance monitor ofF05. FUNCTIONAL manual. 3. Sometimes CID will not show performance value, but show over flow which means that the performance value exceeds its maximum counter value. TCA function
Specification 5-7
5.1.9
Fault management
Alarm Items SDH Alarm

SPI RST MST MSA HPC HPT HPA LPC LPT LPA HPOM LPOM 2M/34M/45M SETS EXT CLK IN PKG PORT NETWORK ENVIRONMENT EQUIPMENT PROTECTION LOS LOF, RS-TIM MS-AIS, MS-RDI, MS-EXC, MS-DEG AU-AIS, AU-LOP HP-PPS-FAIL HP-TIM, HP-UNEQ, HP-RDI, HP-EXC, HP-DEG TU-AIS, TU-LOP, LOM, HP-PLMF LP-PPS-FAIL LP-TIM, LP-UNEQ, LP-RDI, LP-EXC, LP-DEG LP-PLMF, AIS HP-TIM, HP-UNEQ, HP-EXC, HP-DEG, VC-AIS LP-TIM, LP-UNEQ, LP-EXC, LP-DEG, VC-AIS LOSAIS LTI, CLKFAIL, REF_FAIL, CLKDRIFT LOS, AIS(2Mbps), LOF(2Mbps) PKG_REMOVED, PKG_TYPE, PKG_FAIL, COM_FAIL PORT_REMOVED, PORT_TYPE LINK-FAILED, LINK_DOWN HKAn BUS_ERROR,MEM_FAIL APSD_n, APSIN_n, APSNIM_n, APSIM_n, CMF, PPS-FAIL, PSBF, RINGSW_FAIL_n, TAF
Specification 5-8
Ethernet Alarm
LAN DropPkt_EXC, LINK_DOWN, RxAlignmentErrorFrame_EXC, RxFCSErrorFrame_EXC, TxCollision_EXC, TxDelayTransmission_EXC, TxExtCollision_EXC, TxLateCollision_EXC CSF_LCS, CSF_LCSync, CSF_R_LCS, CSF_R_LCSync, DropPkt_EXC, LINK_DOWN, RxAlignmentErrorFrame_EXC, RxFCSErrorFrame_EXC, WAN_PORT_SD, WAN_PORT_SF
WAN
Encapsulation Alarm
GFP LAPS SSF_LGS LAPS_FAIL
Virtual Concatenation Alarm

Virtual Concatenation Layer LP-Xv-LOA, LP-Xv-LOM, LP-Xv-SQM, LP-Xv-PLM, HP-Xv-LOA, HP-Xv-LOM, HP-Xv-SQM
Equipment alarm item 1) PKG failure 2) Bus failure (backboard bus error) 3) Memory failure 4) PKG removal 5) PKG type mismatch Network alarm 1) link failure (LAPD, LAN) 2) access failure Alarm severity Critical/Major/Minor/Warning Delay/ stretch report
Specification 5-9
5.1.10 Alarm report

LED (ALARM) Office alarm: PM, DM, AB, AL ACO
5.1.11 Loopback
Terminal loopback Applicable to STM-N, 2M, Facility loopback Applicable to STM-N, 2M
5.1.12 HKA
Built in 8 port ( in MCP) Alarm logic (Loop/ Open) selectable Alarm standard Loop: <50 ohm Open: >20k ohm MAX current: 100mA
5.1.13 HKC
Built in 4 ports Control logic (Loop < 2 ohms, Open > 500 kohms) selectable Max current/voltage: 0.3 A / 72 V
5.1.14 User interface

f interface: RS-232C f interface is used only CID. F interface: LAN (10 Base-T) F interface is used by NMS and CID mutually
Specification 5-10
5.1.15 Remote access by CID

Operation response within 90 sec from any CID. Implement through DCC function of V-Node. Loopback function is not available for SDH interface; is available for PDH interface.
5.1.16 F/W and FPGA download

Performance:
PKG Name MCP F/W or FPGA FW (SF221-0001-A01) FPGA (SF221-0001-F01) FW (SF226-0003-A01) FPGA (SF226-0003-F01) FPGA (SF226-0003-F02) FPGA (SF226-0003-F03) FPGA (SF226-0003-F05) FW (SF208-0007-A01) FPGA (SF208-0007-F01) FPGA (SF208-0007-F02) FW (SF208-5002-A01) FPGA (SF208-5002-F01) Port F f F f F f F f F f F f F f F f F f F f F f F f Cost Time 33s 280s 12s 110s 40s 330s 35s 310s 5s 25s 5s 25s 5s 25s 30s 300s 10s 85s 18s 135s 30s 300s 10s 85s
CS
STM-16 STM-1/4 E1 FE
GE
5.1.17 Data download/ data upload

Performance: Using CID and f port download data: 18 sec per NE Using CID and f port upload data: 17 sec per NE Using CID and F port download data: 14 sec per NE Using CID and F port upload data: 12 sec per NE
Specification 5-11
5.1.18 Layer 2 switch

Port Line-rate: max 148,810 packets/sec MAC Table: 10K VLAN Table: 2K Priority Queue: 2-level VID Range: port-based VLAN: 2 thru 255 802.1Q VLAN: Untaged 2 thru 255 Taged 2 thru 4094 Egress/Ingress Rate Control: 10 K/step Max Ethernet Frame Length: 1568 (includes VID 4 bytes)
5.1.19 FE
Port Line-rate: max 148,810 packets/sec MAC Table: 10K VLAN Table: 2K Priority Queue: 2-level VID Range: port-based VLAN: 2 thru 255 802.1Q VLAN: Untagged 2 thru 255 Tagged 2 thru 4094 Egress/Ingress Rate Control: 10 K/step Trunking: max 4-trunk groups Max Ethernet Frame Length: 1568 (includes VID 4 bytes) Max VCAT Number: VC-12-Xvx=163., VC-3-Xvx=13.
Specification 5-12
5.1.20 GE
Port Line-rate: max 1,488,095 packets/sec MAC Table:16K VLAN Table:4K Priority Queue: 8-level VID Range: 802.1Q VLAN: Untagged 2 thru 255 Tagged 2 thru 4094 Egress/Ingress Rate Control: 64K/step Trunking:max 4-trunk groups Max Ethernet Frame Length: 1522 bytes (includes VID 4 bytes) for FE-LAN and FE-WAN 9216 bytes (Jumbo Packets) for GE-LAN and GE-WAN Max VCAT Number: FE-WAN: VC-3-Xv (X=1-3), VC-4 GE-WAN: VC-3-Xv (X=1-21), VC-4-Xv (X=1-7) Max VCAT Differential Delay 16ms
5.1.21 Security
User Authorization Management: Level 1 to Level 4
5.1.22 LOG
Event Log: max. 500 items for each event log (TCA, PPS 3000) Command Log: max. 500 items
5.1.23 Inventory
PKG name (either from OS and package label)
Specification 5-13
PKG Code (from package label) Serial Number (from package label) Manufactured date (from package label) PKG (H/W & F/W) Version (either from OS or package label) Repair record (from package label)
Specification 5-14
5.2 Optical Signal Interface

The transmission performance between S (Sending side) and R (Receiving side) meets the requirement of section 5 in ITU-T G.957.
5.2.1
STM-1: 155M Optical Interface

ITEM SPECIFICATIONS G. 707, G.958; S-1.1 1261 ~ 1360 nm 155520 Kbit/s L-1.2 1480 ~ 1580 nm
Nominal Bit Rate Application Code Operating Wavelength Range Transmitter at Reference Point S Source Type Spectral Characteristics Maximum RMS width Maximum 20 dB width Minimum side mode suppression ratio Mean Launched Power Maximum Minimum Minimum Extinction Ratio Main Optical Path Between S and R Attenuation Range Maximum Dispersion Minimum Optical Return Loss of Cable Plant at S (including any connectors) Maximum Discrete Reflectance between S Point and R Point Receiver at Reference Point R Minimum Sensitivity (at BER = 10E10) Minimum Overload (at BER = 10E10) Maximum Optical Path Penalty Maximum Reflectance of Receiver (measured at R) 28 dBm 8 dBm 1 dB N/A 0 ~ 12 dB 96 ps/nm N/A N/A 8 dBm 15 dBm 8.2 dB 7.7 nm MLM
L-1.1 1280 ~ 1335 nm
SLM
SLM
1 nm 30 dB
1 nm 30 dB
0 5 dBm 10 dB
0 5 dBm 10 dB
10 ~ 28 dB N/A N/A N/A
10 ~ 28 dB N/A 20 dB 25 dB
34 dBm 10 dBm 1 dB N/A
34 dBm 10 dBm 1 dB 25 dB
Specification 5-15
5.2.2
STM-4: 622M Optical Interface

ITEM SPECIFICATIONS G. 707, G.958; 622080 kbit/s S-4.1 1293 ~ 1334 nm 1274 ~ 1356 nm L-4.1 1280 ~ 1335 nm L-4.2 1480 ~ 1580 nm
Nominal Bit Rate Application Code Operating Wavelength Range Transmitter at Reference Point S Source Type Spectral Characteristics Maximum RMS width Maximum 20 dB width Minimum side mode suppression ratio Mean Launched Power Maximum Minimum Minimum Extinction Ratio Main Optical Path Between S and R Attenuation Range Maximum Dispersion Minimum Optical Return Loss of Cable Plant at S (including any connectors) Maximum Discrete Reflectance between S Point and R Point Receiver at Reference Point R Minimum Sensitivity (at BER = 10E10) Minimum Overload (at BER = 10E10) Maximum Optical Path Penalty Maximum Reflectance of Receiver (measured at R) 28 dBm 8 dBm 1 dB N/A 0 ~ 12 dB 46 ps/nm N/A N/A 8 dBm 15 dBm 8.2 dB 4 nm MLM
MLM
SLM
SLM
2.5 nm
1 nm 30 dB
<1 nm 30 dB
8 dBm 15 dBm 8.2 dB
2 dBm 3 dBm 10 dB
2 dBm 3 dBm 10 dB
0 ~ 12 dB 74 ps/nm N/A N/A
10 ~ 24 dB N/A 20 dB 25 dB
10 ~ 24 dB 1640 ps/nm 24 dB 27 dB
28 dBm 8 dBm 1 dB N/A
Specification 5-16
5.2.3
STM-16: 2.5G Optical Interface

ITEM SPECIFICATIONS G. 707, 2488320 kbit/s I-16.1 1260~1360 nm S-16.1 1260~1360 nm L-16.1 1280~1335 nm L-16.2 1500~1580 nm
Nominal Bit Rate Application Code Operating Wavelength Range Transmitter at Reference Point S Source Type Spectral Characteristics Maximum RMS width Maximum 20 dB width Minimum side mode suppression ratio Mean Launched Power Maximum Minimum Minimum Extinction Ratio Main Optical Path Between S and R Attenuation Range Maximum Dispersion Minimum Optical Return Loss of Cable Plant at S (including any connectors) Maximum Discrete Reflectance between S Point and R Point Receiver at Reference Point R Minimum Sensitivity (at BER = 10E10) Minimum Overload (at BER = 10E10) Maximum Optical Path Penalty Maximum Reflectance of Receiver (measured at R) 18 dBm 3 dBm 1 dB 27 dB 0 ~ 7 dB 12 24 dB 27 dB 3 dBm 10dBm 8.2 dB 4nm MLM
SLM
SLM
SLM
1 nm 30 dB
1 nm 30 dB
<1 nm 30 dB
0dBm 5 dBm 8.2 dB
3 dBm 2 dBm 8.2 dB
3 dBm 2 dBm 8.2 dB
0 ~ 12 dB N/A 24 dB 27 dB
10 ~ 24 dB N/A 24 dB 27 dB
10 ~ 24 dB 1200~1600 ps/nm 24 dB 27 dB
Specification 5-17
5.2.4
Eye Diagram of Optical Transmission

Following diagram shows the regulations of G.957, using a filter specified in appendix A of G.957 to measure.
1+y1
1 Scope y2 STM-1 interface x1/x4 x2/x3 y1/y2 0.5 0.15/0.85 0.35/0.65 0.20/0.80
STM-4 interface x1/x4 x2/x3 0.25/0.75 0.40/0.60 0.20/0.80
y1
y1/y2
STM-16 interface x3-x2 0.20 0.25/0.75 y1/y2 0 x1 x2 x3 Time x4 1
-y1
Specification 5-18
5.3 Electrical Signal Interface

5.3.1 Basic Parameters of Electric Interface
Item Bits rate Bits rate tolerance Code Interface template and return loss 2M (E12) 2048 kbit/s 50ppm HDB3 G.703(10/98) Section 9.2/9.3 34M (E31) 34368 kbit/s 20ppm HDB3 G.703(10/98) Section 11.2/11.3 45M (E32) 44736 kbit/s 20ppm B3ZS G.703 (10/98): Section 8 STM-1e 155520 kbit/s 20ppm CMI G.703(10/98) Section 15.2/15.3
5.3.2
2M interface
5.3.2.1 Waveform of Output Port
Item 75 interface Co-axis 75 2.37 V 0 0.237 V 244 ns 0.95 thru 1.05 0.95 thru 1.05 G.703 Figure 15 120 interface Symmetric 120 3V 0 0.3 V 244 ns 0.95 thru 1.05 0.95 thru 1.05 G.703 Figure 15
Line pairs in every transmission direction Impedance of testing load Peak voltage of a mark Peak voltage of a space Standard pulse width At the center of the pulse inter Mask of the pulse Ratio of the amplitudes of positive and negative pulses Ratio of the width of positive and negative pulse
Specification 5-19
Pulse mask at 2048 kbit/s interface (Figure15/G.703) 5.3.2.2 Return Loss of Input Port The attenuation of this pair should be assumed to follow a f law and the loss of a frequency of 1024 kHz should be in the range 0 thru 6 dB. The return loss at the input port should have the following provisional minimum values:
Frequency (kHz) 51 thru 102 102 thru 2048 2048 thru 3072 Return Loss (dB) 12 18 14
Specification 5-20
5.3.3
34M Interface
Item Pulse shape (rectangular when standard) Line pairs in every transmission direction Impedance of testing load Nominal peak voltage value (having pulse) Peak voltage value (no pulse) Standard pulse width Ratio of the amplitudes of positive and negative pulses at the center of the pulse interval Ratio of width of positive and negative pulses at the nominal half amplitude Mask of pulse
Waveform All marks of valid signal should conform to figure 17/G.703 template in spite of the symbols A co-axis line pairs 75, resistance 1.0V 00.1V 14.55ns 0.95 to 1.05 0.95 to 1.05 G.703 figure 17
Specification 5-21
Pulse mask at the 34 368 kbit/s interface (Figure17/G.703) 5.3.3.2 Return Loss of Input Port The attenuation of this cable should be assumed to follow approximately a and the loss at a frequency of 17184 kHz should be in the range 0 to 12dB. f law
The return loss at the input port should have the following provisional minimum values:
Frequency (kHz) 860 thru 1720 1720 thru 34368 34368 thru 51550 Return Loss (dB) 12 18 14
Specification 5-22
5.3.4
45M Interface
ITEM SPECIFICATION Conforms to G.703 (10/98) Section8 (same as GR-499-CORE) 44.736 Mbit/s 20 ppm Conforms to G.703 (10/98) Section 8.1 Table 6
Basic SPEC Bit rate
Code
B3ZS Conforms to G.703 (10/98) Section 8.1: Table 6
Frame constructor
Conforms to G.703 (10/98) Section 8.1: Table 6 required to meet G.752 (6M mapping) only Conforms to GR-499-CORE (1995) Section10.5 (no frame)
Output pulse mask
G.703 (10/98) Section 8/ Table6/Fig.14 conformity
Impedance
75 5% Conforms to G.703 (10/98) Section 8.1: Table 6
Connect cord
75 imbalance Coaxial cable (GR-253-CORE Issue2 (12/95) conformity)
Transmit distance
450 feet (137.2m) [Conforms to GR-253-CORE Issue2 (12/95)]
Pulse amplitude
0.36 V thru 0.85 V Conforms to G.703 (10/98) Section 8.1: Table 6
Power level
LPF (200 MHz): 4.7 dBm thru +3.6 dBm (225~450 feet, including cable ) or It requires that the power in a 3 kHz 1 kHz band centered at 22368 kHz be between 1.8 dBm and +5.7 dBm. It further requires that the power in a 3 kHz 1 kHz band centered at 44736 kHz be at least 20 dB below that at 22368 kHz. Conforms to G.703 (10/98) Section 8.1: Table 6
Pulse imbalance Jitter tolerance
NA Conforms to G.752 (1988): Fig 4 Conforms to G.824 (03/93): Fig. 3, Table 2 (f110Hz) as well
Output jitter Mapping jitter
Conforms to G.783 (04/97) Section 10.2.3 BPF (10 Hz thru 400 kHz): 0.40 UIp-p BPF (30kHz thru 400 kHz):0.10 UIp-p Conforms to G.783 (04/97) Table 10-1 (BPF: 30 kHz thru 400 kHz is in further study, according to G.783PR (10/00) Table 15-3)
Specification 5-23
(Continued)
ITEM Combined jitter SPECIFICATION 1: BPF (10 Hz thru 400 kHz): 0.40 UIp-p 2: BPF (10 Hz thru 400 kHz): 0.75 UIp-p 3: BPF (30 kHz thru 400 kHz): 0.075 UIp-p Refer to 34M specification; G.783 (04/97) Table 10-2 conformity requires further study 1, 2 are different because of different pointer sequence 1: Fig. 10-2a), b), c) action 2: Fig. 10-2d) action Conforms to G.783 (10/00) Jitter transfer Jitter tolerance Conforms to G.755 (11/88): Fig. 1 Conforms to GR-499-CORE (12/95): Fig 7-1 Conforms to G.824 (03/93) Section 3.1.1: Fig. 3, Table 2 Parameter modify: f1 10Hz to conform both the above specification Wander generation Conforms to G.783 (04/97) Section 10.2.3 Conforms to G.783 PR (10/00) Section 15.2.3.3.1/15.2.3.3.2
Specification 5-24
5.3.5
STM-1 Electrical Interface

ITEM SPECIFICATION
Pulse shape Pair(s) in each direction Test load impedance Peak-to-peak voltage Rise time between 10% and 90% amplitudes of the measured steady state amplitude Transition timing tolerance referred to the mean value of the 50% amplitude points of negative transitions Return loss Maximum peak-to-peak jitter at an output port
Nominally rectangular and conforming to the masks shown in Figures 22 and 23 One coaxial pair 75 ohms resistive 1 0.1 V 2 ns Negative transitions: 0.1 ns Positive transitions at unit interval boundaries: 0.5 ns Positive transitions at mid-unit intervals: 0.35 ns 15 dB over frequency range 8 MHz to 240 MHz Refer to 4.2/G.825
The waveform of output port can be tested to G.703 reference.

T = 6.43 ns V 0 . 60 0 . 55 0 . 50 0 . 45 0 . 40 ( N o te 4 ) (Note 1) 1 ns 0 .1 n s 0 .1 ns 0.35 ns (Note 1) N om in al p u ls e
1.608 ns 1 ns 0.35 ns
1.608 ns 1 ns 0.1 n s
0 .1 n s
N o m in al z e ro le v e l ( N o te 2 )
0 . 05 0 .0 5
1 ns 0 .4 0 0 .4 5 0 .5 0 0 .5 5 0 .6 0 1 .6 0 8 ns
1 ns 1 ns 1.608 ns (Note 1) (N o te 1)
T1 8 18 9 3 0 -9 2
N e g a ti ve transitions Positive transition at mid-unit i nt e rva l
Mask of a pulse corresponding to a binary 0
Specification 5-25
NOTE: 1. The maximum "steady state" amplitude should not exceed the 0.55 V limit. Overshoots
and other transients are permitted to fall into the dotted area, bounded by the amplitude levels 0.55 V and 0.6 V, provided that they do not exceed the steady state level by more than 0.05 V.
2. For all measurements using these masks, the signal should be AC coupled, using a
capacitor of not less than 0.01 mF, to the input of the oscilloscope used for measurements. The nominal zero level for both masks should be aligned with the oscilloscope trace with no input signal. With the signal then applied, the vertical position of the trace can be adjusted with the objective of meeting the limits of the masks. Any such adjustment should be the same for both masks and should not exceed 0.05 V. This may be checked by removing the input signal again and verifying that the trace lays within 0.05 V of the nominal zero level of the masks.
3. Each pulse in a coded pulse sequence should meet the limits of the relevant mask,
irrespective of the state of the preceding or succeeding pulses, with both pulse masks fixed in the same relation to a common timing reference, i.e. with their nominal start and finish edges coincident. The masks allow for HF jitter caused by intersymbol interference in the output stage, but not for jitter present in the timing signal associated with the source of the interface signal. When using an oscilloscope technique to determine pulse compliance with the mask, it is important that successive traces of the pulses overlay in order to suppress the effects of low frequency jitter. This can be accomplished by several techniques [e.g. a] triggering the oscilloscope on the measured waveform or b) providing both the oscilloscope and the pulse output circuits with the same clock signal.
4. For the purpose of these masks, the rise time and decay time should be measured
between 0.4 V and 0.4 V, and should not exceed 2 ns.
Specification 5-26
Mask of a pulse corresponding to a binary 1
NOTE: 1. The maximum "steady state" amplitude should not exceed the 0.55 V limit. Overshoots
and other transients are permitted to fall into the dotted area, bounded by the amplitude levels 0.55 V and 0.6 V, provided that they do not exceed the steady state level by more than 0.05 V.
2. For all measurements using these masks, the signal should be AC coupled, using a
capacitor of not less than 0.01 F, to the input of the oscilloscope used for measurements. The nominal zero level for both masks should be aligned with the oscilloscope trace with no input signal. With the signal then applied, the vertical position of the trace can be adjusted with the objective of meeting the limits of the masks. Any such adjustment should be the same for both masks and should not exceed 0.05 V. This may be checked by removing the input signal again and verifying that the trace lays within 0.05 V of the nominal zero level of the masks.
Specification 5-27
3. Each pulse in a coded sequence should meet the limits of the relevant mask,
irrespective of the state of the preceding or succeeding pulses, with both pulse masks fixed in the same relation to a common timing reference, i.e. with their nominal start and finish edges coincident. The masks allow for HF jitter caused by intersymbol interference in the output stage, but not for jitter present in the timing signal associated with the source of the interface signal. When using an oscilloscope technique to determine pulse compliance with the mask, it is important that successive traces of the pulses overlay in order to suppress the effects of low frequency jitter. This can be accomplished by several techniques [e.g. a] triggering the oscilloscope on the measured waveform or b] providing both the oscilloscope and the pulse output circuits with the same clock signal].
4. For the purpose of these masks, the rise time and decay time should be measured
between 0.4 V and 0.4 V, and should not exceed 2 ns.
5. The inverse pulse will have the same characteristics, noting that the timing tolerance at
the level of the negative and positive transitions are 0.1 ns and 0.5 ns respectively.
5.3.5.2 Return Loss The attenuation of the coaxial pair should be assumed to follow an approximate f law and to have a maximum insertion loss of 12.7 dB (for STM-1) at a frequency of 78MHz. The return loss of output port is equivalent to that of input port.
Specification 5-28
5.4 Ethernet Interface

5.4.1 10BASE-T interface specification
Parameter
Output Signal Level Output Signal Waveform TP_IDL Start Output Signal Waveform Link Test Pulse Waveform Output Timing Jitter Allowable Cable Length 2.2V-2.8V ISO8802-3 Table 14-1 ISO8802-3 Figure14-10 ISO8802-3 Figure14-12 ISO8802-3 Table 14-1 100m
Criterion
5.4.2
100BASE-TX interface specification

Parameter Specification Criteria
ANSI X3.263-1995 : Annex J AOI Template <5% ANSIX3.263-1995 : 9.1.3 Waveform Overshoot
AOI Template Waveform Overshoot
UTP different Output Voltage (zero-peak) Rising Time(tR) and Falling Time(tF) Signal amplitude symmetry
950mV Vout1050mV
ANSI X3.263-1995 : 9.1.2.2 UTP different Output Voltage
tR/tF; 3.0nsec to 5.0nsec |tR-tF|=<0.5nsec Va : 0.98 to 1.02 Va=+Vout/-Vout
ANSI X3.263-1995 : 9.1.6 Rise/fall times
ANSI X3.263-1995 : 9.1.4 Signal amplitude symmetry ANSI X3.263-1995 : 9.1.9 Jitter ANSI X3.263-1995 : 9.1.8 Duty cycle distortion (DCD)
Jitter Duty cycle distortion (peak-peak) Return loss
<1.4ns <500PS (+/-250 PS)
2MKz~30 MHz16dB 30MHz~60MKHz(16-20 log(f/30MKz))dB 60 MKz~80MHz10dB
ANSI X3.263-1995 : 9.1.5 Return loss
FLP Burst
width = 2ms(typical) interval=16ms(typical)
IEE802.3-2000 Table 28.2.1.1.2
Specification 5-29
5.4.3
GBE interface specification

1000BASE-LX Parameter 62.5m MMF 50m MMF 10m SMF 1000BASE-SX 62.5m MMF 50m MMF Unit
Transmitter Type Signaling speed (range) Wavelength (, range) Trise/Tfall (max;20%-80%;>830nm) Trise/Tfall (max;20%-80%;>830nm) Trise/Tfall (max,20%-80% response time) RMS spectral width(max) Average launch power(max) Average launch power(min) Average launch power of OFF transmitter(max) (b) Extinction Rate(min) RIN(max) Coupled Power Ratio(CPR) (c) (d)
Longwave Laser 1.25100ppm 1270~1355 0.26 4 -3 -11.5 -11.5 -30 9 -120 28<CPR <40 12<CPR <20 1.25100ppm 1270~1355 -3 -19 12 -14.4 2.60 1500 2~550 2~550 Rec.G.652 SC 2~5000 N/A -11.0
Shortwave Laser 1.25100ppm 770~860 0.26 0.21 0.85 See footnote (a) -9.5 -30 9 -117 9<CPR 1.25100ppm 770~860 0 -17 12 -12.5 2.60 1500 2~275 2~550 -13.5 2.20 GBd Nm Ns Ns Ns Nm dBm dBm dBm dB dB/Hz dB GBd Nm dBm dBm dB dBm dB MHz M
Signaling speed Wavelength(range) Average receive power(max) Receive sensitivity Return loss(min) Stressed receive sensitivity((a1) (b1) Vertical eye-closure penalty(c1) Receive electrical 3 dB upper cutoff frequency(max) Target Distance Type of fiber Connector Type
Rec.G.652 SC
Notes of a table: IEEE 802.3-2000
Specification 5-30
Notes of the 1000BASE-SX transmit characteristic: a: The 1000BASE-SX launch power shall be the lesser of the class 1 safety limit as defined by 38.7.2 or the average receive power (max) defined by Table 38-4 b: Examples of an OFF transmitter are: no power supplied to the PMD, laser shutdown for safety conditions, activation of a transmit disable or other optional module laser shut down conditions. During all conditions when the PMA is powered, the ac signal (data) into the transmit port will be valid encoded 8B/10B patterns (this is a requirement to the PCS layers ) except for short durations during system power-on-reset or diagnostics when the PMA is placed in a loopback mode. c: Radial overfilled launches as described in 38A.2, while they may meet CPR ranges, should be avoided. Notes of the 1000BASE-LX transmit characteristic: d: Due to the dual media (single-mode and multimode) support of the LX transmitter, fulfillment of this specification requires a single-mode fiber offset-launch mode-conditioning patch cord described in 38.11.4 for MMF operation. This patch cord is not used for single-mode operation. Notes of the 1000BASE-CX and 1000BASE-LX receive characteristic: a1: Measured with conformance test signal at TP3 (see 38.6.11) for BER=10-12 at the eye center. b1: Measured with a transmit signal having a 9 dB extinction ratio. If another extinction ratio is used, the stressed receive sensitivity should be corrected for the extinction ratio penalty. c1: Vertical eye-closure penalty is a test condition for measuring stressed receives sensitivity. It is not a required characteristic of the receiver.
Specification 5-31
5.5 The Jitter Index of Interface

5.5.1 Input Jitter and Wander Tolerance
5.5.1.1 PDH Interface The input jitter and wander tolerance of PDH interface are shown below:
Interface Maximum Peak-Peak Value (UIp-p) A0 A1 A2 A3 Frequency f0 f10 f9 f8 f1 f2 f3 f4 Pseudo Random Signal 2048 kbit/s 36.9 18 1.5 0.2 1.2 10 Hz 4.88 103 Hz 0.01 Hz 1.667 Hz 20 Hz 2.4 kHz 18 kHz 100 kHz 2 1
15 5
34368 kbit/s 137.5 1.5 0.15 34.4 0.01Hz 0.032Hz 0.13Hz 4.4Hz 100 Hz 1 kHz 10 kHz 800 kHz 2 1
23
44736 kbit/s 805.4 5.0 0.1 1.2 105 Hz 10 Hz 600 Hz 30 kHz 400 kHz 220 1
A0 A3 A1 A2
Characteristic of classic regulator slope-20dB/10
f0
f10 f9
f8 f 1
f2 f3
f4
Jittering frequency (log)
Specification 5-32
5.5.1.2 SDH Interface The input jitter and wander tolerance of SDH interface are shown below:
Interface Maximum Peak-Peak Value (UIp-p) A0 (18 s) A1 (2 s) A2 (0.25 s) A3 A4 Frequency f0 f12 f11 f10 f9 f8 f1 f2 f3 f4 STM-1 2800 311 39 1.5 0.15 1.2 105 Hz 1.78 104 Hz 1.6 103 Hz 1.56 102 Hz 0.125 Hz 19.3 Hz 500 Hz 6.5 kHz 65 kHz 1.3 MHz STM-4 11200 1244 156 1.5 0.15 1.2 105 Hz 1.78 104 Hz 1.6 103 Hz 1.56 102 Hz 0.125 Hz 9.65 Hz 1 kHz 25 kHz 250 kHz 5 MHz STM-16 44790 4977 622 1.5 0.15 1.2 105 Hz 1.78 104 Hz 1.6 103 Hz 1.56 102 Hz 0.125 Hz 12.1 5 kHz 100 kHz 1M Hz 20M Hz
A0 Slope -20dB/10 A1 A2 A3 A4 0 f0 f12 f11 f10 f9 f8 f1 f2 f3 f4 Peak-p jitter and wander
(log)
Frequency (log)
Specification 5-33
5.5.2
Jitter Generation
5.5.2.1 PDH Interface Frequency of band-pass filter for examination, and the maximum jitter for allowable values in PDH network are shown below. As to SDH equipment, the PDH interface jitter measured over a 60 second interval shall not exceed these values. On the edge of SDH and PDH system, jitter accepts these values.
Interface Rate Maximum Peak-Peak Value (UIp-p) Frequency of Band-pass Filter f1 thru f4 f3 thru f4 f1 f3 f4 2048 kbit/s 1.5 0.2 20 Hz 18 kHz 100 kHz 34368 kbit/s 1.5 0.15 100 Hz 10 kHz 800 kHz 44736 kbit/s 5.0 0.1 10 Hz 30 kHz 400 kHz
5.5.2.2 SDH Interface When inputting no jitters, the jitter measured at output port on SDH relay with high-pass filter is not greater than 0.01 UIrms. While no jittering in synchronous input port, the jitters produced at terminal equipment interface should conform to values in the table below, for measuring time surpass 60 seconds.
Interface STM-1e STM-1 STM-4 STM-16 Tester Filter Maximum Peak-Peak Value (UIp-p)
500 Hz thru 1.3 MHz 65 kHz thru 1.3 MHz 500 Hz thru 1.3 MHz 65 kHz thru 1.3 MHz 1 kHz thru 5 MHz 250 kHz thru 5 MHz 5 kHz thru 20 MHz 1 MHz thru 20 MHz
0.50 0.075 0.50 0.10 0.50 0.10 0.50 0.10
Specification 5-34
5.5.3
Jitter Generation by Mapping

When PDH is mapped into SDH, a mapping jitter is generated. The testing values are smaller than values listed in table below:
G.703 2048 kbit/s Tolerance Filter Characteristic -20 dB/dec f1 f3 f4 Maximum Peak-Peak Value for Mapping Jitter (UIp-p) f1 thru f4 f3 thru f4 50 ppm 20 Hz 18 kHz 100 kHz 0.25 0.075 G.703 34368 kbit/s 20 ppm 100 Hz 10 kHz 800 kHz 0.4 0.075 G.703 44736 kbit/s 20 ppm 10 Hz 30 kHz 400 kHz Further study 0.075
5.5.4
Combined Jitter and Wander

Generally, SDH system provides mapping jitter and pointer adjusting jitter whose combinations are called combined jitter. As for combined jitter, four types of the testing series temporarily designated by ITU-T, can basically represent number of conditions for combined jitter. 5.5.4.1 Testing Series Single pointer with opposite polarity: T1
Regular single pointer adding a double pointer: T20.75s T3=2ms T3 T2

b
NOTE: T2 and T3 are defined f only for 2M. Definition for 34M/45M is further study.
Specification 5-35
Regular single pointer that leaks a pointer: T2>0.75s
T2 T2 T2 T2 T2 2*T2
c
Double pointer with opposite polarity: T3=2ms
interval>=10s T3
d
T3
5.5.4.2 Criterion of Combined Jitter
G.703 2048 kbit/s Tolerance High-Through Filter 20 dB/dec f1 f3 f4 Maximum Peak-Peak Value for Combined Jitter(UIp-p) f1 thru f4 f3 thru f4 50 ppm 20 Hz 18 kHz 100 kHz 0.4* 0.075
G.703 34368 kbit/s 20 ppm 100 Hz 10 kHz 800 kHz 0.4/0.75 0.075
*
G.703 44736 kbit/s 20 ppm 10 Hz 30 kHz 400 kHz 0.4/0.75 0.075

*
*: The extreme value 0.4 UI corresponds to pointer testing series shown in a, b and c; the extreme value 0.75 UI corresponds to pointer testing series shown in d, while the extreme value 0.075 UI corresponds to pointer testing series shown in a, b, c and d.
5.5.4.3 MTIE and TDEV
MTIE and TDEV are measured through an equivalent 10 Hz, first-order, low-pass measurement filter, at a maximum sampling time 0 of 1/30 seconds. The minimum measurement period for TDEV is twelve times the integration period (T = 12).
Specification 5-36
When the SEC is in the locked mode of operation, the MTIE measured using the synchronized clock configuration defined in Figure 1a/G.810 should have the limits in Table 5-1, if the temperature is constant (within 1 K):
Table 5-1. Wander Generation (MTIE) with Temperature Stable
MTIE limit Observation interval
40 ns 40
0.1
0.1 < 1 s 1 < 100 s 100 < 1000 s ns
ns
25.25
0.2
The resultant requirement is shown by the thick solid line in Figure 5-1. When temperature effects are included, the allowance for the total MTIE contribution of a single SEC increases by the values in Table 5-2.
Table 5-2. Additional Wander Generation (MTIE) with Temperature Affecting
Additional MTIE allowance Observation interval
0.5 ns 50 ns
100 s > 100 s
The resultant requirements are shown by the thin solid line in Figure 5-1.
Figure 5-1.
Wander Generation (MTIE)
Specification 5-37
When the SEC is in the locked mode of operation, the TDEV measured using the synchronized clock configuration defined in Figure 1a/G.810 should have the limits in Table 5-3, if the temperature is constant (within 1 K):
Table 5-3. Wander Generation (TDEV) with Temperature Stable
TDEV limit Observation interval
3.2 ns 0.64
0.5
0.1 < 25 s ns 25 < 100 s 100 < 1000 s
6.4 ns
The resultant requirements are shown in Figure 5-2.
Figure 5-2.
Wander Generation (TDEV) with Temperature Stable
Specification 5-38
5.6 External Interface

5.6.1 Orderwire
E1 OH (overhead): Handset 600 balanced Rx: 2 dBm Tx: 0 dBm E2 OH (overhead): Handset 600 balanced Rx: 2 dBm Tx: 0 dBm Connector: RJ-11
5.6.2
User Channel
Accessible OH: F1 or E2; one per SDH interface Logical Interface:
64 kbit/s V.11 Contra-directional Co-directional
Connector: RJ-45
5.6.3
Office Alarm
Accessible Output: One per equipment Output: PM DM AB AL Type: Relay contact; Open/Loop Maximum Current: AB/AL: 1A PM,DM: 500 mA Connector: RJ-45
Specification 5-39
5.6.4
Housekeeping Alarm/Control
Accessible port: Eight for Housekeeping Alarm Four for Housekeeping Control Type: HKA [photo-coupler], HKC [relay contact] Open/Loop Connector: RJ-45 Maximum Current/Voltage: (HKC) 0.5 A / 200 V
Specification 5-40
5.7 Environmental Conditions

5.7.1 Temperature
Intra-Station Range: 0 to +45C Intra-Station Short Time: 5 ~ +50C (within 72 consecutive hours; within 15 days a year) Storage:
5 to +50C
Transportation: 5 to +50C
5.7.2
Humidity
Intra-Station Range: 5 to 95 % Storage: Transportation:
5 to 95 % 5 to 95 %
5.7.3
Vibration
1.5 mm/s2 2-9 Hz 5 m/s2 9-200 Hz 40 m/s2 peak 1.5 mm/s2 2-9 Hz 2 5 m/s 9-200 Hz 40 m/s2 peak 3.5 mm/s2 2-9 Hz 10 m/s2 9-200 Hz 15 m/s2 200-500 Hz 300 m/s2 peak
Intra-Station Use:
Storage:
Transportation:
Specification 5-41
5.8 Power Distribution

5.8.1 Power Interface
38.4 V DC thru 72V DC 100 ~ 380W Fuse (15 A DC) FG/BG
Input Voltage: Power Input: Protection: Ground:
NOTE: FG: Frame ground; or protected ground BG: Battery return ground Maximum Power Supply:
Less than 350 W per system.
Specification 5-42
5.8.2
Power Consumption
Total Equipment Power Consumption: 100 to 380W PWR Board Capacity:
15A (DC)
The board consumption is shown as below:

Board CS MCP STM-16 STM1/4 (use as STM-1) S1E STM1/4 (use as STM-4) E12 E31 E32 FE-2 FE-4 GE_A THR_E12W TPS_E12 TPS_S1EW TPS_S1EP TPS_E3W TPS_E3P FAN Max Power Consumption(W) 33 6.6 14.7 6.8 9.7 7.2 9.7 6.4 6.4 13 16 29.93 0 12 0.75 0.75 0.98 0.98 15 Amount 2 1 6 13 10 13 11 10 10 13 13 13 11 10 5 5 5 5 3 Total Power Consumption(W) 66 6.6 88.2 88.4 97 93.6 106.7 64.0 64.0 169 208 389.09 0 120 3.75 3.75 4.9 4.9 45
Specification 5-43
5.9 User Interface

5.9.1 CID Interface
f port: RS232C F port: 10BASET
Protocol: Connector:
Physical Layer:
Both OSI and TCP/IP f port: the pin assignment between RJ45 and D-sub 9pin F port: the pin assignment between RJ45 and RJ45 (Shown as below figure) f port: RS232C Cable (Detail refers to Chapter 8) F port: UTP Straight cable (via HUB)
Connection:
Figure 5-3.
RJ45 Connector for f Port
Figure 5-4. D-sub 9-pin Connector for f Port
Figure 5-5.
RJ45 Connector for F Port
Specification 5-44
5.9.2
NMS
F port: 10BASET (Half/10M) Both OSI and TCP/IP F port: the pin assignment between RJ45 and RJ45 (Shown as Figure 5-5) F port: UTP Straight cable (via HUB)
Physical Layer: Protocol: Connector: Connection:
5.10Physical Specification
5.10.1 V-NODE Subrack Dimensions
Height: Width: Depth: Weight: NOTE: 1. Above dimension includes any projection of subrack. 2. The rearpanel means the PCB board in the back of the V-Node equipment, and the backpanel is a steel board on the back of the V-Node equipment subrack.
487.6 mm 524.4 mm (with rack ear) 272.3 mm 11 Kg (with back panel and filter box, without rear panel)
Specification 5-45

Spectralwave™ V-Node: General Information

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F5259_F04

F5259_F04 GENERAL INFORMATION

SpectralWave is a registered trademark of NEC Corporation.

F5259_F04 GENERAL INFORMATION

1-1 2-1 3-1 4-1

4.1 Mounting Configuration of Interface Board and Modules............. 4-1

4.2 Example of Network Configuration ............................................... 4-12

5.1 System Design Specifications......................................................... 5-1

F5259_F04 GENERAL INFORMATION

5.2 Optical Signal Interface.................................................................. 5-15

5.3 Electrical Signal Interface .............................................................. 5-19

5.4 Ethernet Interface ........................................................................... 5-29

5.5 The Jitter Index of Interface........................................................... 5-32

5.6 External Interface ........................................................................... 5-39

5.7 Environmental Conditions ............................................................. 5-41

5.8 Power Distribution.......................................................................... 5-42

F5259_F04 GENERAL INFORMATION

Power Interface ................................................................................... 5-42 Power Consumption ........................................................................... 5-43

5.9 User Interface.................................................................................. 5-44

5.10 Physical Specification.................................................................... 5-45

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F5259_F04 GENERAL INFORMATION

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F5259_F04 GENERAL INFORMATION

IEEE 802.3ad-1998 Port Trunk

Reference Standards 2-1

F5259_F04 GENERAL INFORMATION

Quality of Service Link Access Procedure - SDH(LAPS)

Reference Standards 2-2

F5259_F04 GENERAL INFORMATION

Equipment Characteristic 3-1

F5259_F04 GENERAL INFORMATION

Equipment Characteristic 3-2

F5259_F04 GENERAL INFORMATION

Equipment Characteristic 3-3

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F5259_F04 GENERAL INFORMATION

4. NETWORK DESIGN USING V-NODE

Figure 4-1 V-Node Front View

Network Design using V-Node 4-1

F5259_F04 GENERAL INFORMATION

Figure 4-2 Slot-Position View

Network Design using V-Node 4-2

F5259_F04 GENERAL INFORMATION

Several kinds of packages are available as shown below:

Network Design using V-Node 4-3

F5259_F04 GENERAL INFORMATION

Y: Yes (an available slot for the package) NOTE:

Network Design using V-Node 4-4

F5259_F04 GENERAL INFORMATION

Figure 4-3 STM-16 Configuration

Figure 4-4 STM-1/4 Configuration

Network Design using V-Node 4-5

F5259_F04 GENERAL INFORMATION

Network Design using V-Node 4-6

Figure 4-5 FE Configuration

Figure 4-6 GE Configuration

F5259_F04 GENERAL INFORMATION

TPS_S1E S1E (W)

Figure 4-7 S1E (with TPS)

Network Design using V-Node 4-7

F5259_F04 GENERAL INFORMATION

Figure 4-8 E31 (with TPS)

Size 152152 9696 2016*2016