I NV I T E D

P A P E R
Hardware/Software Co-design:The Past,
the Present, and Predicting the Future
This paper reviews the past, present, and future prospects for hardware/software
co-design, which is used extensively in e!edded electronic syste products for
autoo!iles, industrial design autoation, avionics, o!ile devices, hoe
appliances, and other products"
#y $u%rgen Teich, Senior &e!er '(((
ABSTRACT | Hardware/software co-design investigates the
concurrent design of hardware and software comonents of
com!e" e!ectronic s#stems$ It tries to e"!oit the s#nerg# of
hardware and software with the goa! to otimi%e and/or satisf#
design constraints such as cost& erformance& and ower of
the fina! roduct$ At the same time& it targets to reduce the
time-to-mar'et frame considera(!#$ This aer resents ma)or
achieve-ments of two decades of research on methods and
too!s for hardware/software codesign (# starting with a
historica! sur-ve# of its roots& (# high!ighting its ma)or research
directions and achievements unti! toda#& and fina!!#& (#
redicting in which direction research in codesign might
evo!ve in the decades to come$
*E+,-RD. | /osimu!ation0 cos#nthesis0 coverification0
design sace e"!oration0 e!ectronic s#stem !eve! 1E.230
hardware/ software codesign0 virtua! rotot#ing
'" ')T*+,-CT'+)
Hardware/software codesign eerged !asically as a new
discipline to design coplex integrated circuits .'Cs/ in
the early 0112s" 3t that tie, it was already clear that
large 04- and 56-! icroprocessors would not 7ust !e
availa!le as discrete coponents on !oard-level systes,
!ut as software-prograa!le coponents of any 'C
design"
4anuscrit received Decem(er 56& 78550 acceted Decem(er 78& 7855$
Date of u(!ication 4arch 77& 78570 date of current version 4a# 58& 7857$
The author is with the Deartment of /omuter .cience& 9niversit# of
Er!angen-Nurem(erg& :58;< Er!angen& =erman# 1e-mai!> teich?cs$fau$de3$
Digita! -()ect Identifier> 58$558:/@PR-/$7855$75<788:
3t that tie, the concurrent design of hardware and
software was already daily !usiness, at least to
icroprocessor copanies, !y having carefully to decide
how to design the interface !etween the icroprocessor
hardware and the software" This tas8 involving the
definition and ipleentation of the instruction set
architecture has not, however, !een consciously treated as
a tas8 of codesign yet" )evertheless, it did otivate and
stiulate those re-search goals that today9s codesign
ethodologies already try to accoplish: satisfying the
need for syste-level de-sign .S:,/ autoation,
allowing the developent of cor-rect electronic systes
coprising !illions of transistors, running progras with
illion lines of codes, and finally, integrating not only a
single icroprocessor, !ut possi!ly ultiple
icroprocessors on a single chip ;syste-on-a-chip
.SoC/< with or without any accelerators, and coplet-ing
such a design process within a typical 0=>6?-onth tie-
to-ar8et frae"
,riven !y the technological advances predicted !y
@ordon &oore, hardware/software codesign techniAues
have !ecoe a ust for a successful electronic syste
design today and, as such, are used ore and ore in
copanies that are developing e!edded electronic sys-
te products" Here, the nu!er and range of application
doains that are steadily increasing include iportant
industrial !ranches such as autootive, industrial design
autoation, avionics, o!ile devices, hoe appliances,
and any ore" Finally, for our future of expected di-
inishing technical progressBthe life after &oore9s lawB
codesign ight !ecoe even ore iportant for two
reasons"
Bol" 022, &ay 05th, 6206 C Proceedings of the
'((( 5A
5
+n the one hand,
sale nu!ers of
successful new
technical products
will not !e driven so
uch anyore !y
7ust technological
progress, !ut ore
and ore !y tools
to design !etter
Auality and ore
relia!le systes
with a given
technology than
any copetitor" +n
the other hand, the
slowdown of
technological
progress will also
7ustify to spend
ore design tie
on a careful
analysis and
explora-tion of
design options"
)ow, !efore
delving into
technical topics, the
a7or purposes and
intentions of
hardware/software
codesign are
suariDed" These
are explained !y
loo8ing at different
interpretations of the
sylla!le co of the
word codesign"
E Co-
ordination:
Codesign
techniAues
are used
today to
coordinate
the design
steps of
interdiscipli
nary design
groups
including
firware,
operating
sys-te
.+S/, and
application
developers
on the
software
side, as well
as hardware
developers
and chip
designers on
the other
side to wor8
together on
all parts of a
syste" This
is also the
original
interpretatio
n of the
:atin
sylla!le co
in the word
codesign"
The
following
other
interpretatio
ns are ore
su!tle"
E Co-
ncurrency:
Tight tie-
to-ar8et
windows
force
hardware
and
software
developers
to wor8
con-
currently
instead of
starting the
firware
and
software
developen
t as well as
their test
only after
the
hardware
platfor is
availa!le" 't
can !e seen
that
codesign
has
provided an
enorous
progress to
avoid this
!ottlenec8
!y either
starting
fro an
executa!le
specification
and/or
applying the
concept of
virtual
platfors
and virtual
prototyping
in order to
run the
concurrently
developed
soft-ware on
a siulation
odel of the
platfor
already at a
very early
stage" 3lso,
testing and
partitioning
to
concurrently
executing
software
and
hardware
coponents
reAuires
special
cosiulatio
n tech-
niAues to
reflect
concurrency
and
synchroniDa
tion of
su!systes"
E Co-rrectness:
)eedless to
say, the
correctness
chal-lenges
of coplex
hardware
and software
reAuire
techniAues to
not only
verify the
correctness
of each
individual
su!syste,
!ut also
coverify
their correct
interactions
after their
integration"
E Co-plexity:
+f course,
codesign
techniAues
are ainly
driven !y the
coplexity
of today9s
electro-nic
syste
designs and
serve as a
eans .or at
least try/ to
close the
well-8nown
design gap to
produce
correctly
wor8ing and
highly
optiiDed
.e"g", with
respect to
cost, power,
perforance
/ syste
ipleentat
ions"
This paper gives
a survey on the
historic
achieveents and
current research
directions of
hardware/software
codesign and is
structured as
follows" Starting
with a suary of
the historic roots of
codesign techniAues
and corresponding
achieveents
!eginning in the
early 0112s in
Section ', the a7or
facets and availa!le
ethodologies of
odern codesign are
presented in Section
''"
Su!seAuently, we try
also to predict the
future of codesign
ethodologies that
will need to eerge
in the next decades"
These changes and
reAuired future
developents are on
the one hand
stiulated !y clouds
coing up on
&oore9s horiDon to
deal with the
growing
iperfection and
varia!ility at the root
coponents of each
codesign: the
transistor" Here, the
hardware/software
tradeoff and
interplay will
definitely !ecoe
ore iportant in
order to solve
dependa!ility issues"
+n the other hand,
we can recogniDe a
trend and desire to
!uild ore
flexi!ility ;0< and
runtie adaption
into a syste design
for the purpose of
optiiDation and
reduction of the
syste cost" Thus,
we will see that error
resiliency as well as
adaptivity will
reAuire to change the
syste function-ality
and partitioning into
hardware and
software dyna-
ically at runtie"
Hence, soe
codesign techniAues
will need to ove
into the product so
as to achieve the
reAuired adaptivity
online" 3s a atter
of fact, this opens a
variety of new
challenges that need
to !e solved in the
future"
''" TH(
(B+:-T'+) +F
C+,(S'@)
'n this section, the
evolution of
codesign is
suariDed starting
as an eerging
discipline in the
early 0112s to a
ainstrea
engineering
technology in its
second generation"
)ote that the
literature availa!le
on a7or achieve-
ents as well as
tools and
fraewor8s on
codesign has
!ecoe so vast
0
that it is ipossi!le
to survey all of this
eritorious wor8 in
a single paper"
Therefore, the
a7or research
thees addressed in
each decade of
research ay only
!e ephasiDed !y
highlighting soe
iportant
approaches"
3" (arly For8
3lthough the
7oint design of
hardware and
software has !een
exercised already
since the
introduction of the
first icroprocessor
!y the 7oint
engineering of
hardware
architecture and
instruction set
architecture, the
discovery and
su!seAuent !oo
!y considering
codesign as an
essential step
toward S:,
autoation of
coplex electronic
systes started in
the 01=2s ;6< and
early 0112s ;5<, ;?<,
respectively"
Hardware/softwa
re codesign,
soeties also
naed
software/hardware
codesign or 7ust
codesign
eAuivalently, started
to !e considered as
the process of
concurrent and
coordinated design
of an electronic
syste coprising
hardware as well as
software coponents
!ased on a sys-te
description that is
ipleentation
independent !y the
aid of design
autoation"
'n the initial
wor8 !y Pra8ash
and Par8er ;G<, a
cosyn-thesis
pro!le was
forulated as a
ixed integer-
linear
0
This is siilar to the
aount of different
writing options availa!le
for the discipline of
hardware/software
codesign itself
"
progra which
siultaneously
deterines a
ultiprocessor
topology as well as a
schedule and
allocation of tas8s
onto the architecture"
Since then, the
pro!le of
autoatically
partitioning tas8s or
processes into
hardware and
software was soon
recogniDed as an
increasingly
iportant research
topic with the advent
of foring a research
counity starting in
0116 ;4<" This first
'F'P 'nternational
For8shop on
Hardware/Software
Codesign too8 place
in @rassau, @erany"
-nder this nae or
siply
C+,(S/C3SH(,
a7or su!seAuent
events dedicated to
this new research
field were organiDed
in Colorado .0116/,
Ca!ridge, &3
.0115/ and @reno!le,
France .011?/,
respectively" :ater,
the event was siply
called C+,(S and
organiDed in places
such as
#raunschweig,
@erany .011H/,
Seattle, F3 .011=/,
*oe, 'taly .0111/,
San ,iego, C3
.6222/, Copenhagen,
,enar8 .6220/, and
(stes Par8, C+
.6226/" Finally, in
6225, C+,(S
!ecae the
'nternational
Conference on
Hardware/Software
Codesign and Syste
Synthesis ;H< as a
erger with the '(((
'nternational
Syposiu on
Syste Synthesis"
Since then, it has !een
still the a7or yearly
conference event
worldwide focusing
on all issues of
hardware/software
codesign" Since 6224,
this iportant event
has !een organiDed
under the direction of
the (!edded
Systes Fee8
.(SF((I/ ;H< with
other a7or
conferences such as
(&S+FT and
C3S(S"
#" Codesign
3chieveents:
The First
@eneration
'n the early years,
uch focus had !een
put on tac8ling the
pro!le of
partitioning a given
functional
specification into
hardware and
software, hence a
pro!le of !iparti-
tioning" 3 given
functional
specification such as a
set of counicating
odules or tas8s
specified in a C-li8e
dialect is apped
onto a given hardware
platfor consisting of
a single processor
central processing
unit .CP-/ and a
user-defined
.application-specific/
hardware !loc8 or
application-specific
integrated circuit
.3S'C/ with !oth
parts couni-cating
over a !us and using a
shared eory or
registers for !uffer
ipleentation"
Hence, except for the
Auestion which parts
to ipleent on the
3S'C, the target
platfor was already
fixed" Here, two
initial Auite
copleentary
approaches are worth
highlighting: 'n the
Bulcan approach
developed !y @upta
et al" in Stanford, C3
;=<, the idea was to
start with a hardware-
only solution and to
igrate as any tas8s
as possi!le to
software while
satisfying
perforance
constraints with the
goal to reduce design
costs" The Cosya
design syste
developed
siultaneously at the
Technical -niversity
of #raunschweig ;1<
too8 exactly the
opposite point of
departure !y starting
with a software-only
partition of !loc8s
with su!seAuent
igration of tas8s to
hardware in order to
satisfy perforance
constraints while
trying to iniiDe the
cost of the resulting
hardware !loc8s"
(ven if these two
approaches also
involved the
application of high-
level hardware
synthesis within the
partitioning loop to
estiate the
perforance of
different hardware
ipleen-tations of
tas8s, !oth early
approaches were Auite
restricted not only !y
the siple
architectural odel,
!ut also in the
execution odel: !oth
assued that the
ipleentation was
single-threaded and
that the CP- and
3S'C wor8ed
utually
exclusively" Thus,
the CP- had to wait
in an idle ode for
the hardware to
coplete a function
and was thus
treated rather as an
accelerator and not
even as a
coprocessor"
)evertheless, these
two early
approaches
stiulated a lot of
wor8 on su!seAuent
investigations of
partitioning
approaches and
architectural
extensions"
C" Codesign
3chieveents:
The Second
@eneration
'n the next few
years and until
the early 6222s,
not only the
pro!le of
hardware/softwa
re partitioning
was ela!orated
on ore and
extended
considera!ly for
ore coplex
types of
architectures,
including ore
than one CP-,
!ut also the
assuption of
7ust single-
threaded prog-
ra execution
was extended to
ultiprograi
ng and
ultiprocessing"
Finally, also
cosiulation
;02<, ;00<
started to
!ecoe an
iportant area
of research for
the early
validation of
design
decisions"
'n cosiulation,
the execution of
software on the CP-
is siulated using a
virtual odel of the
processor hard-ware
or together with the
synthesiDed
hardware part of the
syste design" The
reason for doing so
is the coplexity of
the syste design
when perforing a
pure gate level or
register transfer level
.*T:/ hardware
siulation, which is
typically uch too
slow" Therefore, the
processors need to
!e odeled at a
higher level of
a!straction than the
ipleented
hardware part"
3ccording to ;06<,
the cosi-ulation
pro!le lies in
coupling different
odels to a8e the
hardware siulation
sufficiently accurate"
3n exaple product
at that tie was
Sealess CBS fro
&entor @raphics
that used a processor
odel .i"e", an
instruction set
siulator/ and !us
odels to a!stract
processor inter-
action with the
eory" 3lthough
an even ore
a!stract !ehavioral
odeling of the
software ay
a!stract co-pletely
fro the hardware
!y only odeling the
interface tiing
!ehavior, and !y
allowing the
software siulation
to run on any host
coupled to a
siulator of the
hardware parts,
tiing and
perforance analysis
is typically re-
stricted here to the
hardware part" 'n the
area of cosi-
ulation, Jivo7novic
and &eyr ;00<
proposed to also use
copiled siulation
to speed up
cosiulation" 3n
ipor-tant
fraewor8 for
cosiulation of
heterogeneous
systes was and still
is the Ptoley
fraewor8 fro the
-niversity of
California at
#er8eley ;05<" 't
ay !e used to
cosiulate and
understand the
relationships
!etween several
odels of
coputation such as
data flow and
discrete-event
odels" 3lso, foral
techniAues for
tiing analysis have
evolved in the
counity, nota!ly
:i and &ali89s algo-
riths for worst case
execution tie
.FC(T/ analysis
;0?< and the
application and
perforance analysis
of schedul-ing
techniAues 8nown
fro real-tie
systes to estiate
!est case, worst case,
and average case
tiing !ehavior of
ixed
hardware/software
systes adeAuately"
&ission
Stateents on the
Future of Codesign:
'n the fol-lowing,
conclusions and
predictions on
future research
directions in
codesign, again
reflecting the
individual opi-nion
of the author, are
suariDed"
E The Fall of
Coplexity:
SoC
technology
will !e
already
doinated
!y 022>
0222 core
ultipro-
cessing on a
chip !y
6262"
Changes
will affect
the way
copanies
design
e!edded
software
and new
languages,
and tool
chains will
need to
eerge in
order to
cope with
this
enorous
coplexity"
,evelope
nt of
concurrent
software
and exploi-
tation of
parallelis
will
definitely
find a
renais-
sanceK this
tie not for
applications
running in
coputer
centers and
in high-
perforanc
e co-
puting, !ut
as part of
low-cost
e!edded
syste
daily-life
devices"
E The Fall of
Heterogenei
ty: 'n order
to cope with
the Auest to
also include
the
environen
t in the
design of
future
cy!er>
physical
systes, the
heterogene-
ity will
definitely
continue to
grow as
well in
SoCs as in
distri!uted
systes of
systes"
Here, the
facets of
3/,,
echanical/
electronic,
and
controller/
scheduler
codesign
have !een
entioned
as inter-
esting
research
directions"
The Fall of
,ependa!ility:
3lso, as has !een
shown, the
correctness of
future electronic
e!edded sys-tes
is definitely
enaced !y the
iperfection of
future transistor
technology"
Codesign will !e
an-datory to
detect and
copensate for
such errors as well
as aging effects in
the future
"However, we are
afraid that
potentially also
other levels of
a!straction will !e
infiltrated and
changes reAuired
such as pro!a!i-
listic logic,
revolutionary new
ways to code data,
and for coputer
arithetics" This
ight also happen
due to postsilicon
inventions reAuiring
a coplete
renovation of the
codesign house"
E The )eed for
Self-
3daptivity: Fe
do !elieve that
not only due to
dependa!ility
reasons !ut also
due to the
uncertainty of
the
environent
and cou-
nication
partners of
coplex
interacting
cy!er> physical
systes,
runtie
adaptivity will
!e a ust for
guaranteeing
the efficiency
of a syste"
,ue to the
availa!ility of
reconfigura!le
hardware and
ulticore
processing,
which in our
view will also
ta8e a ore
iportant role
in the tool chain
for syste
siulation and
evaluation,
online codesign
techniAues
ight !ecoe
standard in the
future"
E The )eed for
Cross-:ayer
Coverification:
+ne huge part
of the design
tie according
to Fig" 0 is
already spent
on the
verification,
either in a
siulative way
or using foral
techniAues" Fe
!elieve that
with respect to
the a!ove
threats,
coverification
;61< will finally
reAuire an
increasing
proportion of
the design tie
in the future"
Progress in (S:
ight therefore
diinish in
case
verification
techniAues
cannot cope
with the
odeling of
errors and ways
to retrieve and
correct the,
or, even !etter,
prove that
certain
properties
forulated as
constraints
during
synthesis will
hold in the
ipleentation
!y construction"
'n our view, too
little effort is
spent in this
iportant area
of 7oint
coverification
of hardware
and software" 'n
the dou!le roof
odel
.according to
Fig" 6/, the
verification
pro-cess on one
level of
a!straction
needs to prove
that an
ipleentation
.the structural
view/ indeed
satisfies the
specification
.!ehavioral
view/" 3
text!oo8
dedicated 7ust
to presenting
which veri-
fication
techniAues exist
today for
software verifi-
cation as well
as hardware
verification and
on which level
of the dou!le
roof odel
these ay !e
applied has
!een pu!lished
in 6202"
Suary
@enerations of
Codesign: Fe
conclude this paper
with our historic
view on four
distinguished
gener-ations of
codesign" These are
suariDed in
Ta!le 0"
Finally, it is also
very fortunate to see
fro a researcher9s
point of view that
any open and
fundaental
Auestions will
definitely appear and
that these will
stiulate and 8eep
our lives !usy,
hopefully for the
next 022 years"
?
h
3c8nowledgent
The author
would li8e to
particularly than8
the fol-lowing
copanies that
stiulated the
research on advances
in new codesign
technologies through
funding and
evaluation: '#& for
applying codesign
during spe-cification
and for perforance
analysis of chip
designs and syste
architectures as well
as during firware
and test software
developentK
Sieens 'ndustrial
and Healthcare
Sectors for design
space exploration
and syste
synthesisK 'ntel
&o!ile
Counications
.'&C/ for applying
(S: design for
power odeling and
evaluation of o!ile
counication
platforsK and 3-,'
and ,ailer for
syste-level
siulation and
analysis of tiing of
coplex (C-
architecture designs
in the autootive
sector" The author
would also li8e to
than8 several experts
in the field for
suggestions on how
to iprove a draft
version of this paper,
in particular, to S"
Cha8ra!orty, P" (les,
S" Ha, T" &itra, and
C" Hau!elt, a forer
ain developer of
Syste
Co,esigner"
Finally, he would
also li8e to than8 all
the e!ers and
researchers at the
Chair for
Hardware/ Software
Co-,esign for
supportive criticis
and suggestions for
iproveents, in
particular, to $"
Fal8, $" @ladigau,
&" @laB, F"
Hannig, &"
Streu!u%hr, S"
Filderann, and
," Jiener" Than8s
also to the @eran
*esearch Founda-
tion .,F@/ for
funding its
Transregional
Colla!orative
*esearch Center
SF#/T*=1"
*(F(*()C(S
;0< C" Hau!elt, $"
Teich, I" *ichter,
and *" (rnst,
#Syste design for
flexi!ility,; in Proc"
Conf" ,es" 3uto"
Test (ur",
Fashington, ,C,
6226, pp" =G?>=40"
;6< C" -" Sith,
@" 3" Fran8, and $"
:" Cuadrado, #3n
architecture design
and assessent
syste for
software/hardware
codesign,; in
Proc" 66nd
3C&/'(((
,es" 3uto"
Conf", 01=G,
pp" ?0H>?6?"
;5< F" Folf,
#Special issue
on hardware/
software
codesign,; '(((
,es" Test
Coput", vol"
02, no" 5, p" G,
Sep" 0115"
;?< @" ,e
&icheli,
#(xtending C3,
tools and
techniAues,
; Coputer, vol"
64, no" 0,
pp" =G>=H, $an"
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;G< S" Pra8ash
and 3" C" Par8er,
#Synthesis
of application-
specific
heterogeneous
ultiprocessor
systes,; in
Proc" 01th 3nnu"
'nt" Syp"
Coput" 3rchit",
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Hardware/Sof
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Codesign,
0116"
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Systes
Fee8"
;+nline<"
3vaila!le:
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;=< *" I"
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#Hardware-
software
cosynthesis for
digital systes,
; '((( ,es" Test
Coput", vol" 02,
no" 5, pp" 61>?0,
$ul" 0115"
;1< *" (rnst, $"
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#Hardware-
software
cosynthesis for
icrocontrollers,
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Coput", vol" 02,
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P" Paulin, and 3"
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cosiulation and
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;00< B" Jivo7novic and H"
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siulation,; in Proc"
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of e!edded
systes: Status and
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#Ptoley: 3
fraewor8 for
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;0?< N"-T" S" :i, S" &ali8,
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estiation of
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cache odeling,; in
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*" *acu, I" *ichter,
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perforance
analysisBThe
SyT3/S approach,
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synthesis using evolutionary
algoriths,; $" ,es" 3uto"
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#raunschweig, @erany,
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ethodology for e!edded
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622H"
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SpeDifi8ation
und
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@erany:
Springer-Berlag,
6202"
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Physical Systes
3pproach, 0st ed"
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-S3: :ee and
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