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LED TV

SERVICE MANUAL
CHASSIS : LA32B

MODEL : 32LN5300 32LN5300-UB


CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67647401 (1212-REV00) Printed in Korea


CONTENTS

CONTENTS .............................................................................................. 2

PRODUCT SAFETY ................................................................................. 3

SPECIFICATION ....................................................................................... 4

ADJUSTMENT INSTRUCTION ................................................................ 9

TROUBLE SHOOTING ............................................................................ 16

BLOCK DIAGRAM.................................................................................. 22

EXPLODED VIEW .................................................................................. 24

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

-2-
SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE


Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed


metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)


With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright © LG Electronics. Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder ES
on page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board mod- 6. Do not remove a replacement ES device from its protective
ule or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads electri-
other electrical connection. cally shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an explo- to the chassis or circuit assembly into which the device will be
sion hazard. installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or circuit,
high voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropriate
(by volume) isopropyl alcohol (90 % - 99 % strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand against
ily by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.

Copyright © LG Electronics. Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed whenever
gently prying up on the lead with the soldering iron tip as the this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remaining good copper pattern. Solder the overlapped area and clip off
on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.

Fuse and Conventional Resistor


Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.

Copyright © LG Electronics. Inc. All rights reserved. -5- LGE Internal Use Only
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range 3. Test method


This spec sheet is applied LED TV with LA32Bchassis 1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : UL, CSA, IEC specification
- EMC: FCC, ICES, IEC specification
2. Test condition
Each part is tested as below without special notice.

1) Temperature : 25 ºC ± 5 ºC(77 ± 9 ºF) , CST : 40 ºC±5 ºC


2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
Market Input voltage Frequency Remark
USA 110~240V 50/60Hz Standard Voltage of each
product is marked by
models

4) Specification and performance of each parts are followed


each drawing and specification by part number in
accordance with BOM
5) The receiver must be operated for about 20 minutes prior to
the adjustment

4. General Specification
No Item Specification Result Remark
1. Receiving System 1) ATSC / NTSC-M / 64 QAM / 256 QAM
2. Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
3. Input Voltage AC 100 ~ 240V 50/60Hz Mark : 110V, 60Hz (N.America)
4. Market NORTH AMERICA
5. Screen Size 32/39/42/47/50/55inch Wide 55LN5400-UA
(1920 × 1080) 50LN5400-UA
47LN5400-UA
42LN5400-UA
42LN5300-UB
39LN5300-UB
32LN5300-UB
55LN5200-UA
47LN5200-UA
42LN5200-UA
32/37inch Wide (1366 × 768) 37LN530B-UA
32LN530B-UA
32LN520B-UA
6. Aspect Ratio 16:9
7. Tuning System FS

Copyright © LG Electronics. Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
No Item Specification Result Remark
8. Module POLA LC550DUK-SEE1 LGD 55LN5400-UA
Direct LC500DUE-SFR1 LGD 50LN5400-UA
Direct LC470DUE-SFR1 LGD 47LN5400-UA
Direct LC420DUE-SFR1 LGD 42LN5400-UA
Direct LC420DUE-SFR1 LGD 42LN5300-UB
POLA TBD AUO 42LN5300-UB
POLA HC420DUN-SLFP1 LGD 42LN5300-UB
POLA HC390DUN-VCFP1 CMI 39LN5300-UB
POLA TBD AUO 39LN5300-UB
POLA HC320DXN-VSFP1 CSOT 32LN5300-UB
Direct LC320DUE-SFR1 LGD 32LN5300-UB
Direct LC370DXE-SFR1 LGD 37LN530B-UA
Direct LC320DXE-SFR1 LGD 32LN530B-UA
POLA HC320DXN-SLFP1 LGD 32LN530B-UA
Direct i-D LGD 55LN5200-UA
Direct i-D LGD 47LN5200-UA
Direct i-D LGD 42LN5200-UA
Direct i-D LGD 32LN520B-UA
9. Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10. Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %

Copyright © LG Electronics. Inc. All rights reserved. -7- LGE Internal Use Only
Only for training and service purposes
5. Supported video resolutions
5.1. Component input(Y, CB/PB, CR/PR)
No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
1. 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
3. 720*480 31.50 60.00 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.00 SDTV 480P
5. 1280*720 45.00 60.00 74.25 HDTV 720P
6. 1280*720 44.96 59.94 74.176 HDTV 720P
7. 1920*1080 33.75 60.00 74.25 HDTV 1080I
8. 1920*1080 33.72 59.94 74.176 HDTV 1080I
9. 1920*1080 67.50 60.00 148.50 HDTV 1080P
10. 1920*1080 67.432 59.94 148.352 HDTV 1080P
11. 1920*1080 27.00 24.00 74.25 HDTV 1080P
12. 1920*1080 26.97 23.94 74.176 HDTV 1080P
13. 1920*1080 33.75 30.00 74.25 HDTV 1080P
14. 1920*1080 33.71 29.97 74.176 HDTV 1080P

5.2. HDMI Input (DTV)

No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed


DTV
1. 720*480 31.47 60.00 27.027 SDTV 480P
2. 720*480 31.47 59.94 27.00 SDTV 480P
3. 1280*720 45.00 60.00 74.25 HDTV 720P
4. 1280*720 44.96 59.94 74.176 HDTV 720P
5. 1920*1080 33.75 60.00 74.25 HDTV 1080I
6. 1920*1080 33.72 59.94 74.176 HDTV 1080I
7. 1920*1080 67.50 60.00 148.50 HDTV 1080P
8. 1920*1080 67.432 59.94 148.352 HDTV 1080P
9. 1920*1080 27.00 24.00 74.25 HDTV 1080P
10. 1920*1080 26.97 23.976 74.176 HDTV 1080P
11. 1920*1080 33.75 30.00 74.25 HDTV 1080P
12. 1920*1080 33.71 29.97 74.176 HDTV 1080P

Copyright © LG Electronics. Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application 4. MAIN PCBA Adjustments
This spec. sheet applies to LA32B Chassis applied LED TV all
models manufactured in TV factory * Download
(1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
(2) Set as below, and then click “Auto Detect” and check “OK”
2. Specification message
(1) Because this is not a hot chassis, it is not necessary to use If display “Error”, Check connect computer, jig, and set.
an isolation transformer. However, the use of isolation (3) Click “Connect” tab. If display “Can’t ”, Check connect
transformer will help protect test instrument. computer, jig, and set.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 ±5 ºC of temperature and 65±10% of relative humidity if (1) (3)
there is no specific designation
(4) The input voltage of the receiver must keep 100~240V,
50/60Hz
(5) At first Worker must turn on the SET by using Power Only
key.
(6) The receiver must be operated for about 5 minutes prior to (2) OK
the adjustment when module is in the circumstance of over
15 ºC
In case of keeping module is in the circumstance of 0°C, it
should be placed in the circumstance of above 15°C for 2
hours
Please Check the Speed :
In case of keeping module is in the circumstance of below To use speed between from 200KHz to 400KHz
-20°C, it should be placed in the circumstance of above
15°C for 3 hours. (4) Click “Read” tab, and then load download file(XXXX.bin) by
clicking “Read”
※ Caution
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong. (4)
Digital pattern 13ch and/or Cross hatch pattern 09ch), there
can some afterimage in the black level area
filexxx.bin

3. Adjustment items
3.1. Main PCBA Adjustments
(1) ADC adjustment : ADC adjustment is OTP (Auto ADC)
(2) EDID download : HDMI

■ Above adjustment items can be also performed in Final


Assembly if needed. (5) Click “Auto” tab and set as below.
Both Board-level and Final assembly adjustment items can (6) Click “Run”.
be check using In-Start Menu (1.Adjust Check). (7) After downloading, check “OK” message.

3.2. Final assembly adjustment


(1) White Balance adjustment (5)

(2) RS-232C functionality check


(3) Factory Option setting per destination
(4) Shipment mode setting (In-Stop)
(5) GND and HI-POT test (7) ……….OK

3.3. Appendix
(1) Shipment conditions (6)
(2) Tool option menu
(3) USB Download (S/W Update, Option and Service only)
(4) Preset CH Information

Copyright © LG Electronics. Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
4.1. ADC Adjustment 4.2.5. EDID DATA
4.1.1. Overview 4.2.5.1. North America (PCM)
▪ ADC adjustment is needed to find the optimum black level 4.2.5.1.1. FHD Model
and gain in Analog-to-Digital device and to compensate RGB
deviation. ■ HDMI 1-FHD-8BIT (C/S : E808)
▪ ADC adjustment is OTP (Auto ADC) EDID Block 0, Bytes 0-127 [00H-7FH]

0 1 2 3 4 5 6 7 8 9 A B C D E F
4.2. EDID Download -----------------------------------------------------------------------------
4.2.1. Overview 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
▪ I t is a VESA regulation. A PC or a MNT will display an 10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
optimal resolution through information sharing without any 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
necessity of user input. It is a realization of “Plug and Play”. 30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
4.2.2. Equipment 50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
(1) Since EDID data is embedded, EDID download JIG, HDMI 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
cable is not need. 70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
(2) Adjust by using remote controller
EDID Block 1, Bytes 128-255 [80H-FFH]
4.2.3. Download method (using DFT)
※ PC(for communication through RS-232C), UART baud rate: 0 1 2 3 4 5 6 7 8 9 A B C D E F
115200 bps -----------------------------------------------------------------------------
Command : aa 00 00 (Start Factory mode) 0 | 02 03 19 F1 48 90 22 20 05 04 03 02 01 23 09 57
Command : ae 00 10 (Download All EDID) 10 | 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 71 38 2D
Command : aa 00 90 (End of Factory mode) 20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
4.2.4. Download method (using Service Remocon)
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
(1) Press Adj. key on the Adj. R/C.
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
(2) Select EDID D/L menu.
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08
(3) By pressing Enter key, EDID download will begin
(4) If Download is successful, OK is display, but If Download is
■ HDMI 2-FHD-8BIT (C/S : E8F8)
failure, NG is displayed.
EDID Block 0, Bytes 0-127 [00H-7FH]
(5) If Download is failure, Re-try downloads.
※Caution : W hen EDID Download, must remove HDMI
0 1 2 3 4 5 6 7 8 9 A B C D E F
Cable.
-----------------------------------------------------------------------------
(6) EDID Write confirmation
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
EDID D/L (PCM) 10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
HDMI1 : OK 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
HDMI2 : OK 40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8

EDID Block 1, Bytes 128-255 [80H-FFH]

0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 02 03 19 F1 48 90 22 20 05 04 03 02 01 23 09 57
10 | 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 71 38 2D
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F8

Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
4.2.5.1.2. HD Model 4.2.5.2. AC3 EDID Data
4.2.5.2.1. FHD Model
■ HDMI 1-HD (C/S : 7008)
EDID Block 0, Bytes 0-127 [00H-7FH] ■ HDMI 1-FHD-8BIT (C/S : E896)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
----------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 -----------------------------------------------------------------------------
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
EDID Block 1, Bytes 128-255 [80H-FFH]
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
----------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57 -----------------------------------------------------------------------------
10 | 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 71 38 2D 0 | 02 03 1C F1 48 90 22 20 05 04 03 02 01 26 15 07
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71 10 | 50 09 57 07 67 03 0C 00 10 00 80 1E 02 3A 80 18
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C 30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00 40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 96
■ HDMI 2-HD (C/S : 70F8)
EDID Block 0, Bytes 0-127 [00H-7FH] ■ HDMI 2-FHD-8BIT (C/S : E886)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
----------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 -----------------------------------------------------------------------------
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
EDID Block 1, Bytes 128-255 [80H-FFH]
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
----------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57 -----------------------------------------------------------------------------
10 | 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 71 38 2D 0 | 02 03 1C F1 48 90 22 20 05 04 03 02 01 26 15 07
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71 10 | 50 09 57 07 67 03 0C 00 20 00 80 1E 02 3A 80 18
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C 30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00 40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F8 60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 86

Copyright © LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
4.2.5.2.2. HD Model 5. Final Assembly Adjustment
■ HDMI 1-HD (C/S : 7096) 5.1. White Balance Adjustment
EDID Block 0, Bytes 0-127 [00H-7FH] 5.1.1. Overview
5.1.1.1. W/B adj. Objective & How-it-works
0 1 2 3 4 5 6 7 8 9 A B C D E F (1) Objective: To reduce each Panel’s W/B deviation
----------------------------------------------------------------------------- (2) How-it-works: When R/G/B gain in the OSD is at 192, it
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 means the panel is at its Full Dynamic Range. In order to
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 prevent saturation of Full Dynamic range and data, one of
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 R/G/B is fixed at 192, and the other two is lowered to find
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 the desired value.
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 (3) Adj. condition: normal temperature
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A - Surrounding Temperature: 25±5 ºC
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC - Warm-up time: About 5 Min
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70 - Surrounding Humidity: 20% ~ 80%
- Before White balance adjustment, Keep power on status,
EDID Block 1, Bytes 128-255 [80H-FFH] don’t power off

0 1 2 3 4 5 6 7 8 9 A B C D E F 5.1.1.2. Adj. condition and cautionary items


----------------------------------------------------------------------------- (1) Lighting condition in surrounding area surrounding lighting
0 | 02 03 1C F1 48 10 22 20 05 84 03 02 01 26 15 07 should be lower 10 lux. Try to isolate adj. area into dark
10 | 50 09 57 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 surrounding.
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D (2) Probe location: Color Analyzer (CA-210) probe should be
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E within 10cm and perpendicular of the module surface
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 (80°~ 100°)
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 (3) Aging time
60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00 - A fter Aging Start, Keep the Power ON status during 5
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 96 Minutes.
- In case of LCD, Back-light on should be checked using no
■ HDMI 2-HD (C/S : 7086) signal or Full-white pattern.
EDID Block 0, Bytes 0-127 [00H-7FH]

0 1 2 3 4 5 6 7 8 9 A B C D E F 5.1.2. Equipment
----------------------------------------------------------------------------- (1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 CH14)
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 (2) A dj. Computer(During auto adj., RS-232C protocol is
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01 needed)
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70 (3) Adjust Remocon
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30 (4) V ideo Signal Generator MSPG-925F 720p/204-Gray
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A (Model:217, Pattern:49)
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC → Only when internal pattern is not available
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70 ※ C olor Analyzer Matrix should be calibrated using
CS-1000
EDID Block 1, Bytes 128-255 [80H-FFH]

0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------
0 | 02 03 1C F1 48 10 22 20 05 84 03 02 01 26 15 07
10 | 50 09 57 07 67 03 0C 00 20 00 80 1E 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 86

4.3. Tool Option Input


- Input Model Tool Option according to BOM

Copyright © LG Electronics. Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
5.1.3. Equipment connection 5.1.5. Adjustment method
5.1.5.1. Auto WB calibration
(1) Set TV in ADJ mode using P-ONLY key (or POWER ON
Color Analyzer
key)
Probe RS-232C (2) Place optical probe on the center of the display
Computer - It need to check probe condition of zero calibration before
RS-232C adjustment.
RS-232C
(3) Connect RS-232C Cable

Pattern Generator (4) Select mode in ADJ Program and begin a adjustment.
Signal Source (5) When WB adjustment is completed with OK message,
※If TV internal pattern is used, not needed check adjustment status of pre-set mode (Cool, Medium,
Warm)
(6) Remove probe and RS-232C cable.
※ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need.

5.1.5.2. Manual adj. method


(1) Set TV in Adj. mode using POWER ON
(2) Zero Calibrate the probe of Color Analyzer, then place it on
5.1.4. Adjustment Command (Protocol) the center of LCD module within 10cm of the surface..
(1) RS-232C Command used during auto-adj (3) Press ADJ key -> EZ adjust using adj. R/C -> 6. White-
Balance then press the cursor to the right (KEY►).
RS-232C COMMAND
Explanation ( When KEY(►) is pressed 204 Gray(80IRE) internal
CMD DATA ID pattern will be displayed)
Wb 00 00 Begin White Balance adj. (4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
Wb 00 ff End White Balance adj.
(5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of
(internal pattern disappears )
color temperature.
(2) Adjustment Map
※ CASE
Command Data Range Default First adjust the coordinate far away from the target value(x, y).
Adj. item (lower case ASCII) (Hex.) (Decimal) (1) x, y > target
CMD1 CMD2 MIN MAX i) Decrease the R, G.
(2) x, y < target
Cool R Gain j g 00 C0 172
i) First decrease the B gain,
G Gain j h 00 C0 172 ii) Decrease the one of the others.
B Gain j i 00 C0 192 (3) x >target , y < target
i) First decrease B, so make y a little more than the target.
R Cut 128
ii) Adjust x value by decreasing the R
G Cut 128 (4) x < target , y > target
B Cut 128 i) First decrease B, so make x a little more than the target.
ii) Adjust x value by decreasing the G
Medium R Gain j a 00 C0 192
G Gain j b 00 C0 192 ► How to adjust
B Gain j c 00 C0 192 (1) Fix G gain at least 172
Adjust R, B Gain (In Case of Mostly Blue Gain Saturation)
R Cut 128 (2) When R or B Gain > 255, Release Fixed G Gain and
G Cut 128 Readjust
B Cut 128
※ CASE Medium / Warm
Warm R Gain j d 00 C0 192 First adjust the coordinate far away from the target value(x, y).
G Gain j e 00 C0 192 (1) x, y > target
i) Decrease the R, G.
B Gain j f 00 C0 172
(2) x, y < target
R Cut 128 i) First decrease the B gain,
G Cut 128 ii) Decrease the one of the others.
(3) x > target , y < target
B Cut 128
i) First decrease B, so make y a little more than the target.
ii) Adjust x value by decreasing the R
(4) x < target , y > target
i) First decrease B, so make x a little more than the target.
ii) Adjust x value by decreasing the G

Copyright © LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
5.1.6. Reference 5.2. Option selection per country
( White Balance Adj. coordinate and color 5.2.1. Overview
temperature) (1) Tool option selection is only done for models in Non-USA
▪ Luminance: 204 Gray, 80IRE North America due to rating
▪ Normal line (2) Applied model: LA32B Chassis applied to CANADA and
model: (normal line)LN5xxx, LA6xxx, LA7xxx, LA8xxx MEXICO
Cool Medium Warm
H/R Time(Min) x y x x y x 5.2.2. Country Group selection
(1) Press ADJ key on the Adj. R/C, and then select Country
269 273 285 293 313 329 Group Menu
1 0-2 281 290 297 310 322 342 (2) Depending on destination, select US, then on the lower
Country option, select US, CA, MX.
2 3-5 280 288 296 308 321 340
Selection is done using +, - KEY
3 6-9 279 287 295 307 320 339 (3) Using DFT(Auto)
4 10-19 277 284 293 304 318 336 ※ PC (for communication through RS-232C) -> UART Baud
rate : 115200 bps
5 20-35 275 280 291 300 316 332
Command : ah 00 00 DATA(Area Number(hexadecimal))
6 36-49 273 277 289 297 314 329
ITEM DATA(Area Number) AREA
7 50-79 271 275 287 295 312 327
AREA OPTION1 0 USA
8 80-119 270 274 286 294 311 326
1 CANADA
9 Over 120 269 273 285 293 310 325
2 MEXICO
▪ Aging chamber line
(Aging chamber) Model : LN5xxx, LA6xxx, LA7xxx, LA8xxx 5.2.3. Tool Option inspection
▪ S tandard color coordinate and temperature using ▪ Press Adj. key on the Adj. R/C, then select Tool option
CA-210(CH-14) – by aging time
Tool Tool Tool Tool
Model Module
Cool Medium Warm option1 option2 option3 option4
H/R Time(Min) x y x x y x 32LN5300-UB LGD 545 41478 37004 12031
269 273 285 293 313 329 47LN5400-UA LGD 1569 33286 37004 46847
1 0-5 280 288 296 308 321 340 55LN5400-UA LGD(POLA) 2065 33286 37004 40703
2 6-10 276 283 292 303 317 335 50LN5400-UA LGD 1825 33286 37004 48895
3 11-20 273 278 289 298 314 330 42LN5400-UA LGD 1313 33286 37004 36607
4 21-30 270 275 286 295 311 327 42LN5300-UB LGD 1313 41478 37004 03839
5 31-40 267 272 283 292 308 324 42LN5300-UB AUO 9505 41478 37004 03839
6 41-50 266 270 282 290 307 322 42LN5300-UB LGD(POLA) 1297 41478 37004 03839
7 51-80 265 269 281 289 306 321 39LN5300-UB CMI(POLA) 5137 41478 37004 03839
8 81-119 264 267 280 287 305 319 39LN5300-UB AUO(POLA) 9233 41478 37004 03839
9 Over 120 263 266 279 286 304 318 32LN5300-UB CSOT(POLA) 4625 41478 37004 03839
32LN530B-UB LGD 545 45574 37004 03839
32LN530B-UB LGD(POLA) 545 45574 37004 03839

※ Tool option can be reconstructed by Software

5.3. Ship-out mode check (In-stop)


- After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode

Copyright © LG Electronics. Inc. All rights reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
6. GND and HI-POT Test * USB S/W Download (option, Service only)
(1) Put the USB Stick to the USB socket.
6.1. GND & HI-POT auto-check preparation (2) Automatically detecting update file in USB Stick.
(1) Check the POWER CABLE and SIGNAL CABE insertion
- If your downloaded program version in USB Stick is Low,
condition
it didn't work. But your downloaded version is High, USB
data is automatically detecting
6.2. GND & HI-POT auto-check (3) Show the message "Copying files from memory"
(1) Pallet moves in the station. (POWER CORD / AV CORD is
tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process (Hi-pot test).
(Remove A/V CORD from A/V JACK BOX)
(5) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next
process automatically (4) Updating is staring.

6.3. Checkpoint
(1) Test voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = P OWER CORD GND and SIGNAL CABLE
GND.
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms

7. AUDIO output check


7.1. Audio input condition
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation
(2) CVBS, Component: 1KHz sine wave signal (0.4Vrms)

7.2. Specification
No Item Min Typ Max Unit Remark
1 Audio practical 9.0 10.9 12.0 W (1) Measurement
max Output, L/R 8.5 9.3 9.8 Vrms condition
(Distortion=10% - EQ/AVL/Clear
max Output) Voice: Off (5) After updating is complete, The TV will restart automatically.
(2) Speaker (6) If TV turns on, check your updated version and Tool option.
(8Ω Impedance)
(refer to the next page about tool option)
* If downloading version is higher than your TV have, TV
can lost all channel data. In this case, you have to
channel recover. If all channel data is cleared, you didn't
have a DTV/ATV test on production line.

※After downloading, TOOL OPTION setting is needed again.


(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each model has their number.)

Copyright © LG Electronics. Inc. All rights reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
TROUBLE SHOOTING
1. Power-up boot check
Check stand-by Voltage. No ok Main B/D 3.5V Line ok
Check 18pin Power connector Replace Power board.
P401 3, 5pin : +3.5V_ST Short Check

ok
Check stand-by Voltage No Replace L404, L408
L404, L408 : +3.5V
ok
Check X201 clock No Replace X201
24 MHz
ok
No
Check P401 PWR_ON. No Re-download software. Replace Mstar(IC101) or Main board
1pin : 3.3V
ok
Check Multi Voltage
No
P401 9, 10pin : 24V Replace Power Board
/ 13, 14, 15pin:12V
ok
Check IC402/3/7 Output Voltage
IC402 : 2.5V
IC403 : 1.15V No
Replace IC402, IC403, IC407, Q403
IC407 : 1.5V
Q403 : 3.3V
ok

Check LVDS Power Voltage No


Q409 : 12V Replace Q409

ok
No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board
ok

Check DRV ON Control No Check Power Board


P403 2 pin : High

ok
Change Module

Copyright © LG Electronics. Inc. All rights reserved. - 16 - LGE Internal Use Only
Only for training and service purposes
2. Digital/Analog TV Video

Check RF Cable & Signal

ok
Check Tuner 3.3V Power No
Replace L3703
L3703
ok
Check Tuner 1.8V Power No
Replace IC3703
IC3703 2 pin : 1.8V
ok
Check IF_P/N Signal No
Bad Tuner. Replace Tuner.
TU3700 10/11 Pin

ok
No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board.

3. AV Video
Check input signal format.
Is it supported?

ok
Check AV Cable for damage
for damage or open conductor
ok
Check JK1702, CVBS Signal Line No
Replace Jack
R1722

ok
No
Check CVBS_DET Signal Replace R1713

ok
No
Check Mstar LVDS Output

Copyright © LG Electronics. Inc. All rights reserved. - 17 - LGE Internal Use Only
Only for training and service purposes
4. Component Video
Check input signal format.
Is it supported?

ok
Check Component Cable
for damage or open conductor.
ok
Check JK1702 No
Replace Jack
Y/PB/PR signal Line

ok
No
Check COMP_DET Signal Replace R1712 or R1713
ok
No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board.

5. HDMI Video
Check input signal format.
Is it supported?

ok
Check HDMI Cable conductors
for damage or open conductor.
ok
Check EDID No
Replace the defective IC or re-download EDID data
R832, R833, R834, R835 I2C Signal

ok
No
Check JK801, JK803 Replace Jack

ok

No
Check HDMI_DET (HPD) Replace R803, R801, R826, R807, R817, Q801, R819, R818, R830

ok

No Check other set No


Check HDMI Signal Replace Main Board
If no problem, check signal line
ok

No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board.

Copyright © LG Electronics. Inc. All rights reserved. - 18 - LGE Internal Use Only
Only for training and service purposes
6. MHL Video
Check input signal format.
Is it supported?

ok
Check MHL Cable conductors
for damage or open conductor.
ok
No
Check MHL Signal (R214, R215) Replace the defective IC or re-download EDID data

ok
No
Check JK803 Replace Jack

ok

No
Check CD_Sense, Cbus, Vbus Replace R810, R802, R831, R830, IC802, D800

ok

No Check other set No


Check MHL Signal Replace Main Board
If no problem, check signal line
ok

No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board.

Copyright © LG Electronics. Inc. All rights reserved. - 19 - LGE Internal Use Only
Only for training and service purposes
7. All Source Audio
Check the TV Speaker Menu Off
Toggle the Menu
(Menu -> Audio -> TV Speaker)

On
Check AMP IC(IC3401) Power No
Replace Amp IC(IC501)
24V, 3.3V
ok
Check Mstar AUDIO_MASTER_CLK No
Replace Mstar(IC101) or Main Board.
R148

ok
Check AMP I2C Line No
Check signal line. Or replace Mstar(IC101)
R3406, R3407

ok
Check Mstar I2S Output No
Check signal line. Or replace Mstar(IC101)
IC3401 37,38,39 Pin

ok

Check Output Signal P3401 No


Replace Audio AMP IC(IC3401)
1, 2, 3, 4 pin.

ok

No Replace connector
Check Connector & P3401
if found to be damaged.

ok

Check speaker resistance No


Replace speaker.
and connector damage.

8. Digital/Analog TV Audio

Check RF Cable & Signal

ok
Check Tuner 3.3V Power No
Replace L3703
L3703
ok
Check Tuner 1.8V Power No
Replace IC3703
IC3703 2 pin : 1.8V
ok
Check IF_P/N Signal No
Bad Tuner. Replace Tuner.
TU3700 10/11 Pin

ok
Follow procedure
‘7. All source audio’
trouble shooting guide.

Copyright © LG Electronics. Inc. All rights reserved. - 20 - LGE Internal Use Only
Only for training and service purposes
9. AV Audio
Check AV Cable for damage
for damage or open conductor
ok
Check JK1702 Signal Line No
Replace Jack
R1714,R1715

ok
Follow procedure
‘7. All source audio’
trouble shooting guide.

10. Component Audio


Check Component Cable
for damage or open conductor.
ok
Check JK1702 Signal Line No
Replace Jack
R1714,R1715

ok
Follow procedure
‘7. All source audio’
trouble shooting guide.

Copyright © LG Electronics. Inc. All rights reserved. - 21 - LGE Internal Use Only
Only for training and service purposes
Copyright ©
X-tal
24MHz

D_IF
FPC(51P/FHD)
Half NIM A_IF
(SI2158_ATSC_1INPUT) I2C LVDS
(FHD/HD 60z)

Only for training and service purposes


FPC(30P/HD)
Rear
TMDS
HDMI SERIAL FLASH

LG Electronics. Inc. All rights reserved.


SPI MXIC 8MB(64Mb)
MX25L6406EMI

DDR3 Add.
Y/Pb/Pr, L/R DDR3 Data
Component DDR3 128MB(1Gb)

- 22 -
CVBS, L/R CLK 667MHz Hynic
AV
M1 (CLK 800MHz) H5TQ1G63DFR

SPDIF I2C AT24C512C-SSHD-T


SPDIF
BLOCK DIAGRAM

512k bit

Internal
Micom KEY1
CONTROL
(PM) IR & LED
LED_R
RS232C IR
MAX3232 RS-232C
I2S
DP/D
SPK L/R AMP M USB2.0
STA380BWE L/R
TMDS HDMI
MHL
Side

LGE Internal Use Only


EEPROM

Tuner
0xC0
Amp
0xA0

0x20

18p
33
22

0
2.2k

1.8k
1k
3.3V
3.3V

3.3V
22

TU _SDA
TU _SCL
TU _SDA
TU _SCL
I2C_SDA
I2C_SCL

CH 5
CH 2

CH 6
M1

Copyright © LG Electronics. Inc. All rights reserved. - 23 - LGE Internal Use Only
Only for training and service purposes
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

400
521

540
530

120

510
LV1

120
123

900
200

122

910

Set + Stand
A10

Stand Base

Stand Body
500

A9

+
300

A2

Copyright © LG Electronics. Inc. All rights reserved. - 24 - LGE Internal Use Only
Only for training and service purposes
TP for NON-EU models(except EU and China)

TP for CI slot TP for SCART TP for Headphone


/PCM_REG PCM_D[0] PCM_A[8] CI_TS_CLK SCART1_MUTE HP_LOUT

/PCM_OE PCM_D[1] PCM_A[9] CI_TS_VAL SC1_ID HP_ROUT

/PCM_WE PCM_D[2] PCM_A[10] CI_TS_SYNC SC1_FB SIDE_HP_MUTE

/PCM_IORD PCM_D[3] PCM_A[11] CI_TS_DATA[0] SC1_SOG_IN HP_DET

/PCM_IOWR PCM_D[4] PCM_A[12] CI_TS_DATA[1] DTV/MNT_VOUT

/PCM_CE PCM_D[5] PCM_A[13] CI_TS_DATA[2] SCART1_Lout

/PCM_IRQA PCM_D[6] PCM_A[14] CI_TS_DATA[3] SCART1_Rout

/PCM_CD PCM_D[7] CI_TS_DATA[4] SC1_CVBS_IN

/PCM_WAIT CI_TS_DATA[5] SC1_R+/COMP1_Pr+

PCM_RST CI_TS_DATA[6] SC1_G+/COMP1_Y+

PCM_5V_CTL CI_TS_DATA[7] SC1_B+/COMP1_Pb+

CI_DET SC1/COMP1_DET

SC1/COMP1_L_IN

SC1/COMP1_R_IN

TP for S2 TP for FE_TS_DATA

S2_RESET FE_TS_DATA[1]

FE_TS_DATA[2]

FE_TS_DATA[3]

FE_TS_DATA[4]

FE_TS_DATA[5]

FE_TS_DATA[6]

FE_TS_DATA[7]

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012.07.02
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TP_NON_EN 3

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
L13 POWER BLOCK (POWER DETECT 2)

+3.5V_ST --> 3.375V --> 3.46V

FROM LIPS & POWER B/D PANEL_POWER Power_DET


+24V --> 3.78V --> 3.92V (3.79V)
+12V --> 3.58V --> 3.82V (3.68V)
+12V R402-*1
100
+3.5V_SOC_RESET
+12V +3.5V_ST
L412 +3.5V_ST
120 Q409
R488
CIS21J121 AO3407A 100K

D
PD_+12V PD_+3.5V R463 RESET_IC_SOC_RESET
C443 R448 R450 10K
+3.5V_ST R439 10uF PANEL_VCC 0 PWR_DET_ON_SEMI
MMBT3906(NXP) C438 2.7K
33K 16V G 1% IC408
0.1uF 5% NCP803SN293 RESET_IC_SOC_RESET
Q402
+3.3V_Normal 25V R402 POWER_DET
+3.5V_ST OPT VCC RESET 300
3 2
1 3 +3.5V_ST R440 PD_+12V 1
R419 5.6K
R416 2 1K C411 R447 GND C474
10K OPT 1.2K
R411 R415 0.1uF 0.1uF
33K 100 R426 C 16V 1%
R461 R406 R430 POWER_DET_RESET IC408-*1
OPT 4.7K 10K 10K R405 R407
10K PANEL_CTL B Q407 5.6K 5.6K APX803D29
MMBT3904(NXP)
C PD_+24V
R421 001:AL22 +24V R404
10K INV_CTL E 100K RESET VCC
R401 C B 2 3
R489
RL_ON 10K 10K 1
B Q401 PD_+24V
MMBT3904(NXP) E Q405 R482 PD_+24V_PWR_DET_ON_SEMI GND
MMBT3904(NXP) 8.2K IC409
R462 NCP803SN293 PD_+24V PWR_DET_ON_DIODES
10K E 1% R480
VCC RESET 100
3 2 IC409-*1
PD_+24V APX803D29
R403 1
PD_+24V 1.5K GND
C412 1% RESET VCC
P401 0.1uF 2 3
D401 5V OPT
SMAW200-H18S1 R412 3.9K
PWM_DIM_PULL_DOWN
+1.5V_DDR 16V 1
GND
CIC21J501NE *For 55LN54 Power ON Noise PD_+24V_PWR_DET_DIODES
PWR ON 1 2 DRV ON
L408 L404
+3.5V_ST 3.5V 3 4 PDIM#1
PWM_DIM
C406 0.1uF 3.5V 5 6 PDIM#2 R408 100
CIC21J501NE PWM1
16V GND 7 8 GND +3.5V_ST
L407 PWM2_2CH_POWER
24V 24V IC407
+24V 9 10 +1.5V_DDR
C418 0.1uF MLB-201209-0120P-N2
GND 11 12 GND AP7173-SPG-13 HF(DIODES)
50V 12V 13 14 12V L420 [EP]
L402
+12V 12V 15 16 N.C BLM18PG121SN1D
C404 0.1uF GND 17 18 GND
MLB-201209-0120P-N2 IN OUT
16V 1 8

+3.3V_Normal

THERMAL
19 R1 R457
PG FB 4.3K

9
.

2 7
1/16W
VCC SS 1%
3 C472 +3.5V_ST
+3.3V_Normal
R433
1.5A6 R2 22uF
C476
0.1uF
D403
5V
FET_2.5V_AOS
AO3435
+3.3V_Normal

C467 R456 10V 16V OPT Q403 L403


10K EN GND
4 5 4.7K BLM18PG121SN1D
560pF

D
1/16W
50V 1%
C461
10uF C437 D405
C425

G
10V C423
R434 0.1uF 22uF 5V
R438 2.2uF 16V
10K 22K 10V
10V

R445

Vout=0.8*(1+R1/R2)=1.5319 2.2K

FET_2.5V_DIODE
DMP2130L
C
R443 Q403-*1
POWER_ON/OFF_1 10K B Q400

D
MMBT3904(NXP)

G
+2.5V_Normal
IC402 +2.5V_Normal
+3.3V_Normal
TJ1118S-2.5

IN 3 2 OUT

+5V_Normal +5V_Normal
1
GND S7LR core 1.15V volt
Vout=0.8*(1+R1/R2) C440 D402

& L406
3.6uH
R1
CAP_10uF_X5R C403
10uF
10V
85C
0.1uF
16V
5V
OPT +3.3V_Normal C447
0.33uF
R428
+5V_USB C413
0.047uF
C420
22uF
C421
22uF
R452
33K
1%
CHANGE TO
10UF/10V/X5R
10K 16V

25V C424 C422


16V 16V 330pF 0.1uF +3.5V_ST C441 +1.10V_VDDC
OPT R453 50V C403-*1
27K 16V 0.1uF
1% OPT 16V
R2

EP[GND]
R491 10uF 10V
R454

VIN_3

PWRGD
0
CAP_10uF_X7R

BOOT
+12V L413
11K 1%

EN
CIC21J501NE
SW_IN

CHANGE TO +5V_USB L415


BST

16

15

14

13
LX

FB

16V/X5R C417 CAP_10uF_X5R 3.6uH


10uF CHANGE TO VIN_1 1 12 PH_3
10V 10UF/10V/X5R THERMAL
12

11

10

L401 85C VIN_2 PH_2


C430 2 17 11 C444 D404
CIC21J501NE
C453 C456
13

10uF 0.1uF 5V
8

10V GND_1 3 IC403 10 PH_1 22uF 22uF


C405 +5V_Normal +3.3V_Normal 16V OPT
PGND SW_OUT TPS54319TRE 10V 10V
10uF GND_2 SS/TR
16V 4 9
14

IC401 C488
R417

8
VIN AGND R414
C419 TPS65281RGV 10K 4.7K 3300pF C439
4.7uF 10V 50V

AGND

VSENSE

COMP

RT/CLK
OPT
15

R410
6

USB1_OCD R1
THERMAL

R432 R442 100pF


100K 30K
V7V FAULT 1/16W 330K 5%
17

1/16W
1%
C448
16

R436
5

USB1_CTL 15K 3300pF


EN EN_SW
50V
1

[EP]
SS

COMP

ROSC

RLIM

C417-*1 R2 R441
75K

R413
10uF 10V
CAP_10uF_X7R
3A 1/16W
1%
R409 16K
C426 2K
100pF
50V
OPT C410 Vout=0.827*(1+R1/R2)
3300pF
50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/09/19
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Power_PD2 4

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
IR/LED and Control

+3.5V_ST

CONTROL_NO_FILTER
R602 R603 R611
10K 10K 0
1% 1%
CONTROL_FILTER
L601
R600 BLM18PG121SN1D
100
KEY1

CONTROL_FILTER
CONTROL_FILTER C608 P600
L602 0.1uF
R601 BLM18PG121SN1D 16V 12507WR-08L
100
KEY2
CONTROL_FILTER
C609 1
CONTROL_NO_FILTER
R612 0.1uF
0 16V
2

+3.5V_ST 3
L600
BLM18PG121SN1D
4

R610
1.8K
C602 C603 LED_R/BUZZ 5
+3.5V_ST 0.1uF 1000pF
16V 50V
OPT
C607
0.1uF 6
R607 16V
3.3K

IR 7

C604
100pF
50V 8

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/07/18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR/CONTROL 6

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
USB (SIDE)

+5V_USB

C700
22uF
10V

JK700
3AU04S-305-ZC-(LG)

1
USB DOWN STREAM

SIDE_USB1_DM
3

SIDE_USB1_DP
4

D700
5

RCLAMP0502BA

OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 12/06/20
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB 7

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
HDMI (REAR 1 / SIDE 1 MHL)
HDMI_1 SIDE_HDMI (MHL)
5V_HDMI_4 5V_DET_HDMI_4

5V_HDMI_2 5V_DET_HDMI_2 GND


BODY_SHIELD
R807

10K 20
HP_DET R830 100
19 HPD4
SHIELD
R826 5V R819
18 R834 100
C VA806 DDC_SDA_4
20 R817

R818

3.3K
1K GND 1.8K ESD_HDMI
Q801 B 10K 17 R835 100
HPD2 VA805 DDC_SCL_4
MMBT3904(NXP) ESD_HDMI
19 16 DDC_DATA
R803 E R832 100
DDC_SDA_2
18 1.8K VA802 15 DDC_CLK VA807 VA808
R801

3.3K

ESD_HDMI R833 100


VA801 DDC_SCL_2 ESD_HDMI ESD_HDMI
17 14 NC

ESD_HDMI1_VARISTOR VA804 CE_REMOTE


16 13
ESD_HDMI HDMI_CEC

EAG62611204
VA803 CK-
15 ESD_HDMI 12
R805 0 D828
HDMI_ARC CK_GND RCLAMP0524PA
14 HDMI1_ARC 11 1 10
HDMI_CEC
CK+ 2 9 CK-_HDMI4
13
EAG59023302

10
CK+_HDMI4
D0- 3 8
12 D826 9
RCLAMP0524PA 4 7
1 10 D0_GND D0-_HDMI4
11 CK-_HDMI2 8 5 6
CK+ 2 9 D0+_HDMI4
10 CK+_HDMI2 D0+
3 8 7 ESD_HDMI_SEMTECH
D0-
9 4 7 D1-
D0-_HDMI2 6 D829
D0_GND 5 6
8 D0+_HDMI2 D1_GND RCLAMP0524PA
5 1 10
D0+ D1-_HDMI4
7 ESD_HDMI_SEMTECH 2 9
D1+ D1+_HDMI4
D1- 4 3 8
6 D827 D2-
3 4 7
D1_GND RCLAMP0524PA D2-_HDMI4
5 1 10 D2_GND 5 6
D1-_HDMI2 2 D2+_HDMI4
D1+ 2 9
4 D1+_HDMI2 D2+ ESD_HDMI_SEMTECH
D2- 3 8 1
3 4 7 D2-_HDMI2
D2_GND 5 6 +3.5V_ST
2 D2+_HDMI2 OPT
D2+ D811
1 ESD_HDMI_SEMTECH JK803
VA801-*1
D801 1uF
ESD_HDMI1_VARISTOR 10V

R811
R810

10K
OPT
JK801 ESD_HDMI1_CAP 0
R812 E
D801-*1 10K Q803
1uF C801 OPT

D812
10V

5.6V
0.047uF OPT B

OPT
ESD_HDMI1_CAP 25V C
C
B
Q802 MHL_CD_SENSE
OPT
E R831
300K
D826-*1 D827-*1 R802
IP4283CZ10-TBA IP4283CZ10-TBA 0
TMDS_CH1- NC_4 TMDS_CH1- NC_4
1 10 1 10

CEC TMDS_CH1+

GND_1
2 9
NC_3

GND_2
TMDS_CH1+

GND_1
2 9
NC_3

GND_2
3 8 3 8

R820
100
TMDS_CH2-

TMDS_CH2+
4

5
7

6
NC_2

NC_1
TMDS_CH2-

TMDS_CH2+
4

5
7

6
NC_2

NC_1
MHL OCP
HDMI_CEC CEC_REMOTE_S7 ESD_HDMI_NXP ESD_HDMI_NXP

AVDD5V_MHL 5V_HDMI_4 IC802


D828-*1 D829-*1
IP4283CZ10-TBA IP4283CZ10-TBA BD82020FVJ
+5V_Normal
TMDS_CH1-
1 10
NC_4 TMDS_CH1-
1 10
NC_4 +3.3V_Normal
D800
TMDS_CH1+
2 9
NC_3 TMDS_CH1+
2 9
NC_3 MBR230LSFT1G OUT_3 GND
8 1
GND_1 GND_2 GND_1 GND_2
3 8 3 8 R809 30V
5V_HDMI_2 +5V_Normal 5V_HDMI_4 +5V_Normal +3.5V_ST TMDS_CH2- NC_2 TMDS_CH2- NC_2 10 C809 100K OUT_2 IN_1
4 7 4 7
10uF OPT 7 2
TMDS_CH2+ NC_1 TMDS_CH2+ NC_1 10V R808
5 6 5 6
C802 R821
ESD_HDMI_NXP ESD_HDMI_NXP R814
OUT_1 IN_2 0.1uF 10K
A1

A2

A1

A2

2.7K
A1

A2

6 3
MMBD6100 MMBD6100 MMBD6100
D822 D824 D825 OC EN

E
C

5 4
C

+3.3V_Normal
Q804
C
R815

B
R827 B 10K
R806 20K /VBUS_EN
R822 R823 10K
R824 R825 /MHL_OCP_DET R804
0 R813 Q806 (Active Low)
E
2.7K 2.7K 2.7K 2.7K 10K

DDC_SDA_2 DDC_SDA_4
C
R816
B 10K
DDC_SCL_2 DDC_SCL_4 MHL_OCP_EN
Q805 (Active High)
E

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/11/07
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
HDMI_R1_S1 8
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
SPDIF

SPDIF OPTIC JACK +3.3V_Normal


5.15 Mstar Circuit Application

SPDIF-JACK-FOXCONN
SPDIF-JACK-SOLTEAM
JK1001 JK1001-*1
2F01TC1-CLM97-4F JST1223-001

GND 1 GND

1
Fiber Optic

Fiber Optic
VCC 2 VCC

2
VIN 3 VINPUT

3
SPDIF_OUT
4

4
C1001 C1002

SHIELD

FIX_POLE
0.1uF 100pF
16V 50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 12/06/12
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
SPDIF 10
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
LVDS (NON EU)

[51Pin LVDS Connector] FOR FHD REVERSE(10bit) [30Pin LVDS Connector]


(For FHD 60Hz) (For HD 60Hz_Normal)
Change in S7LR
FHD HD
P1100 MIRROR Pol-change P1101
FI-RE51S-HF-J-R1500 FF10001-30
RXA4+ RXA0+ RXA0-
LVDS_SEL
RXA4- RXA0- RXA0+
1 +3.3V_Normal 1
RXA3+ RXA1+ RXA1-
2 2
OPT RXA3- RXA1- RXA1+
3 R1100 3
3.3K RXACK+ RXA2+ RXA2-
4 4
RXACK- RXA2- RXA2+
5 OPT 5
R1101 RXA2+ RXACK+ RXACK-
6 10K 6 RXA0-
RXA2- RXACK- RXACK+
7 7 RXA0+
RXA1+ RXA3+ RXA3-
8 8
RXA1- RXA3- RXA3+
9 9 RXA1-
RXA0+ RXA4+ RXA4-
10 10 RXA1+
RXA0- RXA4- RXA4+
11 11

12 RXA4+ 12 RXA2-
13 RXB4+ RXB0+ RXB0- 13
RXA4- RXA2+
14 RXB4- RXB0- RXB0+ 14
RXA3+
15 RXB3+ RXB1+ RXB1- 15
RXA3- RXACK-
16 RXB3- RXB1- RXB1+ 16
RXACK+ RXACK+
17 RXBCK+ RXB2+ RXB2- 17
RXACK-
LVDS_SEL
18 RXBCK- RXB2- RXB2+ 18 RXA3-
19 RXB2+ RXBCK+ RXBCK- 19 +3.3V_Normal
RXA2+ RXA3+
20 RXB2- RXBCK- RXBCK+ 20
RXA2-
OPT
21 RXB1+ RXB3+ RXB3- 21 R1103
3.3K
22 RXB1- RXB3- RXB3+ 22
RXA1+
PANEL_VCC
23 RXB0+ RXB4+ RXB4- 23 OPT
RXA1- R1104
RXB0- RXB4- RXB4+ 10K
24 RXA0+ 24
HD
25 RXA0- 25 L1101
R1111 0 120
26 26
CIS21J121
NON_AUO/CMI_39inch
27 27

28 RXB4+ 28 HD
29 29 C1101
RXB4- 0.1uF
30 RXB3+ FOR FHD REVERSE(8bit) 30 16V

31 RXB3- 31
32 RXBCK+
Change in S7LR
33 RXBCK-
MIRROR Pol-change Shift
34
RXA4+ RXA4+ RXA4- RXA0-
35 RXB2+
RXA4- RXA4- RXA4+ RXA0+
36 RXB2-
RXA3+ RXA0+ RXA0- RXA1-
37
RXA3- RXA0- RXA0+ RXA1+
38 RXB1+
RXACK+ RXA1+ RXA1- RXA2-
39 RXB1-
RXACK- RXA1- RXA1+ RXA2+
40 RXB0+
RXA2+ RXA2+ RXA2- RXACK-
41 RXB0- NON_AUO39inch
RXA2- RXA2- RXA2+ RXACK+
42 R1112 0
RXA1+ RXACK+ RXACK- RXA3-
43 R1113 0
PANEL_VCC
RXA1- RXACK- RXACK+ RXA3+
44 NON_AUO39inch
RXA0+ RXA3+ RXA3- RXA4-
45
FHD
RXA0- RXA3- RXA3+ RXA4+
46 L1100
120
47 CIS21J121

48 RXB4+ RXB4+ RXB4- RXB0-


FHD
49 RXB4- RXB4- RXB4+ RXB0+
C1100
50
0.1uF
16V
RXB3+ RXB0+ RXB0- RXB1- EU pin assign is different from NON EU.
51 RXB3- RXB0- RXB0+ RXB1+ Because of position of HD wafer.
RXBCK+ RXB1+ RXB1- RXB2-
52
RXBCK- RXB1- RXB1+ RXB2+

RXB2+ RXB2+ RXB2- RXBCK-

RXB2- RXB2- RXB2+ RXBCK+

RXB1+ RXBCK+ RXBCK- RXB3-

RXB1- RXBCK- RXBCK+ RXB3+

RXB0+ RXB3+ RXB3- RXB4-

RXB0- RXB3- RXB3+ RXB4+

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/09/19
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS_NON_EU 11

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
GLOBAL tuner block except EU and China LNA_CTRL_1

LNA_CTRL_2
BR_RESET_DEMOD

FE_TS_SYNC
FE_AGC_SPEED_CTL
IF_AGC_SEL

FE_BOOSTER_CTL
FE_TS_VAL_ERR LNA2_CTL

RF_SWITCH_CTL FE_TS_CLK DEMOD_SCL


Pull-up can’t be applied
because of MODEL_OPT_2
TU3700 FE_TS_DATA[0] DEMOD_SDA

TDSS-G201D
TU3702
TDSH-G501D(B) TUNER_OPT
TUNER_ISOLATOR_DVB_1INPUT_H
+3.3V_TU
R3740-*1
1K
TU_IIC_NON_ATSC_1K
+3.3V_TU R3741-*1
R3733
100K 1K
TU_IIC_NON_ATSC_1K
close to TUNER R3732
100
NC_1 TUNER_RESET
R3705 0 1
NC C3701 OPT
1 0.1uF RESET
C3710
0.1uF
16V R3740 R3741
RESET
16V 2 1.8K 1.8K
TU_IIC_ATSC_1.8K TU_IIC_ATSC_1.8K
2 SCL
SCL 3 R3735 33
TU_SCL
3 SDA R3736 33
SDA 4 TU_SDA
OPT OPT
4 +B1[3.3V] C3711 C3713 C3742 C3743
5 18pF 18pF 20pF 20pF
+B1[3.3V] 50V 50V 50V 50V
5 NC_2
6 C3702
close to TUNER R3758
82
SIF 0.1uF 16V TU_SIF
6 +B2[1.8V] OPT OPT

+B2[1.8V] 7
7 NC_3 R3784
0
CVBS 8 OPT
TU_CVBS
HALF_NIM/IF_FILTER HALF_NIM/IF_FILTER
8 IF_AGC R3760-*1 R3761-*1

IF_AGC 9 10 10

9 DIF[P]
DIF[P] 10 R3761 0

10 DIF[N] HALF_NIM/IF_NON_FILTER

DIF[N] 11 R3760 0

11 HALF_NIM/IF_NON_FILTER

B1 A1
B1 A1 B1 A1 Close to the tuner

B1 A1
IF_P_MSTAR
12

TU_GND_A
B2 A2 IF_N_MSTAR
SHIELD
B2

A2

1. should be guarded by ground


2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils

+3.3V_TU
TU_GND_A

+1.8V_TU C3707 C3708


GND seperation for ASIS tuner 100pF 0.1uF
50V 16V
TU_GND_A

C3737 C3738
100pF 0.1uF
50V 16V close to the tuner pin, add,09029
NON_ASIA

NON_ASIA
0 R3714

0 R3715

R3704 100
IF_AGC_MAIN
should be guarded by ground
C3716
0.1uF
16V

+3.3V_TU
IC3703
AP1117E18G-13
+1.8V_TU

TUNER MULTI-OPTION 3 1
TW_FE_LNA FILTER_SETTING C3717
IN ADJ/GND
OUT
0.1uF 2
TU3700-*1 CTRL_1 CTRL_2 16V
Frequence Filter_Type
TDSS-H501F(B)
TUNER_ATSC
54MHz~350MHz 1 0 LPF R3766
1

350Hz~450MHz 0 0 Through
NC_1
1
+3.3V_Normal
2
RESET
450Hz~870MHz 0 1 HPF +3.3V_TU C3740
0.1uF CAP_10uF_X5R
SCL 16V C3741
3 10uF CHANGE TO
SDA 10V 10UF 10V X5R
4 Size change,0929
85C
+B1[3.3V] L3703
5
CIS21J121
NC_2
6
+B2[1.8]
7
C3723 C3725 C3715 C3727
NC_3
8 22uF 0.1uF 22uF 0.1uF
IF_AGC 6.3V 16V 6.3V 16V
9 C3741-*1
DIF[P]
10
DIF[N] 10uF 10V
11
CAP_X7R_MP
CHANGE TO CHANGE TO
X A1
B1 A1 6.3V 2012 X5R 6.3V 2012 X5R

12

SHIELD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012.06.21
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER_NON_EU 14

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
COMPONENT1 & AV(COMMON), AV2
COMP_AV1/2
JK1701
PPJ248-01

7C [RD3]E-LUG R1716
10K
AV2_R_IN
AV2
D1700
5.6V R1700 C1701 R1718
AV2_LR_ZENER 470K 1000pF 12K

6C [RD3]C-SPRING AV2 50V


OPT
AV2

4C [RD3]CONTACT R1717
10K
AV2_L_IN
AV2

D1701 R1701 C1702 R1719


5.6V 470K 1000pF 12K
AV2 5B [WH2]C-SPRING AV2_LR_ZENER AV2 50V
OPT
AV2

+3.3V_Normal

R1708
10K

4A [YL]CONTACT AV2

R1711 1K
AV2_CVBS_DET
AV2
D1702
5.6V
OPT

6A [YL]C-SPRING
AV2_CVBS_IN
D1713-*1
COMP_AV1 D1713
AV2_CVBS_ZENER_ROHM R1702
C1703
47pF
AV2_CVBS_ZENER_KEC
75 D1714-*1
JK1702 7A [YL]E-LUG D1714
AV2_CVBS_ZENER_ROHM
AV2 50V
AV2 AV2_CVBS_ZENER_KEC

PPJ245-01

7E [RD2]E-LUG 7H [RD2]E-LUG R1714


10K
COMP2_R_IN

D1704
5.6V C1704 R1720
COMP_LR_ZENER R1703 1000pF

6E [RD2]C-SPRING 6H [RD2]C-SPRING 470K 50V


OPT
12K

R1715
10K
COMP2_L_IN

4E [RD2]CONTACT 4H [RD2]CONTACT D1705


5.6V C1705 R1721
COMP_LR_ZENER R1704 1000pF
470K 50V 12K
OPT
+3.3V_Normal

5D [WH]C-SPRING 5G [WH1]C-SPRING R1709


10K

COMP2_DET

4C [RD1]CONTACT 4F [RD1]CONTACT D1706


R1712
1K
5.6V
OPT

COMPONENT 6C [RD1]C-SPRING 6F [RD1]C-SPRING


COMP2_Pr+
& D1703
COMP_Pr_ZENER_ROHM
D1703-*1
COMP_Pr_ZENER_KEC
AV1 8C [RD1]E-LUG-S 8F [RD1]E-LUG-S D1707
COMP_Pr_ZENER_ROHM
R1705
75 D1707-*1
COMP_Pr_ZENER_KEC

5B [BL]C-SPRING 5E [BL]C-SPRING
COMP2_Pb+
D1708 D1708-*1
COMP_Pb_ZENER_ROHM COMP_Pb_ZENER_KEC
R1706

4A [GN]CONTACT 4D [GN]CONTACT D1710


COMP_Pb_ZENER_ROHM
75 D1710-*1
COMP_Pb_ZENER_KEC
+3.3V_Normal

R1710

6A [GN]C-SPRING 6D [GN]C-SPRING 10K

AV_CVBS_DET
R1713
1K
D1709
5.6V

7A [GN]E-LUG 7D [GN]E-LUG OPT

R1722
0
COMP2_Y+/AV_CVBS_IN
D1711 D1711-*1
COMP_Y_ZENER_ROHM COMP_Y_ZENER_KEC
R1707
D1712 75 D1712-*1
COMP_Y_ZENER_ROHM COMP_Y_ZENER_KEC

+3.3V_Normal

CVBS_TEST
IC1700 CVBS_TEST
MM1756DURE C1706

C1707
0.1uF
0.1uF

CVBS_TEST
VCC IN
6 1 DTV/MNT_VOUT

PS GND
5 2
CVBS_TEST
R1723
75 OUT BIAS
4 3

4.7uF
CVBS_TEST

C1708
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012.08.14
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. REAR_NON_EU_L 17

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
ETHERNET
* H/W option : ETHERNET

+2.5V_Normal

ETHERNET
L2101
JK2100-*1 JK2100 BLM18PG121SN1D
RJ45VT-01SN002 XRJV-01V-0-D12-080
ETHERNET_XMULTIPLE

1
ETHERNET_XML_EMI

1 1
EPHY_TP
R2101
ETHERNET 49.9
2 C2101
2 2
R2102 0.1uF
ETHERNET 49.9
3 ETHERNET
3 3
EPHY_TN

4
4 4
EPHY_RP
R2103
ETHERNET 49.9
5 C2102
5 5
R2104 0.1uF
ETHERNET 49.9
6 ETHERNET
6 6
EPHY_RN

7
7 7

8
8 8

9 9

9 9

ETHERNET
C2104
0.01uF
50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/06/21
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
LAN 21
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
AUDIO AMP(STA380BWEF)

L3402

NC_12
NC_11
NC_10
10uH

NC_9
NC_8
NC_7
NC_6
NC_5
NC_4
NC_3
NC_2
NC_1
+3.3V_Normal SPK_L+
C3420 C3424
0.22uF 1000pF
R3408 R3409 C3418 50V 50V

24
23
22
21
20
19
18
17
16
15
14
13
43 43
0.22uF
12 GND_REG C3409 SPEAKER_L
0.1uF 50V
NC_13 25 C3413 C3421 C3425
11 VDD_REG 16V L3403
C3403 26 330pF 10uH 0.22uF 1000pF
NC_14 10 OUT1A
0.1uF 50V 50V 50V
NC_15 27 SPK_L-
16V 9 GND1
VDDDIG1 28
8 VCC1
GNDDIG1 29
7 OUT1B
FFX3A 30 IC3401 6 OUT2A
31
FFX3B STA380BWF 5 VCC2 L3404
EAPD/FFX4A 32 10uH
C3404 4 GND2
2.2uF TWARNEXT/FFX4B 33 SPK_R+
3 OUT2B C3414 C3422 C3426
10V 34 49
VREGFILT THERMAL
2 VSS_REG 330pF 0.22uF 1000pF
C3408
AGNDPLL 35 50V C3419 50V 50V
1 VCC_REG 0.1uF
36 16V 0.22uF SPEAKER_R
MCLK R3410 R3411

37
38
39
40
41
42
43
44
45
46
47
48
43 43 50V
L3405 C3423 C3427
0.22uF 1000pF
SDI
RESET
PWDN
INTLINE
SDA
SCL
SA
TESTMODE
GNDDIG2
VDDDIG2
[EP]
BICKI 10uH
LRCKI 50V 50V
SPK_R-
+3.5V_ST AUD_MASTER_CLK
L3401 +24V
AUD_SCK +3.3V_Normal CIS21J121

AUD_LRCK
R3402
10K
AUD_LRCH
C3407 C3411 C3412 C3415 C3416 C3417
R3403 0.1uF 0.1uF 1uF 1uF 0.1uF 10uF
10K 16V 50V 50V 50V 50V 35V
3216
R3404
100 AMP_RESET
C R3406 0
R3401
10K B Q3401 C3401 AMP_SDA
AMP_MUTE MMBT3904(NXP) 1000pF R3407 0
50V AMP_SCL
E
P3401
WAFER-ANGLE

OPT
R3405
0 SPK_L+
4
POWER_DET

SPK_L-
3

SPK_R+
2

SPK_R-
1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/08/29
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
AMP_STA380BWEF 34
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
MSTART DEBUG_4PIN

MSTAR_DEBUG_4P

P3900

JP_GND1

JP_GND2

JP_GND3

JP_GND4
12505WS-04A00

3 RGB_DDC_SCL

4 RGB_DDC_SDA

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/06/20
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MSTAR DEBUG_4PIN 39

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
RS-232C

RS232C_DEBUG_4P
+3.5V_ST P4000
12507WS-04L

R4001
100 VCC
PM_TXD 1

R4000
100 PM_RXD
2
PM_RXD

GND
3

RM_TXD
4

GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/06/20
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RS232C_4P_OS 40

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
IC102
H27U1G8F2CTR-BC
NAND FLASH MEMORY +3.3V_Normal
<CHIP Config(LED_R/BUZZ)>
+3.3V_Normal
Boot from SPI CS1N(EXT_FLASH) 1’b0 S7LR-M_NON_MS10
NC_1
1 48
NC_29 Boot from SPI_CS0N(INT_FLASH) 1’b1
NAND_FLASH_1G_HYNIX IC101
NC_2 NC_28
2 EAN35669103 47 MSD804KKX
NC_3 NC_27 OS PCM_A[0-7] <CHIP Config>
3 46 PCM_D[0-7]
22 (I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
OS OS
NC_4
4 45
NC_26
AR101 B51_no_EJ
SB51_WOS
:
:
4’b0000
4’b0001
Boot from 8051 with SPI flash
Secure B51 without scramble
PCM_D[0] W21
PCMDATA[0]/GPIO129
SYM.D
R107 R109 NC_5 I/O7 PCM_A[7] PCM_D[1] AA18
1K 3.9K 5 44 SB51_WS : 4’b0010 Secure B51 with scramble PCMDATA[1]/GPIO130
PCM_D[2] AB22
OS NC_6 I/O6 PCM_A[6] MIPS_SPE_NO_EJ : 4’b0100 Boot from MIPS with SPI flash
AR103 6 43 PCM_D[3] PCMDATA[2]/GPIO131
22 MIPS_SPI_EJ_1 : 4’b0101 Boot from MIPS with SPI flash AE20
R/B I/O5 PCM_A[5] MIPS_SPI_EJ_2 : 4’b0110 Boot from MIPS with SPI flash PCM_D[4] PCMDATA[3]/GPIO123
7 42 AA15
MIPS_WOS : 4’b1001 Secure MIPS without scramble PCMDATA[4]/GPIO122
RE I/O4 PCM_A[4] MIPS_WS : 4’b1010 Scerur MIPS with SCRAMBLE PCM_D[5] AE21
/F_RB 8 41 PCM_D[6] PCMDATA[5]/GPIO121
+3.3V_Normal AB21 AE18
/PF_OE CE NC_25 PCM_D[7] PCMDATA[6]/GPIO120 NF_CE1Z/GPIO141
9 40 Y15 AC17
/PF_CE0 PCM_A[0-14] PCMDATA[7]/GPIO119 NF_WPZ/GPIO196 /PF_WP
NC_7 NC_24 AD18
10 39 CAP_10uF_X5R_OS C102-*1 PCM_A[0] NF_CEZ/GPIO140 /PF_CE0
W20 AC18
OPT OS NC_8 NC_23 C102 10uF 10V 85C PCM_A[1] PCMADR[0]/GPIO128 NF_CLE/GPIO139 /PF_CE1

1K

1K

1K

1K

1K
R108 11 38 V20 AC19
+3.3V_Normal 1K C101 PCMADR[1]/GPIO127 NF_REZ/GPIO142 /PF_OE
10uF 10V PCM_A[2] W22 AD17
0.1uF VCC_1 VCC_2 CHANGE TO

OPT

OPT

OPT

OPT
CAP_10uF_X7R_OS PCMADR[2]/GPIO125 NF_WEZ/GPIO143 /PF_WE

OS
OPT 12 37 10UF 10V X5R PCM_A[3] AB18 AE17
R105 VSS_1 VSS_2 C103 PCM_A[4] PCMADR[3]/GPIO124 NF_ALE/GPIO144 PF_ALE

R115

R117

R165

R123

R152
13 36 0.1uF AA20 AD19
1K PCMADR[4]/GPIO102 NF_RBZ/GPIO145 /F_RB
OS PCM_A[5] AA21
NC_9 NC_22
14 35 PCM_A[6] PCMADR[5]/GPIO104
LED_R/BUZZ Y19
NC_10 NC_21 PCM_A[7] PCMADR[6]/GPIO105
15 34 AB17
AUD_SCK PCM_A[8] PCMADR[7]/GPIO106
CLE NC_20 OS AUD_MASTER_CLK R148 Y16
16 33 PCM_A[9] PCMADR[8]/GPIO111
AR102 AUD_MASTER_CLK_0 AB19
PCMADR[9]/GPIO113 GPIO_PM[0]/GPIO6
H5
POWER_DET
/PF_CE1 ALE I/O3 PCM_A[3] 56 PCM_A[10] AB20 K6
17 32 OPT
PWM1 PCM_A[11] PCMADR[10]/GPIO117 PM_UART_TX/GPIO_PM[1]/GPIO7 PM_TXD
PF_ALE WE I/O2 PCM_A[2] C112 AA16 K5
18 31 100pF PCM_A[12] PCMADR[11]/GPIO115 GPIO_PM[2]/GPIO8 INV_CTL
/PF_WE PWM0 AA19 J6
WP I/O1 PCM_A[1] 50V PCM_A[13] PCMADR[12]/GPIO107 GPIO_PM[3]/GPIO9 RL_ON

1K

1K

1K

1K

1K
/PF_WP 19 30 AC21 K4
PCM_A[14] PCMADR[13]/GPIO110 GPIO_PM[4]/GPIO10 POWER_ON/OFF_1

NON_OS
AR104 OS NC_11 I/O0 PCM_A[0] AA17 L6
22 OS R106 20 29 PCMADR[14]/GPIO109 PM_UART_RX/GPIO_PM[5]/GPIO11 PM_RXD
C2 R146 33
R102 1K
OS NC_12 NC_19 22 PM_SPI_SCZ1/GPIO_PM[6]/GPIO12 /SPI_CS

R116

R118

R121

R124

R153
3.3K 21 28 Y20 L5
/PCM_REG PCMREG_N/GPIO126 GPIO_PM[7]/GPIO13 /FLASH_WP
NC_13 NC_18 M6
22 27 GPIO_PM[8]/GPIO14 SIDE_HP_MUTE +3.5V_ST
AB15 M5
NC_14 NC_17 /PCM_OE PCMOE_N/GPIO116 GPIO_PM[9]/GPIO15 PANEL_CTL
23 26 AA22 C1
/PCM_WE PCMWE_N/GPIO195 PM_SPI_SCZ2/GPIO_PM[10]/GPIO16 PM_MODEL_OPT_0
NC_15 NC_16 AD22 M4
24 25 /PCM_IORD PCMIORD_N/GPIO114 GPIO_PM[11]/GPIO17 AMP_MUTE
AD20 R180
/PCM_IOWR PCMIOWR_N/GPIO112 4.7K
A2 R147 33
PM_SPI_SCK/GPIO1 SPI_SCK
AD21 D3
/PCM_CE PCMCE_N/GPIO118 PM_SPI_CZ0/GPIO_PM[12]/GPIO0
AC20 B2
/PCM_IRQA PCMIRQA_N/GPIO108 PM_SPI_SDI/GPIO2 SPI_SDI
Y18 B1 R151 33
/PCM_CD PCMCD_N/GPIO133 PM_SPI_SDO/GPIO3 SPI_SDO
Y21 for SERIAL FLASH
/PCM_WAIT PCMWAIT_N/GPIO103
Y22
PCM_RST PCM_RESET/GPIO132
NAND_FLASH_2G_HYNIX CI_TS_CLK
NAND_FLASH_1G_TOSHIBA NAND_FLASH_2G_TOSHIBA NAND_FLASH_1G_SS Y14
EAN60708702 TS0CLK/GPIO90 CI_TS_VAL
EAN61508001 EAN60991001 EAN61857001 U21 AA10
IC102-*1 USB1_OCD CI_TS_SYNC
IC102-*2 IC102-*3 IC102-*4 PCM2_CE_N/GPIO134 TS0VALID/GPIO88
H27U2G8F2CTR V21 Y12
TC58NVG0S3ETA0BBBH TC58NVG1S3ETA00 K9F1G08U0D-SCB0 USB1_CTL PCM2_IRQA_N/GPIO135 TS0SYNC/GPIO89 CI_TS_DATA[0-7]
R20
PCM2_CD_N/GPIO138 CI_TS_DATA[0]
T20 Y13 from CI SLOT
NC_1 NC_29 PCM_5V_CTL PCM2_WAIT_N/GPIO136 TS0DATA_[0]/GPIO80 CI_TS_DATA[1]
1 48 NC_1 NC_29 NC_1 NC_29 NC_1 NC_29 U22 Y11
1 48 1 48 1 48 PCM2_RESET/GPIO137 TS0DATA_[1]/GPIO81 CI_TS_DATA[2]
NC_2 NC_28 AA12
2 47 NC_2 NC_28 NC_2 NC_28 NC_2 NC_28 TS0DATA_[2]/GPIO82 CI_TS_DATA[3]
2 47 2 47 2 47 D4 AB12
NC_3 NC_27 /MHL_OCP_DET UART1_TX/GPIO46 TS0DATA_[3]/GPIO83 CI_TS_DATA[4]
3 46 NC_3 NC_27 NC_3 NC_27 NC_3 NC_27 E4 AA14
3 46 3 46 3 46 MHL_OCP_EN UART1_RX/GPIO47 TS0DATA_[4]/GPIO84 CI_TS_DATA[5]
NC_4 NC_26 N25 AB14
4 45 NC_4 NC_26 NC_4 NC_26 NC_4 NC_26 PM_TXD UART2_TX/GPIO68 TS0DATA_[5]/GPIO85 CI_TS_DATA[6]
4 45 4 45 4 45 N24 AA13
NC_5 I/O7 PM_RXD UART2_RX/GPIO67 TS0DATA_[6]/GPIO86 CI_TS_DATA[7]
5 44 NC_5 I/O8 NC_5 I/O8 NC_5 I/O7 B8 AB11
5 44 5 44 5 44 MODEL_OPT_6 UART3_TX/GPIO50 TS0DATA_[7]/GPIO87
NC_6 I/O6 for SYSTEM EEPROM A8 FE_TS_CLK
6 43 NC_6 I/O7 NC_6 I/O7 NC_6 I/O6 MODEL_OPT_7 UART3_RX/GPIO51 FE_TS_VAL_ERR
6 43 6 43 6 43 (IC104) AC15
R/B I/O5 TS1CLK/GPIO101 FE_TS_SYNC
7 42 RY/BY I/O6 RY/BY I/O6 R/B I/O5 R136 22 P23 AD15
I2C_SCL I2C_SCKM2/DDCR_CK/GPIO75 TS1VALID/GPI99 FE_TS_DATA[0-7]
7 42 7 42 7 42 P24 AC16
RE I/O4 R137 22
8 41 RE I/O5 RE I/O5 RE I/O4 I2C_SDA I2C_SDAM2/DDCR_DA/GPIO74 TS1SYNC/GPIO100
8 41 8 41 8 41
CE
9 40
NC_25
CE NC_25 CE NC_25 D2 AD16 FE_TS_DATA[0] Internal demod out
CE NC_25 S7LR-M Multi Package RGB_DDC_SDA DDCA_DA/UART0_TX
9 40 9 40 9 40 TS1DATA_[0]/GPIO91 FE_TS_DATA[1]
NC_7 NC_24 D1 AE15
10 39 NC_7 NC_24 NC_7 NC_24 NC_7 NC_24 RGB_DDC_SCL DDCA_CK/UART0_RX TS1DATA_[1]/GPIO92 FE_TS_DATA[2]
10 39 10 39 10 39 S7LR-M_MS10 AE14
NC_8 NC_23 TS1DATA_[2]/GPIO93 FE_TS_DATA[3] FE_TS_DATA[0]
11 38 NC_8 NC_23 NC_8 NC_23 NC_8 NC_23 AC13
VCC_1 VCC_2
11 38 11 38 11 38 IC101-*1 P21
TS1DATA_[3]/GPIO94
AC14 FE_TS_DATA[4] FE_TS_DATA[0]
12 37 VCC_1 VCC_2 VCC_1
12 37
VCC_2 VCC_1
12 37
VCC_2 LGE2121-MS (M1_L13_MS10) PWM0
N23
PWM0/GPIO69 TS1DATA_[4]/GPIO95
AD12 FE_TS_DATA[5]
12 37 PWM1 PWM1/GPIO70
VSS_1 VSS_2 TS1DATA_[5]/GPIO96 FE_TS_DATA[6]
13 36 VSS_1 VSS_2 VSS_1 VSS_2 VSS_1 VSS_2 P22 AD13
13 36 13 36 13 36 PWM2 PWM2/GPIO71 TS1DATA_[6]/GPIO97 FE_TS_DATA[7]
NC_9 NC_22 R21 AD14
14 35 NC_9 NC_22 NC_9 NC_22 NC_9 NC_22 PWM3/GPIO72 TS1DATA_[7]/GPIO98
14 35 14 35 14 35 C7 AB25 P20
NC_10 NC_21 GPIO39 LVA0P PWM4/GPIO73
15 34 NC_10 NC_21 NC_10 NC_21 NC_10 NC_21 E6 AB23 F6
15 34 15 34 15 34 GPIO40 LVA0N LED_R/BUZZ PWM_PM/GPIO197
CLE NC_20 F5 AC25
16 33 CLE NC_20 CLE NC_20 CLE NC_20 GPIO41 LVA1P
16 33 16 33 16 33 B6 AB24
ALE I/O3 GPIO42 LVA1N
17 32 ALE I/O4 ALE I/O4 ALE I/O3 E5 AD25 H6
17 32 17 32 17 32 GPIO43 LVA2P KEY1 SAR0/GPIO34
WE I/O2 D5 AC24 G5
18 31 WE I/O3 WE I/O3 WE I/O2 GPIO44 LVA2N KEY2 SAR1/GPIO35
18 31 18 31 18 31 B7 AE23 G4
WP I/O1 GPIO45 LVA3P SAR2/GPIO36
19 30 WP I/O2 WP I/O2 WP I/O1 E7 AC23 J5
19 30 19 30 19 30 GPIO48 LVA3N SAR3/GPIO37
NC_11 I/O0 F7 AC22 J4
20 29 NC_11 I/O1 NC_11 I/O1 NC_11 I/O0 GPIO49 LVA4P SAR4/GPIO38
20 29 20 29 20 29 AB5 AD23 SCART1_MUTE
NC_12 NC_19 GPIO52 LVA4N
21 28 NC_12 NC_19 NC_12 NC_19 NC_12 NC_19 AB3
21 28 21 28 21 28 GPIO53
NC_13 NC_18 A9 V23 R23
22 27 NC_13 NC_18 NC_13 NC_18 NC_13 NC_18 GPIO54 LVB0P VSYNC_LIKE/GPIO146
22 27 22 27 22 27 F4 U24
NC_14 NC_17 GPIO55 LVB0N
23 26 NC_14 NC_17 NC_14 NC_17 NC_14 NC_17 AB1 V25 R24
23 26 23 26 23 26 I2C_SCKM0/GPIO56 LVB1P SPI1_CK/GPIO199
NC_15 NC_16 N6 V24 R25
24 25 NC_15 NC_16 NC_15 NC_16 NC_15 NC_16 I2C_SDAM0/GPIO57 LVB1N SPI1_DI/GPIO200
24 25 24 25 24 25 AB2 W25 T21
GPIO76 LVB2P SPI2_CK/GPIO201
AC2 W23 T22
GPIO77 LVB2N SPI2_DI/GPIO202
AA23
LVB3P
Y24
LVB3N
AA25
LVB4P
AA24
LVB4N

AE24
DIMMING I2C LVACLKP
AD24
+3.3V_Normal
LVACLKN
Y23
LVBCLKP
W24 S7LR-M_NON_MS10
LVBCLKN
OPT IC101
R156 10K T25 MSD804KKX
PWM0 GPIO194
U23
R140 R141 R144 R145 GPIO191
1K 1K 2.2K 2.2K T24
R157
PWM_DIM
100
PWM2
GPIO192
GPIO193
T23
C7
SYM.A AB25
OPT AMP_RESET GPIO39 LVA0P RXA0+
E6 AB23
C111 AMP_SDA FRC_RESET FRC_RESET GPIO40 LVA0N RXA0-
2.2uF F5 AC25
AMP_SCL 5V_DET_HDMI_2 GPIO41 LVA1P RXA1+
B6 AB24
5V_DET_HDMI_4 GPIO42 LVA1N RXA1-
I2C_SDA E5 AD25
AV_CVBS_DET GPIO43 LVA2P RXA2+
I2C_SCL D5 AC24
AV2_CVBS_DET GPIO44 LVA2N RXA2-
B7 AE23
SC1/COMP1_DET GPIO45 LVA3P RXA3+
E7 AC23
HP_DET GPIO48 LVA3N RXA3-
F7 AC22
S2_RESET GPIO49 LVA4P RXA4+
AB5 AD23
TUNER_RESET GPIO52 LVA4N RXA4-
AB3
PM MODEL OPTION MODEL_OPT_0
A9
GPIO53
V23
+3.5V_ST RXB0+
NAND_EN NAND_EN GPIO54 LVB0P
EEPROM F4 U24
+3.3V_Normal MODEL_OPT_1 GPIO55 LVB0N RXB0-
AB1 V25
LNA_CTRL_1 I2C_SCKM0/GPIO56 LVB1P RXB1+
N6 V24
LNA_CTRL_2 I2C_SDAM0/GPIO57 LVB1N RXB1-
AB2 W25
R174 R177 MODEL_OPT_2 GPIO76 LVB2P RXB2+
10K 10K AC2 W23
NVRAM_ST NVRAM_RENESAS S/W_TW HD_LVDS_NON_EU BR_RESET_DEMOD GPIO77 LVB2N RXB2-
C105 NON_OS_512k_ST NON_OS_512k_ATMEL PM_MODEL_OPT_0 AA23
IC104 IC104-*1 LVB3P RXB3+
0.1uF IC104-*2 IC104-*3 PM_MODEL_OPT_0 Y24
M24256-BRMN6TP
R1EX24256BSAS0A M24512-RMN6TP AT24C512C-SSHD-T
HIGH : HD_NON_EU LVB3N RXB3-
AA25
PM_MODEL_OPT_1 LOW : HD_EU LVB4P RXB4+
AA24
E0
1 8
VCC
A0 VCC E0 VCC A0 VCC HD_LVDS_pattern is different. LVB4N RXB4-
1 8 1 8 1 8
Between EU and NON_EU AE24
E1 WC LVACLKP RXACK+
2 7 A1
2 7
WP E1
2 7
WC A1
2 7
WP R175
R176
PM_MODEL_OPT_1 AD24
RXACK-
A0’h 10K 10K HIGH : S/W_NON_EU
LVACLKN
Y23
E2 SCL S/W_EU/AJ HD_LVDS_EU LVBCLKP RXBCK+
3 6 R111 22 I2C_SCL A2 SCL E2 SCL A2 SCL
3 6 3 6 3 6 LOW : S/W_EU/AJ W24
LVBCLKN RXBCK-
VSS
4 5
SDA
R112 22 S/W is different.
I2C_SDA VSS SDA VSS SDA GND SDA T25
4 5 4 5 4 5 Between TW GPIO194 MODEL_OPT_3
C104 C106 U23
8pF 8pF GPIO191 MODEL_OPT_4
T24
OPT OPT GPIO192 MODEL_OPT_5
EAN62389501 EAN43349003 EAN43349004 T23
GPIO193 MODEL_OPT_8

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/09/19
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN1_NON_EU 51

Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.


Only for training and service purposes LGE Internal Use Only
MODEL OPTION Memory OPTION
MODEL_OPT_4 MODEL_OPT_6
+2.5V_Normal +3.3V_Normal +2.5V_Normal +3.3V_Normal PIN NAME PIN NO. LOW HIGH +1.10V_VDDC
MODEL OPTION
Memory
PIN NO. U23 PIN NO. B8
Note VDDC 1.05V +1.10V_VDDC
MODEL_OPT_0 AB3 FHD HD VDDC : 2026mA
128M 0 0
1K

1K

1K

1K

1K

1K

1K
1K
1K

MODEL_OPT_1 PHM_ON
DUALSTREAM

MIU1-128M

MIU0-256M

F4 PHM_OFF

0.1uF
DVB_T2

PHM_ON
S/W_AJ

DVB_S

10V

10V
M120

1uF

1uF
HD
MODEL_OPT_2 AB2 NON_DVB_T2 DVB_T2 128M+128M
0 1

C275
R291

R222

R221

R206

R208

R211

R226

C228
R290
R298

T25

10uF

10uF
MODEL_OPT_3 NON_M120 M120

C277

C280

C283
256M 1 0
IF_AGC_SEL
R201 OPT 100
MODEL_OPT_0
MODEL_OPT_4 U23 MIU0-128M MIU0-256M
R202 BOOSTER_OPT100 256M+128M 1 1 Ginga
LNA2_CTL MODEL_OPT_1
R203 RF_SW_OPT 0 MODEL_OPT_5 T24 NON_DVB_S DVB_S
RF_SWITCH_CTL MODEL_OPT_2
R204 OPT 100
MODEL_OPT_3 MODEL_OPT_6 B8 MIU1-NO_DDR MIU1-128M
R225 OPT 100
MODEL_OPT_4
R228 OPT 100 MODEL_OPT_5 MODEL_OPT_7 A8 NON_DUALSTREAM DUALSTREAM
R230 OPT 100 MODEL_OPT_6 IC101
R229
R213
OPT
OPT
100
100
MODEL_OPT_7
MODEL_OPT_8
* Dual Stream is only Korea 3D spec +1.10V_VDDC
MSD804KKX SYM.E
S7LR-M_NON_MS10
NON_DUALSTREAM

1K

Close to MSTAR
MIU1-NO_DDR

DTV_IF
1K
1K

1K
1K

1K

Normal Power 3.3V


1K

1K
PHM_OFF
NON_DVB_T2
NON_DVB_S

MIU0-128M

R288 100 C257 0.1uF


NON_M120

K12 G10
IF_P_MSTAR
1K

AVDDLV_USB GND_32
MODEL_OPT_6 HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2 +3.3V_Normal VDD33 G11
FHD

C287 HALF_NIM/IF_FILTER GND_33


OPT

C288 G9 G12
R212

MODEL_OPT_4 OPT 33pF VDDC_1 GND_34


R294
R293
R297

R207
R224

R223

H9 G13
R209

R227

R289 100 C258 0.1uF L204 VDDC_2 GND_35


IF_N_MSTAR BLM18PG121SN1D C284-*1 K10 G14
HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2 VDDC_3 GND_36
HALF_NIM/IF_FILTER K11 G17

0.1uF

0.1uF

0.1uF
CAP_10uF_X5R

CAP_10uF_X5R
10V85C

85C
S7LR-M_NON_MS10 VDDC_4 GND_37

0.1uF
C289

0.1uF
33pF 10uF 10V L10 G18
IC101 VDDC_5 GND_38

10V
CAP_10uF_X7R M12 G19
MSD804KKX M13
VDDC_6 GND_39
G24
C204-*1 VDDC_7 GND_40

C284
10uF

C204
10uF

C209

C235

C245
C250 0.1uF R216 47 TU_SIF N12 H11

C255

C259
VDDC_8 GND_41
C251 0.1uF R218 47 CHANGE TO 10uF 10V P14 H12
J2
J3
RXACKP
SYM.C NC_8
AC4
AD3 ANALOG SIF
C264
1000pF
OPT
50V
10UF 10V X5R
CHANGE TO
CAP_10uF_X7R P15
R10
VDDC_9
VDDC_10
GND_42
GND_43
H13
H14
RXACKN NC_9 10UF 10V X5R VDDC_11 GND_44
K3 Close to MSTAR FB_CORE R14 H15
RXA0P VDDC_12 GND_45
J1 AC3 AVDD_AU33 R15 H16
RXA0N IP +3.3V_Normal VDDC_13 GND_46
K2 AE3 T10 H17
RXA1P IM VDDC_14 GND_47
K1 L227 L208 H18
RXA1N BLM18PG121SN1D BLM18PG121SN1D GND_48
L2 AD4 HALF_NIM/EU_NON_T2 H19
RXA2P SIFP GND_49
L3 AC5 C241 P10 J9
RXA2N SIFM C240 NC_2 GND_50
T5 HALF_NIM/EU_NON_T2 0.1uF 0.1uF P19 J10
POWER_ON/OFF_2 DDCDA_DA/GPIO27 FB_CORE FB_CORE GND_51
T4 C282 HALF_NIM/EU_NON_T2 R16 J11
0.1uF R220
DDCDA_CK/GPIO26 10K AVDDL_MOD GND_52
V5 L11 J12
POWER_ON/OFF_2 HOTPLUGA/GPIO22 HALF_NIM/EU_NON_T2 NC_1 GND_53
R219 M14 J13
0 MIUVDDC DVDD_DDR GND_54
AD2 J14
IF_AGC IF_AGC_MAIN GND_55
AE2 J15
RF_AGC C285 GND_56
0.047uF W9 J16
AVDD2P5 AVDD2P5_ADC_1 GND_57
25V W10 J18
TUNER_I2C HALF_NIM/EU_NON_T2 AVDD2P5_ADC_2 GND_58
AE6 W11 J19
I2C_SCKM1/GPIO78 TU_SCL AVDD2P5_ADC_3 GND_59
AD6 W12 J25
I2C_SDAM1/GPIO79 TU_SDA AVDD2P5_ADC_4 GND_60
Close to MSTAR K9
GND_61
XTAL_LOAD_27pF XTAL_LOAD_30pF Y17 K13
C261 27pF C261-*1 30pF AVDD25_LAN GND_62
AD1 K14
XIN GND_63
AC1 V18 H10
R287

X201 XTAL_LOAD_30pF AVDD2P5_MOD


XOUT AVDD_MOD_1 GND_64
1M

R5 24MHz C262 27pF C262-*1 30pF U19 K18


PM_MODEL_OPT_1 HOTPLUGD/GPIO25 AVDD_MOD_2 GND_65
HDMI

K19
XTAL_LOAD_27pF GND_66
AE9 D7 K22
CK+_HDMI4 RXCCKP SPDIF_IN/GPIO150 CI_DET GND_67
AC9 D6 R296 100 W14 L8
CK-_HDMI4 RXCCKN SPDIF_OUT/GPIO151 SPDIF_OUT AVDD25_PGA NC_3 GND_68
R214 2.2 AC10 SPDIF_OPTIC W15 L9
D0+_HDMI4
D0-_HDMI4
R215 2.2 AD9
RXC0P
RXC0N
Normal 2.5V AVSS_PGA NC_4 GND_69
GND_70
J8
AC11 E3 SIDE USB U7 L12
D1+_HDMI4 RXC1P USB0_DM AVDD_NODIE AVDD_NODIE GND_71
AD10 E2 +2.5V_Normal AVDD2P5 L13
D1-_HDMI4 RXC1N USB0_DP GND_72
AE11 L7 L18
D2+_HDMI4 RXC2P AVDD_DVI_USB_1 GND_73
AD11 AC12 L211 AVDD2P5:172mA M7 L19
D2-_HDMI4 RXC2N USB1_DM SIDE_USB1_DM BLM18PG121SN1D AVDD_DVI_USB_2 GND_74
AE8 AE12 P7 M8
DDC_SDA_4 DDCDC_DA/GPIO31 USB1_DP SIDE_USB1_DP AVDD3P3_MPLL GND_75
AD8 AVDD_DMPLL R7 K8
DDC_SCL_4 DDCDC_CK/GPIO30 AVDD_DMPLL GND_76
AC8 10uF C260 M10
HPD4 HOTPLUGC/GPIO24 10V C273 C274 1uF GND_77
C8 CAP_10uF_X5R 0.1uF 0.1uF M19 M11

C269
I2S_IN_BCK/GPIO148 AMP_SCL 85C DVDD_NODIE GND_78
F2 D8 L14
CK+_HDMI2 RXBCKP I2S_IN_SD/GPIO149 AMP_SDA CHANGE TO GND_79
F3 D9 V7 M15
CK-_HDMI2 RXBCKN I2S_IN_WS/GPIO147 COMP2_DET 10UF 10V X5R AVDD_AU33 AVDD_AU33 GND_80
G3 W7 M16
D0+_HDMI2 RXB0P AVDD2P5_MOD AVDD_EAR33 GND_81
F1 B10 M18
D0-_HDMI2 RXB0N I2S_OUT_BCK/GPIO154 AUD_SCK AVDD25_PGA:13mA GND_82
G2 C9 R19 M25
D1+_HDMI2 RXB1P I2S_OUT_MCK/GPIO152 AUD_MASTER_CLK_0 L229 VDD33 VDDP_1 GND_83
G1 B9 BLM18PG121SN1D T19 N10
D1-_HDMI2 RXB1N I2S_OUT_SD/GPIO155 AUD_LRCH VDDP_2 GND_84
H2 N11
D2+_HDMI2 RXB2P GND_85
H3 W18 N13
D2-_HDMI2 RXB2N I2S_I/F C291 C269-*1 AVDD_LPLL_1 GND_86
R6 0.1uF W19 N14
DDC_SDA_2 DDCDB_DA/GPIO29 AVDD_LPLL_2 GND_87
U6 C10 16V 10uF 10V N15
DDC_SCL_2 DDCDB_CK/GPIO28 I2S_OUT_WS/GPIO153 AUD_LRCK GND_88
P5 CAP_10uF_X7R V19 N16
HPD2 HOTPLUGB/GPIO23 VDD33 VDDP_NAND GND_89
R4 N17
CEC_REMOTE_S7 CEC/GPIO5 GND_90
AB9 N19
AUL0 GND_91
AA11 J17 K7
AUR0 AVDD_MIU AVDD_DDR0_D_1 GND_92
P2 Y9 K15 P8
HSYNC0 AUL1 AVDD_DDR0_D_2 GND_93
R3 AA9 K16 P9
VSYNC0 AUR1 AVDD_DDR0_D_3 GND_94
N2 AA7 C238 2.2uF AV2 L15 M9
RIN0P AUL2 AV2_L_IN AVDD_DDR0_C GND_95
P3 AB8 C239 2.2uF AV2 P11
RIN0M AUR2 AV2_R_IN GND_96
N3 Y8 C242 2.2uF K17 P13
GIN0P AUL3 COMP2_L_IN AVDD_DDR1_D_1 GND_97
N1 Y10 C243 2.2uF L17 P16
GIN0M AUR3 COMP2_R_IN AVDD_DDR1_D_2 GND_98
M3 AC7 M17 P17
SC1_ID BIN0P AUL4 AVDD_DDR1_D_3 GND_99
M2 AD7 L16 P18
SC1_FB BIN0M AUR4 AVDD_DDR1_C GND_100
M1 P12
SC1_R+/COMP1_Pr+ SOGIN0