real-time operating systems

A u g u s t 2 0 1 0
Real-time Operating Systems
Darshak Vasavada; 2005-2011
Permission is granted to copy, distribute and/or modify this document under the
terms of the GNU Free Documentation License, Version 1.1 or any later version
published by the Free Software Foundation. A copy of this license can be found
at: http://www.fsf.org/copyleft/fdl.html
A u g u s t 2 0 1 0
What is a real-time operating system?
How does multi-tasking occur in an RTOS?
What are various mechanisms with which tasks communicate
with each other?
Semaphore, queue, etc. etc.
How do tasks manage memory?
Memory management
Contents
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Memory management
How do tasks communicate with the I/O devices?
Device drivers
1. Real-Time and Embedded Guide by Herman Bruyninckx
2. uITRON Specifications
References
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What is an operating system?
A piece of software that manages system resources:
CPU
Provides a primitive such as a process or a task
Provides communication mechanisms between these
primitives
Memory
Distribution of physical memory amongst multiple threads
Kernel
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Distribution of physical memory amongst multiple threads
Virtual memory management
I/O
Interrupt servicing
Peripheral programming
Also known as the kernel.
Applications
OS
Hardware
MEM
CPU
OS
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Typical OS Configuration
IO
What is a real-time operating system?
The entity that manages the system resources in a
deterministic time.
A late answer could be a wrong answer!
Also known as real-time kernel, or real-time micro-kernel.
What must it guarantee?
Task switch: promise to the application code
Real-time kernel
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Task switch: promise to the application code
Interrupt latency: promise to the external device
Audio players
Speech playback
Video recorder
Control systems (aircraft, automobile etc.)
Modems
Examples
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Scheduling dependent on the number of threads
Non-deterministic disk accesses in demand paging
Interrupts disabled during kernel operations with uncertain
duration
what makes systems non-real-time?
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OS
Application Application
+
Operating System
Embedded OS
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Hardware
Typical OS Configuration
Hardware
Typical Embedded Configuration
The RTOS comes into the picture only when an application makes a
call to RTOS.
Interrupts and devices are open to the application.
Available as a set of library functions to be linked into the application
code.
Tiny kernel with the bare minimum functionality, everything else
handled at the application level.
File system
Using an RTOS
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File system
Network stack
I/O handling
Compiler/
Assembler
Object
files
EXE
Source
files
Development on a desktop system
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Libraries
Linker
EXE
OS /
loader
RAM
Compiler/
Assembler
Object
files
Image
Source
files
RAM
Debugg
er
Development on an Embedded System
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Libraries
Linker
Boot
loader
RTOS
ROM
prog
Flash
Linker
CMD
Image
bash
System calls
email browser
Applications under an OS
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Drivers
Hardware
MP3 decode User Interface
GPIO ISR
Applications under RTOS
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Audio Output
Rx ISR
Audio Tx ISR
Performance vs. protection
Tasks can access (and potentially corrupt) each others
memory
Applications have access to interrupts and peripherals
System designed as a whole
Fairness not a requirement
Priority allocation done collectively
Differences: OS vs. RTOS
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Priority allocation done collectively
Tasks can enable/disable scheduling
CPU management
Tasks
Inter-task synchronization: semaphores
Inter-task data exchange: queues
Memory management
Regions, memory allocation and freeing
I/O management
RTOS objects
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I/O management
Interrupt support
Device driver model
RTOS at a glance
Startup task
Scheduler
Task creation functions
Task 1 Task 2 Task N
ISR1 ISR2
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Scheduler
Inter-task communication functions
RTOS at a glance
Task
task_create, task_getpri, task_setpri, task_suspend,
task_resume, task_yield, task_getid
Semaphores
sem_create, sem_wait, sem_post, sem_destroy
Message queues
que_create, que_recv, que_send, que_destroy
Memory
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Memory
mem_create, mem_alloc, mem_free, mem_destroy
Interrupts
irq_request, irq_free
Managing the CPU
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A mechanism to share the CPU amongst different applications.
A task is a function with an independent asynchronous thread of
execution.
Each task thinks that it has the entire CPU for itself.
Control given from one task to another with/without tasks knowledge.
Operating system schedules task.
Scheduler has a scheduling algorithm; the most prevalent one is the
pre-emptive priority scheduling.
Tasks
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pre-emptive priority scheduling.
Sometimes referred to as a thread.
tsk_create (entryPtr, priority, stackSize, &tid);
tsk_delete (tid);
tsk_getid (&tid);
tsk_setpri (tid, pri);
tsk_getpri (tid, &pri);
Programming model
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tsk_suspend (tid);
tsk_resume (tid);
tsk_sleep (tid, ticks);
tsk_yield ();
startup () {
tsk_create (f1, ..., &tid1);
tsk_create (f2, ..., &tid2);
}
f1 () {
while (1) {
printf (hello, 1.\n);
Example
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printf (hello, 1.\n);
tsk_yield ();
}
}
f2 () {
while (1) {
printf (hello, 2.\n);
tsk_yield ();
}
}
Multi-tasking system
Reset Vector
HW-Init & Boot
OS
Startup task
single threading
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Startup task
T1 T2 T3 T4
multi-threading
Running
At a given point of
time, only one task
would be in this
state.
Ready-to-run
The task is ready
Running
gets resource
& scheduled
needs
resource
preempted
scheduled
Task states
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The task is ready
to run when the
CPU is not
available.
Waiting
The task is waiting
for a resource.
Ready Waiting
resource
resource released
but not scheduled
preempted
resource
taken away
The wait state
Task tells the OS that it requires a resource
OS puts the task to wait state so that other tasks can run
Examples
Waiting for another task to produce something (such as to fill
up a buffer)
Waiting for another task to release a common resource
Waiting for an interrupt (such as a button press, timer, DMA)
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Preemptive priority scheduler
The highest priority ready task runs
A lower priority task runs when only a high priority task is waiting
Equal priority tasks: FIFO, yield or time-sliced round-robin
priority
levels
Zzz Zzz
RR or FIFO
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Level 1
Level 2
Level 3
Level N
Zzz Zzz
Zzz
Zzz
main ()
{
int j;
tsk_create (f2, ..., &tid1);
while (1)
{
for(j=0; j<10; j++)
{
printf(j = %d\n, j);
tsk_yield ();
f2 ()
{
int k;
while (1)
{
for(k=0; k<100; k++)
{
printf("k = %d\n", k);
tsk_yield ();
}
}
Example:
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tsk_yield ();
}
}
}
}
}
Q: What happens when pri(1) is:
(a) greater than
(b) less than, and,
(c) equal to pri(2)?
Examples
What happens when:
Task 1 suspends itself
Task 2 resumes task1, and
Priority of task1 is higher
Priority of task2 is higher
What happens when:
Task 1 is created
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Task 1 is created
Task 2 is (higher priority) is created, and suspends itself.
An interrupt occurs which resumes task2
Which of the following states are possible for a system running 3 tasks?
High Med Low
Ready Ready Ready
Run Run Run
Wait Wait Wait
Ready Run Ready
Run Ready Ready
Quiz
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Structure of a task
Each task has:
Context
A stack
Scheduling parameters: priority, state
Context
All the processor registers in memory
Allocation of stack
Area reserved for stacks of all the tasks
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Area reserved for stacks of all the tasks
Sometimes static just a 2D array
Or, allocated on task creation
Task struct
Priority
State
Pointer to context
Task creation
task_create (entry_ptr, priority, stack_size);
Filling up task struct
Allocate stack
Creating the initial context
SP to the bottom of the stack
PC untouched
Status register to a certain default value
All registers to 0 or fixed pattern
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All registers to 0 or fixed pattern
Occurs when switching from one task to another.
The scheduler stores the context of a task.
CPU Registers
Program counter
Stack pointer
Context
On the stack
Context Switch
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On the stack
Statically allocated (i.e. an array)
Dynamically allocated from OS pool
Context switch example
Other task function
task_setpri
task_getpri
task_sleep
task_suspend
task_resume
task_yield
task_getid
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Very short process, but too long to be an ISR
Called in the user context after returning from ISR
No preemption from start to end
Called just like a function call; no need to save/restore context
Interrupt Processes
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Inter-task Communication:
Synchronization and Mutual exclusion
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Producer-consumer
Producer produces data.
Consumer consumes data.
Consumer waiting for the producer to complete.
Examples
ISR collecting a buffer of samples; task waiting to
process.
Synchronization
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process.
Task1 receives a data buffer, task2 decrypts it
Mutual Exclusion
Critical region
A part of code that requires entry-regulation
Shared memory
Shared devices
Need for OS to provide atomic operations.
Mutual exclusion is a mechanism to provide a regulated access
to the critical regions.
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to the critical regions.
Mutex: Example
task1 ()
{
...
print_tty (Message sent.);
...
}
task2 ()
{
MeRsxs aerge sroer.nt.
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{
...
print_tty (Rx error.);
...
}
task1 () {
while (flag == 0)
;
flag = 0;
Critical region.
flag = 1;
}
task2 () {
t
1
3
p
1
Busy waiting
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task2 () {
while (flag == 0) {
;
flag = 0;
Critical region.
flag = 1;
}
Atomicity
Testing and setting the flag
are not atomic
Context switch can occur in-
between
Resulting into two
processes getting into the
critical region
task1 () {
while (flag == 0)
;
flag = 0;
Critical region.
flag = 1;
}
task2 () {
while (flag == 0) {
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critical region
while (flag == 0) {
;
flag = 0;
Critical region.
flag = 1;
}
A mechanism which provides:
Atomicity in testing and setting a flag.
A way to inform the operating system that a task is waiting
for a resource.
Solution: semaphore
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Create
Create an instance of a semaphore.
Delete
Delete the previously created semaphore and free-up all the
related resources.
Wait
Wait till the semaphore becomes available.
Semaphore object
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Wait till the semaphore becomes available.
Post
Make a semaphore available.
Semaphore programming model
sem_create(value, &sid);
Create a semaphore with specified initial value
value = 1: semaphore available
value = 0: semaphore unavailable
sem_wait(sid);
If the semaphore is available, continue.
Otherwise, wait till semaphore becomes available.
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Otherwise, wait till semaphore becomes available.
sem_post(sid);
Make semaphore available.
sem_delete(sid);
Delete the semaphore.
struct semaphore {
int count;
Queue que;
};
wait (semaphore s) {
if (s.count == 1)
s.count = 0; /* mark resource unavailable */
else
Put the task in the queue s.que;
call the scheduler
Semaphore implementation
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call the scheduler
}
post (semaphore s) {
if (s.que is non-empty)
Make the first task ready.
else
s.count = 1; /* mark resource available */
call the scheduler
}
sem_wait(sid, timeout);
Time out after the specified time if the semaphore is not available for a
specific time.
Mechanism to avoid wait-forever condition.
Used in error handling.
for (retry = 0; retry < 5; retry++)
{
if (SEM_wait (semid, timeout) != SUCCESS)
Time-out
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if (SEM_wait (semid, timeout) != SUCCESS)
ResetDevice ();
else
break;
}
task1 () { /* consumer */
SEM_create (0, &sid);
while (1) {
SEM_wait (sid, WAIT_FOREVER);
process_buffer ();
}
}
Example: Synchronization
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}
ISR () { /* producer */
if (buffer is fully received)
SEM_post (sid);
}
main () {
SEM_create (1, &sid_tty);
...
}
task1 () {
SEM_wait (sid_tty);
print_tty (hello, world!\n);
SEM_post (sid_tty);
Example: Mutex
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SEM_post (sid_tty);
}
task2 () {
SEM_wait (sid_tty);
print_tty (hello, universe!\n);
SEM_post (sid_tty);
}
Counting semaphore
Applicable when multiple identical resources exist
Example:
main () {
SEM_create (5, &sid_printer);
}
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taskN () {
SEM_wait (sid_printer);
print (hello, universe!\n);
SEM_post (sid_printer);
}
A condition where a lower priority task ends up blocking a higher
priority task.
Illustration
p
Priority Inversion
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High
Medium
Low
t
Priority ceiling
The task in the critical region becomes the highest priority task.
Priority inheritance
The task in the critical region inherits the priority of the highest
waiting task.
Solutions
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Temporary high priority
High
Medium
p
Solving priority inversion
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Low
t
OS wrapper around the ISR
ISR ENTRY
Indicate that the control is inside an interrupt context
sem_post ()
Make the state changes, but dont schedule
ISR EXIT
Fall back into the schdeuler
Semaphore and ISR
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Fall back into the schdeuler
sem_pend ()
Cant be called inside an ISR. (Why?)
Inter-task communication:
Data exchange
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Data exchange
One process writes into the memory, the other reads from the memory.
Write operation:
*wr_ptr++ = DATA;
Read operation:
wr_ptr rd_ptr
Shared memory
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Read operation:
while (rd_ptr == wr_ptr)
;
DATA = *rd_ptr++; :
Simple mechanism; useful in sample based system.
Rate: on an average same.
What is the buffer full condition?
What is the problem with this mechanism?
Simple mechanism
Typically used between an ISR and a task
Post a semaphore when one buffer is
consumed
Example
What is the limitation of this scheme?
Extend the same mechanism: buffer ring
base ptr 0
base ptr 1
read ptr
write ptr
Double buffering
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Extend the same mechanism: buffer ring
write ptr
A mechanism to handle indefinite length of data elements.
Exchange data in arbitrary chunks.
Atomicity provided by the operating system.
Queues
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Create
Create an instance of a queue.
Delete
Delete the previously created queue and free-up all the
related resources.
Post
Post a message in the queue.
The queue object
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Post a message in the queue.
Wait
Wait until a message is available in the queue.
startup {
QUE_create (QUE_SIZE, &qid);
...
}
task1 () { /* consumer */
while (1) {
QUE_wait (qid, WAIT_FOREVER, &msg_ptr);
process_buffer (ptr);
}
Example
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}
}
task2 () { /* producer */
while (1) {
receive_buffer (ptr);
QUE_post (qid, ptr);
}
}
Passing the message
Passing the message
Memory allocation at the time of queue creation
que_create(msg_size, num_msgs, );
Message copied in the queue during que_send
Receiving task need not free the memory
Sending task can use the local memory to generate the
message
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Passing the pointer
Memory allocation by the application task
Receiving task should free the memory
Sending task can not use the local memory
Priority queue
Offers priority of a message: some messages are more
important than the others.
Useful in handling control messages and alerts.
Urgent
Post before the first element of the queue.
Useful in alerts, when the system gets choked up.
Queue variants
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Useful in alerts, when the system gets choked up.
Broadcast
Wakes up all the tasks sleeping on the queue.
Memory Management
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Allocate a chunk of memory.
Free the previously allocated memory.
Do it in a fixed overhead time.
Do it (sometimes) in a zero overhead space.
What is memory management?
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I/O buffers
A chain of data buffers
A series of messages
Usage pattern
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May not be re-entrant.
May not be constant time overhead.
Creates fragmentation.
Does not have control of over which memory space to allocate
from.
Whats wrong with malloc?
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Application specific memory pool
Circular array of fixed sized buffers
Statically allocated
getIndex freeIndex
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T3
T1
T2
ISR/DMA
char MemPool[NBUF][BUFSIZ];
void *MEM_get (void) {
return MemPool[getIndex++];
}
void MEM_free (void *ptr) {
if (ptr != &MemPool[freeIndex])
Error (MEM_free);
Application memory pools
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else
freeIndex++;
}
What is the problem with the above code?
Different allocation patterns
Fixed size (data buffers)
Variable size (control messages)
OS provides primitives to create different memory pools
Fixed
id = create_pool (pool_size, block_size);
ptr = mem_alloc (id, num_blocks);
OS memory pools
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ptr = mem_alloc (id, num_blocks);
Variable
id = create_pool (pool_size);
ptr = mem_alloc (id, num_bytes);
Other names: regions, partitions
Device Drivers
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What is a device?
The external entity with which the system exchanges
information
What is a device driver?
Software that manages a device
Owns a set of private resources
The functional interface provided by the operating system to
Introduction
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The functional interface provided by the operating system to
the application program for communicating with the device
Often not defined by the kernel
Init
One time initialization of the device.
Open/Close
Creating/Removing an instance of a device.
Read/Write
Exchanging information with the device.
Control
Programming model
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Control
Controlling device parameters.
read close write open
1
ctl init dev
id
Device table
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3
2
task1 () {
dev_id = dev_open (DEV_TTY);
while (1) {
generate_data ();
dev_write (dev_id, &ptr);
}
dev_close (dev_id);
}
Example
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task2 () {
dev_id = dev_open (DEV_TTY);
while (1) {
dev_read (dev_id, &ptr);
process_data ();
}
dev_close (dev_id);
}
TTY driver
Example
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Codec driver
Example
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Timer
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A hardware register in the CPU that has a capability to:
Increment a counter (tick) periodically.
Optionally raise an event when the count reaches a specified
value.
What is a timer?
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Provides a number of software timers using one hardware timer.
Periodic timers.
One-shot timers.
Software timer table
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create_timer (&timer_id)
Create a soft timer.
start_timer (timer_id, start_value, restart_value, callback);
Start counter to start value.
Down count until the counter reaches zero.
On zero, reload the counter with restart_value and call the
callback function.
stop_timer (timer_id);
Programming model
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stop_timer (timer_id);
Ive had enough of you!
alarm 1000 800 1
monitor 20000 15000 2
Callback Restart Counter Index
Timer table snap-shot
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recv_resp 0 823 3
Interrupts
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Direct ISR
The user plugs the ISR into the vector table.
OS providers provide BEGIN/END macros which do the
house keeping work.
OS Wrapper
OS provides a standard wrapper which is plugged in the
vector table.
Interrupt processing
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The wrapper does all the house-keeping work.
Calls the user ISR.
At the beginning of the ISR
Save all the registers used by the ISR.
At the end of the ISR
Restore all the registers.
Check if a context switch should be done at the end of the
ISR.
Call the scheduler if so, to return into the new task.
House keeping
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Call the scheduler if so, to return into the new task.
Interrupt masking by the OS and interrupt latency
DMA interrupts
OS unaware ISR for fast interrupts
Posting/Waiting in an ISR
Return from interrupt vs. Return from subroutine
Callbacks
Implementation notes
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Ported on a processor
Cost
Royalty
Source code
Support
Features
Kernel
Context switch timings
Memory usage for various
objects
Scheduling algorithm
Pick and choose kernel
Evaluating and customizing an OS
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Kernel
Network stack
BSP
GUI
Applications
Pick and choose kernel
modules
Trap vs. API interface
Thats all, folks!
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Old slides
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Voice over cable
One interrupt every 10 ms from the cable modem.
Preemptive Multi-tasking
Our
System
Cable
modem
Phones
UI
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One interrupt every 10 ms from the cable modem.
One interrupt every 125 us from the telephone codec.
An interrupt any time from the user interface.
Background processing
A few milliseconds to process a speech frame
A few microseconds to respond to the cable modem
System modem
Phones
Scenario
Speech sample arrives every 125 us. Takes 2 us of processing
time.
Cable modem interrupt comes every 10 ms. Takes 1 us of
processing time. Once the interrupt comes, the packet has to be
transmitted within 200 us.
A user input comes randomly, at the rate of (say) maximum 5
keystrokes per second.
Preparing a packet for the cable modem takes 500 us.
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Preparing a packet for the cable modem takes 500 us.
Processing a speech frame takes 3 ms.
Processing user inputs takes 100 us.
Pre-emptive multitasking
modem i/f
speech interrupt
cable tx ready interrupt
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modem i/f
speech processing
GUI
idle
Regions and segments
Primitives:
rn = region_create (size, unit_size);
ptr = region_getseg (rn, num_units);
region_putseg (rn, ptr);
region_destroy (rn);
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Partitions and buffers
A section of memory divided into fixed sized blocks.
User defined buffer size.
Primitives:
pt = pt_create (region_size, page_size, align_opts);
ptr = pt_getbuf (pt);
pt_putbuf (pt, ptr);
pt_free (pt);
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pt_free (pt);
Critical sections
Control access to critical sections.
Primitives:
critical_section_begin
critical_section_end
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Condition variables
User flags on which task can wait.
Such as if (count == 10), (myflag == 1)
Task is made to wake up, checks the condition and sleep again if not
met.
Can be used inside the critical region.
RTOS releases the semaphore behind the back.
A u g u s t 2 0 1 0
Test-and-set lock
Test and if available, set the lock in the same instruction.
Useful in multi-processor environment.
A u g u s t 2 0 1 0
Components of a real-time system
Vector table
Entry point
Boot loader
System initialization
Operating system
Application start-up task
Application tasks
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Vector table
Entry address
Default interrupt handling
Disable the interrupts that are not required
Where is it located?
Processor specific
Sometimes at address 0
Sometimes at the end of memory
Sometimes otherwise
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Sometimes otherwise
Some processors allow relocating vector table.
Entry point
The very first instruction is located here.
Disable all the interrupts.
Initialize the processor registers.
Initialize the stack pointer.
Jump to the boot loader.
How is the entry point determined?
Available as a reset vector
Hard-coded in the processor
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Hard-coded in the processor
Selectable through hardware pins
Boot code
Loads the code/data into RAM
Sometimes load from ROM/Flash.
Sometimes load from the serial port.
Sometimes load from the host port.
Selectable by hardware pin.
Before loading the code, the boot code
Initializes memory banks.
Performs code/memory integrity checks.
A u g u s t 2 0 1 0
Performs code/memory integrity checks.
Optionally un-compresses before copying.
Always located in the ROM.
Examples of boot code
Booting from ROM/Flash
Copy code from flash to RAM.
Optionally uncompress before copying.
Jump to the start address in RAM.
Booting from the serial port
Wait till the first word of data is transmitted.
Treat the first word as the length of the code (N).
Treat the second word as the starting address (SA).
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Treat the second word as the starting address (SA).
Receive N words, copy them starting from SA and jump to
SA.
Booting from the secondary memory (hard disk)
Booting from the network (tftp)
System initialization
Bring all the devices to the reset state.
Optionally perform system tests.
RAM tests
I/O tests
Install minimal drivers required to boot up the system.
Console I/O for boot messages.
Sometimes available as BSP/CSP from the hardware vendor.
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RTOS
Control transferred to the operating system.
Operating system performs its own initializations.
Interrupt vector table
Its own data structures
Transfers control to back to the application start-up task.
Subsequently, available to the application as a set of services.
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Application
Startup task
OS gives control to the startup task.
Application specific initialization occurs here.
All the application tasks are created here.
The OS resources can also be created here.
Sometimes all the ISRs are created here.
Application tasks
Each task performs its own initializations and then perform
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Each task performs its own initializations and then perform
its specified functionality happily ever-after.
Memory map
Flash map
Initialization 1
Boot code
RAM image
RAM map
Initialization 2
RTOS
code & data
Task1 code
Task2 code
Task3 code
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RAM image
ISRs
Constants
Data
Task3 code
Task1 stack
Task2 stack
Task3 stack
The overall picture
Vector table
HW init
Boot
I1
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OS
Startup task
I1
T1 T2 T3 T4 I1 I2 I3
t
I2
Q2 Q1 S2 S1
Allows a task to wait on a combination of events.
Primitives
efg_wait
efg_post
Differences from a semaphore
More memory efficient (one bit per flag).
Has only two states: set and clear.
Event flags
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Has only two states: set and clear.
Can not maintain a history of events, which a semaphore
can.
Overview of uITRON
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Introduction
Kernel developed by a consortium of Japanese industry
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