IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO.

3, MARCH 2014 1377

Dynamic Modeling and Control of Interleaved

Flyback Module-Integrated Converter
for PV Power Applications
Fonkwe Fongang Edwin, Student Member, IEEE, Weidong Xiao, Member, IEEE, and
Vinod Khadkikar, Member, IEEE

Abstract—For photovoltaic applications, the interleaved fly- iprim,pk Peak current through transformer primary wind-
back module-integrated converters (MICs) (IFMICs) operating ing within one switching period in discontinuous
in continuous conduction mode (CCM) show the advantages of conduction mode (DCM).
high power density, low voltage and current stresses, and low
electromagnetic interference but demonstrate a difficult control ioutput Average diode current.
problem compared to the discontinuous conduction mode. This IPV Photovoltaic (PV) current.
paper concentrates on the control issues and presents detailed KI Controller integral term.
modeling, in-depth dynamic analysis, and a two-step controller Kp Controller proportional term.
design approach for IFMIC systems operating in CCM. The Lf Output filter inductor.
proposed modeling approach is based on the fourth-order system
considering the dynamics of the output CL filter. This realistic Lm Magnetizing inductance.
fourth-order system modeling shows the presence of a resonant n or n2 /n1 Transformer secondary-to-primary turns ratio.
peak at a certain frequency, which can cause phase loss and Pavg Average power injected into the grid.
constraints of system bandwidth. A decoupled two-step controller RCf Filter capacitor equivalent series resistance
design approach is thus proposed to simplify the modeling and (ESR).
control synthesis in the IFMIC development. The decoupled con-
troller consists of a proportional–integral controller (based on Rf Inductor ESR.
the simplified model), followed by a lag term for mitigating the Rpv Dynamic PV resistance.
effect of the resonant peak. A 200-W digitally controlled MIC Tsw Switching period.
prototype is constructed for evaluation purposes. The simulation vCf Filter capacitor voltage.
and experimental results verify the effectiveness of the proposed vCpv Voltage across input capacitor.
modeling and control approaches.
Vg Grid voltage.
Index Terms—Digital control, modeling, module-integrated Vg,rms RMS grid voltage.
converter (MIC), photovoltaic (PV) power systems, single-phase Vg,th Threshold grid voltage below which DCM
grid-connected inverters.
occurs.
Vinv Voltage at pseudo-dc link.
N OMENCLATURE
Vpv PV voltage.
Cf Output filter capacitor. τ Controller lag term time constant.
Cpv Input capacitor. ω Grid pulsatance.
D Main MOSFET duty cycle.
D1 D1 = 1 − D.
I. I NTRODUCTION
dp Peak duty cycle.
fsw
idiode
iLf
Switching frequency of main flyback switch.
Diode current.
Grid-injected or output current.
M ODULE-INTEGRATED converters (MICs), the so-
called ac modules, or microinverters, are considered to
be the trend of future PV power systems and have drawn signif-
iLm Current through magnetizing inductance. icant research interest recently [1]–[3]. The module–converter
iprim Current through transformer primary winding. integration provides a parallel configuration and independent
operation of each PV panel. The individual maximum power
point tracking (MPPT) algorithm allows local optimization and
reduces power losses that result from PV module mismatch and
partial shading [4]–[6]. Furthermore, the parallel structure of
MIC prevents the single point failure, offers “plug and play”
Manuscript received November 18, 2012; revised January 16, 2013 and features, and increases the generation stability [1]. Modeling
February 20, 2013; accepted March 29, 2013. Date of publication April 16,
2013; date of current version August 23, 2013. and analytical studies have predicted the energy yield improve-
The authors are with the Masdar Institute of Science and Technology, ment when the MIC topologies are widely applied to PV power
Abu Dhabi, UAE (e-mail: mwxiao@masdar.ac.ae). systems [7]. However, the research challenge of microinverters
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. includes conversion efficiency, system cost, harmonic injection,
Digital Object Identifier 10.1109/TIE.2013.2258309 reliability, etc.
0278-0046 © 2013 IEEE
1378 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Statistics [8] show that inverter failures are the biggest cause
of lost productivity among other components in PV systems.
In [9], the double-frequency decoupling capacitor is considered
the dominant component that limits the system lifetime. It pre-
dicts that replacing electrolytic capacitors with film capacitors
can prolong the life expectancy of MIC systems. Therefore,
an improved circuit topology has been proposed in [10] and
[11] to minimize the decoupling capacitance and expect high
power density and long life time. Research also focuses on
developing new topologies to improve conversion efficiency
[12]–[17]. Others aim at the objectives of reducing total har-
monic distortion (THD) and/or improving power factor. The
MIC topology review and comparison have been conducted in
[1], [2], [18], and [19]. The study in [1] summarizes power
rating, component count, efficiency, and printed circuit board
size of different inverter topologies. In the conclusion, the
pseudo-dc-link inverters are considered to be among the best.
A comprehensive comparison of MIC topologies is reported in
[19], including power rating, component count, switching fre-
quency, soft-switching capability, and efficiency. It emphasizes
that the flyback MIC (FMIC) topology with current unfolding
shows low component count and potential for high efficiency
and reliability.
The topology of FMIC has drawn significant research atten-
tion in recent years [20]–[27]. Modified topologies have been
proposed to minimize the decoupling capacitance in FMIC
[10], [11]. Among the studies undertaken thus far on FMIC,
one group focuses on the operation in DCM [24]–[26], [28],
[29], and another concentrates on the continuous conduction
mode (CCM) [20], [22]. In DCM, if the output filter and
nonideal factor are neglected, the output-current-to-duty-cycle
transfer function is a constant gain, as reported in [22] and
[26]. Therefore, the current control loop is a straightforward
approach and shows little design complexity. The study in [22]
stated that the CCM demonstrates the advantages of higher
power density, lower voltage and current stresses on power
switches, and lower electromagnetic interference (EMI) when
compared to the DCM mode of operation. The appearance of
a notch around the resonant frequency that is caused by the
presence of the CL filter is also reported in [22]; however, no
further investigation is conducted for its mitigation. The system
design is based on a second-order system for modeling and
control purposes, which does not provide the exact behavior
of the overall system. This paper shows that the FMIC system
demonstrates a fourth-order dynamic and a resonant peak at
a particular frequency, which causes phase loss and limits the
system bandwidth. Since the resonant peak cannot be observed
by the simplified second-order modeling, this study focuses on
the high-order representation and control solution to minimize
the impact of the resonance.
This paper focuses on the control issue and presents mod-
eling, controller design, simulation, and experimentation for
investigating the interleaved FMIC (IFMIC) operating in CCM.
Compared to the FMIC, the IFMIC shows the following ad-
vantages: 1) Each converter unit in the IFMIC shares the
load equally; 2) the interleaving operation reduces the input
voltage ripple at switching frequency and the pseudo-dc-link
voltage ripple; and 3) the current sharing reduces the EMI.
Fig. 1. IFMIC with current unfolding.
Section II briefly introduces the background about operating
IFMIC in DCM and CCM. The modeling approach is based
on the averaged state-space modeling technique and presented
in Section III. It focuses on the second order at the beginning
and then migrates to the fourth-order analysis considering
the output CL filter. The small-signal ac model shows the
unique system dynamics and control challenges that need to
be considered for the closed-loop design. More particularly,
the system shows a resonant peak which can severely reduce
the phase margin, limiting the system bandwidth and severely
degrading performance. The modeling analysis is followed by
a decoupled two-step controller design approach. In the first
step, a proportional–integral (PI) controller is designed based
on the second-order model, and then, a lag term is appended
to mitigate the side effect of the resonant peak. Section IV
illustrates the simulation and experimental results to verify the
modeling and control approach.
II. T HEORETICAL BACKGROUND
The schematics of the IFMIC topology are shown in Fig. 1,
where the PV current is drawn from the PV panel and modu-
lated to a full-wave-rectified sinusoidal waveform by switching
Q1 and Q2 at high frequency. The voltage waveform of the
pseudo-dc link is also full-wave-rectified sinusoidal. The gate
signals for Q1 and Q2 are given in an interleaved manner
shifted at 180◦ , and each half shares the load equally. The
SCR H-bridge comprising Q3–Q6 forms a current-unfolding
circuit for injecting sinusoidal ac current into the grid. The
low-cost and reliable SCRs are ideal for this application since
the unfolding bridge is switched at the grid voltage and grid
frequency. To follow the polarity of the grid voltage waveform,
Q4 and Q5 conduct during the positive half cycle, while Q3 and
Q6 conduct for the negative half cycle. A CL filter is applied
at the point of common coupling for attenuating harmonic
injection to the grid.
The current-unfolding IFMIC can operate in either DCM or
CCM. In DCM, the transformer magnetizing current falls to
zero in each switching cycle and demagnetizes the transformer
completely, as shown in Fig. 2. The sum of the switch-on
time Ton and the falling time Tf is less than the switching
period Tsw . The main switch is controlled such that the peak
magnetizing inductance current is contained within a rectified
sinusoidal current envelope. Following the derivations in [21]
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS 1379

Fig. 2. Magnetizing inductance current waveform in DCM during one grid

cycle. Fig. 3. Representation of the second-order model.

during any switching period, the relation between the peak

current through the primary winding and the duty cycle is 2) An “operating point” henceforth refers to one couple of
expressed as output (instantaneous) voltage and duty cycle for which
the expected instantaneous output current (in steady state)
VCpv is obtained.
iprim,pk (t) = d(t) (1)
Lm fsw 3) The steady-state average power at switching frequency
where iprim,pk (t) represents the set of points forming the pri- is equal to the instantaneous output power at the line
mary winding current waveform envelope, as shown in Fig. 2, frequency.
and d(t) is defined as 4) Shown in Fig. 3, the PV module is modeled as a pure dc
voltage source in series with a resistance, which has been
d(t) = dp sin(ωt) (2) presented and verified in previous studies [31]–[33].
 5) Considering the relatively low power capacity of the
2 fsw Lm Pavg IFMIC, the grid is modeled as a stiff ac source.
dp = . (3)
VCpv
A few terms are defined as follows since they are subse-
Pavg indicates the desired power to be injected into the grid, quently quoted in the following sections.
which can be determined by MPPT. By analyzing the aforemen-
1) The small-signal model is a linearized mathemati-
tioned equations, the transfer function of the output current to
cal model for dynamic analysis and controller design
duty cycle is a linear gain and indicates a straightforward design
purpose.
for the current regulation. An open-loop operation is feasible
2) The averaged model is formed by the averaged state-
to force the output current to follow a sinusoidal reference.
space equations. The effect of switching frequency is ab-
Contrary to the DCM operation, the magnetizing inductance
sent in this model, which allows for efficient simulation.
current in CCM experiences an incomplete discharge during
3) The switching model refers to the mathematical model
each switching cycle [21]; therefore, the steady-state relation-
of the system based on the two independent state-
ship between the output voltage and input voltage in CCM can
space equations for each of the switching subintervals
be expressed as [30]
in CCM. It inherently includes the switching frequency
|Vg | nD effects.
= . (4)
VCpv D1 4) The physical model refers to the system model in
Simulink or other similar simulation software in which
Depending on the circuit parameters, the IFMIC designed for the electrical components are interactively placed, linked
CCM occasionally operates at DCM when the instantaneous together, and then simulated.
power level is low. The boundary condition between DCM
and CCM is given in [22] and expressed as (5). The boundary
condition is the design criterion to distinguish the operation of A. Averaged Model Without Considering Output Filter
DCM or CCM
   When the impact of the CL output filter on the overall system
1 dynamics is neglected, the system dynamics can be represented
|Vg,th | = VCpv Vg,rms −n . (5) by (6) and (7) in the turn-on and turnoff subintervals, respec-
2fsw Lm Pavg
tively. Therefore, the averaged model can be derived as (8). The
symbols and variables refer to the equivalent circuit shown in
Fig. 3 and definitions in the nomenclature
III. M ODELING AND C ONTROLLER D ESIGN
⎧
dvCpv 


For modeling, the following assumptions are made. ⎪ − Rpv1Cpv − C1pv vCpv
⎪
⎪ diLmdt =
1) Since the switching frequency is much higher than the ⎪
⎪ 1
0
i
⎪
⎨ dt
Lm1 Lm
grid frequency, the grid voltage appears as a constant dc 0 V pv
+ Rpv Cpv (6)
voltage during one switching period. Thus, the ac voltage ⎪
⎪ 0
0  Vg
⎪
⎪
can be considered to be a large number of successive dc ⎪
⎪ v
⎩ y = idiode = [ 0 0 ] Cpv
voltage levels. iLm
1380 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014

Fig. 4. Comparison of the second-order average and switching models.

⎧
dvCpv 


⎪
⎪ − Rpv1Cpv 0 vCpv
⎪
⎪
dt
diLm =
⎪
⎪
1
0 0 iLm


⎨ dt
0 Vpv
+ Rpv Cpv (7)
⎪
⎪ 0
−nL1m Vg
⎪
⎪
⎪
⎪ v
⎩ y = idiode = [ 0 n ]
1 Cpv
iLm
⎧
dvCpv 


⎪ − Rpv Cpv − CDpv
1
vCpv
⎪
⎪ dt =
⎪
⎪ diLm D
0 i Fig. 5. Pole-zero map for four operating points (second-order model).
⎪
⎨ dt
Lm1 
Lm 
0 Vpv
+ Rpv Cpv (8) TABLE I
⎪
⎪ 0
− nLm D1 Vg P OLE -Z ERO L OCATIONS FOR F OUR D IFFERENT O PERATING P OINTS
⎪
⎪
⎪
⎪
⎩ y = ioutput = [ 0 D1 ] vCpv .
n iLm

The averaged model is evaluated with the switching model,

as shown in Fig. 4. The circuit parameters for the case study
are listed in Table IV in the Appendix. A good match can be
noticed in the simulation waveforms of VCpv , iLm , and ioutput .
The small-signal output-current-to-duty-cycle transfer func-
tion can be shown to be a second-order system in (9), as shown
at the bottom of the page.
Based on the derivation in (9), a pole-zero map can be plotted
and shown in Fig. 5. The numeric values are recapitulated TABLE II
and summarized in Table I, showing different operating points. S UMMARY OF U NIT S TEP R ESPONSES FOR F OUR O PERATING P OINTS
It is noticeable that the poles move toward the real axis and
the zeros move away from the origin as the instantaneous
output power decreases. Analyzing the pole/zero distribution
and corresponding power conditions, the system demonstrates
a right-half-plane (RHP) zero, indicating a nonminimal phase
characteristic when the operating point is located at 226.03 W.
The system is expected to be more oscillatory for higher grid- Table I. It can be observed that: 1) the overshoot is greatest at
injected instantaneous power levels. the highest instantaneous output power level but decreases as
Table II illustrates the performance of unit step response at the output power decreases and 2) the settling time does not
the four operating points, which correspond to the definition in vary significantly with output power level.

   
Vg Vg
s Rpv Cpv Dn1 VCpv + n + D1
n VCpv + n − DILm Rpv ILm
Gidiode ,d (s) = − (9)
s2 [Rpv Cpv Lm ] + sLm + D2 Rpv n
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS 1381

Fig. 7. Bode plot of compensated system.

Fig. 6. Comparison of the second-order small-signal and averaged models for

Gop1 , Gop2 , Gop3 , and Gop4 , respectively. Fig. 8. Diagram of closed-loop control system.

The small-signal model outputs are compared with the av-

eraged model and shown in Fig. 6(a)–(d), under the operating
points Gop1 , Gop2 , Gop3 , and Gop4 , respectively. A step duty
cycle change of 0.2% is applied at 0.08 s for all cases. The
models show a good match with the averaged model. Based
on this study, the low damping characteristics appear when
the operating points are in the area at or close to the peak
instantaneous output power.

B. Preliminary Controller Design

The first controller design approach is based on the second-
order model derived in (9). Based on the low damping operating
points occurring at or close to the peak instantaneous output
power, the transfer function representing the output current
versus the duty cycle is derived as

(−2.082 × 10−7 )s2 +0.03029s+3.838

Gsystem = . (10)
(2.016×10−7 )s2 +(2.8×10−5 )s+0.13
It refers to the highest input (PV) voltage, peak grid voltage,
and peak instantaneous power, which are 55 V, 342 V, and
200 W, respectively. This is equivalent to the couple (D; Vg ) =
(36.06%; 342 V). The PI controller is therefore designed and
shown in (11), which yields a system open-loop bandwidth
between 2.5 and 5 kHz. The system phase margin is 78.3◦ ,
shown in the bode diagram in Fig. 7. The controller tuning
is based on the interactive tool, called “PIDTOOL” provided
by MATLAB for PI–derivative (PID) controller design. The
system s-domain model is provided, and then, the user sets the
desired phase margin and bandwidth. The tool then calculates
Fig. 9. Simulation results for the second-order system in closed loop.
the Kp and Ki parameters to satisfy these objectives if the
performance specification is properly assigned
1
C = 0.18105 + 85.2486 . (11)
s
A feedforward term is added to the controller output for fast
response, which is obtained from the expression in (4). Thus,
Fig. 8 illustrates the closed-loop structure with the feedforward
component. The closed loop works normally when the output
filter dynamic effect is ignored. Shown in Fig. 9, the simulation
1382 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014

first and second subintervals are expressed in the following

equations, respectively:
⎧ ⎡ diLm ⎤ ⎡ 1 ⎤
⎪ 0 0 0
⎪
⎪ dt Lm
⎪ ⎢ dvCpv ⎥ ⎢ − 1 0 ⎥
⎢ dt ⎥ ⎢ Cpv − Rpv Cpv
1
⎪
⎪ 0 ⎥
⎪ ⎢ ⎥ ⎢
⎪ diLf
⎪ = (RCf +Rf ) 1 ⎥
⎪
⎪ ⎣ ⎦ ⎣ 0 0 − Lf ⎦
⎪
⎪
dt Lf
⎪
⎪
dvCf
0 0 − Cf1
0
⎪
⎪ ⎤ ⎡ 0 ⎤
dt
⎪
⎪ ⎡
⎨ i Lm 0


⎢ vCpv ⎥ ⎢ 0 ⎥
1
⎢ ⎥ Vpv (12)
⎪
⎪ ×⎣ ⎦+⎣ Rpv Cpv
⎦
⎪
⎪ i Lf 0 − Lf
1 V g
⎪
⎪
⎪
⎪ vCf 0 0
⎪
⎪ ⎡ ⎤
⎪
⎪ iLm
⎪
⎪
⎪
⎪ ⎢v ⎥
⎪
⎪ y = [ 0 0 1 0 ] ⎣ Cpv ⎦
⎪
⎩ iLf
vCf
⎧⎡ ⎡ ⎤
⎪ diLm ⎤ R
− n2Cf 0
RCf
− nL1m
Fig. 10. Observation of oscillations in output current with controller applied ⎪
⎪ dv L nL
⎪ ⎢ Cpv ⎥ ⎢ ⎥
dt m m
⎪ − Rpv1Cpv
⎢ dt ⎥ ⎢ 0 ⎥
to the fourth-order model.
⎪
⎪ 0 0
⎪
⎪ ⎢
⎢ diLf ⎥=⎢ RCf ⎥
⎪
⎪ ⎣ dt ⎦ ⎣ nL −
(RCf +Rf ) 1 ⎥
⎪
⎪
0 Lf Lf ⎦
⎪
⎪ dv
f
⎪
⎪
Cf 1
0 − Cf 1
0
⎪
⎪
dt
⎡
nCf
⎤ ⎡ 0 ⎤
⎪
⎨ iLm 0


⎢ vCpv ⎥ ⎢ 0 ⎥
1
⎢ ⎥ Vpv (13)
⎪
⎪ ×⎣ ⎦+⎣ Rpv Cpv
1 ⎦ V
⎪
⎪ i 0 − Lf
⎪
⎪
Lf g
⎪
⎪ vCf 0 0
⎪
⎪ ⎡ ⎤
⎪
⎪ iLm
⎪
⎪
⎪
⎪y = [0 0 1 0]⎢
⎪ vCpv ⎥
Fig. 11. Fourth-order model. ⎪
⎪ ⎣ ⎦.
⎪
⎩
iLf
shows that the output current follows the sinusoidal reference vCf
signal effectively. When the CL filter effect is considered, the Based on (12) and (13), the averaged model can be devel-
same controller in (11) causes significant oscillations in the oped and shown in Fig. 12. The fourth-order dynamic system
closed-loop operation, as shown in Fig. 10. The simulation includes four state variables vCpv , vCf , iLf , and iLm , which
shows that the predesigned controller fails to regulate the output result from the input and output storage units and which are
current. Thus, a detailed modeling approach and controller illustrated in the shadowed boxes. In Fig. 12, the boxes with
redesign/tuning are required. dashed lines represent the system inputs, and the duty cycle D
is the control variable.
C. Fourth-Order Model The outputs of the fourth-order averaged and switching
The control synthesis based on the simplified second-order models are plotted together in Fig. 13 and show a good match.
model shows oscillations in the output current. This results Thus, the development can be based on the averaged model for
from the output CL filter that shows resonant characteristics. fast simulation. The small-signal model can be expressed in
Therefore, the output filter is considered in the dynamic mod- either the state-space format (14) or as transfer function (15),
eling and shown in Fig. 11. The state-space equations in the as shown at the bottom of the page.

⎧⎡ ⎤ ⎡ ⎤ ⎡ RCf ⎤
−D1 nL1m ⎡ î ⎤
R R VCpv ILf RCf VCf
⎪ −D1 n2Cf n2 Lm ILm + Lm − nLm +
D
⎪
dîLm D1 nLCfm
⎪ dv̂
⎪ dt ⎢
Lm Lm
⎥ Lm ⎢
nLm
⎥
⎪ ⎢ Cpv ⎥ − CDpv − Rpv1Cpv − ICLm
⎪⎢ dt ⎥ ⎢
⎪
⎪ ⎢
0 0 ⎥⎢ v̂Cpv ⎥ ⎢
⎥⎢ ⎥+⎢
⎥
⎥ dˆ
⎪
⎪ ⎢ ⎥= ⎢ ⎥⎣ îLf ⎦ ⎢ R
pv
⎥
⎪⎣
⎪
d îLf ⎦ ⎣ D1 nL RCf
0 −
(RCf +Rf ) 1
⎦ ⎣ − Cf
nLf ILm ⎦
⎨ dt f Lf Lf
dv̂Cf
D 1
0 − 1
0 v̂ Cf − ILm
1 nC ⎡ ⎤ C nCf (14)
⎪
⎪
dt f f
⎪
⎪ îLm
⎪
⎪ ⎢ v̂Cpv ⎥
⎪
⎪
⎪
⎪ y = [0 0 1 0]⎢ ⎣ îLf ⎦
⎥
⎪
⎪
⎩
v̂Cf
îLf (s) ps3 + As2 + Bs + C
= 4 (15)
ˆ
d(s) s + Es3 + F s2 + Hs + M
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS
Fig. 12. Averaged model of the fourth-order system.
Fig. 13. Comparison of the fourth-order averaged and switching models.
The parameters p, A, B, C, E, F, H, and M are derived
and defined in the Appendix. By analyzing (15), the system
shows one RHP zero, two left-half-plane (LHP) zeros, and four
LHP poles. A portion of the pole-zero map for the predefined
four operating points is illustrated in Fig. 14. It shows a similar
pattern as the simplified second model because the CL filter
introduces only nondominant poles. The results of the pole-zero
mapping are summarized in Table III. It is worth mentioning
that the output filter introduces two LHP poles whose positions
do not change significantly as the operating points change.
The step responses are not shown here since they follow
the same pattern for the four operating points, as discussed in
1383
Fig. 14. Portion of the pole-zero map of four operating points.
TABLE III
P OLE -Z ERO L OCATIONS FOR F OUR D IFFERENT O PERATING P OINTS
Section III-A. For the purpose of completeness, the outputs of
the small-signal and averaged models are compared and shown
in Fig. 15(a)–(d), representing the operating points of Gop1 ,
Gop2 , Gop3 , and Gop4 , respectively. For the comparison, a 0.2%
step change of duty cycle is applied at 0.08 s. The models show
a close match that allows us to develop the controller based on
the linearized model.
Shown in Fig. 16, the bode plot of the fourth-order model
operating point Gop1 is compared with that of the second-order
model at the same operating condition. The fourth-order model
indicates the existing resonant peak at a frequency of 30.6 kHz,
which is introduced by the CL output filter. It adds a sharp
phase drop, thus adding the upper bound to the available control
bandwidth. This also explains the oscillation shown in Fig. 10
and why the predesigned controller fails to regulate the output
current to follow the sinusoidal reference signal.
1384
Fig. 15. Comparison of the fourth-order small-signal and averaged models for
Gop1 , Gop2 , Gop3 , and Gop4 , respectively.
Fig. 16. Comparison of bode plots for the second- and fourth-order models.
D. Controller Design
By simulation, it was found out that the negative effect of the
output CL filter can be mitigated as follows: 1) by increasing
the capacitor ESR (RCf ); 2) by increasing coupling inductor
ESR (Rf ); 3) by employing pole-zero cancellation; and 4) by
introducing a damping term in the controller. The first two
approaches are ignored due the high power losses. The third
approach generally introduces high-frequency components in
the system and indicates an implementation difficulty that any
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 17. Structure of closed-loop control system.
Fig. 18. Bode plot of compensated system.
mismatch could seriously degrade the control performance and
damage components. Therefore, the fourth option is chosen
since it appears easy to be implemented by microcontrollers,
tolerant to model uncertainty, and free in loss.
The controller synthesis objective is to mitigate the oscilla-
tions shown in the closed-loop system and keep a reasonable
phase margin to guarantee the system robustness. The controller
shall introduce a zero crossing in the magnitude plot around the
region circled in Fig. 16. Even though the crossover frequency
can be chosen along a wide range, it should be noted that an
early crossover reduces the system bandwidth and affects the
regulation performance of the ac grid-injected current. On the
other hand, a late zero crossing causes the low phase margin
and could lead to instability. For this design, we use the same
controller synthesized in Section III-B and append a lag term
at the highlighted region of Fig. 16. The lag term equation
becomes
1
Clag = . (16)
2.5 × 10−5 s + 1
The closed-loop control diagram becomes Fig. 17, and the
corresponding bode diagram is shown in Fig. 18. It indicates
that the phase margin is 49.4◦ at a crossover frequency of
3740 Hz.
It is interesting to note that, in the proposed controller, the
product of the PI controller and lag term follows the same
format as the type-II controller discussed in [22]. By comparing
the two controller design approaches, the proposed method
seems to be more general toward adopting other types of
controllers such as PID to be developed in the first step. In
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS
Fig. 19. Photograph of prototype.
Fig. 20. Z-domain bode plot of compensated system.
addition, the traditional lag compensator with a zero and a
pole can also be selected to mitigate the resonant peak. The
decoupled two-step controller design approach is a systematic
way and shows the advantage of simplicity and flexibility in
controller parameterization.
IV. E XPERIMENTAL E VALUATION
The IFMIC prototype is developed for the evaluation pur-
pose. It is controlled by a dsPIC33FJ16GS502 digital signal
controller. Fig. 19 demonstrates the prototype photograph. The
controller is also implemented with other functions for pro-
tection, phase-locked loop, sine lookup table, etc. By using a
sampling frequency of 85 kHz and the Tustin transformation,
the equivalent Z-domain transfer function for the controller
becomes
0.03458z 2 + 0.000191z − 0.03439
Cz = . (17)
z 2 − 1.619z + 0.619
The Z-domain bode plot of the compensated system is shown
in Fig. 20. The sampling time delay in the digital controller
results in the phase margin is 8◦ lower than the analog analysis,
which is shown in Fig. 18.
1385
Fig. 21. Comparison of simulation and experimental results for one operating
point.
A. Transient Verification
In order to evaluate the transient response and verify the
control analysis, a dc source is used to mimic the grid-tied
operation since the ac voltage can be assumed to be a succession
of slowly varying dc voltage levels, as explained in Section II.
The dc voltage can be assigned to different levels to emulate the
various operating points and verify the theoretical derivation
according to the slow moving ac voltage. Fig. 21 shows the
transient response of the closed-loop system for the operating
point, which is equivalent to an input voltage of 10 V, a dc
output voltage of 50 V, and a current reference of 330 mA. The
simulation result shows similar characteristics of the practical
measurements in terms of damping and response speed. The
waveform is shifted slightly for distinguishable comparison.
Both illustrate significant oscillation at the transient period. The
measured 32-kHz oscillation frequency matches the resonant
frequency, which is indicated in the bode diagram in Fig. 18.
Furthermore, a step change is implemented on the ac output
current reference, as shown in Fig. 22. The simulation and
experimental results follow the same reference change from
0.6 to 1 A.
B. AC Grid-Tied Evaluation
The prototype is then tested with an ac grid where an
autotransformer is the adjustable interface linked to the grid.
Fig. 23 illustrates the measured waveforms of the grid voltage
(blue), the “folded” voltage at the inverter pseudo-dc link
(cyan), and the injected grid current (pink). Fig. 24 shows
the experimental results at the rated 200-W power level. The
oscilloscope-captured signals include the PV voltage (cyan),
PV current (pink), PV power (red), grid voltage (blue), and
injected grid current (green). The power source is a PV array
simulator (Agilent E4350B).
The IFMIC is tested in different power levels from 25% to
100% of the rated power. The measured current THD and effi-
ciency are demonstrated in Fig. 25(a) and (b), respectively. The
1386
Fig. 22. Comparison of simulation and experimental results for iLf reference
change.
Fig. 23. Experimental waveforms for grid voltage, pseudo-dc-link voltage,
and output current for the interleaved flyback.
peak efficiency is 95.7% when the delivered power is 180 W.
The measured current THD values are under 4% across the full
power span. For the readers’ reference, the system component
models and cost are presented in Table V of the Appendix. The
aforementioned experimental results support the theoretical
analysis and controller synthesis based on the IFMIC topology
and CCM operation.
V. C ONCLUSION
In IFMIC PV systems, the operation in CCM shows a
difficult control problem due to the appearance of a notch
around the resonant frequency, which is introduced by the CL
filter at the grid side. This paper has focused on the present
control issues and has proposed a comprehensive modeling,
analysis, design, and simulation to meet the grid-tied control
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 24. Experimental waveforms for PV voltage, PV current, PV power, grid
voltage, and output current for the interleaved flyback.
Fig. 25. Measured efficiency and THD at different measured power levels.
performance requirement. Based on the averaged state-space
technique and ignoring the output filter effect, a second-order
model has been developed as the starting point. The simplified
model captures the dominant system dynamics but does not
indicate the oscillation effect, which is caused by the CL output
filter. The derived PI controller results in oscillation and shows
unsatisfactory performance in regulating the output current.
Therefore, a fourth-order model has been developed, showing
the resonant peak introduced by the CL filter. To mitigate
the oscillation, a lag term is appended to the predesigned
controller to form a high-order linear controller. The controller
is implemented with the support of the digital signal controller
dsPIC33FJ16GS502. The system modeling, theoretical anal-
ysis, and controller design are verified experimentally by a
200-W MIC prototype, which is controlled for grid-tied
operation.
A PPENDIX
The system parameters and component list are shown in
Tables IV and V, respectively.
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS 1387

RCf ILm
p= − (18)
nLf
ILm n(ILm Lm RCf − Cpv D1 RCf Rpv VCpv ) + Cpv D1 ILf RCf 2
Rpv − Cpv D1 RCf Rpv VCf
A= − − (19)
nCf Lf Cpv Lf Lm Rpv n2
n(−Cf ILm RCf Rpv D2 − Cf D1 ILm RCf Rpv D − ILm Lm + Cf D1 RCf VCpv + Cpv D1 Rpv VCpv )
B =
Cf Cpv Lf Lm Rpv n2

Cf D1 RCf VCf + Cpv D1 Rpv VCf − Cf D1 ILf RCf 2
− Cpv D1 ILf RCf Rpv
+ (20)
Cpv Lf Lm Rpv n2
n(−D1 VCpv + D ILm Rpv + D1 DILm Rpv ) − D1 VCf + D1 ILf RCf
2
C =− (21)
Cf Cpv Lf Lm Rpv n2
RCf + Rf 1 D1 RCf
E = + + (22)
Lf Cpv Rpv Lm n2

D R
1 D2 (RCf + Rf ) Cpv1Rpv + L1m nCf 2 D12 D12 RCf
2
D1 RCf
F = + + + 2
− 2
+ (23)
C f Lf Cpv Lm Lf C f Lm n Lf Lm n Cpv Lm Rpv n2
(Lm + Cf D RCf Rpv + Cf D Rf Rpv )n + D1 Lf + Cf D1 RCf − Cf D1 RCf
2 2 2 2 2 2 2
H =
Cf Cpv Lf Lm Rpv n2
Cf D1 RCf Rf + Cpv D1 RCf Rpv − Cpv D12 RCf Rpv + Cpv D12 Rf Rpv
+ (24)
Cf Cpv Lf Lm Rpv n2
D2 Rf − D12 RCf + D1 RCf + D2 Rpv n2
M = 1 (25)
Cf Cpv Lf Lm Rpv n2

TABLE IV R EFERENCES
IFMIC C IRCUIT PARAMETERS
[1] Q. Li and P. Wolfs, “A review of the single phase photovoltaic module
integrated converter topologies with three different DC link configura-
tions,” IEEE Trans. Power Electron., vol. 23, no. 3, pp. 1320–1333,
May 2008.
[2] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, “A review of single-phase
grid-connected inverters for photovoltaic modules,” IEEE Trans. Ind.
Appl., vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005.
[3] B. Hu and S. Sathiakumar, “Interleaving technique of series connected
module-integrated converters for PV systems: Novel approach and system
TABLE V analysis,” in Proc. IEEE ISIE, 2012, pp. 1785–1790.
IFMIC M AIN C OMPONENT C OUNT AND C OST [4] W. Xiao, N. Ozog, and W. G. Dunford, “Topology study of photovoltaic
interface for maximum power point tracking,” IEEE Trans. Ind. Electron.,
vol. 54, no. 3, pp. 1696–1704, Jun. 2007.
[5] N. Femia, G. Lisi, G. Petrone, G. Spagnuolo, and M. Vitelli, “Distributed
maximum power point tracking of photovoltaic arrays: Novel approach
and system analysis,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2610–
2621, Jul. 2008.
[6] G. Petrone, G. Spagnuolo, and M. Vitelli, “An analog technique for
distributed MPPT PV applications,” IEEE Trans. Ind. Electron., vol. 59,
no. 12, pp. 4713–4722, Dec. 2012.
[7] G. Petrone and C. A. Ramos-Paja, “Modeling of photovoltaic fields in
mismatched conditions for energy yield evaluations,” Elect. Power Syst.
Res., vol. 81, no. 4, pp. 1003–1013, Apr. 2011.
[8] A. G. Golnas, “PV system reliability: An operator’s perspective,” IEEE J.
Photovolt., vol. 3, no. 1, pp. 416–421, Jan. 2013.
[9] S. Harb and R. S. Balog, “Reliability of candidate photovoltaic module-
integrated-inverter (PV-MII) topologies—A usage model approach,”
IEEE Trans. Power Electron., vol. 28, no. 6, pp. 3019–3027, Jun. 2013.
[10] H. Hu, S. Harb, N. Kutkut, I. Batarseh, and Z. J. Shen, “A review of power
decoupling techniques for microinverters with three different decoupling
capacitor locations in PV systems,” IEEE Trans. Power Electron., vol. 28,
no. 6, pp. 2711–2726, Jun. 2013.
[11] H. Hu, S. Harb, N. H. Kutkut, Z. J. Shen, and I. Batarseh, “A single-stage
microinverter without using electrolytic capacitors,” IEEE Trans. Power
Following the modeling discussion in Section III, the fourth- Electron., vol. 28, no. 6, pp. 2677–2687, Jun. 2013.
[12] N. Kasa, T. Iida, and L. Chen, “Flyback inverter controlled by sensorless
order model parameters in (15) are defined in (18)–(25), shown current MPPT for photovoltaic power system,” IEEE Trans. Ind. Elec-
at the top of the page. tron., vol. 52, no. 4, pp. 1145–1152, Aug. 2005.
1388 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
[13] B. Sahan, A. N. Vergara, N. Henze, A. Engler, and P. Zacharias, “A single-
stage PV module integrated converter based on a low-power current-
source inverter,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2602–2609,
Jul. 2008.
[14] S. Chen, T. Liang, L. Yang, and J. Chen, “A boost converter with capacitor
multiplier and coupled inductor for AC module applications,” IEEE Trans.
Ind. Electron., vol. 60, no. 4, pp. 1503–1511, Apr. 2013.
[15] D. Cruz and R. Demonti, “Grid connected PV system using two
energy processing stages,” in Proc. IEEE Photovolt. Spec. Conf., 2002,
pp. 1649–1652.
[16] A. Trubitsyn, B. J. Pierquet, A. K. Hayman, G. E. Gamache,
C. R. Sullivan, and D. J. Perreault, “High-efficiency inverter for photo-
voltaic applications,” in Proc. IEEE Energy Convers. Congr. Expo., 2010,
pp. 2803–2810.
[17] B. J. Pierquet and D. J. Perreault, “A single-phase photovoltaic inverter
topology with a series-connected power buffer,” in Proc. IEEE Energy
Convers. Congr. Expo., 2010, pp. 2811–2818.
[18] L. Jih-Sheng, “Power conditioning circuit topologies,” IEEE Ind.
Electron. Mag., vol. 3, no. 2, pp. 24–34, Jun. 2009.
[19] F. F. Edwin, W. Xiao, and V. Khadkikar, “Topology review of single
phase grid-connected module integrated converters for PV applications,”
in Proc. IEEE IECON, 2012, pp. 821–827.
[20] Y.-H. Ji, D.-Y. Jung, J.-H. Kim, T.-W. Lee, and C.-Y. Won, “A cur-
rent shaping method for PV-AC module DCM-flyback inverter under
CCM operation,” in Proc. 8th Int. Conf. Power Electron.-ECCE Asia,
May 30/Jun. 3, 2011, pp. 2598–2605.
[21] A. C. Kyritsis, C. Tatakis, and N. P. Papanikolaou, “Optimum design of
the current-source flyback inverter for decentralized grid-connected pho-
tovoltaic systems,” IEEE Trans. Energy Convers., vol. 23, no. 1, pp. 281–
293, Mar. 2008.
[22] Y. Li and R. Oruganti, “A low cost flyback CCM inverter for AC module
application,” IEEE Trans. Power Electron., vol. 27, no. 3, pp. 1295–1303,
Mar. 2012.
[23] D.-K. Ryu, Y.-H. Kim, J.-G. Kim, C.-Y. Won, and Y.-C. Jung, “Interleaved
active clamp flyback inverter using a synchronous rectifier for a photo-
voltaic AC module system,” in Proc. 8th Int. Conf. Power Electron.-ECCE
Asia, May 30/Jun. 3, 2011, pp. 2631–2636.
[24] T. Shimizu, K. Wada, and N. Nakamura, “A flyback-type single phase
utility interactive inverter with low-frequency ripple current reduction on
the DC input for an AC photovoltaic module system,” in Proc. IEEE 33rd
Annu. PESC, 2002, vol. 3, pp. 1483–1488.
[25] Y.-C. Hsieh, M.-R. Chen, and H.-L. Cheng, “Zero-voltage-switched inter-
leaved flyback converter,” in Proc. 31st INTELEC, 2009, pp. 1–6.
[26] A. C. Nanakos, E. C. Tatakis, and N. P. Papanikolaou, “A weighted-
efficiency-oriented design methodology of flyback inverter for AC photo-
voltaic modules,” IEEE Trans. Power Electron., vol. 27, no. 7, pp. 3221–
3233, Jul. 2012.
[27] Y. H. Kim, Y. H. Ji, J. G. Kim, Y. C. Jung, and C. Y. Won, “A new control
strategy for improving weighted efficiency in photovoltaic AC module-
type interleaved flyback inverters,” IEEE Trans. Power Electron., vol. 28,
no. 6, pp. 2688–2699, Jun. 2013.
[28] J. B. Wang, J. H. Wu, and D. Kao, “Injection current phase lag effect of
the flyback inverter,” in Proc. 6th IEEE Conf. Ind. Electron. Appl., 2011,
pp. 1803–1808.
[29] S. Zengin, F. Deveci, and M. Boztepe, “Decoupling capacitor selection in
DCM flyback PV microinverters considering harmonic distortion,” IEEE
Trans. Power Electron., vol. 28, no. 2, pp. 816–825, Feb. 2013.
[30] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics,
2nd ed. Boston, MA, USA: Kluwer, 2004.
[31] Y. Mahmoud, W. Xiao, and H. H. Zeineldin, “A parameterization ap-
proach for enhancing PV model accuracy,” IEEE Trans. Ind. Electron.,
vol. 60, no. 12, pp. 5708–5716, Dec. 2013.
[32] Y. Mahmoud, W. Xiao, and H. H. Zeineldin, “A simple approach to
modeling and simulation of photovoltaic modules,” IEEE Trans. Sustain.
Energy, vol. 3, no. 1, pp. 185–186, Jan. 2012.
[33] W. Xiao, W. G. Dunford, P. R. Palmer, and A. Capel, “Regulation of pho-
tovoltaic voltage,” IEEE Trans. Ind. Electron., vol. 54, no. 3, pp. 1365–
1374, Jun. 2007.
Fonkwe Fongang Edwin (S’12) received the
Diplôme d’Ingénieur de Conception from the
Ecole Nationale Supérieure Polytechnique, Yaoundé,
Cameroon. He is currently working toward the
M.Sc. degree in electrical power engineering
at Masdar Institute of Science and Technology,
Abu Dhabi, UAE.
His research interests include modeling and con-
trol, power electronics and its applications to re-
newable energy sources, sustainable energy, and
sustainability.
Weidong Xiao (M’07) received the M.Sc. and Ph.D.
degrees from The University of British Columbia,
Vancouver, BC, Canada, in 2003 and 2007,
respectively.
In 2010, he was a Visiting Scholar working
with the Massachusetts Institute of Technology,
Cambridge, MA, USA. Prior to his academic ca-
reer, he was with MSR Innovations Inc., Vancouver,
where he worked as an R&D Engineering Manager
focusing on projects related to integration, research,
optimization, and design of photovoltaic power sys-
tems. He is currently a Faculty Member with the Electric Power Engineering
Program, Masdar Institute of Science and Technology, Abu Dhabi, UAE. His
research interests include photovoltaic power systems, dynamic systems and
control, power electronics, and industry applications.
Vinod Khadkikar (S’06–M’09) received the B.E.
degree in electrical engineering from the Gov-
ernment College of Engineering, Dr. Babasaheb
Ambedkar Marathwada University, Aurangabad,
India, in 2000, the M.Tech. degree in electrical en-
gineering from the Indian Institute of Technology,
New Delhi, India, in 2002, and the Ph.D. degree in
electrical engineering from the École de Technologie
Supérieure, Montréal, QC, Canada, in 2008.
From December 2008 to March 2010, he was a
Postdoctoral Fellow with the University of Western
Ontario, London, ON, Canada. Since April 2010, he has been an Assistant
Professor with Masdar Institute of Science and Technology, Abu Dhabi, UAE.
From April 2010 to December 2010, he was a Visiting Faculty Member at the
Massachusetts Institute of Technology, Cambridge, MA, USA. His research
interests include applications of power electronics in distribution systems
and renewable energy resources, grid interconnection issues, power quality
enhancement, active power filters, and electric vehicles.