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I. INTRODUCTION
Manuscript received May 10, 2007; revised June 19, 2007. This work was
supported through the Colorado Power Electronics Center. Recommended for
publication by Associate Editor R. Teodorescu.
The authors are with the Colorado Power Electronics Center, Electrical
and Computer Engineering Department, University of Colorado, Boulder, CO
80309-0425 USA (e-mail: maksimov@colorado.edu; zane@colorado.edu).
Color versions of one or more of the gures in this letter are available online
at http://ieeexplore.ieee.org.
Digital Object Identier 10.1109/TPEL.2007.909776
(1)
where is the vector of converter states (e.g., inductor current
). We assume the input voltage
and capacitor voltage,
is constant, since the primary interest is in the control-tooutput responses.
The A/D converter samples the output voltage error at the
sampling rate equal to the switching frequency . The error
signal samples are processed by a discrete-time compensator
. The compensator output samples
control the switch
duty cycle via a digital pulse-width modulator (DPWM). This
modulator can be viewed as a D/A converter including a sampleand-hold followed by signal sampling at the modulated edge [2].
It is important to note that there are two samplers in the feedback loop: A/D sampling of the error voltage, and the modulator
sampling. As a result, the system small-signal model does not
include a sample-and-hold. Instead, the relationship between the
small-signal perturbations of the voltage error signal and the
includes a delay between the A/D sampling
duty-cycle
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, the derivation of
is not necessary. We simply proceed with the discrete-time model derivation according to the
waveforms shown in Fig. 1(c). These waveforms are shown for
the specic case of trailing edge modulation and the A/D sam. The small-signal displing in interval 2
crete-time model can be written as
(2)
where the matrix and vector coefcients can be solved by propagating the effect of each perturbation during the converter switch
states according to (1) and Fig. 1(c). Consider rst the effect of
1 of the states. Starting from the A/D
only a perturbation
1 , the perturbation
1 propagates
sampling at
, state 1 for
, and through switch state 2 for
nally state 2 for
. Therefore, the resulting perturbation
after one period
is given by
(3)
where is the steady-state duty ratio. Next, consider only the
in the duty cycle. The initial pereffect of perturbation
occurs at the modulation edge of the
turbation in the states
PWM output signal and can be found from (1) as linear extensions of the previous and next switch states
(4)
are the steady-state states at the PWM sampling
where
. The perturbation
then propagates
instant,
through the system over the remaining part of the switching
. The resulting
period, which is in switch state 2 for
matrix and vector coefcients for the model (2) are given in
and
Table I, where
Fig. 1. (a) Switching dcdc converter with digital voltage-mode control. (b)
Small-signal model of the digitally controlled dcdc converter. (c) Waveforms
illustrating discrete-time model derivation for the digitally controlled dcdc
converter with A/D sampling during interval 2.
(5)
The output state-space equation can be added according to (1)
as follows:
(6)
at
and the modulator sampling at , as shown in
Fig. 1(b), and illustrated by the waveforms in Fig. 1(c). The
total delay in the control loop includes the A/D conversion
time, the computation delay (i.e., the time it takes to compute the
), as well as the modulator delay
duty-cycle control signal
(i.e., the time between the update of
and the switch transition from state 1 to state 2). In the discussion that follows, we assume that the total delay is shorter than the switching period ,
. Inclusion of the delay in the discrete-time model
0
presented here is the key extension compared to the models in
[1][4].
afAs shown in the model of Fig. 1(b), the samples
through the equivalent
fect the converter state perturbations
hold
which models the converter responses between the
samples, leading to exact continuous-time models [7]. Since the
digital control system only operates on the values of the state
variables or the outputs sampled at the A/D sampling instants
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TABLE I
DISCRETE-TIME SMALL-SIGNAL MODEL PARAMETERS FOR TRAILING AND LEADING EDGE PWM CONVERTERS IN CCM
for
simplify to
(13)
(14)
(15)
(16)
Approximate expansions of the matrix exponentials in (14)
or the alternatives proposed in
and (15), such as
[17], can be employed to obtain an approximate closed-form analytical discrete-time model. Using the approximation
, the standard -transform of (13) and (16) yields the
control-to-output transfer function in closed form
(17)
where the numerator and denominator polynomials in (17) are
shown in Table II. Results are shown for the ideal (no losses)
buck converter and the ideal boost converter with A/D sampling
in interval 1 or in interval 2. Further discussions related to boost
or yback converters with capacitor ESR can be found in [16].
Note in all cases that the zeros of the discrete-time control-tooutput voltage transfer functions depend on the total delay in
the control loop, while the poles are not affected by the delay.
For the nonideal buck converter, it is also interesting to note that
the capacitor ESR does not add another zero. Rather, it just shifts
the zero in the direction opposite to the effect of . Fig. 2 shows
for the buck conthe magnitude and phase responses of
verter with the parameters dened earlier at the nominal
16 m for
0,
0.5 , and
. The delay effects,
which are clearly visible, especially in the phase responses, must
be taken into account in the design of high-performance digital
controllers.
0.5
The model results are also shown in Fig. 3 at
and compared to an independent method of frequency response
identication. The comparison was generated by performing
a switching level time-domain simulation in Simulink and injecting perturbation signals on the steady-state duty cycle for
cross-correlation based system identication, as described in
[18]. The simulation was performed using the buck converter
parameters dened above, a delay element to adjust according
to Fig. 1 (interval 2 sampling) and no quantization in the PWM
or output signal sampling. The samples (dots) obtained through
transient identication are exact matches to the small-signal
model (17), as shown in Fig. 3.
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TABLE II
POLYNOMIALS FOR APPROXIMATE BUCK AND BOOST CLOSED-FORM CONTROL-TO-OUTPUT TRANSFER FUNCTIONS (TRAILING EDGE PWM)
G z
R
T t T
t t
f
t
IV. CONCLUSION
The letter presents an exact small-signal discrete-time model
for digitally controlled dcdc converters. The model, which is
based on well-known approaches to discrete-time modeling and
the standard -transform, takes into account sampling, modulator effects and delays in the control loop. Complete models are
derived that can be used for any leading or trailing edge PWM
converter operating in continuous conduction mode and with a
single A/D sampling instant per switching period. The models
can be used directly in software tools such as MATLAB for
system analysis and direct digital compensator design. Approximate closed-form control-to-output responses are derived for
buck and boost converters, with either trailing-edge or leadingedge PWM, and arbitrary A/D sampling instants. A model example is given for a buck converter to illustrate the effects of
controller delay and the capacitor ESR. The model is veried in
simulation using an independent system identication approach.
G z
T R
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