Beyond Theory

Intro to Digilent Open Courseware on

Nexys3, Spartan 6 based
Yao Qi
Digilent China
December, 2011
Agenda
Digilent and Engineering Education
Digilent FPGA platform
Top University Teaching Case
Open Courseware
Digilent Design Contest
Digilent Romania
Mircea Dabacan, Ph.D.
Hardware/software design
Pullman, WA Main Office Clint Cole, President
Engineering Design & Management
Digilent Taiwan
Ben Liu, MSEE
Manufacturing, ME design
Digilent China
Frank Zhao, Ph.D.
Sales and marketing
Engineering is an applied skill
Applied skills are learned through practice



Imagine learning to ride a bicycle just
by reading about it!
Step 1: Swing
leg over bike and
place feet on
peddles without
falling.

Step 2: Push
forward and start
peddling. Enjoy
feeling of gliding
down roadway.
Step 3:
Important! Maintain
balance while riding.
Falling may lead to
injuries.

Step 4: Always
practice riding
before getting on
bicycle for first
time to avoid falling
off.
Good Luck!
To learn engineering



students must do engineering



What I hear, I forget. What I see, I remember. What I do, I understand. Confucius
An Improved Learning Model
Hands-on experience is the key
Every Student, Every Assignment (ESEA)
Students learn more, faster, and
better with unrestricted access
to design tools
overall learning improves when
applied design skills taught early;
overall performance improves
when design skills used frequently*
I never teach my pupils; I only attempt to provide the conditions in which they can learn. Albert Einstein
Teaching Platforms for Every Level
Virtex5
Virtex2 Pro
Spartan3E
Spartan6
1 2 3 4 5 6 7 8 9 10 Year
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Basys2:Logic
Nexys2:Control
Spartan 3E:Multi
Genesys: Systems
Atlys: Systems and Video
XUPV5:Systems Design
NetFPGA: Networking
XUP V2Pro:Systems
B.S M.S Ph.D
Nexys3: Multi
Nexys3:Teaching Platform
Nexys3
Computational Horsepower
Spartan6 (XC6SLX16-CSG352)
14579 Logic Cells
2278 Slices, 18224 Flip-Flops
32 DSP 48A1
32 x 18Kb block RAM
232 User I/O
4 DCMs and 2 PLL

LUT-6 CLB
BlockRAM
I/O
Hardened Memory
Controllers
High-performance
Clocking
DSP Slices
Nexys3 Memories
Memory in FPGA
136Kbit Distributed Memory
576Kbit Block RAM
Memory on Board
128Mbit Cellular RAM
128Mbit PCM Parallel Flash
128Mbit PCM Quad-mode SPI
Flash
LUT-6 CLB
BlockRAM
I/O
Hardened Memory
Controllers
High-performance
Clocking
DSP Slices
Nexys3 Basic Interfaces
GPIO
8 Slide Switches
5 Push Buttons
4-digit 7 Segment Display
8 LEDs

Display
VGA




Ethernet
10/100 SMSC LAN8710
PHY

USB Ports
USB-UART
USB-HID (OTG)
High-speed USB2
peripheral port



Nexys3 Expansions
PMODs


VMODs
Pmods
Small I/O interface boards
Extend the capabilities of any Digilent board
Standard interface
Examples:
A-D and D-A converter
Temperature, Microphone
RS232, PS2
Motor control
LEDs, Switches, Buttons
WIFI, RF module
Bluetooth module
Vmods
Expand the capabilities of
many of our FPGA/CPLD
boards
High parallel data
bandwidth
Examples:
VmodCAM
VmodTFT
VmodMIB
Demos On Nexys3
Super Mario
Music Synthesizer
Music Synthesizer with RF
Super Mario
N2A03
ENT_CPU
PPU
CPU Mem
PPU
VRAM
Control
Signals
PmodAMP
PWM
VGA
Spartan6 FPGA
Joypad
interface
Music Synthesizer
Music Synthesizer
Music Synthesizer
Receiver
PWM
Xilinx FPGA
RxD
5
SPI
IRQ
Pmod
AMP
PWM
out
7
4
LEDs
BTNs
Debug
SW(7:0)
Clk
Clk
JA
JD
4
RST
16
RX
Address
Data
Config
Clk
RXRcv
RXRcv
3
Tone
Mode
Synth
Clk
8
Audio
BTN(3..0)
LED(7..0)
100MHz Clk
RF1
Music Synthesizer Add RF Receiver
Additional: VmodCAM with
Ethernet & USB Data Transmission
Where to learn more
Xilinx University Program
Digilent Inc. Website
Digilent CN Chinese Community
Xilinx China Forum
Baylor University
Brigham Young University
California Polytechnic State University
Georgia Institute of Technology
Johns Hopkins University
Michigan State University
Massachusetts Institute of Technology
Oregon Institute of Technology
Penn State College of Medicine
Pennsylvania College of Technology
Princeton University
Purdue
Rose-Hulman Institute of Technology
San Jose State University
Stanford
Texas A & M University
University of California Long Beach
University of Illinois Champaign
UC Berkeley
USC
US Naval Academy
University of Washington
Illinois Institute of Technology
Vanderbilt University
Yale University

Agilent Technologies
Analog Devices
Cyprus Microsystems
Embedded Flight Systems, Inc
GE Global Research Center
Goodrich Corporation
Hewlett-Packard Company
Jet Propulsion Lab
Los Alamos National Laboratory
Maryland Procurement Office DOD
Matsushita Avionics Systems Corp
Maxim Integrated Products
Medtronic Microelectronics Center
NASA / LARC
National Instruments
National Semiconductors
Philips Semiconductors
Philips Ultrasound
Radiation Monitoring Devices
Raytheon Missile Systems
Robotic Surgical Tech, Inc.
Sandia National Laboratories
Sanyo Semiconductor
ST Microelectronics
Tektronix
Xerox
Xilinx


Some Customers in USA
90% of TOP US Schools use Digilent products.
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6.111:
Introductory Digital
Systems Laboratory

6.375:
Complex Digital
Systems

6.190:
Rapid Prototyping of
Embedded Systems
Using FPGA

6.173:
Multicore Systems
Laboratory
MIT
EE108A:
Fundamentals of
Digital Logic

EE108B:
Computer
Organization &
Design
.
.
.
Stanford
CS150
Digital Design and
Computer
Architecture

CS152
Computer
Architecture and
Engineering

CS252
Graduate Computer
Architecture

UC Berkeley
Top University Teaching Case
UC Berkeley:CS150
UC Berkeley:CS150
UC Berkeley:CS150
UC Berkeley:CS150
UC Berkeley:CS150
Executes most commonly used MIPS instructions.
Pipelined (high performance) implementation.
Serial console interface for shell interaction, debugging.
Ethernet interface for high-speed file transfer.
Video interface for display with 2-D vector graphics acceleration.
Supported by a C language compiler.
ZJU Teaching case
Logic & Computer Design Fundamental
Spartan3
Principles of Computer
Spartan3
Computer Architecture
Spartan3E
Embedded System Design
XUP V2 pro
ZJU:QS-1
QS-1: 32 bit RISC CPU
MIPS-I(TM) instructions
5 pipeline
Running C program
I/O device
UARTPS/2 controllerVGA controller
Interrupter handler



ZJU:QS-1

Board
VGA
Interface
Controler Datapath
PS/2
Interface
RS-232
Interface
CPU
VRAM Memory(256K32bit)
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BUS Interface
18
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FPGA
DBUS
ABUS
32
PC
Terminal
KEY
Board
VGA
Monitor
R

G

B


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CACHE
MMU
Dynamic
Pipeline
Interrupt
Process
Yes, FPGA Can
Open Courseware on Nexys3
Digital
Logic
Design
Digital
Signal
Processing
Microcomputer
Principle
Embedded
System
Design
Embedded
OS
Basic Advance SOC OS
Open Courseware on Nexys3
Open
Course
ware
Lab
Solution PPT
Lab
Source
code
Teaching
Materials
Lab
manual
Open and Share on
www.openhw.org
Digital Logic Design
Target
undergraduate
Objective :
Learn the Elements of Digital Circuit
Use Verilog, Implement Digital Circuit on a FPGA
Learn Xilinx FPGA Logic Design Flow
Website
www.openhw.org




Digital Logic Design
15 basic labs
Basic Logic gate Circuit
Adder
Encoder
. . .
Shift Register
PWM Generator
VGA Controller
PS/2 Controller

DSP with FPGA
Target
Undergraduate/Postgraduate
Objective
Use Matlab Simulink tools
Use Xilinx DSP toolsSystem Generator
Use FPGA to verify the arithmetic
Website
www.openhw.org



DSP with FPGA
I/O Blocks (IOBs)
Configurable
Logic Blocks
(CLBs)
Clock Management
(DCMs, BUFGMUXes)
Block SelectRAM
resource
Dedicated
multipliers
Programmable
interconnect
DSP with FPGA
DSP with FPGAs
6 Labs
Nexys3 board and Design Tools
Basic Arithmetical Circuit
Implementation
FIR Filter Design
Digital Controlled Oscillator Design
CIC Filter Design
CORDIC Vector Length Calculation
Microcomputer Principle
Target
Undergraduate/Postgraduate
Objective
Learn Basic Principle of Microcomputer
Learn Structure of CPU8086
Learn Assemble Language
Website
www.openhw.org

Microcomputer Principle
HT-LAB: CPU8086
Embedded System Design
Target
Undergraduate/Postgraduate
Objective
Learn Xilinx Embedded System Development Flow
Learn Structure of SOC and AXI4 bus
Design IP core
Learn Hardware and Software Co-debugging
Website
www.openhw.org


M_AXI_DC
M_AXI_IC
M_AXI_DP
Embedded System Design
MB_DEBUG
JTAG
Spartan6
M
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B
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BRAM
MDM
AXI-EMC
SRAM
DIP
PUSH
RS232
GPIO
GPIO
UART
AXI
Interconnect
AXI
Interconnect
AXI4
AXI4-Lite
AXI4-Lite
AXI4-Lite
Embedded Hardware System
Embedded System Design
6 Labs
Basic Embedded System Design
SRAM IP Controller Design
LED GPIO Controller Design
PWM IP Controller Design
Interrupt Controller IP Design
Hardware and Software Co-debugging
Embedded OS
Target
Undergraduate/Postgraduate
Objective
Learn Xilinx EDK tools
Learn Linux Kernel Configure and Compile
Learn SOC Design Based on MicroBlaze
Run Embedded Linux on FPGA
Website
www.openhw.org



Embedded OS
6 Labs
Base System for Linux
Kernel and Hardware Test
DTS Generation and
Kernel Compilation
Hello World Application
/proc Entry Read & Write
My Led Hardware Part
My Led Driver Part

Digilent Design Contest
DDC Showcase
Project : BitHound: 32-Channel Logic analyzer
Platform: Atlys
Author: Lukas Schrittwieser, Mario Mauerer
From: ETH Zurich, Switzerland
DDC Showcase
Project : Smart Shopping Cart
Platform: Nexys2
Author: Liansheng Chen ,Liming Qu, Chuan Zhang
From: Beijing University of Technology, Beijing China
DDC Showcase
Project : High-Speed Touch screen Oscilloscope
Platform: Nexys2
Author: Cristian Culman
From: Politehnica University, Timisoara Romania
More Showcase
www.digilentinc.com Showcase
Thanks