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Interpretation of Results:

The experiment demonstrated the dc and ac biasing circuit of JFET amplifier and of course its
configuration. Just like BJT, Field Effect Transistor (FET) can also be used as an amplifier. The structure is
named after the terminal where the input and output is common. Thus, JFET has common gate,
common drain, and common source amplifier configurations. In this experiment, common source
configuration was observed.

In the DC analysis of the JFET amplifier, it was observed that capacitors are open in its
equivalent dc circuit. The drain voltage is slightly lower than the drain supply voltage since there is a
voltage drop in the resistor 3 (R3). The main purpose of R1 is to keep the gate voltage equal to 0V since
gate current is 0A. Vs is produced by the drop across R2, which is the source voltage and the gate source
voltage (VGS) is observed to be negative. With that we can say that the gate-source junction is reverse
biased. It should be noted that JFET is always operated with the gate-source PN junction in reverse
biased condition.

Analyzing the AC operation of the JFET amplifier having a bypass capacitor and without bypass
capacitor, the input voltages are the same but their output voltages differ. Considering a JFET amplifier
without bypass capacitor, it gives a lower output voltage than an amplifier with bypass capacitor since
the current will flow through the resistor R2. Considering an amplifier with a bypass capacitor, just like
BJTs, adding bypass capacitor provides a greater amplification between the two since Resistor R2 will be
bypassed or shorted. This will provide the current to flow through the shorted capacitor. Thus,
bypassing resistor R2 produces maximum voltage gain since output voltage is also increased. These
voltage gains are represented by a negative sign which implied that there is a 180 degrees phase
inversion observed of the output voltages with the input voltage.























Conclusion:

JFET amplifier is always operated with gate to source PN junction in reverse biased condition.
That is, when gate to source voltage is observed to be negative value. The JFET amplifier has a common-
source configuration when the gate terminal serves as the input while the drain terminal serves as the
output terminal. Its equivalent BJT configuration is common emitter which is similarly used from this
experiment.

JFET can be implemented as amplifiers since it increases the input signal without any distortion.
In its operation in AC considering a bypass capacitor provides a negative larger voltage gain resulting to
a more amplified output signal compared to an un-bypassed. Its because for the common-source
amplifier configuration the output voltage experiences 180 degrees phase reversal with the input
voltage. Thus, a negative sign appeared to the voltage gains.

Having all the procedures done properly attaining the requirements needed, all the objectives of
the experiment are said to be successfully met.


References:
Lecture Notes in Electronics 2
Ph.D. Paglinawan, Arnold. Paglinawan, Charmaine. Sejera, Marloun. Sejera, Marianne. Chua, Vic
Dennis.

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