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Introduction to Nanoelectronics

Topic Resonant Tunnel Diode

Professor R. Krchnavek

By Kalpesh Raval
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Over the several decades, the world of electronics has been dominated by Si
(Silicon) based technologies. Silicon is the principal component of most semiconductor
devices, and most importantly integrated circuits (ICs). An example of such technology
is the CMOS (Complementary Metal Oxide Semiconductor) circuits. CMOS technology
is used in microprocessors, microcontrollers, static RAM (Read Access Memory) and
other digital logic circuits. CMOS is also used for a wide variety of analog circuits such
as image sensors, data converters and highly integrated transceivers for many types of
communication systems. Current modern technology is based on nanoelectronics
(nanoscale) where integrated circuits are reduced in size (scaling) for high speed, less
power consumption and simply using less physical space ICs for enhanced and improved
application performances. This involves an integration of CMOS technology with various
electronic devices. As the industry begins to address the theoretical limits of CMOS
scaling, the current challenge is the integration of CMOS with new types of devices. The
RTD, which utilizes electron-wave resonance in double potential barriers, has emerged as
one of the most important testing grounds for modern theories of transport physics, and is
central to the development of new types of semiconductor nanostructure. The tunneling
devices are candidates of new functional devices applicable to new integrated circuit
technology in so-called Beyond CMOS region. Among the various tunneling devices,
the resonant tunneling devices (tunneling diodes) are promising because of their
capability for high-speed operation, large Negataive Differentiate Resistance (NDR)
characteristics at room temperature, and adaptive design of device characteristics.

The most common function of a diode is to allow an electric current to pass in one
direction (called the forward biased condition) and to block the current in the opposite
direction (the reverse biased condition). Forward bias occurs when the P-type
semiconductor material is connected to the positive terminal of a battery and the N-type
semiconductor material is connected to the negative terminal. This makes the P-N
junction conduct as shown below.


Figure 1





If a diode is reverse biased, the voltage at the cathode is higher than that at the
anode. Therefore, no current will flow until the diode breaks down. Connecting the P-
type region to the negative terminal of the battery and the N-type region to the positive
terminal produces the reverse-bias effect.




Figure 2

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Current research efforts focus on adapting the characteristics of resonant
tunneling diodes (high speed & negative differential resistance (NDR)) in a way that may
be closely matched to the characteristics with resonant tunnel devices. Resonant tunnel
diode (RTD) is a two terminal device and widely recognized as being inherently high-
speed device having a load I-V curve, characterized by a region of negative differential
resistance as shown below.



Figure 3

The diode is capable of generating a terahertz (x10
12
Hz) wave at room
temperature. These two characteristics, high speed and NDR region make them
potentially very attractive as high-speed switching devices. One of the efforts in adapting
the RTD structure involves integrating pairs of RTDs with a CMOS gate to achieve bi-
stable operation. The logic cell design consists of two RTDs connected in series with a
gate voltage applied in between them to control its properties. The interactions between
the nanocells of RTDs are achieved via tunneling in the quantum layers.

Leo Esaki invented the tunnel diode in August 1957 while working with Tokyo
Tsushin Kogyo (now known as Sony) and who in 1973 received the Nobel Prize in
Physics for discovering the electron tunneling effect used in these diodes. These diodes
have a heavily doped p-n junction that is approximately 10 nm (100 A
0
) wide. The heavy
doping produces an extremely narrow depletion zone and results in a broken bandgap,
where conduction band electron states on the n-side are more or less aligned with valence
band hole states on the p-side. This results in overlapping of the two bands. SONY
manufactured tunnel diodes for the first time in 1957 followed by General Electric and
other companies from about 1960. Currently, they are manufactured in low volume
today. Tunnel diodes are usually made from germanium, but can also be made in gallium
arsenide and silicon materials. They can be used as oscillators, amplifiers, frequency
converters and detectors. RTDs are formed as a single quantum well structure surrounded
by very thin layer barriers known as a double barrier structure.
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The response function of a tunnel diode having a region of NDR due to heavy
doping can be described by following bias conditions.
















Figure - 4

Figure - 4 shows the equilibrium energy level diagram of a tunnel diode with no
bias applied. Note that the valence band of the P-material overlaps the conduction band
of the N-material. The majority electrons and holes are at the same energy level in the
equilibrium state. If there is any movement of current carriers across the depletion region
due to thermal energy, the net current flow will be zero because equal numbers of current
carriers flow in opposite directions. When a small bias voltage is applied we get,














Figure - 5

Figure- 5 shows the energy diagram of a tunnel diode with a small forward bias
(50 millivolts) applied. The bias causes unequal energy levels between some of the
majority carriers at the energy band overlap point, but not enough of a potential
difference to cause the carriers to cross the forbidden gap between the valence and
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conduction bands. Since the valence band of the P-material and the conduction band of
the N-material still overlaps, current carriers tunnel across at the overlap and cause a
substantial current flow. The amount of overlap between the valence band and the
conduction band decreases when forward bias is applied.

As the bias is further increased, the area of overlap becomes smaller as seen in
Figure-6. When the overlap between the two energy bands becomes smaller, fewer and
fewer electrons can tunnel across the junction thus the current decreases as the voltage
increases, which is known as the negative resistance region of the tunnel diode.














Figure 6

When the bias is increased even further, the energy bands no longer overlap
(Figure 7) and the diode operates in the same manner as a normal PN junction, where
the current increases because of the normal conduction and no longer by tunneling since
the applied bias voltage is high enough to break the barrier.














Figure 7



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During the forward bias operation, resonant tunnel diode produces a negative
differential resistance region, which is a property of electrical circuit elements composed
of certain materials in which, over certain voltage ranges, current is a decreasing function
of voltage. This range of voltages is known as a negative resistance region. Under normal
forward bias operation, as voltage begins to increase, electrons at first tunnel through the
very narrow p-n junction barrier because filled electron states in the conduction band on
the n-side become misaligned with empty valence band hole states on the p-side of the p-
n junction. An imbalance between the carrier charges causes current to flow. As voltage
increases further these states become more misaligned and the current drops this is
called negative resistance, because current decreases with increasing voltage. As voltage
increases further, the diode begins to operate as a normal diode, where electrons travel by
conduction across the p-n junction, and no longer by tunneling through the p-n junction
barrier. Thus the response function for a tunnel diode is the negative resistance region
that exhibits a high peak to valley current ration (PVCR).

The transmission and reflection processes of coherent electron waves through the
double barrier structure can describe resonant tunneling. For better application
performance, resonant tunneling requires quantum well layers and high-energy barrier
tunnel layers, which are fabricated from a high-quality heterostructures. Currently, the
fabrication of good heterostructure is difficult on Si substrate. In quantum mechanics,
quantum tunneling (or the tunnel effect) is a nanoscopic phenomenon in which a particle
violates the principles of classical mechanics by penetrating a potential barrier or
impedance that is higher than the kinetic energy of the particle. In quantum tunneling
through a single barrier, the transmission coefficient or the tunneling probability is
always less than one for an incoming particle that has energy less than the potential
barrier height. The tunneling probability decreases with increasing barrier height and
width. Despite the lower transmission coefficient, it is possible that two barriers in a row
can be completely transparent for certain energies of the incident particle.










Figure 8

Consider a potential profile shown above that contains two barriers located close
to each other, for which, one can calculate the transmission coefficient as a function of
the incoming particle energy using any of the standard methods. It turns out that, for
certain energies of a particle, the transmission coefficient is equal to one, meaning that
the double barrier is completely transparent for particle transmission. This phenomenon is
called resonant tunneling. Resonant tunneling also occurs in potential profiles with more
than two barriers (i.e two wells and three barriers).
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Heterostructures are structures with two or more interfaces at the boundaries
between the regions of different materials. Usually, compound semiconductors from
Group (III V) are widely used to fabricate heterostructures, which are used to create the
double or multiple potential barriers in the conduction band or valence band. A double-
barrier structure can be grown by molecular beam heteroepitaxy (MBE). Common
semiconductor compounds used for type-I (Figure-9a) heterostructures are GaAs (gallium
arsenide) and AlAs (aluminum arsenide) is used for type-II (Figure-9b) heterostructures.
In type-I, the lowest conduction-band states occur in the same part of the structure as the
highest valence-band states. In type-II, the lowest conduction-band minimum occurs on
one side and the highest valence-band maximum on the other with an energy separation
between the two that is less than the lower of the two bulk bandgaps. In broken-gap
(Figure-9c) lineup structure, the bottom of the conduction band on one side drops below
the top of the valence band on the other. (Example-InAs/GaSb gap of 150meV)












Figure-9
Traditionally, RTDs have been fabricated in-group III-V (B, Al, Ga, In, Tl N, P,
As, Sb, Bi) material systems, which has limited their widespread applicability.
Reasonably high performance III-V resonant tunnel diodes have been realized; however,
such devices have not entered into mainstream applications yet because the processing of
III-V materials is incompatible with Si CMOS technology and the fabrication cost is also
high.
Most of semiconductor optoelectronics uses III-V semiconductors so it is possible
to combine III-V RTDs to make OptoElectronic Integrated Circuits (OEICS) that use the
negative differential resistance of the RTD to provide electrical gain for optoelectronic
devices. However, recent works have described fabrication of group IV (C, Si, Ge, Sn,
Pb) devices with Si compatible materials. These include tri-state logic devices fabricated
in SiGe and a Si based field induced band-to-band tunneling transistor. Current research
activity involving RTDs focuses on fabrication of group IV (Si/SiGe) materials for the
integration on the silicon platform.
Resonant tunnel diodes can also be realized using the Si/SiGe materials system.
But the performance of Si/SiGe resonant tunnel diodes was limited due to the limited
conduction band and valence band discontinuities between Si and SiGe alloys. Resonant
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tunneling of holes through Si/SiGe heterojunctions was attempted first because of the
typically relatively larger valence band discontinuity in Si/SiGe heterojunctions than the
conduction band discontinuity. This has been observed, but negative differential
resistance was only observed at low temperatures but not at room temperature. Resonant
tunneling of electrons through Si/SiGe heterojunctions was obtained later, with a limited
peak-to-valley current ratio (PVCR) of 1.2 at room temperature. Subsequent
developments have realized Si/SiGe RTDs (electron tunneling) with a PVCR of 2.9 with
a Peak Current Density (PCD) of 4.3 kA/cm
2
and a PVCR of 2.43 with a PCD of 282
kA/cm
2
at room temperature.
Recent work has demonstrated resonant tunneling diodes on Si substrates using
better quality Fluoride alloy heterostructures. RTDs composed of CaF
2
-barrier/CdF
2
-
well/CaF
2
-barrier/Si heterostructures are expected to be co-integrated with Si-Large
Scale Integration (LSI). The material layout and corresponding energy bands are as
follows:













Figure-10

CdF
2
has large electron affinity comparable to that of Si thus, it can be used as
deep quantum well layers in Si and CaF
2
/CdF
2
heterostructures. The electron affinity is
the energy required to remove an electron from the bottom of the conduction band to
outside of a material (to a vacuum level). The alloy of CaF
2
and CdF
2
namely Ca
x
Cd
1-x
F
2

was investigated in order to improve RTD characteristics. The barrier height of RTD was
found to be lowered by using Ca
0.5
Cd
0.5
F
2
instead of CdF
2.
It was also discovered that
Cd-rich (80% or higher composition) alloy could be grown with good crystallinity at
higher temperature than that for pure CdF
2.
RTD using the Cd-rich alloy for the well
layer exhibited large peak to valley current ratio (PVCR=29) at room temperature due to
the good crystallinity.

Addition of a small amount of CaF
2
to CdF
2
formed a Cd-rich Ca
x
Cd
1-x
F
2
alloy
and reduced the surface roughness improving crystallinity at higher temperature. The
peak current of Ca
x
Cd
1-x
F
2
alloy-barrier RTD was larger than the pure CaF
2
barrier,
which indicates that the barrier height is controlled by using Ca
x
Cd
1-x
F
2
alloy. Thus,
fluoride heterostructures has large potential as a material system to produce quantum well
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structures on Si substrates where peak-to-valley current ratio of 10 to a few 100 has been
obtained with good reproducibility.













Figure-11

Trials of co-integration of the fluoride RTDs with Si MOSFET on a chip have
been carried out but the stability of electrical properties of the RTD is insufficient to
realize circuit operations well at the moment. The typical instability is due to current
drifting that involves charging effects of carrier traps in the heterostructures. Thus,
further investigation to improve crystalline quality of fluoride heterostructure is necessary
to achieve reliable circuit operation of such device.

One of the issues involved in designing RTDs is scalability. Reducing the
physical structure below certain dimensions introduces undesirable surface leakage
current. In addition, since the peak current through an RTD depends exponentially on the
barrier thickness, it is difficult to get reproducible device operation unless the gate also
controls the peak current. Integrating a transistor with the series-connected double RTDs
on a common substrate performs control of the peak current. This approach requires the
precise control of the layer thicknesses. The control of RTD properties may require use of
commercial molecular beam epitaxy (MBE) to grow complex compound semiconductor
crystal structure resulting in a higher cost. However, integration of a transistor with a pair
of RTDs introduces delays to the fast bistable switching times associated with capacitive
charging and discharging of the transistor gate stack. Due to this delay, the operational
speed of the integrated device can be slower than the intrinsic speeds of the RTDs
themselves.

Additional challenges include a limited I
ON
/I
OFF
ratio of 10 compared to the ratio
of 10
5
required by CMOS digital circuit designers and the inherent complexity of the
integrated structure, which limits the dimensional scaling of the devices. Another issue is
in obtaining high peak-to-valley current ratios for fabrication of silicon or silicon-
germanium tunnel diodes. Although, RTD devices have several issues to overcome as
described above, fabrication in a Si compatible material structure substantially reduces
the integration challenges.

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RTDs combined with an array of quantum dots in a CNN (cellular nonlinear
network) connection pattern can be applied very effectively to image processing tasks
such as edge detection, image recognition, and noise reduction. The logic cell of this
structure consists of two RTDs connected in series where the interconnections between
them are achieved via tunneling in the quantum layers.

When two RTDs are connected in series with opposing polarities, they have two
stable operating points and can switch between the two stable points very quickly if a
third terminal is added which can act as a gate. This results in a monostable-bistable
transition logic element (MOBILE) configuration. Recent work has demonstrated the
application of MOBILE circuits to ultra high-speed analog to digital converters.
MOBILEs have also been applied to high speed (80 Gb/s) multivalued quantizers and
chaos generators useful for Monte Carlo simulations. Utilization of MOBILE type
structures can be applied to multi-valued threshold circuits and multi-threshold gates in
general.

Adding a control terminal to RTDs extends their usability to a variety of
applications. This approach has been used to build Resonant-tunneling transistors (RTT).
RTTs have a negative transconductance that is used in logic XOR gate with only one
transistor. A number of recent works explore spin-polarized resonant tunneling, which
can be useful for application in spintronic devices. Another potential application for
RTDs is in photodetectors for detection of photons with low dark current count rates and
high efficiency.

RTDs may be useful for alternative information processing applications other than
Boolean logics that require high speed; low dynamic range and low peak currents
provided that manufacturing issues associated with uniformity of the tunneling barrier
can be resolved.



















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References:

David Bohm, Quantum Theory, Prentice-Hall, New York, 1951.

Baym Gordon, Lectures on Quantum Mechanics, Addison-Wesley Company, Canada,
1969.

H. Mizuta and T. Tanoue. The Physics and applications of Resonant Tunnelling
Diodes. Cambridge University Press, Cambridge 1995.


Nanoelectronics and Information Technology. Rainer Wasser, ed. Wiley-VCH, 2003.
416424.

Alexander Khitun and Kang L. Wang. Cellular nonlinear network based on
semiconductor tunneling structure with a self-assembled quantum dot layer. 2004 4th
IEEE Conference on Nanotechnology.

K. Maezawa and T. Mizutani, J pn. J . Appl. Phys., Vol. 32, L42, 1993.

Koichi Maezawa. Resonant Tunneling Diodes and Their Application to High-Speed
Circuits. CSIC 2005 Digest, IEEE.

Hctor Pettenghi, Mara J . Avedillo, and J os M. Quintana. New Circuit Topology for
Logic Gates based on RTDs. Proceedings of 2005 5th IEEE Conference on
Nanotechnology Nagoya, J apan, J uly 2005.

M.A. Reed, et al. Realization of a Three-terminal Resonant Tunneling Device: the
Bipolar Quantum Resonant Tunneling Transistor. Appl. Phys. Lett. 54, 1989, 1034.
140 P. Fau, et al. Fabrication of Monolithically-integrated InAlAs/InGaAs/InP HEMTs
and InAs/AlSb/GaSb resonant Interband Tunneling Diodes. IEEE Trans. Electron Dev.
48, 2001, 1282.

http://www.iue.tuwien.ac.at/phd/kosik/node62.html

http://en.wikipedia.org/wiki/Resonant_tunnelling_diode

http://www.imec.be/esscirc/essderc-esscirc-2003/papers/all/182.pdf

http://ecsmeet5.peerx-
press.org/ms_files/ecsmeet5/2007/12/17/00001206/00/1206_0_art_0_jt792s.pdf