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Susceptibility Studies on an 8051 Microcontroller Mounted on Single- and Multi-Layer Printed Circuit Boards

A. Talwalker*, c. Chandramouli, c. Praveen and V. Agarwal

Dept. of Electrical Engineering, Indian Institute of Technology-Bombay, Powai, Mumbai-76

Abstract - This paper describes the susceptibility measuremeut studies performed ou Intel's 8051 microcontroller based controller circuit against Radio Frequency (RF) signals. Several versions of the 8051 architecture have been mounted on single and multi-layer Printed Circuit Boards (PCB) and the effect of RF noise coupling to their Reset, Clock and Power pins have been observed and analyzed. This study assumes significance in today's world which is experiencing a boom in automation, communication and control areas, where such microcontrollers are extensively used. The results of this study are expected to be useful to a design engineer who has to frequently confront the question "which microcontroller to use?" and "what kind of PCB to design?" The results may also be useful in interpreting the various international EMC standards and their implications in electronic systems. All the results of this study are presented.

I. INTRODUCTION Microcontrollers and the supporting digital Integrated Circuits (lCs) are extensively used in a whole range of control applications, both in industrial and domestic electronic systems. The reliability of such systems is highly dependent on the performance of the microcontrollers, their supporting digital ICs and the PCBs on which they are mounted (viz. single layer, multi-layer etc.). Such circuits are characterized by high speed signals and sharp low or high going signal edges. The intermittent noise and electromagnetic coupling can create unforeseen circumstances leading to system instability [1-3] due to malfunctioning or failure of the microcontroller(llC) or due to faulty PCB design. The failure possibilities of the IlC could range from improper structuring of the control algorithm to a slow rising (or noisy) edge in the Reset signal. The failures can also be induced by the external interference coupling through power supply pins, traces or planes provided on the

*contact author: ashishtalwalker@iitb.ac.in

PCB. Therefore, it is recommended, to investigate failure mechanisms and the parameters which affect the susceptibility of such circuits. The noise can be generated through conducted emission or radiated emission, externally or internally to PCBs and can be coupled either directly or indirectly to the ICs used [4, 5]. The noise susceptibility can be improved by good design of the PCBs [6] and proper selection of the intrinsically noise immune ICs [1], including microcontrollers. Internationally accepted norms and standards are in place, which can be used to ascertain the noise performance of the ICs and the PCBs [4]. The susceptibility of single layer and multi-layer PCBs must be improved by suitable characterization, prediction and implementation of acceptable susceptibility at the IC and package levels [3, 4]. For example, IEC 61232 provides general information on the measurement of electromagnetic immunity of the ICs to conducted and radiated disturbances [7]. Another issue arises due to the production of a IlC architecture by mUltiple vendors. For example, Intel's 8051 IlC is being manufactured and marketed by a number of vendors such as Philips, Atmel, and Dallas Semiconductors etc. Though the basic architecture is similar, their properties, especially the noise performance, may not be identical due to variations in chip level design of gates. This paper presents the results of noise susceptibility studies performed on Intel's 8051 IlC architecture produced by different vendors. The effect of PCB design is also investigated. Thus, single layer and multi-layer PCBs are used. An example is considered where an 8051 IlC is programmed to generate square gating pulses at a specific frequency and fixed duty cycle, apparently to drive a power device - say in a switched mode power supply application. To study the EMI susceptibility of the controller, noise is injected from a radio frequency source externally. All the results

of these experiments and the observations are included in various sections of this paper. II. SUSCEPTffiILITY MEASUREMENT METHODS

In the past, several methods have been proposed

to measure the susceptibility to conducted RF interference [2,4]. These include:

(a)

Workbench Faraday Cage (WBFC) Method

(b)

Direct Power Injection (DPI) method

(c)

TEM cell Method

The measurement of small PCBs or ICs immunity to common mode conducted RF interference is done by Work Bench Faraday Cage method. The direct injection method is used to measure ICs immunity to differential mode disturbance, while TEM cell method can be used to evaluate the ICs susceptibility to electromagnetic radiated field. Evaluation by these methods could be used to measure the radiated and conducted electromagnetic emission of integrated circuits. Each of these measurement methods has its advantages and limitations. A design engineer should select one (or a combination) of these methods, which

suits a given requirement the best. Conducted EMI is generated when one circuit (or a part thereof) gets coupled to another circuit (or a part thereof) through power line cables or direct mutual coupling. The common mode (CM) interference and differential mode (DM) interference are the two components of conducted EMI. Experimental results show that the amplitude of common mode interference collected by cables is higher than the differential mode due to the interference induced into electronic equipment by coupling with radiated electromagnetic field [8].

In this paper the immunity of a microcontroller

IC to conducted interference has been evaluated by using the direct power injection (DPI) method to compare the susceptibility of !lCS from different vendors. The comparison of experimental results obtained from all the !lCS makes it possible to highlight the critical points.

III. EXPERIMENTAL TEST SET-UP

A test setup was been built in the laboratory to

measure the electromagnetic compatibility (EMC) of an 8051 JlC mounted on a PCB. The schematic layout of the complete hardware setup is shown in Fig. 2. The details of coupling between the reset/power pin of the microcontroller and the RF injection probe on the PCB are shown in Fig. 3. An RF generator (Rohde & Schwarz - SM01, range 9 kHz -1.1GHz) was used to generate the interference at appropriate power levels. A directional

coupler (AR electronics) to sense the forward and the reflected power was used. An average power sensor (Rohde & Schwarz- NRPZ91- 9 kHz to 6GHz, 200pW to 200mW, 167dBm to +23dBm) was used to communicate with a PC running front end software to provide readings on the power level. An isolated channel oscilloscope (Tektronix TPS2014) was used to observe the program execution status in the microcontroller. The test board was especially fabricated for performing the experiment according to the IEC standard. A short shielded cable with a threaded BNC to SMA connector was used between the RF generator and the Test board. Appropriate precautions were taken while performing the experiment so that other equipment is powered off.

DC

supply

1\
I

I

RF

: Generator

I

L---------------------""L-_==

I

PC

Oscilloscope

OUT

(Microcontroller)

Fig. 1 Schematic layout of the hardware components

Components and traces on the Top layer

RF Injection Port

Connector

~

Reset I Vcc Pin of

Components and

I ~traceson the

I

I

I

I

Bottom layer

Microcontroller

Fig. 2 RF injection section of the DUT

The overall experimental test setup built in the laboratory is shown in Fig. 3.

test setup built in the laboratory is shown in Fig. 3. Fig. 3 Experimental setup in

Fig. 3 Experimental setup in the laboratory

The crystal frequency used with the IlC is 12 MHz. The test PCB was mounted with just the essential components to make the microcontroller execute a simple program without requiring additional ICs. A dedicated 4 layered Printed Circuit Board of dimension l00XlOO mm 2 was designed with the essential components on board to execute the function of toggling the port pins at a specific frequency. This program is chosen to emulate the function of a power controller as it is usually the case with generating PWM at varying duty cycle and frequencies. The IlC is programmed to generate PWM pulses at 90 kHz with 50% duty cycle, as shown in Fig. 4.

Tek n • Trig'd M Pos: -SO.OOns MEASURE '!" CHl t'Y'I'_""': : : : Freq
Tek
n
Trig'd
M Pos: -SO.OOns
MEASURE
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:
:
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30.30kHz
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CHl 1.00'"
M 2.50.115
CHl .I" 2.80'"
17-Apr-OS 13:13
30.3073kHz

Fig 4. P2.0 under normal operation

The injected noise signal was capacitively coupled to the Reset pin and the Power pin (Vcc) of the IlC. The tests were performed on two of the 8051

microcontrollers - each from a different manufacturer (one from ATMEL and the other from Dallas Semiconductors). Both the microcontrollers are 40 pin ICs, with pin to pin compatibility and hence the test could be performed on the same board. The waveforms shown in Figs. 5 and 6 depict the output of the IlC in failure mode, when the RF signal is injected at the reset and the power pins respectively, for the Dallas microcontroller.

Tek JL • Stop + M Pos: 0.0005 MEASURE CH1 Period 266.0n,"? CH1 Freq 3,75%1Hz?
Tek
JL
Stop +
M
Pos: 0.0005
MEASURE
CH1
Period
266.0n,"?
CH1
Freq
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CH3 Off
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CH1
1.
None
CH1 1.00\1
M 1.00.115
CH1 I
3.76\1
30-Aug-08 23:29
<10Hz

Fig. 5 P2.0 output due to induced EMI in reset pin [Dallas

DS87C520]

Tek JL • Stop + M Pos: -100.0ns MEASURE CH1 Period ? CH1 ,'1 Mil".,
Tek
JL
Stop +
M
Pos: -100.0ns
MEASURE
CH1
Period
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CH1
,'1
Mil".,
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q 1"
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CH1
l'
None
CH1 1.00V
M 2.50.115
CH1 I
2.92\1
30-Aug-08 23:43
<10Hz

Fig. 6 P2.0 output due to induced EMI in Vee (power) pin [Dallas DS87C520]

The waveforms shown in Figs. 7 and 8 depict

the output of the IlC in failure mode, when the RF signal

is

injected

at

the

reset

and

the

power pins

respectively

for

the ATMEL AT89S52

microcontroller.

 

IV. CONDUCTED IMMUNITY MEASUREMENT USING DPI METHOD In this test procedure, the DUT was tested in a sequence of frequency steps and test levels. The

frequency range of these measurements is from 50kHz to 1GHz. In practice, the tested frequency range depends on the cut-off frequencies of the injection network and setup components like, IC decoupling capacitors, clock frequencies of IC etc. The interfering signal was 80% amplitude modulated by a 1 kHz sine wave.

Tek .JL • Stop MPos: -2.200»s MEASURE + CH1 Period 7 CH1 Freq 7 CH3011
Tek
.JL
Stop
MPos: -2.200»s
MEASURE
+
CH1
Period
7
CH1
Freq
7
CH3011
Max
CH1
Neg Width
"
CH1
None
r
CH1 1.00V
M 2,50»s
CH1
3,76V
30-Aug-08 23:37
<10Hz

Fig. 7 P2.0 output due to induced EMI in reset pin [ATMEL

AT89S52]

Tek .JL eStop + M Pos: -100.0ns MEASURE CH1 Period ? CH1 Freq ~ ?
Tek
.JL
eStop +
M Pos: -100.0ns
MEASURE
CH1
Period
?
CH1
Freq
~
?
CH3 Off
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Max
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CH1
Neg Width
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i
CH1
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None
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CH1
1,OOV
M 10.0»s
CH1
2.82V
30-Aug-08 23:43
<10Hz

Fig. 8 P2.0 output due to induced EMI in Vcc pin [ATMEL

AT89S52]

Fig. 9 shows the flowchart of the RF power injection scheme. At each frequency of interest, the forward power delivered to the OUT was increased from low levels and gradually increased in steps until a malfunction was observed or the specified forward power level was reached. This procedure was repeated in the entire frequency range with a suitable frequency step

The microcontroller was made to toggle the pins of port 2 (logic 1 to logic 0 and back) alternatively at a frequency of 90 kHz. This signal was observed in an isolated channel oscilloscope to verify normal or abnormal operation of the OUT. Once the interference is applied, system is reset and the modulated signal output

from RF generator appears at the port pin. Forward power level which caused the OUT to fail was noted.

OUT fail or max power level reached

Save frequency and last level where OUT is ok

Yes

No

Increase

Frequency

No

Fig. 9 Flowchart of the test procedure.

Table 1 shows a comparison of the immunity

levels of the two types of microcontrollers considered for this study.

S.No

1

2

3

4

5

6

7

8

9

T

a

bI

e

1

.

I

't

mmunny eve s 0

f

mlCrocontrll0

.

er

Frequency

Injected power to cause OUT failure {dBm}

{kHz}

Atmel

Dallas

{AT89S52}

{DS87C520}

50

14

2

100

16

4

150

17

5

200

17

5

250

18

5

500

19

8

750

22

10

1000

23

12

2000

-

18

V. RESULTS AND CONCLUSIONS It is observed that the failures are preceded by a series of missing high pulses with high frequency noise riding on the pulsed waveform and also a decrease in the amplitude of the pulses. When the power level and the frequency of the interfering signal are reduced to zero, the IlC does not resume its operation because of the absence of a sharp rising edge (pulse) required through Reset pin for initiating program execution. The IlC resumed its operation after giving a manual forced Reset. Also, in the case of injected noise through the Reset pin, the higher power level and frequency forced the logic level of the Reset pin to high state which held the processor in a continuous reset state halting the program. Susceptibility of an 8051 IlC mounted on a single layer and multi-layer PCBs have been measured and studied against RF interference. It has been observed that when a noise signal is injected to the Reset and power pin of the IlC unit, its performance gets deteriorated. The multi-layer boards showed lower susceptibility than the single layer boards.

REFERENCES

[I]F. Musolino, F. Fiori, "Investigation on the susceptibility of microcontrollers to EFf interference," in IEEE International symposium on Electromagnetic Compatibility-2005, pp,4l0- 413, Aug. 2005. [2] S. Baffreau, S. Bendhia, M. Ramdani,E. Sicard, "Characterisation of Microcontroller Susceptibility to Radio Frequency Interference," in Proc. of Fourth IEEE International Caracas conference on Devices, Circuits and Systems, pp. 1031-1 - 1031-5, April 2002,. [3]J. D. Sim, F. S. Galbraith, N. Davenport," Perceived susceptibility of microcontrollers," in IEEE International symposium on Electromagnetic Compatibility-1997, pp.213-217, Aug. 1997. [4] F. Fiori, "Integrated Circuits Immunity Evaluation by Different Test Procedures ," in IEEE International Conference on Computational Electromagnetics and its Applications-1999, pp.286- 289, 1999 [5] M. Kumar, V. Agarwal,"Power Line Filter Design for Conducted Electromagnetic Interference Using Time-Domain Measurements," in IEEE Trans. on Electromagnetic Compatibility, vol. 48, no. 1, pp.178-186, Feb. 2006. [6] K. Nageswara Rao, P. Venkata Ramana, M. V. Krishnamurthy, K. Srinivas, "EMC analysis in PCB designs using an expert system," in IEEE International symposium on Electromagnetic Compatibility- 1995, pp.59-62, Dec. 1995. [7] International Electro technical Commission, "Integrated Circuits, Measurements of Electromagnetic Immunity in the Range 150 kHz - 1 GHz", IEC 62132, 2001. [8] M.J. Coenen, "Common mode impedance measurements on cables in the frequency range 30MHz- lGHz", EIE92004, Philips

Semiconductor, 1994.

Biographical notes

Biographical notes Ashish Talwalker received the B.E. degree in electrical engineering from Regional Engineering

Ashish Talwalker received the B.E. degree in electrical engineering from Regional Engineering college, Surat (South Gujarat University) in 2002. In July 2008, he earned the M.Tech. degree in electrical engineering with specialization of Power Electronics and Power Systems(PEPS) from lIT-Bombay. Since 2002 he has been with Research Centre Imarat, a pioneer laboratory of DRDO as scientist, where he is responsible for the electrical integration and checkout of the systems of defense related program. His research interests include design and development of various types of switching converters to improve the power factor and efficiency.

E-mail: ashishtalwalker@iitb.ac.in

factor and efficiency. E-mail: ashishtalwalker@iitb.ac.in C. Chandramouli was born on 10th April, 1981 in

C. Chandramouli was born on 10th April, 1981 in Tarnilnadu, India. He obtained bachelor's degree in Instrmentation and Control Engineering from Adhiyamaan college of Engineering, India. He is currently pursuing Master's degree in Electrical Engineering with specialization in Electronic Systems from the Indian Institute of Technology-Bombay, India.

E-mail: cmouli@iitb.ac.in

Praveen cheruku received his Bachelor of Technology in Electrical and Electronics Engineering, in 2005 from

Praveen cheruku received his Bachelor of Technology in Electrical and Electronics Engineering, in 2005 from lawaharlal Nehru Technological University, Hyderabad. He obtained his Master of Technology in Electronic systems, in 2007 from Indian Institute of Technology, Bombay. His thesis is on comparison of EMC performance in a range of microcontrollers. Currently he is working in Emerson Network Power India (p) Ltd,mumbai

E.mail: praveench@iitb.ac.in

Power India (p) Ltd,mumbai E.mail: praveench@iitb.ac.in Vivek Agarwal received a bachelor's degree in Physics

Vivek Agarwal received a bachelor's degree in Physics from St. Stephen's college, Delhi University. He then obtained an integrated master's degree in Electrical Engineering from the Indian Institute of Science, Bangalore. Subsequently, he pursued a Ph.D. degree in the dept. of Electrical and Computer Engineering, University of Victoria, Canada. After completing the Ph.D. degree in 1994, he briefly worked for Statpower Technologies, Burnaby, Canada as a research engineer. In 1995 he joined the department of Electrical Engineering, Indian Institute of Technology-Bombay, India, where he is currently a Professor. His main field of interest is power electronics. He works on the modeling and simulation of new power converter configurations, intelligent and hybrid control of power electronic systems, power quality issues, EMIlEMC issues and conditioning of energy from non-conventional energy sources. He is a senior member of IEEE, Fellow of IETE and a life member of ISTE.

E-mail: agarwal@ee.iitb.ac.in

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