En LG-C333 SVC Eng 120824 PDF

Internal Use Only
Service Manual
LG-C333
Date: August, 2012 / Issue 1.0
- 2 -
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Table Of Contents
1. INTRODUCTION ..................................................................... 3
1.1 Purpose ........................................................................................................ 3
1.2 Regulatory Information ......................................................................... 3
1.3 Abbreviations............................................................................................. 5
2. PERFORMANCE ...................................................................... 7
2.1 H/W Features .............................................................................................. 7
2.2 Technical Specifcation ........................................................................... 9
3. TECHNICAL BRIEF ................................................................ 15
3.1 Digital Main Processor ......................................................................... 15
3.2 Power Management ............................................................................ 23
3.3 FEM with integrated Power Amplifer Module (RF7180, U202)
.............................................................................................................................. 28
3.4 Clocks ......................................................................................................... 30
3.5 Transceiver(AD6548,U204) ................................................................ 33
3.6 MEMORY(PF38F4050M0Y3DE, U300 ............................................ 36
3.7 Wi-Fi Module(MT5931, U203) ........................................................... 41
3.8 SIM Card Interface ................................................................................. 44
3.9 Micro-SD Card Interface ..................................................................... 47
3.10 LCD Interface ........................................................................................ 50
3.11 Battery Charger Interface ................................................................ 52
3.12 Keypad Interface ................................................................................. 53
3.13 Audio Front-End .................................................................................. 56
3.14 Camera Interface ................................................................................. 59
3.15 KEY BACLKLIGHT LED Interface .................................................... 61
3.16 Vibrator Interface ................................................................................ 62
4. TROUBLE SHOOTING .......................................................... 63
4.1 RF Component ....................................................................................... 63
4.2 RX Trouble ................................................................................................ 64
4.3 TX Trouble ................................................................................................. 68
4.4 Power On Trouble .................................................................................. 72
4.5 Charging Trouble ................................................................................... 75
4.6 Vibrator Trouble ..................................................................................... 78
4.7 LCD Trouble ............................................................................................. 80
4.8 Camera Trouble ...................................................................................... 84
4.9 Speaker Trouble ..................................................................................... 87
4.10 Earphone Trouble ............................................................................... 90
4.11 Receiver Trouble .................................................................................. 93
4.12 Microphone Trouble .......................................................................... 96
4.13 SIM1 Card Interface Trouble ........................................................... 98
4.14 KEY backlight Trouble ..................................................................... 104
4.15 Micro SD Trouble ............................................................................... 106
4.16 Bluetooth Trouble ............................................................................. 108
4.17 FM Radio Trouble .............................................................................. 111
4.18 WIFI Trouble ........................................................................................ 114
5. DOWNLOAD ....................................................................... 117
6. BLOCK DIAGRAM ............................................................... 130
7. CIRCUIT DIAGRAM ............................................................ 142
8. BGA PIN MAP .................................................................... 148
9. PCB LAYOUT ....................................................................... 151
10. ENGINEERING MODE ...................................................... 154
11. AUTO CALIBRATION ........................................................ 157
11.1 Confguration of Tachyon .............................................................. 157
11.2 How to use Tachyon ......................................................................... 159
12. EXPLODED VIEW & REPLACEMENT PART LIST ............. 161
12.1 EXPLODED VIEW ................................................................................ 161
12.2 Replacement Parts ........................................................................... 162
12.3 Accessory ............................................................................................. 181
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1. INTRODUCTION
1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the features of
this model.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example, persons
other than your companys employees, agents, subcontractors, or person working on your companys behalf)
can result in substantial additional charges for your telecommunications services. System users are responsible
for the security of own system. There are may be risks of toll fraud associated with your telecommunications
system. System users are responsible for programming and configuring the equipment to prevent unauthorized
use. The manufacturer does not warrant that this product is immune from the above case but will prevent
unauthorized use of common-carrier telecommunication service of facilities accessed through or connected to it.
The manufacturer will not be responsible for any charges that result from such unauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possibly causing
harm or interruption in service to the telephone network, it should disconnect telephone service until repair can
be done. A telephone company may temporarily disconnect service as long as repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these changes
could reasonably be expected to affect the use of the this phone or compatibility with the network, the
telephone company is required to give advanced written notice to the user, allowing the user to take
appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on this model must be performed only by the manufacturer or its authorized agent. The
user may not make any changes and/or repairs expect as specifically noted in this manual. Therefore, note that
unauthorized alternations or repair may affect the regulatory status of the system and may void any remaining
warranty.
1. INTRODUCTION
4 / 149
1. INTRODUCTION
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1. INTRODUCTION
E. Notice of Radiated Emissions
This model complies with rules regarding radiation and radio frequency emission as defined by local
regulatory agencies. In accordance with these agencies, you may be required to provide information such as
the following to the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly different.
G. Interference and Attenuation
Phone may interfere with sensitive laboratory equipment, medical equipment, etc.Interference from
unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated
by the sign. Following information is ESD handling:
Service personnel should ground themselves by using a wrist strap when exchange system boards.
When repairs are made to a system board, they should spread the floor with anti-static mat which is also
grounded.
Use a suitable, grounded soldering iron.
Keep sensitive parts in these protective packages until these are used.
When returning system boards or parts like EEPROM to the factory, use the protective package as described.
1. INTRODUCTION
5 / 149
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1. INTRODUCTION
1.3 Abbreviations
For the purposes of this manual, following abbreviations apply:
Offset Phase Locked Loop OPLL
Light Emitting Diode LED
Low Drop Output LDO
Liquid Crystal Display LCD
Intermediate Frequency IF
International Portable User Identity IPUI
Global System for Mobile Communications GSM
General Purpose Interface Bus GPIB
Gaussian Minimum Shift Keying GMSK
Flexible Printed Circuit Board FPCB
Electrostatic Discharge ESD
Electrical Erasable Programmable Read-Only Memory EEPROM
Digital Signal Processing DSP
dB relative to 1 milli watt dBm
Digital Communication System DCS
Digital to Analog Converter DAC
Constant Current Constant Voltage CC-CV
Bit Error Ratio BER
Baseband BB
Automatic Power Control APC
1. INTRODUCTION
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1. INTRODUCTION
Wireless Application Protocol WAP
Voltage Control Temperature Compensated Crystal Oscillator VCTCXO
Voltage Controlled Oscillator VCO
Universal Asynchronous Receiver/Transmitter UART
Time Division Multiple Access TDMA
Time Division Duplex TDD
Travel Adapter TA
Side Tone Masking Rating STMR
Pseudo SRAM PSRAM
Static Random Access Memory SRAM
Sending Loudness Rating SLR
Subscriber Identity Module SIM
Surface Acoustic Wave SAW
Real Time Clock RTC
Root Mean Square RMS
Receiving Loudness Rating RLR
Radio Frequency RF
Public Switched Telephone Network PSTN
Phase Locked Loop PLL
Programmable Gain Amplifier PGA
Printed Circuit Board PCB
Power Amplifier Module PAM
1. INTRODUCTION
7 / 149
2. PERFORMANCE
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2.1 H/W Features
Item Feature Comment
Standard Battery Li-ion Polymer, 3.7V 1100mAh
Stand by TIME 645hours @Paging period : 5
Talk time 9 hours @GSM, TX Level : 10
Stand by time 645hours @Paging period : 5
Charging time Approx. 3 hours
RX Sensitivity GSM, EGSM : -109dBm, DCS : -108dBm
TX output power
GSM850/ EGSM: 32.5dBm(Level 5),
DCS /PCS : 29.5dBm(Level 0)
SIM card type 3V Small
Display TFT LCD 2.4 Landscape QVGA (320 x 240, 262K)
Status Indicator
Hard icons. QWERTY Key Pad
0 ~ 9, #, *, Up/Down Navigation Key
Menu Key, Clear Key, Back Key, Confirm Key
Send Key, Soft Key(Left/Right)
Volume Key(Up/Down), PWR Key, Camera Key
ANT Internal
EAR Phone Jack Yes
PC Synchronization Yes
Speech coding EFR/FR/HR
Data and Fax Yes
GPRS compatibility Class 12
Vibrator Yes
Loud Speaker Yes
Voice Recoding Yes
Microphone Yes
2. SYSTEM SPECIFICATION
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2. PERFORMANCE
2.1 H/W Features
2. PERFORMANCE
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Item Feature Comment
Speaker/Receiver 18 * 10 / 2-in-1
Travel Adapter
Yes
MIDI
Camera 5.0M AF
Bluetooth / FM Radio Bluetooth version 2.1 / 76~108MHz supported
Wi-Fi IEEE 802.11b/g
Flash Power LED Flash
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2. PERFORMANCE
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2.2 Technical Specification
Item Description Specification
1 Frequency Band
GSM850 EGSM
TX: 824 ~ 849 MHz TX: 880 ~ 915MHz
RX: 869 ~ 894 MHz RX: 925 ~ 960 MHz
DCS
TX: 1710 ~ 1785 MHz
RX: 1805 ~ 1880 MHz
PCS
TX: 1850 ~ 1910 MHz
RX: 1930 ~ 1990 MHz
2 Phase Error
RMS < 5 degrees
Peak < 20 degrees
3 Frequency Error < 0.1 ppm
4 Power Level
Level Power Toler. Level Power Toler.
6 31dBm 3dB 14 15dBm 3dB
12 19dBm 3dB
GSM850/EGSM
Level Power Toler. Level Power Toler.
DCS/PCS
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2.2 Technical Specifcation
2. PERFORMANCE
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6
Output RF Spectrum
(due to switching
transient)
1,800 -24
5
Output RF Spectrum
(due to modulation)
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 -30
250 -33
400 -60
600~ <1,200 -60
1,200~ <1,800 -60
1,800~ <3,000 -63
3,000~ <6,000 -65
6,000 -71
GSM850/ EGSM
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 -30
250 -33
400 -60
600~ <1,200 -60
1,200~ <1,800 -60
1,800~ <3,000 -65
3,000~ <6,000 -65
6,000 -73
DCS/PCS
GSM850/ EGSM
Offset from Carrier (kHz). Max. dBm
400 -19
600 -21
1,200 -21
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2. PERFORMANCE
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6
Output RF Spectrum
(due to switching
transient)
Offset from Carrier (kHz). Max. dBm
400 -22
600 -24
1,200 -24
1,800 -27
7 Spurious Emissions Conduction, Emission Status
8 Bit Error Ratio
GSM850, EGSM
BER (Class II) < 2.439% @-102 dBm
DCS,PCS
BER (Class II) < 2.439% @-100 dBm
9 RX Level Report Accuracy 3 dB
10 SLR 83 dB
11 Sending Response
300 -12
1,000 -6
2,000 -6
3,000 -6
Frequency (Hz) Max.(dB) Min.(dB)
100 -
200 -
4,000 -
3,400 -9
0
0
4
4
-12
0
0
4
12 RLR 23 dB
DCS/PCS
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2. PERFORMANCE
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13 Receiving Response
300 -7
500 -5
1,000 -5
3,000 -5
Frequency (Hz) Max.(dB) Min.(dB)
100 -
200 -
4,000
3,400 -10
2
*
0
2
-12
0
2
2
14 STMR 135 dB
* Mean that Adopt a straight line in between 300 Hz
and 1,000 Hz to be Max. level in the range.
15 Stability Margin > 6 dB
-20
-10
0
7
dB to ARL (dB) Level Ratio (dB)
-35
-30
10
30.7
33.3
33.7
31.7
17.5
22.5
25.5
16 Distortion
17 Side Tone Distortion Three stage distortion < 10%
18
System frequency
(13 MHz) tolerance
2.5 ppm
19 32.768KHz tolerance 30 ppm
20 Ringer Volume
At least 65 dBspl under below conditions:
1. Ringer set as ringer.
2. Test distance set as 50 cm
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2. PERFORMANCE
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21 Charge Current
Fast Charge : Typ. 430 mA
Slow Charge : Typ. 80mA
Total Charging Time : < 3 hours
2 -> 1
0 -> OFF
Bar Number Power
4 -> 2
-104 2
Under -106
-98 2
-101 2
22 Antenna Display
14
13
Battery Bar Status Voltage(%) Voltage level(V)
16 level (Full)
15
23 Battery Indicator
4.2V ~ 4.0V
7
7 -> 5
5 -> 4
Over -93
-93 2
1 -> 0 -106 2
100 ~ 94%
4.0V ~ 3.96V 93 ~ 88%
3.96V ~ 3.92V 87 ~ 82%
3.92V ~ 3.88V
75 ~ 69%
10
9
12
11
3.88V ~ 3.84V
81 ~ 76%
3.84V ~ 3.80V 68 ~ 63%
3.80V ~ 3.76V 62 ~ 57%
3.76V ~ 3.74V 56 ~ 51%
6
4
8
7
3.74V ~ 3.72V 50 ~ 44%
3.72V ~ 3.70V 43 ~ 38%
3.70V ~ 3.68V 37 ~ 32%
3.66V ~ 3.64V 25 ~ 19%
1
3
2
3.64V ~ 3.62V 18 ~ 13%
3.62V ~ 3.56V 12 ~ 7%
3.56V ~ 3.32V
6 ~ 1%
5 3.68V ~3.66V 31 ~ 26%
0(Empty) 3.30V 0%
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2. PERFORMANCE
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24 Low Voltage Warning
10%, 5% 2times (standby) - Speaker
10%, 5% 2times, 5% at every 1min. (call) - Receiver
25 Shut down Voltage 0% ( about 3.3V )
26 Battery Type
Li-Ion Battery, Inner pack
Standard Voltage = 3.7 V
Battery full charge voltage = 4.2 V
Capacity: 1100mAh
27 Travel Charger
Switching-mode charger
Input: 100 ~ 240V, 50/60 Hz
Output: 5.1 V, 700 mA
15 / 149
3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.1 Digital Main Processor
Figure. 3.1.1 MT6236 Hardware Block Diagram
ARM9EJS
Data cache
Data TCM
Instruction
cache
Instruction
TCM
ARM7EJS
Bluetooth
baseband
processor
External
memory
interface
slave DSP
ROM
RAM
Patch
unit
Bluetooth
control I/F
MCU / DSP
interface
Graphic memory controller
Boot
ROM
DMA
controller
USB
controller
LCD
controller
Multimedia
memory
JPEG
encoder
Image post
processing
Multimedia
DMA
2D
graphics
engine
Image
resizer
NAND
flash
controller
Image
signal
processor
JTAG
JTAG
T/R
switch
ADC
DAC
ADC
Audio
path
Baseband
path
Baseband TRX-I
Baseband TRX-Q
ADC
ADC
FM input L
FM input R
Auxiliary ADC
Touch panel input
DAC
AFC
APC
RF control
interface
System
clock
generation
Bluetooth
clock
generation
32K crystal
oscillator
Real
time
clock
Charger
LDOs
LED driver
Serial RF control
Parallel RF control
DAC AFC
APC
Program
memory
Trap unit Data memory
Patch
unit
Image sensor
DSP
copro-
cessor
I2C UART IrDA
MMC
SD/MS
MS PRO
Keypad GPIO PWM SIM
Watchdog
timer
General
purpose
timer
TDMA timer
Master DSP
Program
memory
Trap unit Data memory
Patch
unit
DSP
copro-
cessor
Share
memory
LDOs
LDOs
Bulk converters
Power up
sequencer
Vibrator driver
ISINK
VRF, VTCXO, VM,
VUSB, VMC, VIO,
VA, VRTC, VSIM,
VSIM2, VBT,
VCAMA, VCAMD
VCORE
Boost converter
MCU / DSP
interface
System clock input
13/26MHz
+
DAC
DAC
VOICE
AUDIO L
AUDIO R
MIC 0
MIC 1
Bus bridge
AUXADC
Serial LCD I/F
Serial LCD I/F
NAND flash I/F
SPI
controller
Voice control
interface
DAC
DAC
System clock input
13/26MHz
GSM/GPRS
coprocessor
ADC
Slow clock
unit
T/R
mux
Flash light
Backlight
Vibrator
SIM card
Serial interface User interface Memory card
Bluetooth radio
32KHz Xtal
NOR flash
pSRAM
DDR SDRAM

3. TECHNICAL BRIEF
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3.1.1 General
- Integrated voice-band, audio-band and base-band analog front ends.
- Package:
12.5x12.5mm
0.5 mm pitch
TFBGA 382balls, 0.5mm pitch package
3.1.2 MCU Subsystem
- APM926L1-S
TM
32-bit RISC processor
- Hlgh performance multl-layer AMBA bus
- Operatlng frequency l3 / 78 / l56 / 3l2 MHz
- Dedlcated DMA bus wlth l8 DMA channels
- 1ava hardware acceleratlon for fast 1ava-based games and applets
- On-chip boot ROM for Factory Flash Programming
- watchdog tlmer for system crash recovery
- 3 sets of General Purpose Tlmer
- 64K 8yte |nstructlon TCM and l76K byte Data TCM
- l6K 8yte |nstructlon Cache and l6K byte Data Cache
- Clrcult Swltch Data coprocessor
- Dlvlslon coprocessor
- PPP Pramer coprocessor
3.1.3 External Memory Interface
- Supports up to 2 external devlces
- Supports l6-bit memory components with maximum size of up to 128M Bytes for each bank
- Supports Plash and PSPAM wlth 8urst Mode
- Support legacy lndustry standard parallel LCD |nterface
- Support multl-media companion chips with 8/16 bits data width
- Conflgurable drlvlng strength for memory lnterface
- Support Moblle DDP SDPAM and Cellular PAM
- Plexlble |/O voltage of l.8v ~ 2.8v for memory lnterface
3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
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3.1.4 User Interface
- 8-row x 8-column keypad control with hardware scanner
- Support multl key press for gamlng
- Dual S|M/US|M Controller wlth hardware T0/Tl protocol control
- Peal Tlme Clock(PTC) operatlng wlth a low qulescent current power supply
- General Purpose |/Os (GP|Os) avallable for auxlllary appllcatlon
- 4 set of Pulse wldth Modulatlon(PwM) Output
- 4 channel auxlllary l0 blt A/D converter
- Maxlmum 7 external lnterrupt llnes
3.1.5 Security
- Support securlty key and l28blt chlp unlque |D
3.1.6 Connectivity
- 3 UAPTs wlth hardware flow control and supports of baud rate up to 92l600 bps
- |rDA modulator/demodulator wlth hardware framer. supports S|P / M|P / P|P operatlng speeds
- US8 2.0 hlgh speed capablllty
- Multl Medla Card/Secure Dlgltal Memory Card/Memory Stlck/Memory Stlck Pro host controller wlth
flexible I/O voltage power
- Supports SD|O lnterface for SD|O perlpherals as well as w|P| connectlvlty
- DA|/PCM and |2S lnterface for Audlo appllcatlon
- |2C master lnterface for perlpheral management lncludlng lmage sensor.
- SP| master lnterface for perlpheral management lncludlng dlgltal Tv chlp.
3.1.7 Power Management
- Ll-ion battery charger
- Hlgh efflclency bulk converter for core power and memory power supply wlth programmable voltage
scaling
- l3 LDOs for the power supply of memory card, camera, 8luetooth, PP, S|M card, and other dlverslfled
usage
- One boost regulator and Pour Open-Drain Output Switches to Supply / control the LED
- LDO type vlbrator
- One NMOS swltch to control P(G8) LLD
- Thermal Overload Protectlon
- Under voltage Lock out Protectlon
- Over voltage Protectlon
- Dlfferent level of power down modes wlth sophlstlcated software control enables excellent power
saving performance
3. TECHNICAL BRIEF
18 / 149
3. TECHNICAL BRIEF
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3.1.8 Radio Interface and Baseband Front End
- GMSK modulator wlth analog | and Q channel outputs
- l0-bit D/A Converter for uplink baseband I and Q signals
- l4-bit high resolution A/D Converter for downlink baseband I and Q signals
- Callbratlon mechanlsm of offset and galn mlsmatch for baseband A/D Converter and D/A Converter
- l0-bit D/A Converter for Automatic Power Control.
- l3-bit high resolution D/A converter for Automatic Frequency Control
- Programmable Padlo PX fllter wlth adaptlve bandwldth control
- 8l dlrectlonal 8S| lnterface. PP chlp reglster read access wlth 3 wlre or 4 wlre lnterface
- 2 channels 8aseband Serlal |nterface(8S|) whith 3 wire control
- l0-Pin Baseband Parallel Interface(BRI) with programmable driving strength
- Multl-band support
3.1.9 Voice and Modem CODEC
- Dlgltal tone generatlon
- volce Memo
- Nolse Peductlon
- Lcho Suppresslon
- Advanced Sidetone Oscillation Reduction
- Dlgltal sidetone generator with programmable gain
- Two programmable acoustlc compensatlon fllters
- GSM/GPPS quad vocoders for adaptive multirate(AMR), enhanced full rate(EFR), full
rate(FR), and half rate(HR)
- GSM channel codlng, equallzatlon and A5/l, A5/2 and A5/3 clpherlng
- GPPS GLAl, GLA2 and GLA3 clpherlng
- Programmable GSM/GPPS modem
- Packet Swltched Data wlth CSl/CS2/CS3/CS4 codlng schemes
- GSM clrcult swltch Data
3.1.10 Voice Interface and Voice Front End
- Two mlcrophone lnputs sharlng one low nolse ampllfler wlth programmable galn and automatlc galn
control(AGC) mechanism
- volce power ampllfler wlth programmable galn
- 2
nd
order Sigma-delta A/D Converter for voice uplink path
- D/A Converter for volce downllnk path
- Supports half-duplex hands-free operation
- Compllant wlth GSM 03.05
3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
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3.1.11 LCD/NAND Flash Interface
- Dedlcated Parallel |nterface supports 3 external devlces wlth 8_/l6-bit NAND flash interface,
8_/9_/l6_/l8-bit parallel interface, and serial interface for LCM
- 8ullt-in NAND Flash Controller with 1-bit ECC for mass storage
3.1.12 LCD Controller
- Supports LCM format: PG8332, PG8444, PG8565, PG8666, PG8888
- Supports LCD module wlth maxlmum resolutlon up to 320x480 at 24bpp
- Capable of comblnlng dlsplay memorles wlth up to 4 blendlng layers
- Supports slmultaneous connectlon to up to 3 parallel LCD and 2 serlal LCD modules
- Supports hardware dlsplay rotatlon for each layer
- Per plxel alpha channel
- True color englne
3.1.13 Audio CODEC
- wavetable synthesls wlth up to 64 tones
- Advanced wavetable syntheslzer capable of generatlng and 47 sets of percusslons
- PCM Playback and Pecord
- Dlgltal Audlo Playback
- Supports HL-AAC codec decode
- Supports ASC codec decode
3.1.14 Audio Interface and Audio Front End
- Supports |2S lnterface
- Hlgh resolutlon D/A Converters for Stereo Audlo playback
- Stereo analog lnput for stereo audlo source
- Analog multlplexer for Stereo Audlo
- Stereo to Mono Converslon
- 8luetooth Peatures
3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
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3.1.15 Image Signal Processor
- 8/l0 blt 8ayer format lmage lnput
- PG8565/Uv422 format lmage lnput
- Capable of processlng lmage of slze up to 5M plxels
- Color correctlon matrlx
- Gamma correctlon
- Automatlc exposure(AL) control
- Automatlc focus control
- Automatlc whlte balance(AwP) control
- Programmable AL/Aw8 wlndows
- Ldge enhancement support
- Shadlng compensatlon
- Defect Plxel compensatlon
3.1.16 JPEG Decoder
- Sw based 1PLG decode
- Supports varlous Uv format, DC/AC Huffman tables, and quatlzatlon Tables
3.1.17 JPEG Encoder
- |SO/|LC l09l8-1 JPEG baseline mode
- |SO/|LC l09l8-2 compliance
- Supports Uv422 and Uv420 and grayscale formats
- Supports LX|P/1P|P
- Standard DC and AC Huffman tables
- Provldes l4 levels of encode quallty
- Supports contlnuous shootlng
3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
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3.1.18 Image Data Processing
- Supports Dlgltal Zoom
- Supports PG8 and CbCr lmage processlng
- Hlgh throughput hardware scaler. Capable of tallorlng an lmage to an arbltrary slze
- Horlzontal scallng wlth blcublc lnterpolatlon
- vertlcal scallng wlth blcublc lnterpolatlon
- Slmultaneous scallng for vldeo buffer and dlsplay buffer
- Uv and PG8 color space converslon
- 8oundary paddlng
- Plxel processlng: hue/saturatlon/lntenslty/color ad[ustment, Gamma correctlon and grayscale/
invert/sepia-tone effects
- Hardware accelerated lmage edltlng
- Photo frame capablllty
- PG8/CbCr format thumbnall output
3.1.19 MPEG-4/H.263 CODEC
- Software vldeo CODLC
- |SO/|LC l4496-2 simple profile
- decode Q level 0/l/2/3
- |TU-T H.263 profile 0 @ level 10
- Lncoder resync maker and HLC
- Supported vlsual tools for decoder: |-VOP, P-VOP, AC/DC Prediction, 4-MV, Unrestricted MV,
Error Resilience, Short Header
- Lrror Peslllence for decoder : Sllce Pesynchronlzatlon, Data Partltlonlng, Peverslble vLC
- Supported vlsual tools for encoder : |-VOP, P-VOP, Half-Pel, DC Prediction, Unrestricted MV,
Reversible VLC, Short Header
- Supports encodlng motlon vector of range up to -64/+63.5 pixels
- HL-AAC decode support
- AAC/AMP/w8-AMR audio decode support
- AMP/w8-AMR audio encode support
3.1.20 H.264 Decode
- Software Decoder
- |SO/|LC l4496-10 baseline profile : decode @ level 3
3. TECHNICAL BRIEF
22 / 149
3. TECHNICAL BRIEF
- 22 -
3.1.21 2D Accelerator
- Supports 32-bpp ARGB8888, 24-bpp RGB888, 16-bpp RGB565, and 8-bpp index color modes
- Pectangle flll wlth constant or gradlent color
- 8lt8lt : capable wlth 7 rotatlon types, POP4, Mask
- Alpha blendlng wlth 7 rotatlon types, per-pixel alpha and pre-multiplied alpha
- Pont cachlng : normal and ltallc font
- Llnear transform : Support perspectlve transform, truncate/nearest/bl-linear sample filter
- Command queue wlth max depth of l024
3.1.22 Bluetooth Radio Features
- Pully compllant wlth 8luetooth speclflcatlon 2.l + LDP
- Low out-of-band spurious emissions supports simultaneous operation with GPS,GSM/GPRS
worldwide radio systems
- Low-IF architecture with high degree of linearity and high order channel filter
- |ntegrated T/P swltch and Balun
- Pully lntegrated PA provldes l0d8m output power
- -90d8m sensltlvlty wlth excellent lnterference re[ectlon performance
- Hardware AGC dynamlcally ad[usts recelver performance ln changlng envlronments
3.1.23 Bluetooth Baseband Feature
- Up to 7 slmultaneous actlve ACL llnks
- Up to 3 slmultaneous SCO and eSCOlinks with CVSD coding
- eSCOsupport
- Scatternet support: Up to 4 piconets simultaneously with background inquiry/page scan
- Snlff mode, hold mode, and park mode support
- APH and PTA collaboratlve support for wLAN/8T coexlstence
- |dle mode and sleep mode enables ultra low power consumptlon
- PCM lnterface and bullt-in transcoders for A-law, u-law and linear voice with re-transmission support
- 8ullt-in hardware modem engine for access code correlation, header error correction, forward error
correction, CRC whitening, and encryption
- Channel quallty drlven data rate adaptatlon
- Channel assessment for APH
3.1.24 Bluetooth Platform features
- Lmbedded APM7 processor for 8luetooth protocol stack wlth bullt-in memory system
- Pully verlfled POM based system wlth code patch for feature enhancement
3. TECHNICAL BRIEF
23 / 149
3. TECHNICAL BRIEF
- 23 -
3.2 Power Management
An power management is embedded in MT6236 to provide the rich features that an high-end feature phone
supports, including Li-ion battery charger, high performance and low quiescent current LDOs, power efficient
switching regulator, and drivers for LED and backlight.
The MT6236 offers various low-power features to help reduce system power consumption. MT6236 is also
fabricated in an advanced low power 65nm CMOS process, hence providing an overall ultra low leakage
solution.
3.2.1 Low Dropout Regulators(LDOs), Buck converter and Reference
The PMU Integrates 13 LDOs that are optimized for their given functions by balancing quiescent current, dropout
voltage, llne/load regulatlon, rlpple re[ectlon, and output nolse
RF LDO (Vrf)
The RF LDO is a linear regulator that could source 250mA (max) with 2.8V output voltage. It supplies the RF
circuitry of the handset. The LDO is optimized for high performance and adequate quiescent current.
Digital Core Buck Converter (Vcore)
The digital core regulator is a DC-DC step-down converter (Buck converter) that could source 350mA (max) with
1.3V to 0.8V programmable output voltage based on software register setting. It supplies the power for baseband
circuitry of the SoC. The buck converter is optimized for high efficiency and low quiescent current.
Digital Memory Buck Converter (VM)
The digital core regulator is a DC-DC step-down converter (Buck converter) that could source 300mA (max) with
1.8V. It supplies the power for baseband circuitry of the SoC. The buck converter is optimized for high efficiency
and low quiescent current.
Digital IO LDO (Vio)
The digital IO LDO is a linear regulator that could source 100mA (max) with 2.8V output voltage. It supplies the
power for baseband circuitry of the SoC. The LDO is optimized for very low quiescent current and turns on
automatically together with Vm/Va LDOs.
Analog LDO (Va)
The analog LDO is a linear regulator that could source 125mA (max) with 2.8V output voltage. It supplies the
analog sectlons of the SoC. The LDO ls optlmlzed for low frequency rlpple re[ectlon ln order to re[ect the rlpple
coming from the burst at 217Hz of RF power amplifier.
TCXO LDO (Vtcxo)
The TCXO LDO is a linear regulator that could source 40mA (max) with 2.8V output voltage. It supplies the
temperature compensated crystal osclllator, whlch needs ultra low nolse supply wlth very good rlpple re[ectlon.
3. TECHNICAL BRIEF
24 / 149
3.2 Power Management
3. TECHNICAL BRIEF
- 24 -
Single-Step RTC LDO (Vrtc)
The single-step RTC LDO is a linear regulator that can charge up a capacitor-type backup coin cell to 2.8 V,
which also supplies the RTC module even at the absence of the main battery. The single-step LDO features the
reverse current protection and is optimized for ultra low quiescent current while sustaining the RTC function as
long as possible.
Memory buck converter (Vm)
The memory regulator is a DC-DC step-down converter (Buck converter) that could source 300mA (max) with
1.8V output voltage. It supplies the memory circuitry in the handset. The buck converter is optimized for high
efficiency and low quiescent current.
SIM LDO (Vsim)
The SIM LDO is a linear regulator that could source 100mA (max) with 1.8V or 3.0V output voltage selection
based on the supply specs of subscriber identity modules (SIM) card. It supplies the SIM card and SIM level
shlfter clrcultry ln the handset. The vslm LDO ls controlled lndependently by the reglster named vS|M_LN.
USB LDO (Vusb)
The USB LDO is a linear regulator that could source 100mA (max) with 3.3V output dedicated for USB circuitry. It
ls controlled lndependently by the reglster named PG_vUS8_LN.
Bluetooth LDO (Vbt)
The VBT LDO is a linear regulator that could source 100mA (max) with 1.3V, 1.5V, 1.8V, 2.5V, 2.8V, 3.0V, 3.1V or
3.3v output for 8luetooth module. |t ls controlled lndependently by the reglster named PG_v8T_LN.
Camera Analog LDO (Vcama)
The Vcama LDO is a linear regulator that could source 250mA (max) with 1.5V, 1.8V, 2.5V or 2.8V output which is
selected by the reglster named vCAMA_SLL|l:0|. |t supplles the analog power of the camera module. vcama ls
controlled lndependently by the reglster named PG_vCAMA_LN.
Camera Digital LDO (Vcamd)
The Vcamd LDO is a linear regulator that could source 100mA (max) with 1.3V, 1.5V, 1.8V, 2.5V, 2.8V, 3.0V or 3.3V
output whlch ls selected by the reglster named vCAMD_SLL|2:0|. |t supplles the dlgltal power of the camera
module. vcamd ls controlled lndependently by the reglster named PG_vCAMD_LN.
3. TECHNICAL BRIEF
25 / 149
3. TECHNICAL BRIEF
- 25 -
Name of
PMIC
Net Name Output Voltage(V)
Output
Current(mA)
Description
(Connected Device)
VCORE VCORE_1V2 0.9 to 1.3 350 Digital Core
VM VMEM_1V8 1.8 300
Extemal Memory,
Selectable
VIO VIO_2V8 2.8 100 Digital IO
VRF VRF_2V8 2.8 250 RF Chip
VA avdd_2v8 2.8 125 Analog Baseband
VRTC VRTC_2V8 2.8 0.6 RTC
VTCXO ---- 2.8 40
13/26 MHz Reference
Clock
VSIM VSIM1_PWR 1.8/3.0 100 SIM Card, Selectable
VSIM2 VSIM2_PWR 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100 SIM Card2, Selectable
VIBR --- 1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 Vibrator
VUSB VUSB_3V3 3.3 100 USB
VBT VBT_2V8 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100
Memory Card or
Bluetooth
VCAM_A VCAM_2V8 1.3/1.5/1.8/2.8 250 Analog Camera Power
VCAM_D VCAM_1V8 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100 Digital Camera Power
VMC VMC 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100 Memory Card
2 Bucks
13 LDOs
(4 Analog LDOs
+ 9 Digital
LDOs)
Table3.2.1. Power Supply Domains (Without RF)
3. TECHNICAL BRIEF
- 26 -
3.2.2 Power On Sequence
The PMU handles the powering ON and OFF of the handset. There are three ways to power-on the handset
system :
1. Push PWRKEY (Pull the PWRKEY pin to the low level)
Pulling PWRKEY low is the typical way to turn on the handset. The Vcore buck converter will be turned-on first,
and then Va/Vio LDOs turn-on at the same time. After Va/Vio turn-on, Vm buck and then Vusb/Vmc LDOs, and
finally Vrf/Vtcxo LDOs will be turn on. The supplies for the baseband are ready and then the system reset ends
at the moment when the Vcore/Va/Vio/Vm/Vusb/Vmc/Vrf/Vtcxo are fully turned-on to ensure the correct
timing and function. After that, baseband would send the PWRBB signal back to PMU for acknowledgement.
To uccessfully power-on the handset, PWRKEY should be kept low until PMU receives the PWRBB from
baseband.
2. RTC module generate PWRBB to wakeup the system
If the RTC module is scheduled to wakeup the handset at some time, the PWRBB signal will directly send to the
PMU. In this case, PWRBB becomes high at the specific moment and let PMU power-on [ust llke the sequence
described above. This is the case named RTC alarm.
3. Valid charger plug-in (CHRIN voltage is within the valid range)
Charger plugging-in will also turn on the handset if the charger is valid (no OVP take place). However, if the
battery voltage is too low to power-on the handset (UVLO state), the system wont be turned-on by any of
these three ways. In this case, charger will charge the battery first and the handset will be powered-on
automatically as long as the battery voltage is high enough.
Table 18 States of mobile handset and regulator
3. TECHNICAL BRIEF
27 / 149
3.2.2 Power On Sequence
3. TECHNICAL BRIEF
- 27 -
Under-voltage Lockout (UVLO)
The UVLO state in the PMU prevents startup if the initial voltage of the main battery is below the 3.2V
threshold. It ensures that the handset is powered-on with the battery in good condition. The UVLO function is
performed by a hysteretic comparator which can ensure the smooth power-on sequence. In addition, when
the battery voltage is getting lower and lower, it will enter UVLO state and the PMU will be turned-off by itself,
except for Vrtc LDO, to prevent further discharging. Once the PMU enters UVLO state, it draws low quiescent
current. The RTC LDO is still working until the DDLO disables it.
Deep Discharge Lockout (DDLO)
PMU will enter to the deep discharge lockout (DDLO) state when the battery voltage drops below 2.5V. In this
state, the Vrtc LDO will be shutdown. Otherwise, it draws very low quiescent current to prevent further
discharging or even damage to the cells.
Reset
The PMU contains a reset control circuit which takes effect at both power-up and power-down. The RESETB
pin is held at low in the beginning of power-up and returns to high after the pre-determined delay time. The
delay time is controlled by a large counter, which use clock from internal ring-oscillator. At power-off, RESETB
pin will return to low immediately without any delay.
3. TECHNICAL BRIEF
28 / 149
3. TECHNICAL BRIEF
- 28 -
3.3.1 Internal Block Diagram
3.3 FEM with integrated Power Amplifier Module (RF7180, U202)
Figure. 3.3.1 RF7180 FUNCTIONAL BLOCK DIAGRAM
3.3.2 General Description
The RF7180 is a quad-band (GSM850/EGSM900/DCS1800/PCS1900) GSM/GPRS Class 12compliant transmit
module with two symmetrical receive ports. This transmit module buildsupon RFMDs leading power amplifier
with PowerStar integrated power control technology,pHEMT switch technology, and integrated transmit
filtering for best-in-class harmonic perfor-mance. The results are high performance, a reduced solution size, and
ease of implementation.
The device is designed for use as the final portion of the transmitter section in a GSM850 / EGSM900 / DCS1800 /
PCS1900 handset and eliminates the need for PA-to-antennaswitch module matching network. The device
provides 50 matched input and output portsrequiring no external matching components.The RF7180
features RFMDs latest integrated power-flattening circuit, which significantlyreduces current and power
variation into load mismatch. Additionally, a VBATT tracking feature isincorporated to maintain switching
performance as supply voltage decreases. The RF7180 alsointegrates an ESD filter to provide excellent ESD
protection at the antenna port
3. TECHNICAL BRIEF
29 / 149
3.3 FEM with integrated Power Amplifer Module (RF7180, U202)
3.3.1 Internal Block Diagram
GND
GND
GND
GND
G
N
D
GND
GND
RFIN LB
RFIN HB
R
X
0
R
X
1
ANTENNA
NC
N
C
V
B
A
T
T
V
R
A
M
P
T
X

E
N
A
B
L
E
G
P
C
T
R
L
0
G
P
C
T
R
L
1
ESD
Protection
Switch Amplifer
CMOS Controller
1
2
3
4
5
6 7 8 9 10
11 12
13
14
15
16
17 18 19 20 21 22
N
C
G
N
D
G
N
D
3. TECHNICAL BRIEF
- 29 -
4.7p C1322
22p C283
C284
100p
C280 6p
22u C282
100p C288
C289 100p
C1327
DNI
VBAT
C1326
DNI
L228
3.3n
L229
3.3n
1.2p
C1325
C287
220p 100p
C285
U215
12
1
1
1
0987
13
6
14
5
15
4
16
3
17
2
1
8
1
1
9
2
0
2
1
2
2
2
3
G
N
D
_
S
L
U
G
V
R
A
M
P
T
X
_
E
N
A
B
L
E
G
P
C
T
R
L
0
G
P
C
T
R
L
1
GND1
V
B
A
T
T
GND2
NC3
RFIN_LB
GND9
GND3
GND8
RFIN_HB
ANT
GND4
NC2
G
N
D
5
G
N
D
6
G
N
D
7
N
C
1
R
X
0
RX1
C291
22p
C29033p
22p
C286
R282
180
R288
24K
R281
10K
R284
180
R283
30
C293
33p
R286
24
220
R287
220
R285
SW201
G2
ANT RF
G1
RF_TX_RAMP
LowBand_Tx
HighBand_Tx
L
o
w
B
a
n
d
_
R
x
H
i
g
h
B
a
n
d
_
R
x
RF_ANT_SW2
RF_PA_EN
RF_ANT_SW1
ANT_FEED
TX Module Mode Tx ENABLE GpCtrl1 GpCtrl0
Of 0 0 0
RX 0 0 1 0
RX 1 0 1 1
GSM850/900 TX Mode 1 1 0
DCS1800/PCS1900 TX Mode 1 1 1
Figure 3.3.2 RF-module CIRCUIT DIAGRAM
Table 3.3.1 Band SW Logic Table
3. TECHNICAL BRIEF
- 30 -
3.4 Clocks
There are two ma[or tlme bases ln the MT6236. Por the faster one ls the 26 MHz clock orlglnated from the
digital control oscillator(DCXO) of RF chip. This signal is then converted to the square-wave signal through
CLKSQ. The other time base is the 32768 Hz clock generated by an on-chip oscillator connected to an external
crystal. Figure 3.4.1 shows the clock sources as well as their utilizations inside the chip.
Figure. 3.4.1 Clock distributions inside the MT6236.
3. TECHNICAL BRIEF
31 / 149
CG
EN
MCU_DCM
TCVCXO
CLKSQ
1/2
XOSC_ANA
UPLL
MPLL
&
NPLL
32KHz
26MHz
CLKSQ_CON (0x801A_0100)
MPLL_636M_CK
CLKSQ_26M_CK
UPLL_624M_CK
USB_PHY_CLK
XOSCOUT
1/2
MPLLSEL
(0x801A_0204[1:0])
FMCU_CK
CG
EN
DSP_DCM
FDSP_CK
DPLLSEL
(0x801A_0204[3:2])
UPLLSEL
(0x801A_0204[7:6])
CG
EN
USB_DCM
FUSB_CK
F32K_CK
UPLL_48M_USB_CK
GUSB_CK
104MHz GDSP2_CK
CG
EN
CG
EN
104MHz GDSP1_CK
USB PHY
52MHz AHB clock
104MHz EMI clock
312MHz MCU clock
MSDCclock
IrDA clock
SLOW_CK
GPLLSEL
(0x801A_0204[5:4])
CG
EN
CG
EN
GSM_DCM
FGSM_CK
52MHz GSM_CK
52MHz BFE clock
0
1
2
1
0
CG
EN
MSDC_DCM
CG
EN
SLOW_DCM
XOSC_CON (0x801A_0000)
CPLL
MPLLDIV
UPLLDIV
CLKSQ_13M_CK
MPLL_312M_CK
MPLL_104M_CK
UPLL_52M_CK
UPLL_96M_CK
UPLL_48M_CK
0
1
2
0
1
2
0
1
2
CPLLDIV
CPLL_208M_CK
CG
EN
CPLL_DIV_CK
Cameraclock
CPLL_CON2(0x801A_0608)
RF
ABB
CLKSW_TOP
MPLL_208M_CK
208MHz EMI clock
MPLL_CLKSW
(frequency hoppingswitch)
CLKCTL
UPLL_104M_CK
NPLL_636M_CK
Figure. 3.4.1 Clock distributions inside the MT6236.
3.4 Clocks
3. TECHNICAL BRIEF
- 31 -
Figure. 3.4.2 Crystal Oscillator External Connection
X201
26MHz
DSX321G-26M
2 1
3 4
2.2K
R223
R225
2.2K
C272
1n
1K R228
82p
C250
C260
47p
U205
1
6
1
5
1
4
1
3
1
2
1
1
1
0 9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
2
5
2
6
2
7
2
8
2
9
3
0
3
1
3
2
3
3
G
N
D
R
X
8
5
0
R
X
8
5
0
B
R
X
9
0
0
R
X
9
0
0
B
R
X
1
8
0
0
R
X
1
8
0
0
B
R
X
1
9
0
0
R
X
1
9
0
0
B
VCC_FE VCC_BBQ
I Q
IB QB
VCC_BBI REF_OP
SDATA REFIN
SCLK REFINB
SEN VAFC_NC
NC VCC_REF
V
L
D
O
3
T
X
O
P
_
L
O
T
X
O
P
_
H
I
V
C
C
_
T
X
V
C
O
V
D
D
V
B
A
T
V
L
D
O
1
V
L
D
O
2
RF_QN
RF_QP
CLK_26M
RF_AFC
3. TECHNICAL BRIEF
- 32 -
3.4.1 32.768KHz Time Base
The 32768 Hz clock is always running. Its mainly used as the time base of the Real Time Clock(RTC) module,
which maintains time and date with counters. Therefore, both the 32768Hz oscillator and the RTC module is
powered by separate voltage supplies that shall not be powered down when the other supplies do.
In low power mode, the 13Mhz time base is turned off, so the 32768Hz clock shall be employed to update the
critical TDMA timer and Watchdog Timer. This time base is also used to clocks the keypad scanner logic
3.4.2 26MHz Time Base
Since PLL are based on 13MHz reference clock. There is an -dividers for PLL existing to allow using 26MHz
DCXO.
There are 3 phase-locked loops(PLL) in MT6236. The UPLL generates 624Mhz clock output, then a frequency
dlvlder to generate flxed 52Mhz and 48Mhz for GSM_CLOCK and US8_CLOCK respectlvely. The MPLL generates
dynamlcally programmable clock from 624 ~ 660Mhz for MCU_CLOCL and DSP_CLOCK. These four prlmary
clocks then feed into GSM, USB, MCU and DSP clock Domain, respectively. Besides, There is a CPLL generates
6.5 ~ 208Mhz clock output, with a post-divider from 1 ~ 1/16 clock for Camera-Sensor. These 3 PLLs require no
off-chip components for operations and can be turn off in order to save power. After power-on, the PLLs are off
by default and the source clock signal is selected through multiplexers. The software shall take cares of the PLL
lock time while changing the clock selections. The PLL and usages are listed below.
- PLL supply four clock source : MCU_CLOCK(3l2~330Mhz), DSP_CLOCK(l04~ll0Mhz),
GSM_CLOCK(l04Mhz) and US8_CLOCK(48Mhz)
- Por DSP/MCU system clock, MCU_CLOCK and DSP_CLOCK. The outputted 624~660Mhz clock ls
controlled by MCU for 1.0Mhz per step and settled time is under 100uS. The clock is also connected to
DSP/MCU DCM (dynamlc clock manager) for dynamlcally ad[ustlng clock rate by dlgltal clock dlvlder.
MCU_CLOCK paces the operatlons of the MCU cores, MCU memory system, and MCU perlpherals as well
- Modem system clock, GSM_CLOCK, whlch paces the operatlons of the GSM/GPPS hardware,
coprocessors as well. The outputted 52Mhz clock ls connecter to GSM_DCM for dynamlcally ad[ustlng
clock rate by digital clock divider.
Note that PLL need some time to become stable after being powered up. The software shall take cares of the
PLL lock time before switching them to the proper frequency. Usually, a software loop longer than the PLL lock
time is employed to deal with the problem.
For power management, the MCU software program may stop MCU Clock by setting the Sleep Control Register.
Any interrupt requests to MCU can pause the sleep mode, and thus MCU return to the running mode.
AHB also can be stop by setting the Sleep Control Register. However the behavior of AHB in sleep mode is a
little different from that of MCU. After entering Sleep Mode, it can be temporarily waken up by any hreq(bus
request), and then goes back to sleep automatically after all hreqs de-assert. Any transactions can take place
as usual in sleep mode, and it can save power while there is no transaction on it. However the penalty is losing a
little system efficiency for switching on and off bus clock, but the impact is small

3. TECHNICAL BRIEF
33 / 149
3. TECHNICAL BRIEF
- 33 -
3.5 Transceiver(AD6548,U204)
Figure. 3.5.1 Block DIAGRAM AD6548
e
l
u
d
o
M

h
c
t
i
w
S

a
n
n
e
t
n
A
DC Offset
Correction
DC Offset
Correction
PFD
/2
LDO
Reg 3
LDO
Reg 2
LDO
Reg 1
Frac-N Synth
RX LO
Generator
TX LO
Generator
Xtal Osc
+ Tuning
Serial
Interface
/4
SEN
SCLK
SDATA
RX1900B
RX1900
RX1800B
RX1800
RX900B
RX900
RX850B
RX850
TXOP_HI
TXOP_LO
VDD
VBAT VLDO3 VLDO2 VLDO1
LO VCO
Supply
REF_OP
REFIN
REFINB
VAFC
VCC_REF
Q
QB
I
IB
VCC_BBI
VCC_BBQ
LNA Gain
Reduction
TX_LO2
TX_LO1
TX_LO2
TX_LO1
General
Supply
TX circuits
supply
CLK
RXQB
RXQ
TXQB
TXQ
RXIB
RXI
TXI
TXIB
AFC
REF_OP
Band
Control
TX Loop
Filter
GSM1800/1900
GSM850/900
PA Module
AD6548
VCC_FE
VCC_TXVCO
Ref
Supply
VCC_
TXVCO
3. TECHNICAL BRIEF
- 34 -
3.5.1 GENERAL DESCRIPTION
The AD6548 provides a highly integrated direct conversion radio solution that combines, on a single chip, all
radio and power management functions necessary to build the most compact GSM radio solution possible. The
only external components required for a complete radio design are the Rx SAWs, PA, Switch plexer and a few
passives enabling an extremely small cost effective GSM Radio solution.
The AS6548 uses the industry proven direct conversion receiver architecture of the Othello
TM
Family. For Quad band applications the front end features four fully integrated programmable gain differential
LNAs. The RF is then downconverted by quadrature mixers and then fed to the baseband programmable-gain
amplifiers and active filters for channel selection. The Receiver output pins can be directly connected to the
baseband analog processor. The Receive path features automatic calibration and tracking to remove DC offsets.
The transmitter features a translation-loop architecture for di-rectly modulating baseband signals onto the
integrated TX VCO.
The translation-loop modulator and TX VCO are extremely low noise removing the need for external SAW filters
prior to the PA.
The AD6548 uses a single integrated LO VCO for both the receive and the transmit circuits. The synthesizer lock
times are optimized for GPRS applications up to and including class12. To dramatically reduce the BOM both TX
Translational loop and main PLL Loop Filters are fully integrated into the device.
AD6548 incorporates a complete reference crystal calibration system. This allows the external VCTXO to be
replaced with a low cost crystal. No other external components are required.
The AD6548 also contains on-chip low dropout voltage regulators(LDOs) to deliver regulated supply voltages
to the functions on chip, with a battery input voltage of between 2.9V and 5.5V. Comperehensive power down
options are included to minimize power consumption in normal use.
A standard 3 wire serial interface is used to program the IC. The interface features low-voltage digital interface
buffers compatible with logic levels from 1.6V to 2.9V
3. TECHNICAL BRIEF
35 / 149
3. TECHNICAL BRIEF
- 35 -
3.5.2 Features
Fully integrated GSM Transceiver including.
Direct Conversion Receiver
- 4 Differential LNAs
- Integrated Active RX channel Select Filters
- Programmable gain baseband amplifiers
Translation Loop Direct VCO Modulator
- Integrated TX VCO and tank
- External TX filters eliminated
-Integrated Loop filter components
High performance multi band PLL system
- Fast Fractional-N-Synthesizer
-Integrated Local Oscillator VCO
- Fully integrated Loop filters
-Crystal Reference Oscillator & Tuning System
Power Management
- Integrated LDOs allow direct battery supply connection
Small footprint
- 32-Lead 5X5mm Chip scale Package
Dual Triple and Quad band radios
- GSM850,EGSM900,DCS1800 and PCS1900
- GPRS to Class 12-EDGE RX
3. TECHNICAL BRIEF
36 / 149
3. TECHNICAL BRIEF
- 36 -
3.6 MEMORY(PF38F4050M0Y3DE, U300 )
Hynix NAND Flash is a 128Mx16bit with spare 4Mx16 bit capacity.
The device is offered in 1.8 Vcc Power Supply, and with x16 I/O interface
its NAND cell provides the most cost-effective solution for the solid state mass storage market.
The memory is divided into blocks that can be erased independently so it is possible to preserve valid data
while old data is erased.
The device contains 2048 blocks, composed by 64 pages.
Memory array is split into 2 planes, each of them consisting of 1024 blocks.
Like all other 2KB - page NAND Flash devices, a program operation allows to write the 2112-byte page in typical
250us and an erase operation can be performed in typical 3.5ms on a 128K-byte block.
In addition to this, thanks to multi-plane architecture, it is possible to program 2 pages at a time (one per each
plane) or to erase 2 blocks at a time (again, one per each plane). As a consequence, multi-plane architecture
allows program time to be reduced by 40% and erase time to be reduction by 50%. In case of multi-plane
operation, there is small degradation at 1.8V application in terms of program/erase time.
The multiplane operations are supported both with traditional and ONFI 1.0 protocols.
Data in the page can be read out at 45ns cycle time per byte. The I/O pins serve as the ports for address and data
input/output as well as command input. This interface allows a reduced pin count and easy migration towards
different densities, without any rearrangement of footprint.
Commands, Data and Addresses are synchronously introduced using CE#, WE#, ALE and CLE input pin.
The on-chip Program/Erase Controller automates all read, program and erase functions including pulse
repetition, where required, and internal verification and margining of data.
A WP# pin is available to provide hardware protection against program and erase operations.
The output pin RB# (open drain buffer) signals the status of the device during each operation. In a system with
multiple memories the RB# pins can be connected all together to provide a global status signal.
Each block can be programmed and erased up to 100,000 cycles with ECC (error correction code) on. To extend
the lifetime of Nand Flash devices, the implementation of an ECC is mandatory.
The chip supports CE# don't care function. This function allows the direct download of the code from the NAND
Flash memory device by a microcontroller, since the CE# transitions do not stop the read operation.
In addition, device supports ONFI 1.0 specification.
3.6.1 Functional Description
3. TECHNICAL BRIEF
37 / 149
3.6 MEMORY(PF38F4050M0Y3DE, U300 )
3.6.1 Functional Description
3. TECHNICAL BRIEF
- 37 -
The copy back function allows the optimization of defective blocks management: when a page program
operation fails the data can be directly programmed in another page inside the same array section without the
time consuming serial data insertion phase. Copy back operation automatically executes embedded error
detection operation: 1 bit error out of every 264-word (x16) can be detected. With this feature it is no longer
necessary to use an external to detect copy back operation errors.
Multiplane copy back is also supported, both with traditional and ONFI 1.0 protocols. Data read out after copy
back read (both for single and multiplane cases) is allowed.
In addition, Cache program and multi cache program operations improve the programming throughput by
programming data using the cache register.
The devices provide two innovative features: page re-program and multiplane page re-program.
The page re-program allows to re-program one page. Normally, this operation is performed after a previously
failed page program operation. Similarly, the multiplane page re-program allows to re-program two pages in
parallel, one per each plane. The first page must be in the first plane while the second page must be in the
second plane; the multiplane page re-program operation is performed after a previously failed multiplane
page program operation. The page re-program and multiplane page re-program guarantee improve
performance, since data insertion can be omitted during re-program operations, and save ram buffer at the
host in the case of program failure.
The devices support the ONFI1.0 specification and come with four security features:
- OTP (one time programmable) area, which is a restricted access area where sensitive data/code can be stored
permantely.
- Serial number (unique identifier), which allows the devices to be uniquely indentified.
-Read ID2 extension
These securlty features are sub[ect to an NDA (non-disclosure agreement) and are, therefore, no described in
the datasheet. For more details about them, contact your nearest Hynix sales office.
3. TECHNICAL BRIEF
38 / 149
3. TECHNICAL BRIEF
- 38 -
Table 3_6_1 Signal Names
Figure. 3.6.1 LOGIC DIAGRAM
3. TECHNICAL BRIEF
39 / 149
DQ0~DQ15 Data Input /outputs(x16)
CLE Command latch enable
ALE Address latch enable
CE# Chip Enable
RE# Read Enable
WE# Write Enable
WP# Write Protect
RB# Ready / Busy
Vcc Power supply
Vss Ground
NC No Connected internally
VDD
CE#
WE#
RE#
ALE
CLE
WP#
DQ0~DQ7(x8)
DQ0~DQ15(x16)
RB#
VSS
Table 3_6_1 Signal Names
Figure. 3.6.1 LOGIC DIAGRAM
3. TECHNICAL BRIEF
- 39 -
Figure. 3.6.2 BLOCK DIAGRAM
3. TECHNICAL BRIEF
40 / 149
ADDRESS
REGISTER/
COUNTER
PROGRAM
ERASE
CONTROLLER
HV GENERATION
COMMAND
INTERFACE
LOGIC
COMMAND
REGISTER
DATA
REGISTER
WE#
CE#
WP#
RE#
BUFFERS
IO
Y DECODER
PAGE BUFFER
2048 Mbit + 64 Mbit
NAND Flash
MEMORY ARRAY
X
D
E
C
O
D
E
R
Figure. 3.6.2 BLOCK DIAGRAM
3. TECHNICAL BRIEF
- 40 -
[ MCP ]
Operation Temperature
- -30oC ~ 85oC
Package
- 130-ball FBGA - 8.0x9.0mm2, 1.0t, 0.65mm pitch
- Lead & Halogen Free
| NAND Plash |
MULTIPLANE ARCHITECTURE
SUPPLY VOLTAGE
- Vcc = 1.7 - 1.95 V
MEMORY CELL ARRAY
- (1K + 32) Words x 64 pages x 2048 blocks
PAGL S|ZL
- (1K+ 32 spare) Words
8LOCK S|ZL
- (64K + 2K spare) Words
PAGE READ / PROGRAM
- Random access : 25us (max.)
- Sequential access : 45ns (min.)
- Page program time : 250us (typ.)
- Multi-page program time (2 pages): 250us (Typ.)
BLOCK ERASE / MULTIPLE BLOCK ERASE
- Block erase time: 3.5 ms (Typ)
- Multi-block erase time (2 blocks): 3.5ms (Typ.)
SEQURITY
- OTP area
- Sreial number (unique ID)
- Hardware program/erase disabled during
- power transition
ADDITIONAL FEATURE
- Multiplane Architecture:
Array is split into two independent planes.
Parallel operations on both planes are available,
having program and erase time.
- Single and multiplane copy back program with automatic
EDC (error detection code)
- Single and multiplane page re-program
- Single and multiplane cache program
- Cache read
- Multiplane block erase
3.6.2 Features
[ DDR SDRAM ]
Double Data Rate architecture
- two data transfer per clock cycle
x16 bus width
Supply Voltage
- VDD / VDDQ = 1.7 - 1.95 V
Memory Cell Array
- 16Mb x 4Bank x 16 I/O
Bidirectional data strobe (DQS)
Input data mask signal (DQM)
Input Clock
- Differential Clock Inputs (CK, /CK)
MRS, EMRS
- JEDEC Standard guaranteed
CAS Latency
- Programmable CAS latency 2 or 3 supported
Burst Length
- Programmable burst length 2 / 4 / 8 with both
sequential and interleave mode
3. TECHNICAL BRIEF
41 / 149
RELIABILITY
- 100,000 Program / Erase cycles (with
1bit /528Byte ECC)
- 10 Year Data retention
ONFI 1.0 COMFLIANT COMMAND SET
ELECTRICAL SIGNATURE
- Munufacture ID: ADh
- Device ID
3. TECHNICAL BRIEF
- 41 -
Figure 3.7.1. Wi-Fi BLOCK DIAGRAM
3.7 Wi-Fi Module(MT5931, U203)
3. TECHNICAL BRIEF
42 / 149
MT5931 is Wi-Fi device which includes.
-802.11 b/g/n
-PA
-LNA
-TR-Switch
MT5931 provides the best and most convenient connectivity functions. MT5931 implements advanced
and sophisticated Radio Coexistence algorithms and hardware mechanisms. Enhanced overall quality for
simultaneous voice, data, and audio/video transmission on mobile phone and Tablet PC be achieved.
The small package size with low power consumption reduces PCB layout area.
3.7 Wi-Fi Module(MT5931, U203)
MT5931 is Wi-Fi device which includes.
- 802.11 b/g/n
- PA
- LNA
-TR-Switch
MT5931 provides the best and most convenient connectivity functions. MT5931 implements advanced and sophisticated
Radio Coexistence algorithms and hardware mechanisms. Enhanced overall quality for simultaneous voice, data,
and audio/video transmission on mobile phone and Tablet PC be achieved. The small package size with low power
consumption reduces PCB layout area.
Figure 3.7.1. Wi-Fi BLOCK DIAGRAM
SDIO
eHPI
Data
Bufer
MAC
BB
AFE / RF
PA
LNA
Arbiter
T/R
Switch
RISC
Core
EEPROM
I-Cache
D-Cache
3. TECHNICAL BRIEF
- 42 -
3.7.1 Feature
* General description
- Embedded RISC Core fore better system level management
- Coexistence : IEEE 802.15.2 external three-wire coexistence scheme to support additional wireless technologies such as
3G,GPS and Wi-MAX
- Self Calibration
- Integrated switching regulator enables direct connection to battery
- Best-In-class current consumption performance
- Intelligent BT/WLAN coexistence scheme that goes beyond PTA signaling(for example, transmit window and duration
that take into account of protocol exchange sequence, frequency, etc.)
- TFBGA(5.15.3)(C333)
- 802.11 d/h/k compliant
- Security : WFA WPA/WP/A2 personal, WPS2.0,WAPI (Hardware)
- QoS : WFA WMM, WMM PS
- Support 802.11n optional features : STBC, A-MPDU, Blk-Ack, RIFS, MCS Feedback, 20/40MHz coexistence(PCO),unschedu
led PSMP
- Support 802.11w Protected Managed Frames Support Wi-Fi Direct
- Interface : SDIO 2.0 (4-bit & 1-bit), SPI,EHPI-8/16(TFBGA only)
- Per packet Tx power control
3. TECHNICAL BRIEF
- 43 -
Figure 3.7.2. WiFi CIRCUIT DIAGRAM
4.7u C214
4.7u
C277
L231
2.2n
12p
C19
C274
15p
D
S
B
T
P
T
R
2
0
1
0
A
N
T
2
2
1
FE
E
D
G
N
D
100p
C276
2.2u
C20
10p
C21
18p
C22
PALDO_3V3
49.9
R9
X202 1XTW26000FAA
26MHz
2 1
3 4
VCC OUT
GND1 GND2
C18
1u
FL203
3
2
1
IN
G
N
D OUT
U206
K1
F7
F6
G
7
G
6
D9
D7
D6
C9
A10
A
5
E
5
C
5
B
3
A
4
A
3
C
3
A
2
B
1
A
1
B
5
J4
K4
E3
G3
G2
G1
J2
H2
K2
J1
J3
H3
H7
K9
J9
D1
D2
E8
E9
E6
E7
F10
F4
F8
G9
J8
K8
E2
H8
B8
C6
B9
A7
F9
D4
D3
C2
E10
A8
D10
A9
A6
C10
B10
H
4
H
5
H
6
K
6
J
5
J
6
F
2
F
3
G
1
0
H
9
H
1
0
J
1
0
C
1
G
4
K
1
0
K
7
J
7
H
1
E
1
F
S
O
U
R
C
E
D
V
D
D
IO
3
D
V
D
D
IO
2
D
V
D
D
IO
1
D
V
D
D
IO
0
P
A
D
_
V
D
D
K
1
C
L
D
O
U
A
R
T
_
D
B
G
_
T
X
U
A
R
T
_
D
B
G
_
R
X
G
P
IO
_
1
G
P
IO
_
0
C
S
_
N
W
E
_
N
D
1
5
D
1
4
D
1
3
D
1
2
D
1
1
D
1
0
TRX_IO_P
TRX_IO_N
AVDD33_XO
AVDD33_TX
AVDD16_TRX
AVDD16_SX
AVDD16_LF
AVDD16_CLDO
AVDDRTC
AVSSRTC
OSC_EN
OSC_IN
AVSS33_PA3
AVSS16_WF1
AVSS16_VCO
EXT_INT_B
WIFI_INT_B
ANTSEL_0
ANTSEL_1
ANTSEL_2
ANTSEL_3
CGND1
PAD_ICAL_EXTR
TRXIN
TRXIP
TRXQN
TRXQP
X32K_OUT
X32K_IN
XTEST
SYSRST_B
BT_PRI
D0
D1
A0
D3
D2
OE_N
D4
D5
D6
D7
D8
D9
P
A
D
_
E
N
R
E
F
G
N
D
_
R
E
F
A
V
D
D
4
3
_
R
E
F
O
U
T
_
F
B
L
X
B
K
A
V
D
D
4
3
_
S
M
P
S
A
G
N
D
4
3
_
S
M
P
S
G
N
D
_
P
A
L
D
O
P
A
L
D
O
_
F
B
P
A
L
D
O
AVSS33_PA1
AVSS33_PA2
AVSS16_WF2
AVSS16_WF3
AVSS16_WF4
P
A
D
_
V
D
D
K
2
P
A
D
_
V
D
D
K
3
CGND2
CGND3
CGND4
PALDO_3V3
1.8p
C299
0.1u
C245
PALDO_3V3
C278
DNI
C298
DNI
100K
R252
C295
1u
TP202
VBAT
C270
4.7u
SMPSLDO_1V6
VBAT
R254
24K
VIO_2V8
100K
R255
TP200
TP201
1u
C244
1u
C246
1u
C247
VIO_2V8
VMEM_1V8
49.9
R253
0.1u C232
10p C229
C227 1u
0.1u C226
1n C223
10K
R270
C243
2.2u
1p
C1321
FL204
3
1
2
4
B/P_2
B/P_1
Gnd/DC_fd
UnB/P
C228 0.1u
1M
R263
C239
1u
VRTC_2V8
SMPSLDO_1V6
PALDO_3V3
0.1u
C221
L225
2.2u
FB200
120
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[00]
LCD_RS
LCD_RD_N
LCD_WR_N
WIFI_32K
WiFi_CS
WiFi_RST
WiFi_EN
WIFI_INT
BT_PRI
Star connection
MT5931 WIFI
3. TECHNICAL BRIEF
- 44 -
Figure 3.8.21SIM Interface block diagram
3.8 SIM Card Interface
The Main Base Band Processor(MT6236) contains two dedicated smart card interfaces to allow the MCU to access the two
SIM cards. Each interface can operator via 5 terminals. As shown is the Figure 3.8.2, SIMVCC, SIMSEL, SIMRST, SIMCLK and
SIMDATA are for one SIM interface, while SIM2VEE, SIM2SEL, SIM2RST, SIM2CLK and SIM2DATA are for the other one.
The functions of the two SIM interfaces are identical. And C333 support only single-SIM. therefore, only frst SIM interface
will be described in this document. The VSIM is used to control the external voltage supply to the SIM card and SIM SEL
determines the regulated smart card supply voltage. SIMRST is used as the SIM card reset signal. Besides, SIMDATA and
SIMCLK are used for data exchange purpose.
C333 is using U202 as SIM controller to be able to use triple SIM.
3. TECHNICAL BRIEF
- 45 -
J300
C11 C10
C12 C9
C7 C3
C6 C2
C5 C1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VA306 VA307 VA308
VSIM_1
C300
DNI
C301
DNI
DNI
C302
R304
DNI
SIM_1_RST
SIM_1_CLK SIM_1_DATA
Figure 3.8.2 SIM Connector Circuit Diagram
TP3
TP4
TP2
TP1
1u
C3 C2
1u
C1
1u 2.2u
C9
2.2u
C8
VSIM_1 VSIM_2
VBAT
VIO_2V8
U
1
14
13
12
11
10
9
8
15 7
16
6
17
5
18
4 1
9
3
20
2
21
1
22
2
3
24
25
26
27
28
2
9
G
N
D
SIO2/GPIO6
VSIM3
SIO3/GPIO9
SRST3/GPIO8
SCLK3/GPIO7
S
Y
S
R
S
T
B
SDA
SRST2/GPIO5
SCL
SCLK2/GPIO4
CE0
VSIM2
V
I
O
V
B
A
T
SIMIO2/GPI18
VSIM1
SIMRST2/GPI17
SCLK1/GPIO1
SIMCLK2/GPI16
SRST1/GPIO2 SIMCLK1/GPI13
SIO1/GPIO3
VSIM4
SCLK4/GPIO10
SRST4/GPIO11
SIO4/GPIO12
SIMIO1/GPI15
SIMRST1/GPI14
RST_N
SIM_1_RST
SIM_1_CLK
SIM_1_DATA
SIM_2_RST
SIM_2_CLK
SIM_2_DATA
SIM_1_2_CLK
SIM_1_2_DATA
SIM_1_2_RST
I2C_SCL3
I2C_SDA3
J301
C11 C10
C12 C9
C7 C3
C6 C2
C5 C1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VA309 VA310
VA311
C314
DNI DNI
C313 C312
DNI
VSIM_2
DNI
R305
SIM_2_RST
J700
C11 C10
C12 C9
C7 C3
C6 C2
C5 C1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VSIM_3
SIM_3_CLK
SIM_3_RST
SIM_3_DATA
3. TECHNICAL BRIEF
- 46 -
/ 131
3.8.1 Dual SIM controller(MT6306, U202)
General Description
The MT6306 is a SIM card / GPIO control chip optimized for GSM handsets, especially those based on the
MediaTek MT62xx system solution. It supports up to four SIM interfaces or 12 GPIOs plus six GPIs. Each SIM
interface can be individually programmed as GPIOs. The SIM interface supports both 1.8V and 3V SIM
cards. An I2C interface is used to control SIM channel individually.
The MT6306 is available in 28-pin 4mm x 4mm QFN package. The operating temperature range is from -
25C to +85C.
Features
Control and communication through an I2C interface with baseband processor.
Independent 1.8V/3V VCC control for each SIM card
Power management and control for quad SIM cards
Independent clock stop mode (at high or low level) for each SIM card
Programmable SIM interface pins (can be SIM interface pins or GPIO pins)
Compatible with MediaTek baseband processor chips, MT6252, MT6253, MT6235, MT6236, etc.
28-Pin 4mm x 4mm QFN Package
Figure 3.8.3 SIM Controller block diagram
3. TECHNICAL BRIEF
47
Figure 3.8.3 SIM Controller block diagram
3.8.1 Dual SIM controller(MT6306, U202)
General Description
The MT6306 is a SIM card / GPIO control chip optimized for GSM handsets, especially those based on the MediaTek
MT62xx system solution. It supports up to four SIM interfaces or 12 GPIOs plus six GPIs. Each SIM interface can be
individually programmed as GPIOs. The SIM interface supports both 1.8V and 3V SIM cards. An I2C interface is used
to control SIM channel individually. The MT6306 is available in 28-pin 4mm x 4mm QFN package. The operating
temperature range is from -25C to +85C.
Features
Control and communication through an I2C interface with baseband processor. Independent 1.8V/3V VCC control for
each SIM card Power management and control for quad SIM cards Independent clock stop mode (at high or low level)
for each SIM card Programmable SIM interface pins (can be SIM interface pins or GPIO pins) Compatible with MediaTek
baseband processor chips, MT6252, MT6253, MT6235, MT6236, etc. 28-Pin 4mm x 4mm QFN Package.
3. TECHNICAL BRIEF
- 47 -
VMC_3V3_LDO
CN701
14
13
12
11
10
8
7
6
5
4
3
2
1
9
SW1
SW2
MSD_CLK
MSD_D[1]
MSD_D[0]
MSD_D[2]
MSD_D[3]
MSD_DET_N
MSD_CMD
u-SD CARD
Figure 3.9.1 Micro-SD Card Interface
3.9 Micro-SD Card Interface
3. TECHNICAL BRIEF
- 48 -
3.9.1 Pin Assignment
Since the controller can only be configured as either the host of Memory Stick or the host of SD/MMC Memory
Card at one time, pins for Memory Stick and SD/MMC Memory Card are shared in order to save pin counts. The
following lists pins required for Memory Stick and SD/MMD Memory Card. Figure 3.9.2 shows how they are
shared. In Table 3.9.1, all I/O pads have embedded both pull up and pull down resistor because they are
shared by both the Memory Stick and SD/MMC Memory Card. Pins 2,4,5,8 are only useful for SD/MMC
Memory Card. Pull down resistor for these pins can be used for power saving. All embedded pull-up and pull-
down resistors can be disabled by programming the corresponding control registers if optimal pull-up or
pull-down resistor are required on the system board. The pin VDDPD is used for power saving. Power for
Memory Stick or SD/MMC Memory Card can be shut down by programming the corresponding control
register. The pin WP(Write Protection) is only valid when the controller is configured for SD/MMC Memory
Card. It is used to detect the status of Write Protection Switch on SD/MMC Memory Card.
Table 3.9.1 Sharing of pins for Memory Stick and SD/MMC Memory Card controller
3. TECHNICAL BRIEF
49 / 149
No Name Type MMC SD MS MSPRO Description
1 SD_CLK O CLK CLK SCLK SCLK Clock
2 SD_DATA3 I/O/PP CD/DAT3 DAT3 Data Line [Bit 3]
3 SD_DATA0 I/O/PP DAT0 DAT0 SDIO DAT0 Data Line [Bit 0]
4 SD_DATA1 I/O/PP DAT1 DAT1 Data Line [Bit 1]
5 SD_DATA2 I/O/PP DAT2 DAT2 Data Line [Bit 2]
6 SD_CMD I/O/PP CMD CMD BS BS Connand or Bus State
7 SD_PWRON O VDD ON/OFF
8 SD_WP I Write Protection Switch in SD
9 SD_INS I VSS2 VSS2 INS INS Card Detection
Table 3.9.1 Sharing of pins for Memory Stick and SD/MMC Memory Card controller
3. TECHNICAL BRIEF
- 49 -
3.9.2 Card Detection
For SD/MMC Memory Card, detection of card insertion/removal by hardware is also supported.
Because a pull down resistor with about 470 Kresistance which is impractical to embed in an I/O pad is
needed on the signal CD/DAT3, and it has to be capable of being connected or disconnected dynamically onto
the signal CD during initialization period, an additional I/O pad is needed to switch on/off the pull down
resistor on the system board. The scenario of card detection for SD/MMC Memory Card is shown in Figure 3.9.2.
Before SD/MMD Memory Card is inserted or powered on, SW1 and SW2 shall be opened for card detection of
the host side. Meanwhile, pull down resistor R
CD
on system board shall attach onto the signal CD/DAT3 by the
output signal RCDEN. In addition, SW3 on the card is default to be closed. Upon insertion of SD/MMC Memory
Card the signal CD/DAT3 will have a transition from low to high. If SD/MMC Memory Card is removed then the
signal CD/DAT3 will return to logic low. After the card identification process, pull down resistor R
CD
on system
board shall disconnect with the signal CD/DAT3 and SW3 on the card shall be opened for normal operation.
Since the scheme above needs a mechanical switch such as a relay on system board, it is not ideal enough.
Thus, a dedicated pin INS is used to perform card insertion and removal for SD/MMC. The pin INS will
connect to the pin VSS2 of a SD/MMC connector.
Figure 3.9.2 Card Detection for SD/MMC Memory Card
3. TECHNICAL BRIEF
50 / 149
Figure 3.9.2 Card Detection for SD/MMC Memory Card
HOST CARD
R
PU
SW1
R
PD
SW2
O
u
t
p
u
t

e
n
a
b
l
e
DAT3 OUT
CD/DAT3 IN
PAD
PAD
O
u
t
p
u
t

e
n
a
b
l
e
10-90K
SW3
470Kohm
RCDEN
3. TECHNICAL BRIEF
- 50 -
Figure 3.10.1 LCD Interface
3.10 LCD Interface
MT6236 contains a versatile LCD controller which is optimized for multimedia applications.
This controller supports many types of LCD modules and contains a rich feature set to enhance the functionality.
These features are:
Up to 320 x 480 resolution
The internal frame buffer supports 8bpp indexed color, RGB 565, RGB 888, ARGB 8888, PARGB 8888
and YUYV422 format.
Supports 8-bpp (RGB332), 12-bpp (RGB444), 16-bpp (RGB565), 18-bpp (RGB666) and 24-bpp (RGB888)
LCD modules.
4 Layers Overlay with individual color depth, window size, vertical and horizontal offset, source key,
alpha value and display rotation control(90,180, 270, mirror and mirror then 90, 180 and 270)
One Color Look-Up Table
Three Gamma Correction Tables
For parallel LCD modules, the LCD controller can reuse external memory interface or use dedicated 16/18-bit
parallel interface to access them and 8080 type interface is supported. It can transfer the display data from the
internal SRAM or external SRAM/Flash Memory to the off-chip LCD modules.
For serial LCD modules, this interface performs parallel to serial conversion and both 8- and 9- bit serial interface
is supported. The 8-bit serial interface uses four pins LSCE#, LSDA, LSCK and LSA0 to enter commands and
data.
Meanwhile, the 9-bit serial interface uses three pins LSCE#, LSDA and LSCK for the same purpose. Data read
is not available with the serial interface and data entered must be 8 bit.
3. TECHNICAL BRIEF
51 / 149
3.10 LCD Interface
Figure 3.10.1 LCD Interface
VA314 VA315
VA316 VA300 VA317
25pF
FL302
1
05
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G
1
G
2
1u
C310
100K
R311
25pF
FL300
1
0 5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G
1
G
2
1u
C311
VIO_2V8 VMEM_1V8
R300
100
FL301
25pF
1
05
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G
1
G
2
VBAT
C336
2.2u
CN300
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[00]
LCD_RS
LCD_RD_N
LCD_VSYN
LCD_ID
BLED_CA0
BLED_CA1
BLED_CA2
BLED_CA3
LCD_CS_N
LCD_RST_N
LCD_WR_N
3. TECHNICAL BRIEF
- 51 -
The RT9396 is a power management IC (PMIC) for backlighting and phone camera applications. The PMIC
contains a 6-Channel charge pump white LED driver and four low dropout linear regulators.
The charge pump drives up to 6 white LEDs with regulated constant current for uniform intensity. Each
channel (LED1 to LED6) supports up to 25mA of current. These 6-Channels can be also programmed as 4 plus
2-Channels or 5 plus 1-Channels with different current setting for auxiliary LED application. The RT9396
maintains highest efficiency by utilizing a x1/ x1.5/ x2 fractional charge pump and low dropout current
regulators. An internal 6-bit DAC is used for backlight brightness control. Users can easily configure up to 64-
steps of LED current via the I2C interface control.
The RT9396 also comprises low noise, low dropout regulators, which provide up to 200mA of current for each
of the four channels. The four LDOs deliver 3% output accuracy and low dropout voltage of 200mV @ 200mA.
Users can easily configure LDO output voltage via the I2C interface control. The LDOs also provide current
limiting and over-temperature functions. The RT9396 is available in a WQFN-24L 3x3 package.
Figure 3.10.2 Charge Pump CIRCUIT DIAGRAM
3. TECHNICAL BRIEF
52 / 149
1K
R310
2.2u
C337
VCAM_1V2
2.2u
C332
DNI
C324
DNI
C325
2.2u
C334
VIO_2V8
VBAT
C331 1u 1u C330
2.2u
C333
VHP_MIC_2V6
C328
1u
C329
33p DNI
C326
DNI
C327
U302
2
1
20
19
18
8
7
6
5
9
4
10
3 1
1
2
1
2
1
13
1
4
15
16
17
LED3
LED4
NC2 L
D
O
2
AVIN
C
1
N
L
D
O
1
C
2
N
A
G
N
D
P
G
N
D
NC1
C
2
P
ENA
C
1
P
PVIN
SCL
SDA
LED2
LED1
VOUT
S
L
U
G
_
G
I2C_SCL1
I2C_SDA1
BLED_CA0
BLED_CA1
BLED_CA2
BLED_CA3
3. TECHNICAL BRIEF
- 52 -
3.11 Battery Charger Interface
Figure 3.11.1 BATTERY CHARGER BLOCK
The RT9524 is a fully integrated single-cell Li-Ion battery charger IC ideal for portable applications. The RT9524
optimizes the charging task by using a control algorithm including pre-charge mode, fast charge mode and
constant voltage mode. The input voltage range of the VIN pin can be as high as 30V. When the input voltage
exceeds the OVP threshold, it will turn off the charging MOSFET to avoid overheating of the chip.
In RT9524, the maximum charging current can be programmed with an external resister. For the USB
application, user can set the current to 100mA/500mA through EN/SET pin. For the factory mode, the RT9524
can allow 4.2V/2.3A power pass through to support system operation. It also provides a 50mA LDO to support
the power of peripheral circuit. The internal thermal feedback circuit regulates the die temperature to
optimize the charge rate for all ambient temperatures. The RT9524 provides protection functions such as
under voltage protection, over voltage protection for VIN supply and thermal protection for battery
temperature.
The RT9524 is available in a WDFN-10L 2x3 package to achieve optimized solution for PCB space and thermal
considerations.
3.11 Battery Charger Interface
3. TECHNICAL BRIEF
53 / 149
U500
6 5
7 4
8 3
9 2
10 1
11
PGND
VIN BATT
ISET PGB
GND1 CHGSB
LDO GND2
IEOC EN_SET
R
5
0
2
8
2
0
R536
DNI
0.1u
C504
100K
R504
VIO_2V8
VUSB_LDO_4V9
R503
3K
VBAT VBUS_USB
CHG_EN
EOC
(1%) (1%)
3. TECHNICAL BRIEF
- 53 -
3.12 Keypad Interface
Figure 3.12.1 MAIN KEY STRUCTURE
VA526
KB532
KB539 KB544 KB543
KB542 KB541 KB535 KB537
KB525
KB526
KB527
KB528
KB529
KB538 KB536
KB534 KB533
KB524
KB530 KB531
KB523 KB522 KB521
KB520
KB517 KB516
KB519 KB518 KB514 KB515
KB540
KB508 KB509 KB510 KB511 KB512 KB513 KB507
KB506 KB505 KB503 KB502 KB501 KB500 KB504
V
A
5
2
7
V
A
5
2
4
V
A
5
2
2
V
A
5
2
3
V
A
5
2
0
V
A
5
2
1
V
A
5
1
8
V
A
5
1
9
V
A
5
1
2
V
A
5
1
1
V
A
5
1
4
V
A
5
1
3
V
A
5
1
5
V
A
5
1
7
KB547 KB546
KB545
K
E
Y
_
R
O
W
1
KEY_COL5
K
E
Y
_
R
O
W
0
K
E
Y
_
R
O
W
2
K
E
Y
_
R
O
W
3
K
E
Y
_
R
O
W
4
KEY_COL0
KEY_COL1
KEY_COL3
KEY_COL4
END_KEY
K
E
Y
_
R
O
W
7
KEY_COL7
KEY_COL2
K
E
Y
_
R
O
W
5
UP RIGHT LEFT
OK
SPACE .(period)
DOWN Message/Lock SYM
LEFT SOFT RIGHT SOFT
SEND
@ Shift ENTER ,(comma)
M N B V C X Z
Fn Del L K J
End Key
H
END
G
WiFi
F D S A P O I
U Y T R E W Q
KEY MATRIX
CAMERA Dual SIM
3. TECHNICAL BRIEF
- 54 -
The keypad can be divided into two parts: one is the keypad interface including 8 columns and 8 rows with one
dedicated power-key, as shown in Figure 3.12.2; the other is the key detection block which provides key
pressed, key released and de-bounce mechanisms. Each time the key is pressed or released, i.e. something
different in the 8 x 8 matrix or power-key, the key detection block senses the change and recognizes if a key has
been pressed or released. Whenever the key status changes and is stable, a KEYPAD IRQ is issued. The MCU can
then read the key(s) pressed dlrectly ln KP_MLMl, KP_MLM2, KP_MLM3, KP_MLM4 and KP_MLM5 reglsters. To
ensure that the key pressed information is not missed, the status register in keypad is not read-cleared by APB
read command. The status register can only be changed by the key-pressed detection FSM.
Figure 3.12.2 8x8 matrix with one power-key
3. TECHNICAL BRIEF
55 / 149
Dedicated for Power-key (8x8 + one power-key) key matrix
ROW0
ROW1
ROW2
ROW3
ROW4
Baseband
PMIC integrated BB chip
COL1 COL2 COL3 COL4 COL5 COL6
PMIC
COL0 COL7 PWR_KEY
1 1 1 1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1
1
1
1
1
1
1
1
1
1
1
1
1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1
ROW5
ROW6
ROW7
Figure 3.12.2 8x8 matrix with one power-key
3. TECHNICAL BRIEF
- 55 -
Figure 3.12.4 Two keys pressed, case 1 (b) Two keys pressed, case 2
Figure 3.12.3 One key pressed with de-bounce mechanism denoted
This keypad can detect one or two key-pressed simultaneously with any combination. Figure 3.12.3 shows one
key pressed condition. Figure 3.12.4(a) and Figure 3.12.4(b) illustrate two keys pressed cases. Since the key
press detection depends on the HIGH or LOW level of the external keypad interface, if keys are pressed at the
same time and there exists a key that is on the same column and the same row with the other keys, the
pressed key cannot be correctly decoded. For example, if there are three key presses: key1 = (x1, y1), key2 =
(x2, y2), and key3 = (x1, y2), then both key3 and key4 = (x2, y1) are detected, and therefore they cannot be
distinguished correctly. Hence, the keypad can detect only one or two keys pressed simultaneously at any
combination. More than two keys pressed simultaneously in a specific pattern retrieve the wrong information.
3. TECHNICAL BRIEF
56 / 149

Key-pressed Status
De-bounce time
De-bounce time
Key Pressed
KP_IRQ
KEY_PRESS_IRQ KEY_RELEASE_IRQ
Key1 pressed
Key2 pressed
Status
IRQ
Key1 pressed Key2 pressed Key1 released Key2 released
Key1 pressed
Key2 pressed
Status
IRQ
( a)
( b)
Key1 pressed
Key2 pressed
Status
IRQ
Key1 pressed
Key2 pressed
Status
IRQ
( a)
( b)
Figure 3.12.3 One key pressed with de-bounce mechanism denoted
Figure 3.12.4 Two keys pressed, case 1 (b) Two keys pressed, case 2
3. TECHNICAL BRIEF
- 56 -
Figure 3.13.1 Block diagram of audio front end
The audio front-end essentially consists of voice and audio data paths. Figure 3.13.1 shows the block diagram
of the audio front-end. All voice band data paths comply with the GSM 03.50 specification. Mono hands-free
audio or external FM radio playback paths are also provided. The audio stereo path facilitates CD-quality
playback, external FM radio, and voice playback through a headset.
Figure 3.13.2 shows the digital circuits block diagram of the audio front-end. The APB register block is an APB
peripheral that stores settings from the MCU. The DSP audio port (DAP) block interfaces with the DSP for
control and data communications. The digital filter block performs filter operations for voice band and audio
band signal processing. The Digital Audio Interface (DAI) block communicates with the System Simulator for
FTA or external Bluetooth modules.
3.13 Audio Front-End
3. TECHNICAL BRIEF
57 / 149
AU_MOUTR
AU_MOUTL
AU_OUT0_P
AU_OUT0_N
AU_FMINR
AU_FMINL
M
U
X
M
U
X
Stereo-
to-Mono
FM/AM radio
chip
Voice Signal
Stereo or Mono
Audio Signal
Voice Amp-0
Audio Amp-L
Audio Amp-R
AU_VIN0_P
AU_VIN0_N
AU_VIN1_N
AU_VIN1_P
M
U
X
Voice Signal
Audio
RCH-DAC
Audio
LCH-DAC
Voice
ADC
PGA
PGA ClassD
SPK1_P
SPK1_N
Voice Signal
Stereo or Mono
Audio Signal
The audio front-end essentially consists of voice and audio data paths. Figure 3.13.1 shows the block diagram
of the audio front-end. All voice band data paths comply with the GSM 03.50 specification. Mono hands-free
audio or external FM radio playback paths are also provided. The audio stereo path facilitates CD-quality
playback, external FM radio, and voice playback through a headset.
Figure 3.13.2 shows the digital circuits block diagram of the audio front-end. The APB register block is an APB
peripheral that stores settings from the MCU. The DSP audio port (DAP) block interfaces with the DSP for
control and data communications. The digital filter block performs filter operations for voice band and audio
band signal processing. The Digital Audio Interface (DAI) block communicates with the System Simulator for
FTA or external Bluetooth modules.
3. TECHNICAL BRIEF
57 / 149
3. TECHNICAL BRIEF
- 57 -
Figure 3.13.2 Block diagram of digital circuit of audio front end
To communicate with the external Bluetooth module, the master-mode PCM interface and master-mode
I2S/EIAJ interface are supported. The clock of PCM interface is 256 kHz while the frame sync is 8 kHz. Both long
sync and short sync interfaces are supported. The PCM interface can transmit 16-bit stereo or 32-bit mono 8 kHz
sampling rate voice signal. Figure 3.13.3 shows the timing diagram of the PCM interface. Note that the serial
data changes when the clock is rising and is latched when the clock is falling.
3. TECHNICAL BRIEF
58 / 149
3. TECHNICAL BRIEF
- 58 -
Figure 3.13.3 Timing diagram of Bluetooth application
I2S/EIAJ interface is designed to transmit high quality audio data. Figure 3.13.4 and Figure 3.13.5 illustrate
the timing diagram of the two types of interfaces. I2S/EIAJ can support 32 kHz, 44.1 kHz, and 48 kHz
sampling rate audio signals. The clock frequency of I2S/EIAJ can be 32(sampling frequency), or
64(sampling frequency). For example, to transmit a 44.1 kHz CD-quality music, the clock frequency should
be 32 44.1 kHz = 1.4112 MHz or 64 44.1 kHz = 2.8224 MHz.
I2S/EIAJ interface is not only used for Bluetooth module, but also for external DAC components. Audio data
can easily be sent to the external DAC through the I2S/EIAJ interface. In this document, the I2S/EIAJ interface
is referred to as EDI (External DAC Interface).
3. TECHNICAL BRIEF
59 / 149
3. TECHNICAL BRIEF
- 59 -
3.14 Camera Interface
Figure 3.14.1 Camera Interface
YACE5B1S99CC is a high quality 3mega-pixel single chip CMOS image sensor(CIS) for mobile phone camera
applications and digital still camera products.
YACE5B1S99C Cconsists of 2080x1568 effective pixels that meet with th 1/5 inch optical format, on-chip 10-bit
ADC, an image signal processor(ISP) and JPEG. Unique sensor technology enhances image quality by reducing
FPN (Fixed Pattern Noise), horizontal/vertical line noise, and random noise. The YACE5B1S99CC is MIPI CSI2-
compliant. The ISP performs sophisticated image processing function including color correction and enhance,
lens shading correction, edge enhancement, rgb gamma correction, flicker detect and correction, noise
reduction, auto focus(AF), auto white balance(AWB), auto exposure(AE), and image free scaling, color noise
correction and support several image effect
3.14 Camera Interface
3. TECHNICAL BRIEF
60 / 149
GB042-24S-H10-E3000
CN301
ENBY0034201
13 12
14 11
15 10
16 9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
1 R312
R313 1
C346
DNI
VCAMA_2V8
VCAM_2V8
VCAM_1V2
C
3
4
3
0
.
1
u
0
.
1
u
C
3
4
4
C
3
4
5
0
.
1
u
DNI
C347
VA312
VA313
FB303
600
FB304
600
FB305
600
I2C_SCL1
I2C_SDA1
CAM_RST_N
CAM_PWDN
CAM_DATA[0]
CAM_DATA[1]
CAM_DATA[2]
CAM_DATA[3]
CAM_DATA[4]
CAM_DATA[5]
CAM_DATA[6]
CAM_DATA[7]
CAM_PCLK
CAM_VSYNC
CAM_HSYNC
CAM_MCLK
3M_CAM
3. TECHNICAL BRIEF
- 60 -
3.14.1 FEATURES
Pixel Size: 1.4um X 1.4um
Efective Pixel Array Size : 2.912mm(H) x 2.1952mm(V) x 3.6467mm(D)
Efective resolution: 2048(H) x 1536(V), QXGA
Optical Format: 1/5 inch
Frame Rate: 30fps@HD/30fps@XGA
Power Supply: 2.8V for analog, 1.8~2.8V for I/O, and 1.2V for digital core
Power Consumption: 270mW @ QXGA
Operation Temperature: -
10bit ADC and PLL On-Chip
Master Clock: 48MHz(Max)
Output Format: YUV4:2:2(ITU-R.601), RGB565, JPEG, 8bit ITU-R.656-Like,
Embedded MCU for AE/AWB/AF
Support MIPI CSI2 Single lane data transmission
Color Correction
Noise reduction (Y-NR/C-NR/B-NR)
Lens Shading Correction
Contrast & Brightness, Color Saturation & Hue
Edge Enhancement
Continuous pseudo zoom
Programmable Gamma correction
Image Efect : Mono, Sepia, Solarization, Negative, Sketch, Embossing
Black Level Calibration
Automatic adjustment for various light conditions
Anti-Flicker (50Hz/60Hz) : Auto Cancellation and Manual mode ficker adjustment
Auto Exposure (AE) / Auto White Blance (AWB) / Auto Focus (AF)
JPEG on-the-fy compression with embedded JPEG fle size control (BRC)
JPEG image rotation support that need to macro rearrangement at host
Embedded SpeedTag for Fast JPEG management by Scalado SpeedView
Standard frame fake mode. Status lines embedded in frame footer
Support Analog Binning 2x2 and 1/2, 1/4 Sub- Sample mode
Host Interface : two-wire serial bus interface
On-Chip OTP memory to support Chip ID and DPC and LSC and correction module variation
3. TECHNICAL BRIEF
- 61 -
3.15 KEY BACLKLIGHT LED Interface
Figure 3.16.1 Key Backlight Block
3.15 KEY BACLKLIGHT LED Interface
Two built-in open-drain output switches drive the FLASH and Keypad LED in the handset. Each switch is
controlled by baseband with enable registers. The switch of keypad LED can sink 150mA. The switch of FLASH
can sink 300mA. And both the open-drain output switches are high impedance when disabled.
Current Sink (ISINK)
Five built-in current sinks output drive the backlight LED in the handset. Each current sink is controlled by
baseband with enable registers and provide six options for output current selection (4mA, 8mA, 12mA, 16mA,
20mA, 24mA) The current sink output are high impedance when disabled.
Backlight Driver (BL)
The backlight (BL) driver control is responsible for controlling the external boost DC/DC converter, which is
required to drive up to 6 white LEDS (2 legs, 3 in series or 1 leg, 6 in series). BLDRV connects to the gate of the
external MOSPLT, CS_8L senses the current flow through the MOSPLT, and P8_8L feeds the voltage drop on
ballast reslstor back to the PM|C for LLD llght lntenslty control. DC_Ov helps prevent the over-voltage of the
output.
3. TECHNICAL BRIEF
62 / 149
1u
C543
VA509 VA510
L
D
5
0
1
2
1
A
C
L
D
5
0
0
2
1
A
C
C501
1u
VBAT
KEY_BL0
KEY_BL1
3. TECHNICAL BRIEF
- 62 -
Figure 3.17.1 Vibrator Driver Block
3.16 Vibrator Interface
Vibrator is driven by MT6236.
VBAT is connected with + terminal of vibrator and terminal is connected with
v|8_N. |t ls controlled by v|8PATOP slgnal of MT6253 wlth 8 step functlon.
3. TECHNICAL BRIEF
63 / 149
3.16 Vibrator Interface
Vibrator is driven by MT6236.
VBAT is connected with + terminal of vibrator and terminal is connected with
VB_N. It is controlled by VIBRATOR sognal of MT6253 with 8 step function.
VA532
D
5
0
0
C512
1u
VBAT
VB500
2
1
VIB_N
MOTOR
4. TROUBLE SHOOTING
- 63 -
4. TROUBLE SHOOTING
4.1 RF Component
U206
X201
U1
U300
U100
U205
U215
U100 Main Chip (MT6236)
U215 TX Module (RF7180)
U206 WIFI (MT5931)
U205 GSM Transceiver (AD6548)
U300
Memory(2G/1G DDR)
H9DA2GH1GHMMMR-46M
X201 Crystal, 26MHz Clock
4. TROUBLE SHOOTING
- 64 -
4.2 RX Trouble
START
(1) Check
Crystal Circuit
HP8960 : Test mode
62 CH, 7 level setting (TCH)
62CH, -60dBm setting (BCCH)
Spectrum analyzer setting
Oscilloscope setting
(2) Check Mobile
SW &TX module
Re-download SW or
Do calibration again
(3) Check PLL Control
Figure 4.2.1 Rx CHECKING FLOW
4. TROUBLE SHOOTING
- 65 -
(1) Checking Crystal Circuit
26 MHz
O.K?
Replace TP1
No
Crystal is OK.
See next page to check PLL Circuit
Yes
Figure 4.2.2 CLOCK PLACEMENT
TP1
Figure 4.2.3 CHECKING DIAGRAM(CLOCK)
Figure 4.2.4 CIRCUIT DIAGRAM
Figure 4.2.5 26M CLOCK
TP1
U205
X201
X201
26MHz
DSX321G-26M
2 1
3 4
2.2K
R223
R225
2.2K
C272
1n
1K R228
82p
C250
C260
47p
U205
1
6
1
5
1
4
1
3
1
2
1
1
1
0 9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
2
5
2
6
2
7
2
8
2
9
3
0
3
1
3
2
3
3
G
N
D
R
X
8
5
0
R
X
8
5
0
B
R
X
9
0
0
R
X
9
0
0
B
R
X
1
8
0
0
R
X
1
8
0
0
B
R
X
1
9
0
0
R
X
1
9
0
0
B
VCC_FE VCC_BBQ
I Q
IB QB
VCC_BBI REF_OP
SDATA REFIN
SCLK REFINB
SEN VAFC_NC
NC VCC_REF
V
L
D
O
3
T
X
O
P
_
L
O
T
X
O
P
_
H
I
V
C
C
_
T
X
V
C
O
V
D
D
V
B
A
T
V
L
D
O
1
V
L
D
O
2
RF_QN
RF_QP
CLK_26M
RF_AFC
TP1
4. TROUBLE SHOOTING
- 66 -
(2) Checking Mobile SW &Tx module
Figure 4.2.6 RF COMPONENT PLACEMETS
VBAT
RF_ANT_SW2
RF_ANT_SW1
RF_PA_EN
Figure 4.2.7 tranceiver circuit diagram Figure 4.2.8 Tx module circuit diagram
TP6
TP7
TP8
U215
TP9
TP10 TP1
SW201
TP4
TP3
TP5
TP2
Figure 4.2.9 Tx Control signal(EGSM)
2.2K
R222
2.2K
R224
C260
47p
82p
C249
VBAT
U205
1
6
1
5
1
4
1
3
1
2
1
1
1
0 9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
2
5
2
6
2
7
2
8
2
9
3
0
3
1
3
2
3
3
G
N
D
R
X
8
5
0
R
X
8
5
0
B
R
X
9
0
0
R
X
9
0
0
B
R
X
1
8
0
0
R
X
1
8
0
0
B
R
X
1
9
0
0
R
X
1
9
0
0
B
VCC_FE VCC_BBQ
I Q
IB QB
VCC_BBI REF_OP
SDATA REFIN
SCLK REFINB
SEN VAFC_NC
NC VCC_REF
V
L
D
O
3
T
X
O
P
_
L
O
T
X
O
P
_
H
I
V
C
C
_
T
X
V
C
O
V
D
D
V
B
A
T
V
L
D
O
1
V
L
D
O
2
RF_S_EN
RF_S_DATA
RF_S_CLK
RF_IN
RF_IP
TP6
TP7
TP8
TP1
TP2
TP3
TP5
TP10 TP9
4.7p C1322
22p C283
C284
100p
C280 6p
22u C282
100p C288
C289 100p
C1327
DNI
VBAT
C1326
DNI
L228
3.3n
L229
3.3n
1.2p
C1325
C287
220p 100p
C285
U215
12
1110987
13
6
14
5
15
4
16
3
17
2
18
1
1920212223
G
N
D
_S
LU
G
V
R
A
M
P
T
X
_E
N
A
B
LE
G
P
C
T
R
L0
G
P
C
T
R
L1
GND1
V
B
A
T
T
GND2
NC3
RFIN_LB
GND9
GND3
GND8
RFIN_HB
ANT
GND4
NC2
G
N
D
5
G
N
D
6
G
N
D
7
N
C
1
R
X
0
RX1
C291
22p
C29033p
22p
C286
R282
180
R288
24K
R281
10K
R284
180
R283
30
C293
33p
R286
24
220
R287
220
R285
SW201
G2
ANT RF
G1
RF_TX_RAMP
LowBand_Tx
HighBand_Tx
L
o
w
B
a
n
d
_
R
x
H
ig
h
B
a
n
d
_
R
x
RF_ANT_SW2
RF_PA_EN
RF_ANT_SW1
ANT_FEED
TP4
4. TROUBLE SHOOTING
- 67 -
Check TP1 of SW201
TP1 Signal is OK? Replace Mobile SW (SW201)
Yes
Check TP2 of U202
Control Signal
is (TP6,7,8)
OK ?
Yes
No
Mobile SW & TX Module is OK.
TP9(Low Band), TP10(high Band)
Signal is OK ?
Check MT6236(U100)
No
Yes
Replace TX module (U215)
Of 0 0 0
RX 0 0 1 0
RX 1 0 1 1
GSM850/900 TX Mode 1 1 0
Figure 4.2.10 Rx CHECKING FLOW_1
4. TROUBLE SHOOTING
- 68 -
4.3 TX Trouble
START
(1) Check
Crystal Circuit
HP8960 : Test mode
62 CH, 7 level setting (TCH)
62CH, -60dBm setting (BCCH)
Spectrum analyzer setting
Oscilloscope setting
(2) Check
Mobile SW &Tx module
Re-download SW or
Do calibration again
(3) Check PLL Control
Figure 4.3.1 Tx CHECKING FLOW
4. TROUBLE SHOOTING
- 69 -
(1) Checking Crystal Circuit
26 MHz
O.K?
Replace TP1
No
Crystal is OK.
See next page to check PLL Circuit
Yes
Figure 4.2.2 CLOCK PLACEMENT
TP1
Figure 4.2.3 CHECKING DIAGRAM(CLOCK)
Figure 4.3.4 CIRCUIT DIAGRAM
TP1
U205
X201
X201
26MHz
DSX321G-26M
2 1
3 4
2.2K
R223
R225
2.2K
C272
1n
1K R228
82p
C250
C260
47p
U205
1
6
1
5
1
4
1
3
1
2
1
1
1
0 9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
2
5
2
6
2
7
2
8
2
9
3
0
3
1
3
2
3
3
G
N
D
R
X
8
5
0
R
X
8
5
0
B
R
X
9
0
0
R
X
9
0
0
B
R
X
1
8
0
0
R
X
1
8
0
0
B
R
X
1
9
0
0
R
X
1
9
0
0
B
VCC_FE VCC_BBQ
I Q
IB QB
VCC_BBI REF_OP
SDATA REFIN
SCLK REFINB
SEN VAFC_NC
NC VCC_REF
V
L
D
O
3
T
X
O
P
_
L
O
T
X
O
P
_
H
I
V
C
C
_
T
X
V
C
O
V
D
D
V
B
A
T
V
L
D
O
1
V
L
D
O
2
RF_QN
RF_QP
CLK_26M
RF_AFC
TP1
4. TROUBLE SHOOTING
- 70 -
(2) Checking Mobile SW &Tx module
Figure 4.3.6 RF COMPONENT PLACEMETS
VBAT
RF_ANT_SW2
RF_ANT_SW1
RF_PA_EN
Figure 4.3.7 circuit diagram tranceiver Figure 4.3.8 circuit diagram Tx module
Figure 4.3.9 Tx control signal(EGSM)
TP6
TP7
TP8
U215
TP9
TP10 TP1
SW201
TP4
TP3
TP5
TP2
TP11
TP12
TP13
2.2K
R222
2.2K
R224
C260
47p
82p
C249
VBAT
U205
1
6
1
5
1
4
1
3
1
2
1
1
1
0 9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
2
5
2
6
2
7
2
8
2
9
3
0
3
1
3
2
3
3
G
N
D
R
X
8
5
0
R
X
8
5
0
B
R
X
9
0
0
R
X
9
0
0
B
R
X
1
8
0
0
R
X
1
8
0
0
B
R
X
1
9
0
0
R
X
1
9
0
0
B
VCC_FE VCC_BBQ
I Q
IB QB
VCC_BBI REF_OP
SDATA REFIN
SCLK REFINB
SEN VAFC_NC
NC VCC_REF
V
L
D
O
3
T
X
O
P
_
L
O
T
X
O
P
_
H
I
V
C
C
_
T
X
V
C
O
V
D
D
V
B
A
T
V
L
D
O
1
V
L
D
O
2
RF_S_EN
RF_S_DATA
RF_S_CLK
RF_IN
RF_IP
TP6
TP7
TP8
TP1
TP2
TP3
TP5
TP10 TP9
4.7p C1322
22p C283
C284
100p
C280 6p
22u C282
100p C288
C289 100p
C1327
DNI
VBAT
C1326
DNI
L228
3.3n
L229
3.3n
1.2p
C1325
C287
220p 100p
C285
U215
12
1110987
13
6
14
5
15
4
16
3
17
2
18
1
1920212223
G
N
D
_S
LU
G
V
R
A
M
P
T
X
_E
N
A
B
LE
G
P
C
T
R
L0
G
P
C
T
R
L1
GND1
V
B
A
T
T
GND2
NC3
RFIN_LB
GND9
GND3
GND8
RFIN_HB
ANT
GND4
NC2
G
N
D
5
G
N
D
6
G
N
D
7
N
C
1
R
X
0
RX1
C291
22p
C29033p
22p
C286
R282
180
R288
24K
R281
10K
R284
180
R283
30
C293
33p
R286
24
220
R287
220
R285
SW201
G2
ANT RF
G1
RF_TX_RAMP
LowBand_Tx
HighBand_Tx
L
o
w
B
a
n
d
_
R
x
H
ig
h
B
a
n
d
_
R
x
RF_ANT_SW2
RF_PA_EN
RF_ANT_SW1
ANT_FEED
TP4
TP11
TP12
TP13
4. TROUBLE SHOOTING
- 71 -
Of 0 0 0
RX 0 0 1 0
RX 1 0 1 1
GSM850/900 TX Mode 1 1 0
Check TP2 & TP3
Control Signal is (TP6,7,8) OK ? Check MT6236 (U100)
Check TP1
TP1 Signal is OK?
Yes
No
Mobile SW & TX module is OK.
TP13 signal same as TP1?
Replace TX module (U215)
Replace SW201
TP11(High Band), TP12(Low Band)
Signal is OK ?
Yes
Replace MT6236 (U100)
Yes
Yes
No
No
No
Figure 4.3.10 Tx CHECKING FLOW_1
4. TROUBLE SHOOTING
- 72 -
4.4 Power On Trouble
Figure 4.4.1 Power ON Test Point
Figure 4.4.2
TP1
C1
B3
C2
RESETB
PWRKEY
1K R101
RST_N
END_KEY
DVDD28(VIO)
TP1
4. TROUBLE SHOOTING
- 73 -
Figure 4.4.3 Power Circuit
1u C130
51K
R116
V
1
3
V
1
2
T
1
5
T
1
4
T
1
3
T
1
2
T
1
1
Y
1
9
T
1
8
T
1
7
P
1
8
L
1
9
L
1
8
K
8
K
1
2
K
1
0
J
1
5
K18
J23
K20
H23
L22
M19
K22
M18
K21
K23
L21
H24
L20
K24
L24
U1
B1
D5
A3
B5
D6
E8
D8
E9
C10
A8
G3
D9
A7
E11
D11
A12
B11
F11
C12
F10
A9
A10
C6
G4
H6
J5
F1
G5
D3
E2
B2
G8
C3
G7
C1
B3
C2
F7
F5
G10
F9
A2
C5
SCLK2
SIO2
SRST2
SCLK
SIO
SRST
RESETB
PWRKEY
VCDT
PMU_TESTMODE
ISENSE
BATON
VDRV
VREF
BATSNS
VRF_S
VRF
VTCXO
VCAMA
VCAMA_S
VCAMD
BST_LX
BXT_OUT
ISINK4
ISINK3
ISINK2
ISINK1
ISINK0
KP_LED
FLASH_SW
VCORE
VCORE_FB
VA
VM
VM_FB
VBT
VIBR
VMC
VUSB
VIO
VSIM
VSIM2
CHR_LDO
SYSCLK
EINT0
EINT1
EINT2
EINT3
EINT4
EINT5
EINT6
URXD2
UTXD2
URXD3
UTXD3
IRDA_TXD
IRDA_RXD
IRDA_PDN
V
D
D
K
1
V
D
D
K
2
V
D
D
K
3
V
D
D
K
4
V
D
D
K
5
V
D
D
K
6
V
D
D
K
7
V
D
D
K
8
V
D
D
K
9
V
D
D
K
1
0
V
D
D
K
1
1
D
V
D
D
_
C
A
M
D
V
D
D
_
E
M
I
_
1
D
V
D
D
_
E
M
I
_
2
D
V
D
D
_
E
M
I
_
3
D
V
D
D
_
E
M
I
_
4
D
V
D
D
_
E
M
I
_
5
D
V
D
D
_
E
M
I
_
6
D
V
D
D
_
E
M
I
_
7
C134
2.2u
VCAM_2V8
C101
2.2u
VBAT
C
1
4
2
1
0
u
C167 2.2u
C
1
4
4
1
0
u
VUSB_LDO_4V9
2.2u
L100
R110
7.5K
VMC_3V3
R117
330k
VBAT
VUSB_LDO_4V9
VSIM_3
VIO_2V8
VUSB_3V3
VBT_2V8
AVDD_2V8
2.2u L101
VMEM_1V8
VCORE_1V2
1K R101
1
u
C
1
3
8
VRF_2V8
1
u
C
1
3
9
C174
4.7u
C166 0.1u
TP101
1
u
C
1
7
5
C176
2.2u
VCAMA_2V8
C172
1n
VBAT
R
1
3
5
1
.
5
K
RST_N
END_KEY
EOC
KEY_BL0
KEY_BL1
BAT_Temp
VIB_N
SIM_3_DATA
SIM_1_2_CLK
SIM_1_2_DATA
SIM_1_2_RST
SIM_3_RST
B_LED_EN
G_LED_EN
R_LED_EN
SIM_3_CLK
UART_RX
UART_TX
JACK_DETECT
FM_INT
CLK_26M
WIFI_INT
HOOK_DET
Seperate GND
VSIM2
VSIM
DVDD28(VIO)
DVDD_NFI(VM)
DVDD28(VIO)
DVDD28(VIO)
INTERRUPT
UART&IrDA
SIM
DVDD28(VIO) LCD_BL_COTROL
Supply Voltage
1%
(1%)
(1%)
FM I2S
(U100)
4. TROUBLE SHOOTING
- 74 -
START
Push power-on key
And check the level change
into high of POWERKEY
Check the contact of power key
Or dome-switch
Yes
Logic level at RPWRON of R101
= HIGH(above 1.2V)?
No
The phone will
Properly operating.
Is the phone power on?
Re-download software
No
Yes
Replace U100 and
Re-download software
Check Battery Voltage
> 3.30V
Yes
Charge or Change Battery
No
Check the voltage of
The LDO outputs at TP1
Replace TP1 (U100)
No
Yes
Does it work properly?
Replace the main board
No
No
VCORE = 1.2V, VM = 1.8V, VIO = 2.8V,
VRF = 2.8V, VA = 2.8V, VRTC = 2.8, VTCXO = 2.8V.
VSIM = 3.0V, VSIM2 = 3.0V, VIBR = 3.3V,
VUSB = 3.3V, VCAMA = 2.8V, VCAMD = 1.8V,
VMC = 3.3V
4. TROUBLE SHOOTING
- 75 -
4.5 Charging Trouble
Figure 4.5.1 USB Connector
Figure 4.5.2 U500 RT9524
USB onnector
U500 RT9524
4. TROUBLE SHOOTING
- 76 -
U500
6 5
7 4
8 3
9 2
10 1
11
PGND
VIN BATT
ISET PGB
GND1 CHGSB
LDO GND2
IEOC EN_SET
R
5
0
2
8
2
0
R536
DNI
0.1u
C504
100K
R504
VIO_2V8
VUSB_LDO_4V9
R503
3K
VBAT VBUS_USB
CHG_EN
EOC
(1%) (1%)
Figure 4.5.3 circuit diagram single charging IC
4. TROUBLE SHOOTING
- 77 -
START
Is I/O Connector CN500)
well-soldered ?
Re-solder the CN500
(Pin 1 : VBUS_USB)
Yes
Is the voltage
at Pin 10 of TP1(RT9524) = 4.9V
No
Charging is
properly operating
Battery is charged?
Replace the
U500
No
Yes
Battery is charged?
Yes
Charging is
properly operating
No
Check the voltage at
Pin 1 of TP1(RT9524 )= 5V?
The TA is out of order
Change the TA
No
Yes
No
Charge or Change Battery
Yes
Figure 4.5.4 Checking fow
4. TROUBLE SHOOTING
- 78 -
4.6 Vibrator Trouble
Figure 4.6.1 Vibrator Pad
Figure 4.6.2 Vibrator Circuit Diagram
Vibrator PAD
VA532(TP1)
C512(TP2)
VA532
D
5
0
0
C512
1u
VBAT
VB500
2
1
VIB_N
MOTOR
TP1
TP2
4. TROUBLE SHOOTING
- 79 -
START
Is the voltage at C512(TP1)
(+) high?
Check the state of
L500
Yes
Vibrator
Working well
Replace the vibrator
No
Is the vibrator connection
Correct?
Check the state of
Connection & replace vibrator
No
Is the voltage at VA352(TP2)
(+) high?
Replace the U100
No
Yes
Yes
SETTING : Enter the engineering mode, and set vibrator on at vibration of BB test menu
Figure 4.6.3 Checking fow
4. TROUBLE SHOOTING
- 80 -
4.7 LCD Trouble
Figure 4.7.1 LCD
TP2
TP4
TP3
TP5
TP1
4. TROUBLE SHOOTING
- 81 -
Figure 4.7.2 LCD Interface Circuit
Figure 4.7.3 LCD Chargepump Circuit
TP1
TP5
1K
R310
2.2u
C337
VCAM_1V2
2.2u
C332
DNI
C324
DNI
C325
2.2u
C334
VIO_2V8
VBAT
C331 1u 1u C330
2.2u
C333
VHP_MIC_2V6
C328
1u
C329
33p DNI
C326
DNI
C327
U302
2
1
20
19
18
8
7
6
5
9
4
10
3 1
1
2
1
2
1
13
1
4
15
16
17
LED3
LED4
NC2 L
D
O
2
AVIN
C
1
N
L
D
O
1
C
2
N
A
G
N
D
P
G
N
D
NC1
C
2
P
ENA
C
1
P
PVIN
SCL
SDA
LED2
LED1
VOUT
S
L
U
G
_
G
I2C_SCL1
I2C_SDA1
BLED_CA0
BLED_CA1
BLED_CA2
BLED_CA3
TP4
TP2
TP3
VA314 VA315
VA316 VA300 VA317
25pF
FL302
1
05
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G
1
G
2
1u
C310
100K
R311
25pF
FL300
1
0 5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G
1
G
2
1u
C311
VIO_2V8 VMEM_1V8
R300
100
FL301
25pF
1
05
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G
1
G
2
VBAT
C336
2.2u
CN300
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[00]
LCD_RS
LCD_RD_N
LCD_VSYN
LCD_ID
BLED_CA0
BLED_CA1
BLED_CA2
BLED_CA3
LCD_CS_N
LCD_RST_N
LCD_WR_N
4. TROUBLE SHOOTING
- 82 -
L C D _R S
L C D _C S
L C D _W R
R S
C S
W R
D A T
Graph 4.7.4. LCD Backlight Control Signal Waveform
Graph 4.7.5. LCD Data Waveform
4. TROUBLE SHOOTING
- 83 -
START
Check the Voltage Level of
TP5 is about Battery voltage ?
Re-soldering or Replace U302
Yes
LCD working well !
No
Is the connection of
TP1 with LCD connector ok ?
Reassemble LCD connector
No
Check the Waveform of
EMI flter ?
Re-download & check the
State of U100
No
Yes
Does LCD work
properly ?
Yes
Yes
Replace LCD module
No
Figure 4.7.6 LCD Checking Flow
4. TROUBLE SHOOTING
- 84 -
4.8 Camera Trouble
Figure 4.8.1 Camera Test Point
TP3 TP1
TP2
4. TROUBLE SHOOTING
- 85 -
GB042-24S-H10-E3000
CN301
ENBY0034201
13 12
14 11
15 10
16 9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
1 R312
R313 1
C346
DNI
VCAMA_2V8
VCAM_2V8
VCAM_1V2
C
3
4
3
0
.
1
u
0
.
1
u
C
3
4
4
C
3
4
5
0
.
1
u
DNI
C347
VA312
VA313
FB303
600
FB304
600
FB305
600
I2C_SCL1
I2C_SDA1
CAM_RST_N
CAM_PWDN
CAM_DATA[0]
CAM_DATA[1]
CAM_DATA[2]
CAM_DATA[3]
CAM_DATA[4]
CAM_DATA[5]
CAM_DATA[6]
CAM_DATA[7]
CAM_PCLK
CAM_VSYNC
CAM_HSYNC
CAM_MCLK
3M_CAM
Figure 4.8.3 Camera Circuit
Figure 4.8.2 Camera Circuit
TP1
V
2
3
U
2
1
Y
2
4
W
2
4
U
2
0
V
2
2
U
1
9
W
2
2
V
1
9
A
A
2
3
A
A
2
4
A
B
2
4
A
C
2
4
A
C
2
3
A
D
2
3
A
D
2
2
A
C
2
1
V
1
8
A
B
1
9
A
A
1
8
W
1
9
Y
1
8
U
1
7
A
B
1
8
W
1
8
A
C
2
0
U
1
6
C
M
R
S
T
C
M
P
D
N
C
M
V
R
E
F
C
M
H
R
E
F
C
M
P
C
L
K
C
M
M
C
L
K
C
M
F
L
A
S
H
C
M
D
A
T
9
C
M
D
A
T
8
C
M
D
A
T
7
C
M
D
A
T
6
R
D
N
0
_
C
M
D
A
T
5
R
D
P
0
_
C
M
D
A
T
4
R
C
N
_
C
M
D
A
T
3
R
C
P
_
C
M
D
A
T
2
R
D
N
1
_
C
M
D
A
T
1
R
D
P
1
_
C
M
D
A
T
0
T
V
R
T
T
E
S
T
2
6
M
L
P
C
E
1
B
L
P
C
E
0
B
L
P
T
E
L
R
S
T
B
L
R
D
B
L
W
R
B
L
P
A
0
N
L
D
1
7
SPI_CS_N
SPI_SCK
SPI_MOSI
SPI_MISO
R104
2.2K
VMEM_1V8
R105
2.2K
L
C
D
_
R
S
L
C
D
_
R
D
_
N
L
C
D
_
V
S
Y
N
C
A
M
_
R
S
T
_
N
C
A
M
_
P
W
D
N
C
A
M
_
D
A
T
A
[
0
]
C
A
M
_
D
A
T
A
[
1
]
C
A
M
_
D
A
T
A
[
2
]
C
A
M
_
D
A
T
A
[
3
]
C
A
M
_
D
A
T
A
[
4
]
C
A
M
_
D
A
T
A
[
5
]
C
A
M
_
D
A
T
A
[
6
]
C
A
M
_
D
A
T
A
[
7
]
C
A
M
_
P
C
L
K
C
A
M
_
V
S
Y
N
C
C
A
M
_
H
S
Y
N
C
C
A
M
_
M
C
L
K
L
C
D
_
C
S
_
N
L
C
D
_
R
S
T
_
N
L
C
D
_
W
R
_
N
W
i
F
i
_
C
S
DVDD_MC2(VIO)
DVDD_CAM(VIO)
DVDD28_MIPI(VIO) DVDD_NFI(VM)
CAMERA
TP2
TP3
4. TROUBLE SHOOTING
- 86 -
START
Check
the each voltage Level of
TP1, TP2,TP3
is right ?
Check the state of
U100 (MT6236) & U302
Yes
Camera working well !
No
Is state of the camera
Module correct?
Replace the CN302
No
I2C_CLK, I2C_DATA ?
Re-download & Check
the state of U100
No
Yes
CAM_MCLK(24MHz) ?
Yes
Yes
Re-download & Check
the state of U100
No
Check the Waveform
Of Data pins
Yes
Re-download & Check
the state of U100
No
flter ?
Yes
Re-download &
Check the state of U100
No
Does Camera work
properly ?
Yes
Replace the CN301 or
Change the board
No
4. TROUBLE SHOOTING
- 87 -
4.9 Speaker Trouble
Figure 4.9.1 Speaker Test Point
TP2
TP1
IC400
4. TROUBLE SHOOTING
- 88 -
TP1
TP2
TP3
4. TROUBLE SHOOTING
89 / 149
Figure 4.9.3 Audio Amp Circuit Figure 4.9.4 Speaker Circuit
Figure 4.9.4 Tp1, TP2 Signal Waveform Figure 4.9.5 Tp3 Signal Waveform(1KHz mp3 play)
Figure 4.9.4 Tp2 Signal Waveform Figure 4.9.5 Tp1 Signal Waveform(1KHz mp3 play)
Figure 4.9.2 Audio Amp Circuit Figure 4.9.3 Speaker Circuit
C4022.2u
C4032.2u
C440
0.1u
600 FB402
C439 1u
1u C438
600 FB403
1u C420
1u C419
C401
0.1u
2.2u
C400
1u C409
C408 1u
2.2u
C413
0.1u
C411
0.1u
C410
R401
20 20
R400
VMEM_1V8
VBAT
IC400
B
3
A4
C3
C2
B
2
D1
D3
D
4
C1
A1 D2
B
1
D5
A2
A5
A3
B5
B
4
C5
C
4
G
N
D
OUT+
H
P
V
D
D
CPVDD
CPVSS
CN
HPL
OUT-
B
IA
S
IN2- HPR
IN1+
S
V
D
D
IN3-
IN2+
S
D
A
IN1-
IN3+
CP
S
C
L
C415
2.2u
C416
2.2u
2.2u
C412
C414 2.2u
HS_R
HS_L
I2C_SCL2
I2C_SDA2
FM_AUDIO_L
FM_AUDIO_R
SPEECH_P
SPEECH_N
HS_OUT_L
HS_OUT_R
SPK_N
SPK_P
R427 0
VA400
R428 0
CN400
2
1
VA401
DNI
C437
39pF
C404
39pF
C405
SPK_N
SPK_P
SK_RCV
RCV Circuit
TP2
TP1
4. TROUBLE SHOOTING
- 89 -
START < Cal l >
Check the state of
Sub System(TP2)
Replace/
Change
Yes
Speaker
Working well!!
No
Check the state of
Analog S/W
Replace/
Change
No
Check the state of
Sub System (TP2)
Yes
Check the audio
Signal line
Yes
START < Mp3>
Yes
Speaker
Working well!!
No
No
Check the state
of Speaker(TP1)
Replace/
Change
No
Check the state of
Speaker (TP1)
Yes
Yes
No
4. TROUBLE SHOOTING
- 90 -
Figure 4.10.1 Earphone Test Point
4.10 Earphone Trouble
TP2
TP1
4. TROUBLE SHOOTING
- 91 -
Figure 4.10.3 TP1 Waveform(Not Jack Detect, 0V)
Figure 4.10.4 TP1 Waveform( Jack Detect, 2.8V)
Figure 4.10.6 TP2 Waveform( 1KHz MP3 Play)
Figure 4.10.2 Earphone Circuit
Figure 4.10.5 Audio Amp Circuit
R402
47K
ZD404
R431
DNI
10u
C430
R
407
150K
ZD402
ZD401 ZD405
J400
2
3
4
5
6
1 M5
M4
M3
M4F
M1
M6
VA407
Q400
1
3
2
G
D
S
C435
39p
100n
L400
39p
C436
R434
470
10p
C418
R414
100
R430 1
U401
4 3
2
5 1
IN+ VCC
GND
IN- OUT
1M
R406
VIO_2V8
VIO_2V8
100K
R404
VIO_2V8
R429 1
39p
C426
39p
C431
1800 FB408
1800 FB409
1800
FB407
0.1u
C425
0.1u
C428
39p
C424
R403
100K
2.2Kohms
R419
VHP_MIC_2V6
VIO_2V8
C421
DNI
10
R405
ZD400
FB410
1800
1.5Kohms
R418
HP_MIC_P
HP_MIC_N
JACK_DETECT
HOOK_DET
FM_ANT
HS_OUT_L
HS_OUT_R
ON
OFF
HOOK_DET IN-
High
Low
0 V
2.8V
BB side place
TP1
C4022.2u
C4032.2u
C440
0.1u
600 FB402
C439 1u
1u C438
600 FB403
1u C420
1u C419
C401
0.1u
2.2u
C400
1u C409
C408 1u
2.2u
C413
0.1u
C411
0.1u
C410
R401
20 20
R400
VMEM_1V8
VBAT
IC400
B
3
A4
C3
C2
B
2
D1
D3
D
4
C1
A1 D2
B
1
D5
A2
A5
A3
B5
B
4
C5
C
4
G
N
D
OUT+
H
P
V
D
D
CPVDD
CPVSS
CN
HPL
OUT-
B
IA
S
IN2- HPR
IN1+
S
V
D
D
IN3-
IN2+
S
D
A
IN1-
IN3+
CP
S
C
L
C415
2.2u
C416
2.2u
2.2u
C412
C414 2.2u
HS_R
HS_L
I2C_SCL2
I2C_SDA2
FM_AUDIO_L
FM_AUDIO_R
SPEECH_P
SPEECH_N
HS_OUT_L
HS_OUT_R
SPK_N
SPK_P
TP2
4. TROUBLE SHOOTING
- 92 -
START
Is the TP2
(JACK DETECT)
LOW?
Check the state of
soldering TP1
Earphone working well
No
Check connected
Properly?
Please, Reconnect
The earphone
No
Can you hear
the sound?
Change the earphone
and try again
No
Yes
Yes
Yes
Can you hear
Your voice?
Change
the earphone and try again
No
Set the test instrument or
Play Continuous wave
Set the test instrument
to echo mode
Figure 4.10.7 Earphone Checking Flow
4. TROUBLE SHOOTING
- 93 -
4.11 Receiver Trouble
Figure 4.11.1 Receiver Pad Test Point
Receiver Test Point
TP1
IC400
TP3
TP2
4. TROUBLE SHOOTING
- 94 -
Figure 4.11.2 Receiver Circuit
Figure 4.11.3 Audio Amp Circuit
R427 0
VA400
R428 0
CN400
2
1
VA401
DNI
C437
39pF
C404
39pF
C405
SPK_N
SPK_P
SK_RCV
RCV Circuit
TP1
TP2
C4022.2u
C4032.2u
C440
0.1u
600 FB402
C439 1u
1u C438
600 FB403
1u C420
1u C419
C401
0.1u
2.2u
C400
1u C409
C408 1u
2.2u
C413
0.1u
C411
0.1u
C410
R401
20 20
R400
VMEM_1V8
VBAT
IC400
B
3
A4
C3
C2
B
2
D1
D3
D
4
C1
A1 D2
B
1
D5
A2
A5
A3
B5
B
4
C5
C
4
G
N
D
OUT+
H
P
V
D
D
CPVDD
CPVSS
CN
HPL
OUT-
B
I
A
S
IN2- HPR
IN1+
S
V
D
D
IN3-
IN2+
S
D
A
IN1-
IN3+
CP
S
C
L
C415
2.2u
C416
2.2u
2.2u
C412
C414 2.2u
HS_R
HS_L
I2C_SCL2
I2C_SDA2
FM_AUDIO_L
FM_AUDIO_R
SPEECH_P
SPEECH_N
HS_OUT_L
HS_OUT_R
SPK_N
SPK_P
TP3
4. TROUBLE SHOOTING
- 95 -
START
Can you hear
the sound?
Check the soldering RCV(TP1)
No
Check the state of
Analog S/W(TP2,3)
Replace or Change Device
No
Yes
Yes
Receiver will work properly.
Yes
SETTING : After initialize Agilent 8960,Set the speech option at continuous wave.
Set the receiving volume of mobile as Max.
Figure 4.11.4 Receiver Checking Point
4. TROUBLE SHOOTING
- 96 -
4.12 Microphone Trouble
Figure 4.12.2 Microphone Circuit
Figure 4.12.1 Microphone Test Point
TP1
L401 100n
VA408
R
4
1
5
1
K
L402
100n
VA409
47p
C433 C434
47p
0.1u
C427
MIC400
2
1
R421
100
0.1u
C432
R417
2.2K
2.2K
R422
C429
47p
VMIC_BIAS_P
10u
C423
R420
100
MIC_N
MIC_P
MAIN MIC
BB side place
MIC side place
TP1
4. TROUBLE SHOOTING
- 97 -
START
Check the L401
Signal While talking
to mic
Change the microphone(TP1)
No
Make a phone call,
then check L401 mic bias
Check mic bias signal line
No
Yes
Yes
Microphone will work
properly.
SETTING : After initialize Agilent 8960, set the speech option at loopback.
Check microphone sound hole
4. TROUBLE SHOOTING
- 98 -
4.13 SIM Card Interface Trouble
4.13.1 SIM1 Card Interface Trouble
Figure 4.13.1 Sim Card Test Point
Figure 4.13.2 Sim Card Circuit
J300(TP1)
U1
TP2
J300
C11 C10
C12 C9
C7 C3
C6 C2
C5 C1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VA306 VA307 VA308
VSIM_1
C300
DNI
C301
DNI
DNI
C302
R304
DNI
SIM_1_RST
TP1
J300
TP3
TP4
TP2
TP1
1u
C3 C2
1u
C1
1u 2.2u
C9
2.2u
C8
VSIM_1 VSIM_2
VBAT
VIO_2V8
U
1
14
13
12
11
10
9
8
15 7
16
6
17
5
18
4 1
9
3
20
2
21
1
22
2
3
24
25
26
27
28
2
9
G
N
D
SIO2/GPIO6
VSIM3
SIO3/GPIO9
SRST3/GPIO8
SCLK3/GPIO7
S
Y
S
R
S
T
B
SDA
SRST2/GPIO5
SCL
SCLK2/GPIO4
CE0
VSIM2
V
I
O
V
B
A
T
SIMIO2/GPI18
VSIM1
SIMRST2/GPI17
SCLK1/GPIO1
SIMCLK2/GPI16
SIO1/GPIO3
VSIM4
SCLK4/GPIO10
SRST4/GPIO11
SIO4/GPIO12
SIMIO1/GPI15
SIMRST1/GPI14
RST_N
SIM_1_RST
SIM_1_CLK
SIM_1_DATA
SIM_2_RST
SIM_2_CLK
SIM_2_DATA
SIM_1_2_CLK
SIM_1_2_DATA
SIM_1_2_RST
I2C_SCL3
I2C_SDA3
U1
TP2
4. TROUBLE SHOOTING
- 99 -
Figure 4.13.3 Sim Card Checking Flow
START
Is Voltage at the TP1
1.8V or 3V?
Resolder J300
No
Does the SIM card
Support 3V ?
Change the SIM Card.
This phone supports 1.8V or 3.0V SIM card.
No
Yes
Yes
SIM card is
properly working
Change the main board
Change
the SIM Card and try again.
Does it work
Properly?
redownload SW.
Does it work
Properly?
SIM card is
properly working.
Yes Yes
No No
Change the U100
1.8V or 3V?
No
Yes
4. TROUBLE SHOOTING
- 100 -
J301(TP1)
U1
TP2
TP3
TP4
TP2
TP1
1u
C3 C2
1u
C1
1u 2.2u
C9
2.2u
C8
VSIM_1 VSIM_2
VBAT
VIO_2V8
U
1
14
13
12
11
10
9
8
15 7
16
6
17
5
18
4 1
9
3
20
2
21
1
22
2
3
24
25
26
27
28
2
9
G
N
D
SIO2/GPIO6
VSIM3
SIO3/GPIO9
SRST3/GPIO8
SCLK3/GPIO7
S
Y
S
R
S
T
B
SDA
SRST2/GPIO5
SCL
SCLK2/GPIO4
CE0
VSIM2
V
I
O
V
B
A
T
SIMIO2/GPI18
VSIM1
SIMRST2/GPI17
SCLK1/GPIO1
SIMCLK2/GPI16
SIO1/GPIO3
VSIM4
SCLK4/GPIO10
SRST4/GPIO11
SIO4/GPIO12
SIMIO1/GPI15
SIMRST1/GPI14
RST_N
SIM_1_RST
SIM_1_CLK
SIM_1_DATA
SIM_2_RST
SIM_2_CLK
SIM_2_DATA
SIM_1_2_CLK
SIM_1_2_DATA
SIM_1_2_RST
I2C_SCL3
I2C_SDA3
U1
TP2
J301
C11 C10
C12 C9
C7 C3
C6 C2
C5 C1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VA309 VA310
VA311
C314
DNI DNI
C313 C312
DNI
VSIM_2
DNI
R305
SIM_2_RST
TP1
J301
4. TROUBLE SHOOTING
- 101 -
START
1.8V or 3V?
Resolder J301
No
Does the SIM card
Support 3V ?
No
Yes
Yes
SIM card is
properly working
Change
Does it work
Properly?
redownload SW.
Does it work
Properly?
SIM card is
properly working.
Yes Yes
No No
Change the U100
1.8V or 3V?
No
Yes
4. TROUBLE SHOOTING
- 102 -
TP1
CN503
11 10
12 9
13 8
14 7
15 6
16 5
17 4
18 3
19 2
20 1
R538
100K
VIO_2V8
0.1u
C544
R539
DNI
DNI
C545
C527
DNI
DNI
C528
VA538
DNI
C546
VSIM_3
VA541
VA542 VA543 VA544
SIM_3_DATA
MSD_D[1]
MSD_D[0]
MSD_DET_N
MSD_CLK
TP1
J700
C11 C10
C12 C9
C7 C3
C6 C2
C5 C1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VSIM_3
SIM_3_CLK
SIM_3_RST
SIM_3_DATA
J700
J700
4. TROUBLE SHOOTING
- 103 -
START
1.8V or 3V?
Resolder J700
No
Does the SIM card
Support 1.8 or 3.0V ?
No
Yes
Yes
SIM card is
properly working
Change
Does it work
Properly?
redownload SW.
Does it work
Properly?
SIM card is
properly working.
Yes Yes
No No
Change the U100
Voltage output
of VSIM LDO
Is 1.8V or 3V?
No
Yes
4. TROUBLE SHOOTING
- 104 -
4.14 KEY backlight Trouble
Figure 4.14.1 KEY backlight Test Point
Figure 4.14.2 KEY backlight Circuit
TP2
1u
C543
VA509 VA510
L
D
5
0
1
2
1
A
C
L
D
5
0
0
2
1
A
C
C501
1u
VBAT
KEY_BL0
KEY_BL1
TP1
4. TROUBLE SHOOTING
- 105 -
START
TP1, TP2 is Low
Than C501?
Check the state of
LED or U100
No
VBAT = C501 ?
No
Yes
Yes
Backlight will
work properly.
Figure 4.14.3 KEY backlight Checking Flow
4. TROUBLE SHOOTING
- 106 -
4.15 Micro SD Trouble
Figure 4.15.2 Micro SD Circuit
Figure 4.15.1 Micro SD Test Point
TP1
CN503
11 10
12 9
13 8
14 7
15 6
16 5
17 4
18 3
19 2
20 1
R538
100K
VIO_2V8
0.1u
C544
R539
DNI
DNI
C545
C527
DNI
DNI
C528
VA538
DNI
C546
VSIM_3
VA541
VA542 VA543 VA544
SIM_3_DATA
MSD_D[1]
MSD_D[0]
MSD_DET_N
MSD_CLK
TP1
CN701
CN503
11 10
12 9
13 8
14 7
15 6
16 5
17 4
18 3
19 2
20 1
R538
100K
VIO_2V8
0.1u
C544
R539
DNI
DNI
C545
C527
DNI
DNI
C528
VA538
DNI
C546
VSIM_3
VA541
VA542 VA543 VA544
SIM_3_DATA
MSD_D[1]
MSD_D[0]
MSD_DET_N
MSD_CLK
CN701
4. TROUBLE SHOOTING
- 107 -
START
Is
MC_CLK & Data
Timing Correct?
Re-download SW
No
Micro SD Detect
OK?
Re-download SW
No
Yes
Yes
Change the Micro SD Card
Yes
Micro SD Card will work properly
Is voltage of the TP1 2.8V ?
Check the state of
C544 or CN701
No
Yes
Figure 4.15.3 Micro SD Checking Flow
4. TROUBLE SHOOTING
- 108 -
4.16 Bluetooth Trouble
Figure 4.17.1 Bluetooth Components (bottom)
TP1
FL4
ANT1
TP3
TP2
4. TROUBLE SHOOTING
- 109 -
Figure 4.17.3 BT circuit diagram
22p
C159
A11
A13
A14
L23
N23
M23
M22
N19
R2
R7
R4
R5
T2
R3
D
1
7
D
1
8
D
2
1
B
2
1
B
2
2
C
2
2
D
2
4
V
C
O
_
M
O
N
I
T
O
R
T
R
X
I
Q
_
N
T
R
X
I
Q
_
P
R
B
I
A
S
R
F
2
G
_
P
R
F
2
G
_
N
BDLAIP
BDLAIN
BLKAQP
BDLAQN
APC
AFC
DAICLK
DAIPCMOUT
DAIPCMIN
DAIRST
DAISYNC
XOUT
XIN
TESTMODE
22p
C160
ANT1
DSBTPTR2010
2 1
FEED GND
C15
DNI
C14
DNI
C17
7p
C13
DNI
C11
100p
C12
DNI
FL4
2450MHz
4 2
3 1
IN OUT
GND1 GND2
C10
100p
C16
3.9p
X100
NX3215SA
32.768KHz
2 1
C173
1n
L1
1.8n
R111
15K
GND
RF_IN
RF_IP
RF_TX_RAMP
RF_QN
RF_QP
C
L
K
_
2
6
M
DCLK
DFS
DIN
RF_AFC
VCC_RTC
(VRTC)
AVDD28_RFE
(VA)
AVDD28_RFE
(VA)
BT_CLOCK
Seperate GND
TP1
TP2
TP3
U100
ANT1
FL4
4. TROUBLE SHOOTING
- 110 -
START
Check of ANTENNA
Check between
TP2 and TP3
Replace FL100
No
A condition is good?
Give the additory
solder between TP1 andTP2
No
Yes
BT will
work properly
Check condition of
matching components
(TP1, TP2)
Replace ANT100
No
Yes
Yes
Figure 4.17.4 Checking fow (BLUE TOOTH)
4. TROUBLE SHOOTING
- 111 -
4.17 FM Radio Trouble
Figure 4.18.1 FM_RADIO Components Placements
U400
U200
TP3
TP2
TP1
TP4
4. TROUBLE SHOOTING
- 112 -
Figure 4.18.3 Circuit diagram(FM_Radio_Module)
149TP2TP3U200TP4Figure 4.18.2 Circuit diagram(FM_RADIO 3.5phi connt )
ZD402
J400
2
3
4
5
6
1
M5
M4
M3
M4F
M1
M6
100n
L400 10p
C418
ZD400
FM_ANT
TP1
J400
10p
C206
C211
0.1u
1u
C207
U200
2
1
1
6
1
7
1
8
1
9
2
0
11
12
13
14
15
1
0 9 8 7 6
5
4
3
2
1
NC1
FMI
RFGND
LPI
RST_
S
E
N
_
S
C
L
K
S
D
I
O
R
C
L
K
V
D
DOUT
LOUT
ROUT
GND
VA
N
C
2
G
P
O
1
G
P
0
2
_
I
N
T
_
G
P
O
3
_
D
C
L
K
D
F
S
G
_
S
L
U
G
1n C204
220
R239
R230
100K
10K
R203
100K
R205
2K R240
2K R241
100K
R212
L220 22n
VIO_2V8
VBAT
R242
680
VIO_2V8
C234
33p
VIO_2V8
I2C_SCL1
I2C_SDA1
FM_INT
DCLK
DFS
DIN
FM_AUDIO_L
FM_AUDIO_R
FM_RST
FM_ANT
FM_32K
as close as possible to pin
U200
TP2
TP4
TP3
4. TROUBLE SHOOTING
- 113 -
START
Check of ear_jack condition
Check Bias Voltage
TP2, TP3
Replace
U100
No
Give the additory solder in
TP1, TP2
No
Yes
FM_radio will
work properly
Check condition of
matching components
(TP1, TP2)
Replace J400
No
Yes
Yes
Figure 4.18.4 Checking fow (FM_RADIO)
4. TROUBLE SHOOTING
- 114 -
4.18 WIFI Trouble
Figure 4.19.1 WIFI Components Placements(bottom/TOP)
To Chip ANT(ANT2)
on TOP side
WIFI RF T/Rx Path
U206
X202
TP5
TP2
TP1
TP3
TP4
ANT2
4. TROUBLE SHOOTING
- 115 -
Figure 4.19.2 WIFI circuit diagram
4.7u C214
4.7u
C277
L231
2.2n
12p
C19
C274
15p
D
S
B
T
P
T
R
2
0
1
0
A
N
T
2
2
1
F
E
E
D
G
N
D
100p
C276
2.2u
C20
10p
C21
18p
C22
PALDO_3V3
49.9
R9
X202 1XTW26000FAA
26MHz
2 1
3 4
VCC OUT
GND1 GND2
C18
1u
FL203
3
2
1
IN
G
N
D OUT
U206
K1
F7
F6
G
7
G
6
D9
D7
D6
C9
A10
A
5
E
5
C
5
B
3
A
4
A
3
C
3
A
2
B
1
A
1
B
5
J4
K4
E3
G3
G2
G1
J2
H2
K2
J1
J3
H3
H7
K9
J9
D1
D2
E8
E9
E6
E7
F10
F4
F8
G9
J8
K8
E2
H8
B8
C6
B9
A7
F9
D4
D3
C2
E10
A8
D10
A9
A6
C10
B10
H
4
H
5
H
6
K
6
J
5
J
6
F
2
F
3
G
1
0
H
9
H
1
0
J
1
0
C
1
G
4
K
1
0
K
7
J
7
H
1
E
1
F
S
O
U
R
C
E
D
V
D
D
IO
3
D
V
D
D
IO
2
D
V
D
D
IO
1
D
V
D
D
IO
0
P
A
D
_
V
D
D
K
1
C
L
D
O
U
A
R
T
_
D
B
G
_
T
X
U
A
R
T
_
D
B
G
_
R
X
G
P
IO
_
1
G
P
IO
_
0
C
S
_
N
W
E
_
N
D
1
5
D
1
4
D
1
3
D
1
2
D
1
1
D
1
0
TRX_IO_P
TRX_IO_N
AVDD33_XO
AVDD33_TX
AVDD16_TRX
AVDD16_SX
AVDD16_LF
AVDD16_CLDO
AVDDRTC
AVSSRTC
OSC_EN
OSC_IN
AVSS33_PA3
AVSS16_WF1
AVSS16_VCO
EXT_INT_B
WIFI_INT_B
ANTSEL_0
ANTSEL_1
ANTSEL_2
ANTSEL_3
CGND1
PAD_ICAL_EXTR
TRXIN
TRXIP
TRXQN
TRXQP
X32K_OUT
X32K_IN
XTEST
SYSRST_B
BT_PRI
D0
D1
A0
D3
D2
OE_N
D4
D5
D6
D7
D8
D9
P
A
D
_
E
N
R
E
F
G
N
D
_
R
E
F
A
V
D
D
4
3
_
R
E
F
O
U
T
_
F
B
L
X
B
K
A
V
D
D
4
3
_
S
M
P
S
A
G
N
D
4
3
_
S
M
P
S
G
N
D
_
P
A
L
D
O
P
A
L
D
O
_
F
B
P
A
L
D
O
AVSS33_PA1
AVSS33_PA2
AVSS16_WF2
AVSS16_WF3
AVSS16_WF4
P
A
D
_
V
D
D
K
2
P
A
D
_
V
D
D
K
3
CGND2
CGND3
CGND4
PALDO_3V3
1.8p
C299
0.1u
C245
PALDO_3V3
C278
DNI
C298
DNI
100K
R252
C295
1u
TP202
VBAT
C270
4.7u
SMPSLDO_1V6
VBAT
R254
24K
VIO_2V8
100K
R255
TP200
TP201
1u
C244
1u
C246
1u
C247
VIO_2V8
VMEM_1V8
49.9
R253
0.1u C232
10p C229
C227 1u
0.1u C226
1n C223
10K
R270
C243
2.2u
1p
C1321
FL204
3
1
2
4
B/P_2
B/P_1
Gnd/DC_fd
UnB/P
C228 0.1u
1M
R263
C239
1u
VRTC_2V8
SMPSLDO_1V6
PALDO_3V3
0.1u
C221
L225
2.2u
FB200
120
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[00]
LCD_RS
LCD_RD_N
LCD_WR_N
WIFI_32K
WiFi_CS
WiFi_RST
WiFi_EN
WIFI_INT
BT_PRI
Star connection
MT5931 WIFI
TP4
TP5
X200
WIFI RF T/Rx Path
TP2
TP1
TP3
4. TROUBLE SHOOTING
- 116 -
4. TROUBLE SHOOTING
TP5=26MHz?
END
NO
CHECK 26MHz CLOCK
NO
Replace X200
Replace
components
Is SMT status good?
START
Check RF path
YES
YES
CHECK Power block
TP1=VBAT?
NO
Replace FB200
YES
YES
TP2=1.2V?
TP3=1.6V?
TP4=3.3V?
NO
Replace U203
YES
Is WIFI OK?
YES
NO
Change board
116 / 149
START
Check RF path
TP2=1.2V?
TP3=1.6V?
TP4=3.3V?
Replace U203
No
TP1=VBAT?
Replace FB200
No
Yes
Yes
CHECK 26MHz CLOCK
CHECK Power block
Is SMT status good?
Replace components
No
Yes
Is WIFI OK?
TP5=26MHz?
Yes
Yes
END
Change board
No
Replace X200
No
5. DOWNLOAD
- 117 -
5. DOWNLOAD
[LGFLASHv141]
5. DOWNLOAD
- 118 -

MS695
LGFlashTool!.3.77.2!|LGMS695_20!20208_Oownload
LG-C333
LG-C333
LG-C333
[LGFLASHv141]LGC333_20120713_Download
5. DOWNLOAD
- 119 -
LG-C333
[LGFLASHv141]
5. DOWNLOAD
- 120 -
LGC333
5. DOWNLOAD
- 121 -
5. DOWNLOAD
- 122 -
5. DOWNLOAD
- 123 -
RAD32167835
5. DOWNLOAD
- 124 -
5. DOWNLOAD
- 125 -
5. DOWNLOAD
- 126 -
5. DOWNLOAD
- 127 -
5. DOWNLOAD
- 128 -
5. DOWNLOAD
- 129 -
LGMS695_20!20208.dll
LGMS695_20!20208
LGC333_20120713.dll
LGC333_120713.dll
5. DOWNLOAD
- 130 -
MS695
MS695
MS695
C333
C333
C333
LGC333
LGC333 LGC333
C333
5. DOWNLOAD
- 131 -
C333
C333
5. DOWNLOAD
- 132 -
5. DOWNLOAD
- 133 -
5. DOWNLOAD
- 134 -
C333
C333
5. DOWNLOAD
- 135 -
C333
C333
6. BLOCK DIAGRAM
- 136 -
6.Block diagram
System HW Block Diagram : C333 Total Block Diagram 1. System HW B!ock DiaQram C25 Tota! B!ock DiaQram
6. BLOCK DIAGRAM
- 137 -
2. System HW B!ock DiaQram BB B!ock
System HW Block Diagram : BB Block

FromMT6236 VMEM_1V8
MCP
2Gb NAND
1Gb DDR RAM
H9DA2GH1GHMMMR-4 6M
VIBRATOR
VBAT VBAT_N
JTAG MT6236
5MAF
CAMERA
(COWELL)
Flash
CHARGE
PUMP
(RT9396)
FromMT6236
FromChargepump
VCAM_IO_2V8
+2.8V_MCAM_AVDD
+1.2V_MCAM_CORE
+2.8V_MCAM_AF
VBAT
FromMT6236
FromMT6236
VBAT
VBAT
VIO_2V8
VMEM_1V8
12C_SCL1/DSA1
LCD_BL_CTRL LCD_LED_CA0:4
LCD
2.2QCIF
(LGIT)
Message
Blinker
R_LED_EN
LCD_RST_N
LCD_CS_N
LCD_RS
LCD_WR_N
LCD_RD_N
LCD_VSYN
LNAND_D_[0:15]
LCD_MAKER_ID
CMFLASH
FLASH_INHIBIT
FLASH_AS2C
CAM_MCLK
CAM_PWDN
CAM_RST_N
CAM_12C_SCL/SDA
CAM_HAYNC
CAM_DATA[0:7]
CAM_PCLK
CAM_VSYNC
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TRST_B
JTAG_TDO
JTAG_RTCK
SD_CKE
SD_WE_N
SD_BA_[0:1]
SD_CAS_N
SD_RAS_N
SD_CS_N
SD_CLKN/P
SD_DQS_0:1
SD_DQM_0:1
SD_A_[0:12]
SD_D_[0:15]
NAMD_CS_N
NAMD_LB_N
NAMD_UB_N
NAMD_RE_N
NAMD_BSY_N
NAMD_WR_N
NAMD_WP_N
LNAMD_D_[0:15]
MSD_DET_N
MSD_CMD
MSD_CLK
MSD_D[0:3]
SIM_RST1_N
SIM_CLK1
SIM_DATA1
HP_MIC_N/P
JACK_DETECT
HOOK_DETECT
VMC_3V3 MICROSD
CONNECTOR
(473091265)
SIM1
CONNECTOR
(KP09NC-6S-2.54SF)
3.5Phi
Ear Jack
(JAM3333-F36-7H)
FM_ANT
FromMIC
MIC_P/N
HPH_R/L
To FMMODULE
To FMMODULE
To Speaker
AUD_12C_SCL
AUD_12C_SDA
SOEECH_N/P
H
S
_
O
U
T
_
L
/
R
FM_R/L
RCV_SPK_OUT_R/L
VBAT
AUDIO
(WM9093)
ACCP_ID
USB_DM_UART_RX
USB_DP_UART_TX
uUSB
I/O
CON. VUSB_BUS
VUSB_CHG_IN
VBAT
DNI
CHG_EN_N
CHG_EOC_N
CHG_STS_N
DOME KEY
MATRIX
MAIN
BATTERY
BACKUP
BATTERY
Sungle Charging
IC
(BQ25040)
KEY_COL[0:7]
From26MHz CLOCK
KEY_ROW[0:7]
END_KEY
KEY_BL0V1
CLK_26M
32.768KHz
X-TAL
6. BLOCK DIAGRAM
- 138 -
System HW Block Diagram (Detail) : POWER 3. System HW B!ock DiaQram (Detai!) POWEH
VBAT
BATTERY
(1100mA)
MICRO
USB
SBPL0095402
VBAT
Single
Charging IC
VBUS_USB
VRTC_2V8
(0_6mA)
BACKUP BATT (DNI)
TAor USB
VBUS_LDO_4V9
(MAX 50mA)
VBAT
VBAT
AUDIO
Sub System
Headset
Mic Bias
LCD
Charging Pump
GND(40mA)
VHP_1V8(300mA)
VHP_MIC_2V5(300mA)
+1.2V_MCAM_CORE
(300mA)
+2_8V_MCAM_AF
(300mA)
+2_8V_MCAM_AVDD
(250mA)
VCAM_IO_2V8
(100mA)
CAMERA
5M
VBAT
U-SD
LDO
MICRO
SD
SIM1
VMC_3V3 (300mA)
VSIMI (100mA)
NC
NC
BATSNS
ISENSE
VCC_RTC
EOC
CHG_EN
VCDT
CHG_LDO
VTCXO
VCAMA
VCAMD
0_SD_LDO_EN
VSIM
VSIM2
VIBR
MT6236
Power Part
VCORE
(Buck)
VBT
VUSB
VM
(Buck)
VIO
VA
VMC
VA
VRF
VM
(Buck)
VIO
VCC_RTC
Camera
VCORE_1V2 (350mA)
VBT_2V8 (100mA)
VUSB_3V3 (100mA)
VMEM_1V8 (300mA)
VIO_2V8 (100mA)
AVDD_2V8 (125mA)
VMC_3V3_MTK (100mA)
AVDD_2V8 (125mA)
VRF_2V8 (250mA)
VMEM_1V8 (300mA)
VIO_2V8 (100mA)
VMTC_2V8 (0 .6mA)
SMPSLDO_1V6
PALDO_3V3
VBAT MT5931A
WIFI
MT5931A
WIFI
PMU
PMU
(RFMD)
VBAT
VM
(Buck)
VIO
VIO
VIO_2V8 (100mA)
MT6236
Logic
MEMORY
2GNAND
1GSDRAM
Message
blinker
VIBRATOR
LCDModule
2.4 Inch
FMModule
(SI 4705)
Comparator
(Audio)
TRANCEIVER
AD6546
KEY BACKLIGHT
LED
Camera Flash
LEDDeiver
6. BLOCK DIAGRAM
- 139 -
4. System HW B!ock DiaQram (Detai!) AUD!O
System HW Block Diagram (Detail) : AUDIO
6. BLOCK DIAGRAM
- 140 -
5. System HW B!ock DiaQram HF B!ock
System HW Block Diagram : RF Block
ANT
TX Module
AD6548
MT6236
DCS_PCS_IN
GSM_IN
LB_RX
HB_RX
BS814
BS817
VAFC
REFIN
REFINB
REF_CIP
RF_IP/IN
RF_OP/ON
RF_S_CLK
RF_S_DATA
RF_S_EN
RF_AFC
AFC
28MHz Cryatal
CLK_26M
RF_ANT_SW1
RF_ANT_SW2
RF_PA_EN
RF_TX_RAMP
SYSCLK
BPI_BUS0
BPI_BUS2
BPI_BUS1
APC
6. BLOCK DIAGRAM
- 141 -
System HW Block Diagram : WIFI & BT & FM Block
. System HW B!ock DiaQram W!F! & BT & FM B!ock
BT_TRX
MT6236
WIFI ANT
BT ANT
Balun
VTCXO
TRX_IO_P
TRX_IO_N
MT5931
WIFI
SI4705
FM ANT
(3.5pi earjack)
BT block
WIFI_EN
WIFI_CS
WIFI_INT
WIFI_RST
NAND_D_[00]
LCD_WR_N
LCD_RD_N
LCD_RS
NAND_D_[01]
NAND_D_[02]
NAND_D_[04]
NAND_D_[03]
NAND_D_[06]
NAND_D_[05]
NAND_D_[07]
BT_PRI
WIFI_32K
FM_INT
DCLK
FM_RST
12C_SDA1
12C_SCL1
DFS
DIN
FM_32K
FM_AUDIO_R
FM_AUDIO_L
HS_OUT_L
HS_OUT_R
SPK_RCV_P
SPK_RCV_N
FMI
WM9093
BPI_BUS9
EINT0
GPIO64
LPCE1B
LWRB
LRDB
LPA0
NLD0
NLD1
NLD2
NLD3
NLD4
NLD5
NLD6
NLD7
KCOL6
KROW6
RF2G_P
EINT5
GPIO63
SDA
SCL
DAIPCMOUT
DAIPCMIN
DA/CLK
GPIO5B
- 142 - Copyright 2012 LG Electronics. Inc. All right reserved.
7. CIRCUIT DIAGRAM
7. CIRCUIT DIAGRAM
OJ100
OJ102
1u
C
100
1u C130
C109 1u
22p
C159
51K
R116
DNI
R118
VA100
VBAT
VIO_2V8
U100
C
24
C
19
C
16
B23
B19
B16
A23
A22
A20
A19
B24
A16
E24
A21
G
24
C
11
B10
E1 F4 C
9
B9 C
4
A5 B4 B6 C
7
F3 W
2
V5 T6 R
6
T4 U
2
R
1
Y21
W
21
K3 J4 K4 K2 C
13
B13
W
3
Y2 W
1
V1 J8 H
8
Y20
AB21
U
18
R
9
N
16
N
15
N
14
N
13
N
9
M
16
M
15
M
13
L14
L11
L9 K15
K13
J10
H
9
H
2
P16
P12
L17
L16
G
16
AB22
AA22
N
18
T19
C
14
AC
1
AB17
V13
V12
T15
T14
T13
T12
T11
Y19
T18
T17
P18
N
11
L19
L18
K8 K12
K10
J15
H
15
A11
A13
A14
L23
N23
M23
M22
N19
R2
R7
R4
R5
T2
R3
N4
P2
M4
P3
M3
N3
N1
N2
N6
N7
M7
L7
N8
L3
H1
G1
M1
M2
J6
J7
J1
K1
AD9
AD10
AB10
W11
AA13
AB11
W12
U9
T10
AC10
W9
AC8
AB9
AC12
AB7
AB8
AC11
AA15
Y13
AB14
AA12
AD13
U11
AB12
Y12
W14
U13
U15
AB13
W15
AC14
AD15
W13
AD7
AC7
AA7
Y9
AC9
AC6
AA9
AC13
AD12
V9
AA10
Y10
W8
AD6
AC5
AB6
G23
G22
G20
G19
G18
G17
F24
F23
F22
F21
F20
E23
E19
E17
D23
D22
D19
F12
F13
G13
G14
H22
H19
J22
H14
A15
U7
H21
AB15
H20
AB20
AA19
W20
Y23
Y22
U3
V3
Y1
K19
J19
J18
K18
J23
K20
H23
L22
M19
K22
M18
K21
K23
L21
H24
L20
K24
L24
U1
B1
D5
A3
B5
D6
E8
D8
E9
C10
A8
G3
D9
A7
E11
D11
A12
B11
F11
C12
F10
A9
A10
C6
G4
H6
J5
F1
G5
D3
E2
B2
G8
C3
G7
C1
B3
C2
F7
F5
G10
F9
A2
C5
D
17
D
18
D
21
B21
B22
C
22
D
24
AD
4
Y7
AB5
Y6
AC
4
AA5
AB4
AA4
AD
3
AA3
AD
2
W
7
AB3
B15
E14
D
15
D
13
C
15
E15 V6
AC
2
W
4
AB1
W
5
AA2
AD
21
W
17
AD
20
Y16
AC
19
W
16
AC
18
AA16
AB16
Y15
AD
19
AC
17
AD
18
AC
16
AD
16
AC
15
N
22
N
24
P23
N
21
P24
P21
R
23
N
20
T24
P22
R
22
P19
T23
R
18
T22
R
19
U
24
P20
U
23
T21
U
22
T20
W
23
V23
U
21
Y24
W
24
U
20
V22
U
19
W
22
V19
AA23
AA24
AB24
AC
24
AC
23
AD
23
AD
22
AC
21
V18
AB19
AA18
W
19
Y18
U
17
AB18
W
18
AC
20
U
16
C
M
R
S
T
C
M
P
D
N
C
M
V
R
E
F
C
M
H
R
E
F
C
M
P
C
LK
C
M
M
C
LK
C
M
FLA
S
H
C
M
D
A
T9
C
M
D
A
T8
C
M
D
A
T7
C
M
D
A
T6
R
D
N
0_C
M
D
A
T5
R
D
P
0_C
M
D
A
T4
R
C
N
_C
M
D
A
T3
R
C
P
_C
M
D
A
T2
R
D
N
1_C
M
D
A
T1
R
D
P
1_C
M
D
A
T0
TV
R
T
TE
S
T26M
LP
C
E
1B
LP
C
E
0B
LP
TE
LR
S
TB
LR
D
B
LW
R
B
LP
A
0
N
LD
17
N
LD
16
N
LD
15
N
LD
14
N
LD
13
N
LD
12
N
LD
11
N
LD
10
N
LD
9
N
LD
8
N
LD
7
N
LD
6
N
LD
5
N
LD
4
N
LD
3
N
LD
2
N
LD
1
N
LD
0
N
R
N
B
N
C
LE
N
A
LE
N
W
E
B
N
R
E
B
N
C
E
B
K
C
O
L7
K
C
O
L6
K
C
O
L5
K
C
O
L4
K
C
O
L3
K
C
O
L2
K
C
O
L1
K
C
O
L0
K
R
O
W
7
K
R
O
W
6
K
R
O
W
5
K
R
O
W
4
K
R
O
W
3
K
R
O
W
2
K
R
O
W
1
K
R
O
W
0
M
C
0C
M
0
M
C
0D
A
0
M
C
0D
A
1
M
C
0D
A
2
M
C
0D
A
3
M
C
0C
K
JTR
S
T_B
JTC
K
JTD
I
JTM
S
JTD
O
JR
TC
K
B
S
I_C
S
0
B
S
I_D
A
TA
B
S
I_C
LK
B
P
I_B
U
S
0
B
P
I_B
U
S
1
B
P
I_B
U
S
2
B
P
I_B
U
S
3
B
P
I_B
U
S
4
B
P
I_B
U
S
5
B
P
I_B
U
S
6
B
P
I_B
U
S
7
B
P
I_B
U
S
8
B
P
I_B
U
S
9
O
S
C
_IN
V
C
O
_M
O
N
ITO
R
TR
X
IQ
_N
TR
X
IQ
_P
R
B
IA
S
R
F2G
_P
R
F2G
_N
SCLK2
SIO2
SRST2
SCLK
SIO
SRST
RESETB
PWRKEY
VCDT
PMU_TESTMODE
ISENSE
BATON
VDRV
VREF
BATSNS
VRF_S
VRF
VTCXO
VCAMA
VCAMA_S
VCAMD
BST_LX
BXT_OUT
ISINK4
ISINK3
ISINK2
ISINK1
ISINK0
KP_LED
FLASH_SW
VCORE
VCORE_FB
VA
VM
VM_FB
VBT
VIBR
VMC
VUSB
VIO
VSIM
VSIM2
CHR_LDO
SYSCLK
EINT0
EINT1
EINT2
EINT3
EINT4
EINT5
EINT6
URXD2
UTXD2
URXD3
UTXD3
IRDA_TXD
IRDA_RXD
IRDA_PDN
PWM3
PWM4
PWM5
PWM6
USB_VRT
USB_DP
USB_DM
LSA0
LSCK
LSDA
SCL
SDA
SYSRST_B
WATCHDOG
SRCLKENA
FSOURCE
SECU_EN
XBOOT
GPIO58
GPIO63
GPIO64
SPI_CS_N
SPI_SCK
SPI_MOSI
SPI_MISO
VSS_BTRF_11
VSS_BTRF_12
VSS_BTRF_13
VSS_BTRF_14
VSS_BTRF_15
VSS_BTRF_16
VSS_BTRF_17
VSS_BTRF_18
VSS_BTRF_19
VSS_BTRF_20
VSS_BTRF_21
VSS_BTRF_22
VSS_BTRF_23
VSS_BTRF_24
VSS_BTRF_25
VSS_BTRF_26
VSS_BTRF_27
EA0
EA1
EA2
EA3
EA4
EA5
EA6
EA7
EA8
EA9
EA10
EA11
EA12
EA13
EA14
EA15
ED0
ED1
ED2
ED3
ED4
ED5
ED6
ED7
ED8
ED9
ED10
ED11
ED12
ED13
ED14
ED15
ERD_B
EWR_B
ECS0_B
ECS1_B
EWAIT
ECAS_B
ERAS_B
ECKE
ED_CLK_B
ED_CLK
DQS0
DQS1
DQM0
DQM1
EADV_B
EC_CLK_FB
EC_CLK
AU_MOUTR
AU_MOUTL
AU_FMINR
AU_FMINL
AU_OUT0_P
AU_OUT0_N
SPK_P
SPK_N
AU_MICBIAS_P
AVSS
AU_VIN0_P
AU_VIN0_N
AU_VIN1_P
AU_VIN1_N
AUX_XP
AUX_XM
AUX_YP
AUX_YM
AUX_IN4
AUX_IN5
AUX_IN6
AUX_IN7
BDLAIP
BDLAIN
BLKAQP
BDLAQN
APC
AFC
DAICLK
DAIPCMOUT
DAIPCMIN
DAIRST
DAISYNC
XOUT
XIN
TESTMODE
V
D
D
K
1
V
D
D
K
2
V
D
D
K
3
V
D
D
K
4
V
D
D
K
5
V
D
D
K
6
V
D
D
K
7
V
D
D
K
8
V
D
D
K
9
V
D
D
K
10
V
D
D
K
11
D
V
D
D
_C
A
M
D
V
D
D
_E
M
I_1
D
V
D
D
_E
M
I_2
D
V
D
D
_E
M
I_3
D
V
D
D
_E
M
I_4
D
V
D
D
_E
M
I_5
D
V
D
D
_E
M
I_6
D
V
D
D
_E
M
I_7
D
V
D
D
_K
P
D
V
D
D
_M
C
D
V
D
D
_M
C
2
D
V
D
D
_N
FI
D
V
D
D
_P
C
M
D
V
D
D
12_M
IP
I
D
V
D
D
28_M
IP
I
D
V
D
D
28_1
D
V
D
D
28_2
D
V
D
D
28_3
D
V
D
D
28_4
D
V
D
D
28_5
D
V
D
D
43_S
P
K
V
S
S
_1
V
S
S
_2
V
S
S
_3
V
S
S
_4
V
S
S
_5
V
S
S
_6
V
S
S
_7
V
S
S
_8
V
S
S
_9
V
S
S
_10
V
S
S
_11
V
S
S
_12
V
S
S
_13
V
S
S
_14
V
S
S
_15
V
S
S
_16
D
V
S
S
12_M
IP
I
D
V
S
S
28_M
IP
I_1
D
V
S
S
28_M
IP
I_2
D
V
S
S
43_S
P
K
_1
D
V
S
S
43_S
P
K
_2
A
V
D
D
12_P
LL
A
V
S
S
12_P
LL
A
V
D
D
12_U
S
B
A
V
S
S
12_U
S
B
V
C
C
_R
TC
G
N
D
_R
TC
A
V
D
D
28_A
FE
A
V
S
S
28_A
FE
A
V
D
D
28_M
B
U
F
A
V
S
S
28_M
B
U
F
A
V
D
D
28_M
IP
I
A
V
S
S
28_M
IP
I
A
V
D
D
28_P
LL
A
V
S
S
28_P
LL
A
V
D
D
28_R
FE
A
V
S
S
28_R
FE
_1
A
V
S
S
28_R
FE
_2
A
V
D
D
33_U
S
B
A
V
S
S
33_U
S
B
A
V
D
D
43_V
A
A
V
D
D
43_V
C
O
R
E
A
V
S
S
43_V
C
O
R
E
A
V
D
D
43_V
D
1
A
V
D
D
43_V
D
2
A
V
S
S
43_LD
O
S
A
V
D
D
43_V
M
A
V
S
S
43_V
M
A
V
D
D
43_V
R
F
A
V
S
S
43_V
R
F
A
V
S
S
43_B
S
T
A
V
S
S
43_D
R
V
V
C
C
28_B
B
LD
O
V
C
C
28_LD
O
_R
X
R
F
V
C
C
28_O
S
C
V
C
C
28_P
A
V
C
C
28_S
X
V
S
S
_B
TR
F_1
V
S
S
_B
TR
F_2
V
S
S
_B
TR
F_3
V
S
S
_B
TR
F_4
V
S
S
_B
TR
F_5
V
S
S
_B
TR
F_6
V
S
S
_B
TR
F_7
V
S
S
_B
TR
F_8
V
S
S
_B
TR
F_9
V
S
S
_B
TR
F_10
C134
2.2u
VRTC_2V8
22p
C160
VCAM_2V8
C101
2.2u
VBAT
1u
C
110
C
142
10u
C167 2.2u
C
144
10u
R104
2.2K
VUSB_LDO_4V9
ANT1
DSBTPTR2010
2 1 FEED GND
2.2u
L100
A
V
D
D
_2V
8
A
V
D
D
_2V
8
A
V
D
D
_2V
8
V
B
A
T
V
B
A
T
V
B
A
T
V
B
T
_2V
8
V
B
T
_2V
8
C
126
1u
V
M
E
M
_1V
8
R110
7.5K
VMEM_1V8
1u
C
120
R105
2.2K
C15
DNI
C14
DNI
V
IO
_2V
8
V
IO
_2V
8
V
M
C
_3V
3
0.5p
C
123
C
122
1u
5p
C
125
V
B
T
_2V
8
1u
C
102
FB100
220
C
117
1u
V
B
A
T
V
IO
_2V
8
1u
C
118
C
121
0.1u
C
119
1u
A
V
D
D
_2V
8
V
R
T
C
_2V
8
1u
C
116
V
U
S
B
_3V
3
C
112
1u
V
C
O
R
E
_1V
2
V
B
A
T
VMC_3V3
V
C
O
R
E
_1V
2
1u
C
107
1u
C
104
C
105
1u
0.1u
C
111
V
M
E
M
_1V
8
V
IO
_2V
8
C17
7p
R117
330k
VBAT
V
C
O
R
E
_1V
2
VUSB_LDO_4V9
VSIM_3
VIO_2V8
VUSB_3V3
VBT_2V8
AVDD_2V8
2.2u L101
VMEM_1V8
VCORE_1V2
1K R101
1u
C
138
VRF_2V8
C13
DNI
C11
100p
C12
DNI
FL4
2450MHz
4 2
3 1
IN OUT
GND1 GND2
C10
100p
1u
C
139
C
168
1.2p
C169
100n
C170
100n
C171
100n
C174
4.7u
R119
680
R133
100K
C166 0.1u
VIO_2V8
R108
2.2K
R109
2.2K
AVDD_2V8
VMIC_BIAS_P
39p C151
39p
C
157
C
156
39p
39p
C
155
C
154
39p
R120
680
C106
0.1u
2.2K
R141 R140
2.2K
VIO_2V8
R121
680
TP101
C16
3.9p
1u
C
175
X100
NX3215SA
32.768KHz
2 1
C176
2.2u
VCAMA_2V8
R122
680
R123
680
R124
680
R125
680
R126
680
R127
680
R128
680
R129
680
R130
680
R131
680
R132
680
C172 1n
L102
10n
C173
1n
C128
4.7u
R100
1M
OJ101
OJ103
0.1u
C103
600
FB101
L1
1.8n
FB103
600
CN100
8 7
9 6
10 5
11 4
12 3
13 2
14 1
R111
15K
R134
130K
VBAT
R135
1.5K
R106
5.1K
GND
SD_D_[09]
SD_D_[08]
SD_D_[07]
SD_D_[06]
SD_D_[05]
SD_D_[04]
SD_D_[03]
SD_D_[02]
SD_D_[01]
SD_D_[00]
I2C_SCL1
SD_CS_N
SD_CAS_N
SD_RAS_N
RST_N
RST_N
RST_N
I2C_SDA1
K
E
Y
_R
O
W
1
LN
A
N
D
_D
_[07]
LN
A
N
D
_D
_[06]
LN
A
N
D
_D
_[05]
LN
A
N
D
_D
_[04]
LN
A
N
D
_D
_[03]
LN
A
N
D
_D
_[02]
LN
A
N
D
_D
_[01]
LN
A
N
D
_D
_[00]
N
A
N
D
_W
R
_N
K
E
Y
_C
O
L5
K
E
Y
_R
O
W
0
K
E
Y
_R
O
W
2
K
E
Y
_R
O
W
3
K
E
Y
_R
O
W
4
K
E
Y
_C
O
L0
K
E
Y
_C
O
L1
K
E
Y
_C
O
L3
K
E
Y
_C
O
L4
NAND_WP_N
N
A
N
D
_C
S
_N
N
A
N
D
_B
S
Y
_N
USB_DP_UART_TX
USB_DM_UART_RX
N
A
N
D
_R
E
_N
N
A
N
D
_C
LE
_N
LC
D
_R
S
SD_WR_N
SD_DQS_0
SD_DQS_1
SD_CLKN
SD_CLKP
N
A
N
D
_A
LE
_N
LC
D
_R
D
_N
END_KEY
LC
D
_V
S
Y
N
SD_BA_[0]
SD_BA_[1]
CHG_EN
ACC_ID
SD_A_[13]
LCD_ID
EOC
KEY_BL0
KEY_BL1
BAT_Temp
BAT_Temp
VIB_N
SIM_3_DATA
SIM_1_2_CLK
SIM_1_2_DATA
SIM_1_2_RST
SIM_3_RST
B_LED_EN
G_LED_EN
R_LED_EN
C
A
M
_R
S
T
_N
C
A
M
_P
W
D
N
C
A
M
_D
A
T
A
[0]
C
A
M
_D
A
T
A
[1]
C
A
M
_D
A
T
A
[2]
C
A
M
_D
A
T
A
[3]
C
A
M
_D
A
T
A
[4]
C
A
M
_D
A
T
A
[5]
C
A
M
_D
A
T
A
[6]
C
A
M
_D
A
T
A
[7]
C
A
M
_P
C
LK
C
A
M
_V
S
Y
N
C
C
A
M
_H
S
Y
N
C
M
S
D
_D
[1]
M
S
D
_D
[0]
M
S
D
_D
[2]
M
S
D
_D
[3]
M
S
D
_D
E
T
_N
M
S
D
_C
M
D
M
S
D
_C
LK
K
E
Y
_R
O
W
7
K
E
Y
_C
O
L7
K
E
Y
_C
O
L2
K
E
Y
_R
O
W
5
C
A
M
_M
C
LK
SIM_3_CLK
u_SD_LDO_EN
R
F
_S
_E
N
R
F
_S
_D
A
T
A
R
F
_S
_C
LK
RF_IN
RF_IP
RF_TX_RAMP
RF_QN
RF_QP
MIC_N
MIC_P
HS_R
HS_L
SD_D_[15]
SD_D_[14]
SD_D_[13]
SD_D_[12]
SD_D_[11]
SD_D_[10]
SD_CKE
SD_DQM_0
SD_DQM_1
SD_A_[00]
SD_A_[01]
SD_A_[02]
SD_A_[03]
SD_A_[04]
SD_A_[05]
SD_A_[06]
SD_A_[07]
SD_A_[08]
SD_A_[09]
SD_A_[10]
SD_A_[11]
SD_A_[12]
LC
D
_C
S
_N
LC
D
_R
S
T
_N
I2C_SCL2
I2C_SDA2
LC
D
_W
R
_N
UART_RX
UART_RX
UART_TX
UART_TX
JTAG_TRST_B
JT
A
G
_T
R
S
T
_B
JTAG_TCK
JT
A
G
_T
C
K
JTAG_TDI
JT
A
G
_T
D
I
JTAG_TMS
JT
A
G
_T
M
S
JTAG_TDO
JT
A
G
_T
D
O
JTAG_RTCK
JT
A
G
_R
T
C
K
LN
A
N
D
_D
_[15]
LN
A
N
D
_D
_[13]
LN
A
N
D
_D
_[12]
LN
A
N
D
_D
_[11]
LN
A
N
D
_D
_[10]
LN
A
N
D
_D
_[09]
LN
A
N
D
_D
_[08]
LN
A
N
D
_D
_[14]
HP_MIC_P
HP_MIC_N
JACK_DETECT
W
IF
I_32K
W
iF
i_C
S
FM_INT
C
LK
_26M
CLK_26M
DCLK
DFS
DIN
PCB_REV
PCB_REV
I2C_SCL3
I2C_SDA3 RF_AFC
FM_RST
WiFi_RST
W
iF
i_E
N
WIFI_INT
B
T
_P
R
I
R
F
_
A
N
T
_
S
W
2
R
F
_P
A
_E
N
R
F
_A
N
T
_S
W
1
SPEECH_P
SPEECH_N
HOOK_DET
FM_32K
Seperate GND
VSIM2
VSIM
DVDD28(VIO)
DVDD_NFI(VM)
DVDD28(VIO)
DVDD28(VIO)
DVDD28(VIO)
DVDD_MC
DVDD_NFI(VM)
DVDD_CAM(VIO)
DVDD28 (VIO)
DVDD28 (VIO)
DVDD28 (VIO)
DVDD_MC2(VIO)
DVDD_CAM(VIO) DVDD28_MIPI(VIO) DVDD_NFI(VM) DVDD_NFI(VM) DVDD_NFI(VM) DVDD_KP(VIO) DVDD28(VIO) DVDD28
(VIO)
DVDD28 (VIO)
VCC28_LDO_RXRF (VBT)
VCC28_SX (VBT)
VCC28_OSC (VBT)
VCC_RTC
(VRTC)
AVDD28_RFE
(VA)
AVDD28_RFE
(VA)
AVDD28_RFE
(VA)
AVDD28_RFE
(VA)
AVDD28_AFE
(VA)
AVDD28_AFE
DVDD43-SPK
(VBAT)
AVDD28_AFE
(VA)
AVDD28_MBUF
(VA)
DVDD_EMI
(VM)
DVDD_EMI
(VM)
DVDD_EMI
(VM)
DVDD_DMI (VM)
INTERRUPT
UART&IrDA
USB
PWM
LCD_PMIC
CAMERA LCD_NAND_IO(DATA) KEY u-SD JTAG
AUDIO
MEMORY_CONTROL
SDRAM-DATA
SDRAM_ADDRESS
RF_IQ
RF serial Parallel
SIM
DVDD28(VIO) LCD_BL_COTROL
Supply Voltage
ADC_PORT
AVDD33_USB
(VUSB)
(VMC_3V3)
SPI block
BT_CLOCK
Seperate GND
Close to Ic
1%
(1%)
(1%)
1%
13 LDOs
(4 Analog LDOs + 9 Digital LDOs)
Memory Card or Bluetooth
Digital Camera Power 100 1.3/1.5/1.8/2.5/2.8/3.0/3.3
VMC
VM
SIM Card2, Selectable
SIM Card, Selectable
13/26 MHz Reference Clock
RTC
Analog Baseband
RF Chip
Digital IO
External Memory, Selectable
100
1.3/1.5/1.8/2.5/2.8/3.0/3.1/3.3
R2
----
VSIM2
100
1%
1%
PCB VERSION CHECK
100 VBT_2V8
100K
100K
100K
VBT
100K
100K
100K 5.6K
2.8V
2.8V
1.3/1.5/1.8/2.5/2.8/3.0/3.3
2.8V
2.8V
2.8V Rev.1.0
2.8V
2.8V
100K
# PCB Revision Check ADC
REV
E
130K
C 27K
47K
D 36K
B
100K
VSIM2_PWR
100 1.8 / 3.0 VSIM1_PWR
EVB
VRTC_2V8 VRTC
VDD
0.6 2.8
125
250
100
2.8
2.8V
2.8
1.8
0.9 to 1.3
2 Bucks
100K
A
VIO_2V8
VCORE Digital Core 350 VCORE_1V2
Description
(Connected Device)
Output Current(mA) Output Voltage(V) Net Name Name of PMIC
MTK Recommended
S
eperate G
N
D
MTK Recommended
USB
Analog Camera Power 250
2.8
3.3
1.3/1.5 / 1.8 /2.8
VUSB_3V3
VCAM_2V8
VCAM_1V8
VRF_2V8
VCAM_D
VCAM_A
VUSB
VSIM
VA
VRF
VIO
AVDD_2V8
VMEM_1V8 300
VTCXO 2.8 40
VIBR ---- 1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 Vibrator
VMC 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100 Memory Card
ON-Board JTAG, UART Debug Interface
19.1K
Super Cap
FM I2S
Rev.1.1
R1 R2
12K
ADC
0.148V
0.449V
0.595V
0.741V
1.400V
0.895V
1.582V
0.300V
R1
7. CIRCUIT DIAGRAM
0.5p
C1338
4.7u C214
12n
L230
FL200
10 5 3 2
6 4
7
8
9 1 IN O1_1
O1_2
O2_1
GND O2_2
C_G1
C_G2
C_G3
C_G4
FL201
10 5 3 2
6 4
7
8
9 1 IN O1_1
O1_2
O2_1
C_C5 O2_2
C_G1
C_G2
C_G3
C_G4
4.7u
C277
AN200
AN203
AN201
L231
2.2n
12p
C19
C274
15p
DSBTPTR2010
ANT2
2
1
FEED
GND
100p
C276
2.2u
C20
4.7p C1322
10p
C21
18p
C22
PALDO_3V3
49.9
R9
X202 1XTW26000FAA
26MHz
2 1
3 4
VCC OUT
GND1 GND2
C18
1u
FL203
3
2
1
IN
GND OUT
X201
26MHz
DSX321G-26M
2 1
3 4
22p C283
C284
100p
C271 100p C280 6p
U206
K1
F7
F6
G
7
G
6
D9
D7
D6
C9
A10
A5 E5 C
5
B3 A4 A3 C
3
A2 B1 A1 B5
J4
K4
E3
G3
G2
G1
J2
H2
K2
J1
J3
H3
H7
K9
J9
D1
D2
E8
E9
E6
E7
F10
F4
F8
G9
J8
K8
E2
H8
B8
C6
B9
A7
F9
D4
D3
C2
E10
A8
D10
A9
A6
C10
B10
H
4
H
5
H
6
K6 J5 J6 F2 F3
G
10
H
9
H
10
J10 C
1
G
4
K10 K7 J7 H
1
E1
FS
O
U
R
C
E
D
V
D
D
IO
3
D
V
D
D
IO
2
D
V
D
D
IO
1
D
V
D
D
IO
0
P
A
D
_V
D
D
K
1
C
LD
O
U
A
R
T_D
B
G
_TX
U
A
R
T_D
B
G
_R
X
G
P
IO
_1
G
P
IO
_0
C
S
_N
W
E
_N
D
15
D
14
D
13
D
12
D
11
D
10
TRX_IO_P
TRX_IO_N
AVDD33_XO
AVDD33_TX
AVDD16_TRX
AVDD16_SX
AVDD16_LF
AVDD16_CLDO
AVDDRTC
AVSSRTC
OSC_EN
OSC_IN
AVSS33_PA3
AVSS16_WF1
AVSS16_VCO
EXT_INT_B
WIFI_INT_B
ANTSEL_0
ANTSEL_1
ANTSEL_2
ANTSEL_3
CGND1
PAD_ICAL_EXTR
TRXIN
TRXIP
TRXQN
TRXQP
X32K_OUT
X32K_IN
XTEST
SYSRST_B
BT_PRI
D0
D1
A0
D3
D2
OE_N
D4
D5
D6
D7
D8
D9
P
A
D
_E
N
R
E
F
G
N
D
_R
E
F
A
V
D
D
43_R
E
F
O
U
T_FB
LX
B
K
A
V
D
D
43_S
M
P
S
A
G
N
D
43_S
M
P
S
G
N
D
_P
A
LD
O
P
A
LD
O
_FB
P
A
LD
O
AVSS33_PA1
AVSS33_PA2
AVSS16_WF2
AVSS16_WF3
AVSS16_WF4
P
A
D
_V
D
D
K
2
P
A
D
_V
D
D
K
3
CGND2
CGND3
CGND4
PALDO_3V3
1.8p
C299
0.1u
C245
PALDO_3V3
R200 DNI
C278
DNI
C298
DNI
22u C282
10p
C206
100K
R252
C295
1u
TP202
VBAT
C270
4.7u
SMPSLDO_1V6
VBAT
R254
24K
VIO_2V8
100K
R255
C200 100p
100p C288
C289 100p
C211
0.1u
1u
C207
18n
L203
5.6n
L209
6.8p C235
U200
21
16 17 18 19 20
11
12
13
14
15
10 9 8 7 6
5
4
3
2
1 NC1
FMI
RFGND
LPI
RST_
S
E
N
_
S
C
LK
S
D
IO
R
C
LK
V
D
DOUT
LOUT
ROUT
GND
VA
N
C
2
G
P
O
1
G
P
02_IN
T_
G
P
O
3_D
C
LK
D
FS
G
_S
LU
G
1n C204
TP200
TP201
1u
C244
1u
C246
1u
C247
VIO_2V8
VMEM_1V8
49.9
R253
0.1u C232
10p C229
C227 1u
0.1u C226
9.1n
L212
C225 18p
C231 18p
C233 18p
220
R239
1n C223
10K
R270
2.2K
R222
C259
220n
2.2K
R224
2.2K
R223
R225
2.2K
DNI
C203
R230
100K
C236 6.8p
C1327
DNI
C262
1u
L213
3n
10K
R203
VBAT
10p C240
C238 10p
100K
R205
C1326
DNI
C243
2.2u
DNI R290
L211
5.6n
L206
22n
C230 18p
2K R240
2K R241
1p
C1321
100K
R212
L228
3.3n
L229
3.3n
FL204
3
1
2
4
B/P_2
B/P_1
Gnd/DC_fd
UnB/P
1.2p
C1325
L220 22n
VIO_2V8
VBAT
R242
680
C228 0.1u
1M
R263
C239
1u
VRTC_2V8
SMPSLDO_1V6
PALDO_3V3
0.1u
C221
VIO_2V8
C272
1n
39p C275
C234
33p
1K R228
82p
C250
C252 0.1u
0.1u
C258
C260
47p
82p
C249
VRF_2V8 AVDD_2V8
VIO_2V8
0.1u
C261
VBAT
C254
0.1u
C255
0.1u
C256
0.1u
C257
27p
L225
2.2u
C1333 100p
U205
16 15 14 13 12 11 10 9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
25 26 27 28 29 30 31 32 33
GND
RX850
RX850B
RX900
RX900B
RX1800
RX1800B
RX1900
RX1900B
VCC_FE VCC_BBQ
I Q
IB QB
VCC_BBI REF_OP
SDATA REFIN
SCLK REFINB
SEN VAFC_NC
NC VCC_REF
VLDO3
TXOP_LO
TXOP_HI
VCC_TXVCO
VDD
VBAT
VLDO1
VLDO2
FB200
120
C287
220p 100p
C285
U215
12
1110987
13
6
14
5
15
4
16
3
17
2
18
1
1920212223
GND_SLUG
VRAMP
TX_ENABLE
GPCTRL0
GPCTRL1
GND1
VBATT
GND2
NC3
RFIN_LB
GND9
GND3
GND8
RFIN_HB
ANT
GND4
NC2
GND5
GND6
GND7
NC1
RX0
RX1
C29122p
C29033p
22p
C286
R282
180
R288
24K
R281
10K
R284
180
R283
30
C293
33p
DNI
C1337
R286
24
C1336 100p
220
R287
220
R285
SW201
G2 ANT RF G1
I2C_SCL1
I2C_SDA1
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[00]
LCD_RS
LCD_RD_N
RF_S_EN
RF_S_DATA
RF_S_CLK
RF_IN
RF_IP
RF_TX_RAMP
RF_QN
RF_QP
LCD_WR_N
WIFI_32K
WiFi_CS
FM_INT
CLK_26M
DCLK
DFS
DIN
FM_AUDIO_L
FM_AUDIO_R
RF_AFC
LowBand_Tx
Low
B
and_T
x
HighBand_Tx
H
ighB
and_T
x
Low
B
and_R
x
LowBand_Rx
H
ighB
and_R
x
HighBand_Rx
EGSM_RxN
E
G
S
M
_R
xN
P
C
S
_R
xP
PCS_RxP
G
S
M
850_R
xP
GSM850_RxP
GSM850_RxN
G
S
M
850_R
xN
E
G
S
M
_R
xP
EGSM_RxP
PCS_RxN
P
C
S
_R
xN
DCS_RxN
D
C
S
_R
xN
D
C
S
_R
xP
DCS_RxP
FM_RST
WiFi_RST
WiFi_EN
WIFI_INT
BT_PRI
RF_ANT_SW2
RF_PA_EN
RF_ANT_SW1
ANT_FEED
ANT_FEED
FM_ANT
FM_32K
GSM_QUAD
Star connection
MT5931 WIFI
FM RADIO
ANT_PAD
as close as possible to pin
7. CIRCUIT DIAGRAM
TP3
R
301
4.7K
J300
C11 C10
C12 C9
C7 C3
C6 C2
C5 C1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
J301
C11 C10
C12 C9
C7 C3
C6 C2
C5 C1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
TP4
GB042-24S-H10-E3000
CN301
ENBY0034201
13 12
14 11
15 10
16 9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
1 R312
R313 1
C346
DNI
VCAMA_2V8
VCAM_2V8
VCAM_1V2
C
343
0.1u
0.1u
C
344
C
345
0.1u
DNI
C347
VA312
VA313
VA314 VA315
FB303
600
FB304
600
FB305
600
VA316 VA300 VA317
VA306 VA307 VA308
R
302
4.7K
VA309 VA310
VA311
25pF
FL302
105
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G1 G2
1K
R310
2.2u
C337
1u
C310
VCAM_1V2
2.2u
C332
2.2u C306
DNI
C324
DNI
C325
2.2u
C334
VIO_2V8
VBAT
C331 1u 1u C330
2.2u
C333
100K
R311
VHP_MIC_2V6
C328
1u
C329
33p DNI
C326
DNI
C327
U302
21
20
19
18
8
7
6
5
9
4
10
3 11
2
12
1
13
14
15
16
17
LED3
LED4
NC2 LDO2
AVIN
C1N
LDO1
C2N
AGND
PGND
NC1
C2P
ENA
C1P
PVIN
SCL
SDA
LED2
LED1
VOUT
SLUG_G
25pF
FL300
10 5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G1G2
1u
C311
VSIM_1
U300
B6
B3
B4
A4
A7
A3
A6
M8
L7
M7
N5
N4
M4
N3
N2
L8
M6
L6
N7
L5
M3
M2
M1
H7
D5
H8
D7
J1
G2
F2
H2
D3
F8
G8
B7
B8
C7
C8
C6
D8
C5
E6
J5
J7
K8
J8
K7
K6
K5
K4
J2
H3
E1
E2
J3
C4
D2
C3
D1
C2
B2
K3
K2
K1
J4
N9
N6
M10
L9
L2
K10
J10
H9
H1
G9
F10
E9
D10
C9
B10
B5
B1
A9
M5
A5
L4
L3
J6
H6
H5
H4
G7
G6
G5
G4
G3
F7
F6
F5
F4
F3
F1
E8
E7
E5
E4
E3
D6
D4
A2
M9
L10
K9
J9
H10
F9
E10
D9
C10
B9
N8
L1
G10
G1
C1
A8
N
10 N
1
A10 A1
N
C
1
N
C
26
N
C
28
N
C
29
VDD1
VDD2
VDD3
VDD5
VDD4
VDD6
VDDQ1
VDDQ6
VDDQ5
VDDQ4
VDDQ10
VDDQ9
VDDQ2
VDDQ8
VDDQ7
VDDQ3
NC27
NC20
NC21
NC9
NC19
NC8
NC11
NC12
NC17
NC18
NC7
NC16
NC25
NC6
NC10
NC5
NC13
NC14
NC4
NC2
NC24
NC22
NC23
A13
NC3
VCC1
VCC2
VSS1
VSS4
VSS8
VSSQ5
VSSQ4
VSSQ9
VSSQ8
VSSQ3
VSS2
VSS3
VSSQ10
VSSQ1
VSSQ2
VSS5
VSSQ6
VSSQ7
VSS6
VSS7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
/CK
CK
CKE
/CS
/RAS
/CAS
/WED
UDQM
LDQM
UDQS
LDQS
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO8
IO9
IO10
IO11
IO12
IO13
IO14
IO15
/CE
/RE
/WE
CLE
ALE
/WP
R/B
C300
DNI
C301
DNI DNI
C302
C314
DNI DNI
C313 C312
DNI
VSIM_2
VIO_2V8 VMEM_1V8
C309 0.1u
C307 0.1u
C308 0.1u
C317 0.1u
VMEM_1V8
VMEM_1V8
VMEM_1V8
R300
100
FL301
25pF
105
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G1 G2
TP2
TP1
1u
C3 C2
1u
C1
1u 2.2u
C9
2.2u
C8 VSIM_1 VSIM_2
VBAT
TP310
VIO_2V8
U
1
14
13
12
11
10
9
8
15 7
16
6
17
5
18
4 19
3
20
2
21
1
22
23
24
25
26
27
28
29
G
N
D
SIO2/GPIO6
VSIM3
SIO3/GPIO9
SRST3/GPIO8
SCLK3/GPIO7
SYSR
STB
SDA
SRST2/GPIO5
SCL
SCLK2/GPIO4
CE0
VSIM2
VIO
VBAT
SIMIO2/GPI18
VSIM1
SIMRST2/GPI17
SCLK1/GPIO1
SIMCLK2/GPI16
SIO1/GPIO3
VSIM4
SCLK4/GPIO10
SRST4/GPIO11
SIO4/GPIO12
SIMIO1/GPI15
SIMRST1/GPI14
TP311
TP312
TP313
TP314
VBAT
R304
DNI
DNI
R305
C336
2.2u
CN300
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
2.2u C316
SD_D_[09]
SD_D_[08]
SD_D_[07]
SD_D_[06]
SD_D_[05]
SD_D_[04]
SD_D_[03]
SD_D_[02]
SD_D_[01]
SD_D_[00]
I2C_SCL1
I2C_SCL1
SD_CS_N
SD_CAS_N
SD_RAS_N
RST_N
I2C_SDA1
I2C_SDA1
LNAND_D_[07]
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[01]
LNAND_D_[00]
LNAND_D_[00]
NAND_WR_N
NAND_WP_N
NAND_CS_N
NAND_BSY_N
NAND_RE_N
NAND_CLE_N
LCD_RS
SIM_1_RST
SIM_1_RST
SIM_1_CLK
SIM_1_CLK
SD_WR_N
SD_DQS_0
SD_DQS_1
SD_CLKN
SIM_1_DATA
SIM_1_DATA
SD_CLKP
NAND_ALE_N
LCD_RD_N
SIM_2_RST
SIM_2_RST
SIM_2_CLK
SIM_2_CLK
SIM_2_DATA
SIM_2_DATA
LCD_VSYN SD_BA_[0]
SD_BA_[1]
SD_A_[13]
LCD_ID
BLED_CA0
BLED_CA0
BLED_CA1
BLED_CA1
BLED_CA2
BLED_CA2
BLED_CA3
BLED_CA3
SIM_1_2_CLK
SIM_1_2_DATA
SIM_1_2_RST
CAM_RST_N
CAM_PWDN
CAM_DATA[0]
CAM_DATA[1]
CAM_DATA[2]
CAM_DATA[3]
CAM_DATA[4]
CAM_DATA[5]
CAM_DATA[6]
CAM_DATA[7]
CAM_PCLK
CAM_VSYNC
CAM_HSYNC
CAM_MCLK
SD_D_[15]
SD_D_[14]
SD_D_[13]
SD_D_[12]
SD_D_[11]
SD_D_[10]
SD_CKE
SD_DQM_0
SD_DQM_1
SD_A_[00]
SD_A_[01]
SD_A_[02]
SD_A_[03]
SD_A_[04]
SD_A_[05]
SD_A_[06]
SD_A_[07]
SD_A_[08]
SD_A_[09]
SD_A_[10]
SD_A_[11]
SD_A_[12]
LCD_CS_N
LCD_RST_N
LCD_WR_N
LNAND_D_[15]
LNAND_D_[13]
LNAND_D_[12]
LNAND_D_[11]
LNAND_D_[10]
LNAND_D_[09]
LNAND_D_[08]
LNAND_D_[14]
I2C_SCL3
I2C_SDA3
3M_CAM
LCD Charge Pump LCD INTERFACE
hynix 2G/1G DDR
SIM_Mux_1_2
7. CIRCUIT DIAGRAM
C4022.2u
R427 0
C4032.2u
R402
47K
L401 100n
VA400
C440
0.1u
ZD404
R428 0
R431
DNI
10u
C430
CN400
2
1
VA408
R415
1K
R407
150K
VA401
ZD402
ZD401 ZD405
600 FB402
C439 1u
1u C438
DNI
C437
600 FB403
L402 100n
J400
2
3
4
5
6
1 M5
M4
M3
M4F
M1
M6
VA409
VA407
Q400
1
3
2
G
D
S
C435
39p
100n
L400
39p
C436
R434
470
47p
C433
10p
C418
R414
100
C434
47p
1u C420
1u C419
0.1u
C427
R430 1
MIC400
2
1
U401
4 3
2
5 1
IN+ VCC
GND
IN- OUT
1M
R406
VIO_2V8
VIO_2V8
100K
R404
VIO_2V8
R429 1
C401
0.1u 2.2u
C400
39p
C426
39p
C431
1u C409
C408 1u
2.2u
C413
0.1u
C411
0.1u
C410
R401
20 20
R400
VMEM_1V8
VBAT
IC400
B
3
A4
C3
C2
B
2
D1
D3
D
4
C1
A1 D2
B
1
D5
A2
A5
A3
B5
B
4
C5
C
4
G
N
D
OUT+
H
P
V
D
D
CPVDD
CPVSS
CN
HPL
OUT-
B
IA
S
IN2- HPR
IN1+
S
V
D
D
IN3-
IN2+
S
D
A
IN1-
IN3+
CP
S
C
L
C415
2.2u
C416
2.2u
2.2u
C412
C414 2.2u
R421
100 0.1u
C432
R417
2.2K
2.2K
R422
C429
47p
VMIC_BIAS_P
10u
C423
1800 FB408
1800 FB409
1800
FB407
0.1u
C425
0.1u
C428
39p
C424
R403
100K
2.2Kohms
R419
VHP_MIC_2V6
VIO_2V8
C421
DNI
10
R405
ZD400
FB410
1800
1.5Kohms
R418
R420
100
39pF
C404
39pF
C405
MIC_N
MIC_P
HS_R
HS_L
I2C_SCL2
I2C_SDA2
HP_MIC_P
HP_MIC_N
JACK_DETECT
FM_AUDIO_L
FM_AUDIO_R
SPEECH_P
SPEECH_N
HOOK_DET
FM_ANT
HS_OUT_L
HS_OUT_L
HS_OUT_R
HS_OUT_R
SPK_N
SPK_N
SPK_P
SPK_P
ON
OFF
HOOK_DET IN-
High
Low
0 V
2.8V
SK_RCV
MAIN MIC
BB side place
MIC side place
BB side place
3.5phi HEADSET
AUDIO SUBSYSTEM
RCV Circuit
7. CIRCUIT DIAGRAM
1u
C514
FL500
5
6
3 1
4 2
P2 P4
P1 P3
P6
P5
VA532
CN503
11 10
12 9
13 8
14 7
15 6
16 5
17 4
18 3
19 2
20 1
VA526
1u
C543
ZD501
VA545
VA535 VA533 VA534
R538
100K
VIO_2V8
KB532
KB539 KB544 KB543
KB542 KB541 KB535 KB537
KB525 KB526 KB527
KB528
VMC_3V3_LDO
KB529
KB538 KB536
KB534 KB533
KB524
KB530 KB531
KB523 KB522 KB521
KB520 KB517 KB516 KB519 KB518 KB514 KB515
KB540
KB508 KB509 KB510 KB511 KB512 KB513 KB507
KB506 KB505 KB503 KB502 KB501 KB500 KB504
33u
C534 CN502
3
2
1
D1
D2
0.1u
C544
VA527
VA524
VA522
VA523
VA520
VA521
VA518
VA519
VA512
VA511
VA514
VA513
VA515
VA517
KB547 KB546
VA509 VA510
D500
C525
1u
R539
DNI
DNI
C526
DNI
C545
C527
DNI
DNI
C528
C529
2.2u
VA536 VA537
VA538
DNI
C546
U500
6 5
7 4
8 3
9 2
10 1
11
PGND
VIN BATT
ISET PGB
GND1 CHGSB
LDO GND2
IEOC EN_SET
U501
5
3 2
4 1
VOUT VDD
GND CE
P
G
N
D
C540
1u
C541
1u
VBAT
VMC_3V3_LDO
ZD502
C533
33u
C532
33u
CN500
11
10
9
5
4
3
2
1
8
7
6
ZD503 ZD504
LD501
2
1 A
C
LD500
2
1 A
C
C502
1u
LD512
3 2 1
4
RGB
VBAT
R502
820
VSIM_3
VA539 VA540 VA541
VA542 VA543 VA544
C512
1u
R536
DNI
0.1u
C504
R525
1K
100K
R504
VIO_2V8
22pF
C503
VBUS_USB
5.6p
C510
VBAT
VUSB_LDO_4V9
0.1u
C513
R503
3K
VBAT VBUS_USB
KB545
AVDD_2V8
C501
1u
240K
R531
VBAT
VBAT
240K
R524
AVDD_2V8
VB500
2
1
C509
10p
GND
K
E
Y
_
R
O
W
1
KEY_COL5
K
E
Y
_
R
O
W
0
K
E
Y
_
R
O
W
2
K
E
Y
_
R
O
W
3
K
E
Y
_
R
O
W
4
KEY_COL0
KEY_COL1
KEY_COL3
KEY_COL4
USB_DP_UART_TX
USB_DM_UART_RX
END_KEY
CHG_EN
ACC_ID
EOC
KEY_BL0
KEY_BL1
BAT_Temp
VIB_N
SIM_3_DATA
SIM_3_RST
B_LED_EN G_LED_EN R_LED_EN
MSD_D[1]
MSD_D[0]
MSD_D[2]
MSD_D[3]
MSD_DET_N
MSD_CMD
MSD_CLK
K
E
Y
_
R
O
W
7
KEY_COL7
KEY_COL2
K
E
Y
_
R
O
W
5
SIM_3_CLK
u_SD_LDO_EN
MSD LDO
UP RIGHT
MAIN TO FPCB CONN.
LEFT
OK
SPACE .(period)
DOWN Message/Lock SYM
LEFT SOFT RIGHT SOFT
SEND
@ Shift ENTER ,(comma)
M N B V C X Z
Fn Del L
u-USB CONN.
BAT CONN.
MOTOR
K J
End Key
H
KEY BACKLIGHT
END
3-SIM INDICATOR
(1%) (1%)
(1%)
G
WiFi
F D S A P O I
U Y T R E W Q
KEY MATRIX
CAMERA Dual SIM
Line Width: 2mm
SINGLE CHARGER
(1%)
7. CIRCUIT DIAGRAM
VSIM_3
VMC_3V3_LDO
J700
C11 C10
C12 C9
C7 C3
C6 C2
C5 C1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VSIM_3
CN701
14
13
12
11
10
8
7
6
5
4
3
2
1
9
SW1
SW2
VMC_3V3_LDO
CN700
11 10
12 9
13 8
14 7
15 6
16 5
17 4
18 3
19 2
20 1
GND
SIM_3_CLK
SIM_3_CLK
MSD_CLK
MSD_CLK
SIM_3_RST
SIM_3_RST
SIM_3_DATA
SIM_3_DATA
MSD_D[1]
MSD_D[1]
MSD_D[0]
MSD_D[0]
MSD_D[2]
MSD_D[2]
MSD_D[3]
MSD_D[3]
MSD_DET_N
MSD_DET_N
MSD_CMD
MSD_CMD
FPCB TO MAIN CONN.
u-SD CARD
#3 SIM CARD
8. BGA PIN MAP
- 148 -
8. BGA PIN MAP
BGA IC pin check (U100)
MT6236 TFBGA 12.5mm x 12.5mm, 382ball
8. BGA PIN MAP
- 149 -
130bal 8.0X9.0 MCP(x16 SLC NAND + x16 LPDDR)
8. BGA PIN MAP
Cop,riqhl ?007 LG Eloolronios. no. All riqhl rosorvod.
Onl, or lraininq and sorvioo purposos
LGE nlornal Uso Onl,

130bal 8.0X9.0 MCP(x16 SLC NAND + x16 LPDDR)
: not in use
8. BGA PIN MAP
- 150 -
TFBGA ball Type
8. BGA PIN MAP
Cop,riqhl ?007 LG Eloolronios. no. All riqhl rosorvod.
Onl, or lraininq and sorvioo purposos
LGE nlornal Uso Onl,

TFBGA ball Type
ALL USED PIN
9. PCB LAYOUT
G
R
B
A
LD501
K
B
519
K
B
547
925
B
K
905
B
K
LD512
K
B
513
235
B
K
325
B
K
305
B
K
635
B
K
815
B
K
545
B
K
935
B
K
82 5
B
K
805
B
K
535
B
K
7 15
B
K
725
B
K
705
B
K
K
B
516
C525
K
B
542
435
B
K
625
B
K
605
B
K
K
B
515
525
B
K
505
B
K
K
B
514
KB538
KB543
KB540
425
B
K
405
B
K
K
B
533
K
B
541
L231
135
B
K
215
B
K
ANT2
735
B
K
445
B
K
2 25
B
K
205
B
K
035
B
K
115
B
K
C19
125
B
K
105
B
K
LD500
K
B
510
K
B
546
025
B
K
0 05
B
K
LG-C333_MAIN_EAX64780201_1.1_TOP
9. PCBLAYOUT
LD512 : Charging LED
- no Charging Light
ANT203 : WIFI antenna
- no WIFI working
LD500,501 : Abnormal operation
- no Key Light on
ANT203
9. PCB LAYOUT
RAD F
1
01
J
1
5
10
M
E
D
N
F
G
H
J
K
L
1
A
B
C
D
24
TUVWYAAABAC
13
12
GHJKLMNP
20
ABCDE 1
24
11
10
E F G HDCBA K
CN500
VA314
R405
C151
R421
ZD401
FB407
R429
C411
U500
C310
C501
VA510
C432
C423
C434
L402
R422
VA409
R427
FB402
C416
C440
C412
C414
C403
C327
C326
C324
C325
CN502
U300
R119
VA517
MIC400
FB410
L400C425
C428
R434
C157
C156
C431
C430
C424
L102
C103
C121
R126
VA524
L100
R230
C134
L101
X
1
0
0
TP101
FL500
AN201
VA534
VA533
R252
C214
FB200
C270
C258
C272
C293
L229
L228
L230
C200
TP200
R287
C291
C225
U215
C285
ANT1
C16
C155
R503
R403
Q400
VA309
R415
R420
R401
FB408
C435
C503
C
502
R502
C504
R431
R536
R141
C8
R402
R140
TP4
U1
C9C3 C1
VA311
C314
C312
R305
VA310
C313
C17
C429
C427
R417
C154
C433
VA408
L401
FL300
C
N
300
R311 C
532
VA306
J400
R400
C436
FB409
C410
R430
C336
VA316
FL302
C311
VA315
C510
VA317
R504
TP3
TP2 TP1
C308
C306
C317
C307
C2
R304
C300 R101
VA308
C302
VA526VA307
C301
VA300
R300
C
533
C509
Z
D
501
C309
C316
VA400
C437 C404VA401
C405
FB403
R428
R104
R105
C413
IC
400
R404
C415
U401
FL301
TP310 TP313TP312
R123
R121
R120
R122
R125
VA527
VA513
VA515
VA514
VA511
J
3
0
1
ZD402 VA407
C337 C332
C
N
4
0
0
C401
C400
C408
R419
C438 C426
C439
C402
R418
C409
R414
C421
R407 C334
R406
U
302
C328
C331
C330
C329
R525
TP314 TP311
R132
R124
R128
R127
R130
R301
R302
VA520
VA512
VA523
VA522
VA518
C418
ZD400
C211
R203
C207
R310
R108
C333
R109
C514
R524
VA545
C116
R106
C109
C172
R129
R131
VA521
VA519
C206 R212
C420 C419
C204
L220
C138
U
1
0
0
R205
R239
R240
U200
C234
R241
FB304
C344
FB303
R242
C343
CN301
FB103
C174
C130
R133
C119
C166
C120
R134
C118
C102 C104
C126 C125
C111
ZD503
ZD504
C528 R539
VA536
VA313
C175
VA538
C527
FB305
C345
C526
R313
R312
C346
VA312
C347
R116
R110C107
C100 R117
C117
C128
C170
C123
C171
C168
C173
C122
C169
C513
ZD502
R531
J
3
0
0
VA543
VA542VA544
VA540
VA541
VA539
VA537
C541
C
144
AN203
VA535
R135
R538
C544
CN503
C529
FB101
C112
C540
U501
C139
C101
C176
C167
D500
C
142
FB100
VA532
C110
C106
C105
C160
R100
C512
C159
C12
C10
R111
F
L4
C14
L1
C11
C15
C13
C21
X
202
C226
L225
R228
C275
X
201
AN200
C298
C274
C278
C232
R9
C18
C20
C277
C243
C223
R253
C239
C252
R225
R223
C1327
C1326
C1325
C271
C1336
FL204
C257
C283
S
W
201
R200
C1338
C1333
C203
C22
C1321
C227
R254
C299
C229
TP201
U
2
0
6
C244
C295
R270
C228
C221
VB500
C262
C261
C256
C259
C254
C250
U
205
C235
L209
FL201
L211
C236
C238
C240
L213
C1322
C280
C284
C282
C1337
R290
FL203
C245
R224
R222
C276
C246
R255
R263
TP202 C247
C
N
100
VA509
C543
VA100
R118
R282
R284
R285
C255
C290
R283 R286
C260
C249
C233
L203
FL200
L206
C230
C231
C288
L212
C289
C286
C287
R288
R281
LG-C333_MAIN_EAX64780201_1.1_BOT
J300 : SIM 1 card socket
- no SIM
MIC400 : Main MIC
- Cant make
TX voice signal
J301 : SIM2 card socket
- no SIM
U300 : Memory
Abnormal operation
- no power on
System cant work
U1: (Dual SIM controller)
- no SIM1, SIM2 operation
CN502 : Main Batt connector
- no Battery detect
U501 : Single Charging IC
Abnormal operation
- no USB,TA,HPH
U302 : LCD Charge Pump
- no LCD Backlight
CN300 : LCD Connector
- no LCD
IC400 : Audio subsystem
Abnormal operation
- no SPK/HPH sound
CN400 : SPK
- no SPK
J400 : Ear-Jack
- no Ear-Jack Detect
U200 : FM Radio
- no FM Radio
CN503 : SD CARD & SIM3
- no SD CARD & SIM3
CN301 : Main Camera FPCB conn
U205 : Transceiver
- no Service
U100 : MT6236
- Can not power on
- no LCD Display
- no Service, No BT
VB500 : Motor
- no Motor
U215 : TX module
- no Service
X201 : Crystal, 26MHz
- no Power On
U206 : WIFI
- no WIFI
X202 : Crystal, 26MHz
- no WIFI
FL200 FL201 : GSM RX SAW Filter
- no service
9. PCB LAYOUT
_TOP
J
7
0
0
CN700
C
N
7
0
1
10. ENGINEERING MODE
- 154 -
Engineering mode is designed to allow a service man/engineer to view and test the basic functions
provided by a handset. The key sequence for switching the engineering mode on is 3845#*333# Select.
Pressing END will switch back to non-engineering mode operation. Use Up and Down key to select a menu
and press select key to progress the test. Pressing back key will switch back to the original test menu.
[1] Device Test
[1-1]ALL Auto Test
[1-2]All Auto Test Result
[1-3]Auto Detecting test
[1-4]Charging LED Test
[1-5]Key Press Test
[1-6]Camera Test
[1-7]LCD Display Test
[1-8]Sound Test
[1-9]Vibrator Test
[1-10]WIFI Test
[1-11]Loopback Test
[1-12]FM Radio Test
[1-13]Main LCD
|l-13-l|whlte
|l-13-2|Ped
|l-13-3|Green
|l-13-4|8luell
|l-13-5|8lack
|l-13-6|Gray
|l-13-6-l|Gray0
|l-13-6-2|Grayl
|l-13-6-3|Gray2
|l-13-6-4|Gray3
|l-13-6-5|Gray4
|l-13-6-6|Gray5
|l-13-6-7|Gray6
|l-13-6-8|Gray7
|l-13-6-9|Gray8
|l-13-6-l0|Gray9
|l-13-6-ll|Grayl0
|l-13-6-l2|Grayll
|l-13-6-l3|Grayl2
|l-13-6-l4|Grayl3
|l-13-6-l5|Grayl4
|l-13-6-l6|Grayl5
|l-13-6-l7|Grayl6
[1-18]Vibrator
[1-19]Sub Camera
[1-20]Speaker VibTest
|l-20-l|Speaker&v|8
|l-20-2|Speaker ONL
|l-20-3|v|8PATOP ONL
[1-21]Vibrator Duration
|l-21-l|Call Alert
|l-21-2|Massage Alert
|l-21-3|Alarm
[2]ELT TEST
[2-1]automatic
|2-1-l|l Tlme
|2-1-2|2 Tlmes
|2-1-3|3 Tlmes
|2-1-4|4 Tlmes
|2-1-5|5 Tlmes
|2-1-6|l00 Tlmes
|2-1-7||nflnlte
[2-2]Manual
|2-2-l|LCD 8ackllght
|2-2-2|Plngtones
|2-2-3|vlbrator
|2-2-4|Camera
|2-2-5|Audlo Loopback
[3]SW sanity Test
[3-1]FPRITest
[3-2]DB Check
|3-1-l|Copy D8 to UserDlsk
|3-1-2|Copy D8 flle to LxtMem
|3-1-3|Copy CPC
[1-14]Sub LCD
[1-15]LCD Backlight
[1-16]KEY Backlight
[1-17]Speaker
145 / 149
- 155 -
[7]ERS
[7-1]Client Status
|7-1-l|Actlve
|7-1-2|Actlve + Plle Save
|7-1-3||nactlve
|7-1-4||nactlve + Plle Save
|8-11-9||P_conflguratlon
|8-11-l0|PS_Mode
|8-11-ll|wPS
|8-11-l2|wPSL
|8-11-l3|Test Page
|8-11-l4|Threshold Settlng
|8-11-l5|GAN Mode
|8-11-l6|Certs |nfo
|8-11-l7|Cert Set Up
|8-11-l8|wl-fi UI
[8-12]Packet data connection
|8-12-l|S|Ml
|8-12-2|S|M2
[8-13]FMRadio
[8-14]WebEngMode
[7-2]Ers Test
[7-3]Carrier Setting
|7-2-l|QM test
[8]Engineer mode
[8-1]PS
|8-1-l| 8and selectlon
[8-2]DRM
[8-3]RF(BER)
[8-4]BaseBand
[8-5]Audio Tunning
[8-6]Bluetooth
|8-2-l| DPM Cert Check
|8-2-2| DPM Cert |nfo
|8-3-l| prevlew
|8-3-2| LCD
|8-3-3| vlbrator
|8-4-l|8attery Log
|8-4-2|8attery |nfo
|8-4-3|LCD(MA|N)
|8-4-4|LCD(SU8)
|8-4-5|8ackLlght(Key)
|8-4-6|PP CAL |nfo
|8-5-l|Handset
|8-5-2|Headset
|8-5-3|Speaker Phone
|8-5-4|8luetooth Headset
|8-5-5||nfo
|8-6-l|Set 8T Addres
|8-6-2|8T Audlo/PP Test
|8-6-3|8T Test Menu
|8-14-l|UA Strlng Ldltor
|8-14-2|UA Strlng Selector
|8-14-3|UA proflle Ldltor
|8-14-4|Set MCC MNC
|8-14-5|Lnable page Dump
|8-14-6|Trace Mode
[8-7]aging Test
[8-8]JAVA
[8-9]User Pattern Test
[8-10]NetWork Info
|8-10-l| S|Ml
|8-10-2| S|M2
[8-11]WIFI Eng MENU
|8-11-l|Net |nfo
|8-11-2|PTM mode
|8-11-3|OTA Test
|8-11-4|wlCmd
|8-11-5|open
|8-11-6|close
|8-11-7|Avallable net
|8-11-8|dlsconnect
[3-3]E Serial no
[3-4]UA,String
[3-5]Unlock
[4]Factory Reset
[5]Version
[5-1]SW Version Info
[6]Usage info
146 / 149
- 156 -
[9]WISE Debug
[9-1]Variable Watch
[9-2]heap Freesize
[9-3]heap Leakage
[9-4]heap Assert
[9-5]QM heap Freesize
[9-6]Deceloper Debug
|9-6-l|Debug_None
|9-6-2|Debug_LOw
|9-6-3|DebugM|DDLL
|9-6-4|H|GH
[10]MTK Debug
[10-1]Catcher
[10-2]SleepMode
[10-3]DCM
[10-4]Memory Dump
[10-5]Buffer Monitor
|l0-5-l|Dlsable
|l0-5-2|ALL
|l0-5-3|8 8yte
|l0-5-4|32 8yte
|l0-5-5|64 8yte
|l0-5-6|l28 8yte
|l0-5-7|256 8yte
|l0-5-8|5l2 8yte
|l0-5-9|l024 8yte
|l0-5-l0|2048 8yte
[10-6]FS Trace Mode
|l0-6-l|Dlsable
|l0-6-2|Lrror
|l0-6-3|AP| + Lrror
[10-7]Watch Dog
[10-8]VM setting
[10-9]VM Common Param
147 / 149
11.AUTO CALIBRATION
- 157 -
11.RF CALIBRATION
/ 131
11.1.1 Configuration of directory
11.1 Configuration of Tachyon
LG-C333
LG-C205
LG-C205
LG-C205
LG-C333 ALL
11. RF CALIBRATION
148 / 149
11. RF CALIBRATION
LG-C333
LG-C333
LG-C333
LG-C333
11.1 RF CALIBRATION
11.AUTO CALIBRATION
- 158 -
/ 131
11.1.2 Description of basic folders
11.1.3 Description of configuration files
Folder Description
Tachyon Exe file and MFC dll, UI dll is present.
Common Common dll files.
(XML Data I/O , Auto Test Logic, Tachyon Logic Control, Communication)
Config Envirement files.
(Port conflguratlon, Loss ad[ust)
Instrument Tester control dll.
Model Model files is present.
(Model -> Solution (Qualcomm, EMP, ADI, INFINEON) -> MODEL
NAME(LGGM630, LGSH470, ..) -> BUYER NAME(SKT, TEL, V, )
OCX Conponent files.
PhoneCmd Phone communication file
Report Report Files is present.
(Cal data, test data)
Folder Description
MODEL NAML'_Callbratlon.XML There are imformations to calibrate.
It consist of calibration items.
MODEL NAML'_CallSetup.XML There are imformations to call.
'MODLL NAML'_Nv.|N| It consists of default values.
It is written when cal&auto is begun.
MODEL NAML'_Sequence.XML It is described a testing procedures.
11. RF CALIBRATION
149 / 149
11.1.2 Description of basic folders
11.1.3 Description of confguration fles
11.AUTO CALIBRATION
- 159 -
11.2 How to use Tachyon
11.2.1 Model selection
/ 131
11.2.1 Model selection
11.2 How to use Tachyon
Follow the procedure before start calibration & auto test
a. Click the icon, in tool bar.
Then, You can make a choice of LG-C205 for loading cfg files before run.
b. Select model name and then do double-click the buyer name.
You will see configuration files loaded in the right window with PASS information above
11. RF CALIBRATION
150 / 149
LG-C333
11.AUTO CALIBRATION
- 160 -
/ 131
11.2.2 Start cal & auto
a. Click calibration & autotest button, in Tool bar
b. Calibration & autotest will be executed in order.
1) Precede Action.
- NV write
- Test command send.
2) RF Calibration
3) RF Auto test
4) After action
- Phone reset
- Change UE to AMSS
11. RF CALIBRATION
151 / 149
11.2.2 Start cal & auto
12. EXPLODED VIEW & REPLACEMENT PART LIST
12.1 EXPLODED VIEW(SBOM)
Location Description
GMEY00
ACQ00
SJMY00
ACQ01
AEX00
AJX00
EBR00
EBR01
EAB00
ABM00
ADB00
EAJ00
EBP00
EAB01
SBPL00
ACQ02
Screw,Machine
Cover Assembly,Rear
Motor,DC
Cover Assembly,Front
Keypad Assembly,Main
Window Assembly,LCD
PCB Assembly,Main
PCB Assembly,Flexible
Speaker,Dual Mode
Can Assembly,Shield
Dome Assembly,Metal
LCD Module
Camera Module
Microphone,Condenser
Rechargeable Battery,Lithium Ion
Cover Assembly,Battery
AJX00
AEX00
ACQ01
EAJ00
ADB00
EAB01
ABM00
EBR00
EBP00 EAB00
EBR01
SJMY00
ACQ00 GMEY00
SBPL00
ACQ02
- 162 -
Note: This Chapterisused for reference,Part order is ordered
by SBOM standard on GCSC
Level LocationNo. Description PartNumber Spec Remark
1 AGQ000000 Phone Assembly AGQ86789701 LGC333.ABRABK BK:BLACK BLACK -
2 MEZ002100 Label,Approval MEZ64403301 COMPLEX LGA290.ABRASV ZZ:Without Color -
2 ACQ100400
Cover
Assembly,EMS
ACQ86090801 LGC333.ABRABK BK:BLACK BLACK -
3 GMEY00 Screw,Machine GMEY0009201
GMEY0009201 BH + 2.7mM 3.5mM MSWR3 FZB
N N LG ELECTRONICS INC.
3 MJN061100 Tape,Protect MJN68310701 COMPLEX LGC333.ABRABK ZZ:Without Color -
3 ACQ00
Cover
Assembly,Rear
ACQ86075201 LGC333.ABRABK BK:Black -
4 MBL000000 Cap MBL65357101 COMPLEX LGC333.ABRABK BK:Black -
4 ACQ105800
Cover Assembly
Rear(SVC)
ACQ86253401 LGC333.ABRABK CKD BK:BLACK BLACK -
12.2 ReplacementParts
<Mechanic component>
5 MCK063300 Cover,Rear MCK67289401 MOLD PC LGC333.ABRABK BK:Black -
5 MCQ009400 Damper,Camera MCQ67033401 COMPLEX LGC333.ABRABK BK:Black -
5 MCQ000000 Damper MCQ67033501
COMPLEX LGC333.ABRABK BK:Black Damper
(Mic)
5 MCQ000001 Damper MCQ67228801 COMPLEX LGC333.ABRABK ZZ:Without Color -
5 MEZ000900 Label,After Service MEZ64319901
COMPLEX LGF120L.ALGTWA ZZ:Without Color
F120l AS Label
5 MKC009400 Window,Camera MKC64438901
CUTTING ACRYL LGC333.ABRABK ZZ:Without
Color -
5 MJN089300 Tape,Window MJN68157101
COMPLEX LGC333.ABRABK ZZ:Without Color
Tape,Window(Camera)
- 163 -
3 ACQ01
Cover
Assembly,Front
ACQ86075101 LGC207.ABRABK BK:Black -
4 AEX00
Keypad
Assembly,Main
AEX74017601 LGC333.ABRABK ZZ:Without Color -
4 MCQ074200 Damper,Speaker MCQ67072201
COMPLEX LGC333.ABRABK BK:Black Damper,
Speaker (Front)
4 MHK000000 Sheet MHK63968301 COMPLEX LGC333.ABRABK ZZ:Without Color -
4 MDJ000000 Filter MDJ63448501
COMPLEX LGC333.ABRABK BK:Black
Filter(Speaker)
4 MJN089300 Tape,Window MJN68171601 COMPLEX LGC333.ABRABK ZZ:Without Color -
4 ACQ033200
Cover Assembly
Front(Sub)
ACQ86113401 LGC333.ABRABK SI:SILVER VIOLET -
5 MCK032700 Cover,Front MCK67256501 MOLD PC LGC333.ABRABK BK:Black -
5 MET099500 INSERT,NUT MICE0016904 MECH_COMMON ZY,ZZ,PRESS, STS, , , , ,
Wi d
4 AJX00
Window
Assembly,LCD
AJX73504901 LGC333.ABRABK ZZ:Without Color -
5 MKC043300 Window,LCD MKC64363501
CUTTING ACRYL LGC207.ABRABK ZZ:Without
Color -
5 MCQ043300 Damper,LCD MCQ67126801 COMPLEX LGC333.ABRABK BK:Black -
7 ABA000000 Bracket Assembly ABA74368501 LGC333.ABRABK BK:Black -
8 MJN000001 Tape MJN68171701
Tape (Speaker)
8 MCQ074200 Damper,Speaker MCQ67072301 COMPLEX LGC333.ABRABK BK:Black -
8 MAZ000000 Bracket MAZ63509801 MOLD PC LGC333.ABRABK BK:Black -
8 MJN000000 Tape MJN68171801
Tape (Bracket)
- 164 -
5 MJN000000 Tape MJN68329301 COMPLEX LGC333.ABRABK ZZ:Without Color -
5 MEV000000 Insulator MEV63758701
COMPLEX LGC375.AINDBK ZZ:Without Color
C375 INSULATOR, LCD CON
5 ABM00
Can
Assembly,Shield
ABM73856201 LGC333.ABRABK ZZ:Without Color -
6 MKU101700
Absorber,Electrom
agnetic Wave
MKU30483201 COMPLEX LGC333.ABRABK ZZ:Without Color -
6 MBK070300 Can,Shield MBK63332701
CUTTING STS LGC333.ABRABK ZZ:Without Color
-
6 MEV000000 Insulator MEV64212301 COMPLEX LGC333.ABRABK ZZ:Without Color -
5 ADB00
Dome
Assembly,Metal
ADB73918101 LGC333.ABRABK ZZ:Without Color -
5 MDS000000 Gasket MDS64015101
Gasket(LCD)
5 MEZ000000 Label MLAZ0038301
COMPLEX LG-VX6000 ZZ:Without Color PID Label
4 Array PRINTING,
2 ACQ02
Cover
Assembly,Battery
ACQ86253301 LGC333.ABRABK BK:BLACK BLACK -
3 MEZ000900 Label,After Service MEZ64503701
COMPLEX LGE400F.AVIVBK ZZ:Without Color
E400F BRAZIL SAC LABEL E400F BRAZIL SAC LABEL
3 MCK004100 Cover,Battery MCK67256601 MOLD PC LGC333.ABRABK BK:Black -
- 165 -
Note: This Chapterisused for reference, Part order is ordered
by SBOM standard on GCSC
3 EAN060000
Memory Card
Assembly
EAN62630001 -
4 EAN011400
IC,Memory
Card,MICRO SD
EAN62416001
SD-C02G2CYB(PYBKP) 2GBYTE 2.7VTO3.6V
MICRO SD CARD 15.0x11.0x1.0MM TR 8P 2GB
MicroSD Card (24nm 16Gb MLC x 1) TOSHIBA
ELECTRONICS KOREA CORPORATION
4 SAD010100
Software
Application
SAD33434101 - - BRAZIL PC SYNC -
4 EAA030100
PIFA
Antenna,Multiple
EAA62792801
LS01-I-12016-A0 MULTI -5DB 5:1 Metal Stamping
Type - - - LS Mtron Ltd.
4 SJMY00 Motor,DC SJMY0007905
DM-YK407-6F2 3V 80mA 0A 11KRPM 0RPM 0SEC
0GF.CM 0OHM DONGYANG CHENGJI CO.
3 EBR00
PCB
Assembly,Main
EBR75738701 LGC333.ABRABK 1.0 Main
4 EBR071500
PCB Assembly
Main,Insert
5 EBR01
PCB Assembly
Flexible
EBR75741001 LGC333.ABRABK 1.0 Flexible
6 EBR070400
PCB Assembly
Flexible,SMT
7 EAX010700 PCB,Flexible EAX64869701 LGC333.ABRABK 1.0 POLYI Multi 2 0.2 Flexible
7 EBR070300
PCB Assembly
Flexible,SMT Top
8 CN701 Socket,Card EAG62830201
104031-0811 SD 8P ANGLE SMD R/TP
11.95x11.40x1.42t, Push-pull type MOLEX
8 CN700 Connector,BtoB ENBY0039501
GB042-20P-H10-E3000 20P 0.40MM STRAIGHT
PLUG SMD R/TP 1M - LS Mtron Ltd.
12.2 ReplacementParts
<Main component>
- 166 -
8 J700
Socket
DIMM/SIMM
EAG63193601
SIMF006G2K55-00R 6P STRAIGHT STANDARD
SMD T/REEL - SHENZHEN EVERWIN
PRECISION TECHNOLOGY CO.,LTD.
7 EBR070200
PCB Assembly
Flexible,SMT
Bottom
6 EBR070100
PCB Assembly
Flexible,Insert
8 EAB00
Speaker,Dual
Mode
EAB62688401
BRS-181031P08-P Nd-Fe-B 700mW 8OHM 92DB
850HZ 1810 3t spring, front side SPRING BUJEON
ELECTRONICS CO., LTD
5 RAA050100 Resin,PC BRAH0001301 UF2040 or 3075BHF . . NONE
5 EAJ00 LCD Module EAJ61929201
TM023KDH60 QVGA 2.3INCH 320X240 400CD
COLOR 50% 4/3 450 60Hz Inverter N - - -
Shanghai Tianma Micro-Electronics Co., Ltd.
5 EBP00 Camera Module EBP61422001
CW3030 CW3030_A99CC 3M FF Hynix 1/5" FPC
90deg COWELL ELECTRONICS CO.,LTD
4 EBR071800
PCB Assembly
Main,SMT
5 SAD010000 Software,Mobile SAD33446701 Base V09h - BRAZIL MTK -
5 EBR071700
PCB Assembly
Main,SMT Top
6 L231
Inductor
Multilayer,Chip
ELCH0005001
HK1005 2N2S 2.2NH 0.3NH - 300mA 0.13OHM
6GHZ 8 SHIELD NONE 1.0X0.5X0.5MM R/TP
TAIYO YUDEN CO.,LTD
6 ANT2
Chip Antenna
Bluetooth
EAA62809101
DSBTPTR2010 DUAL -2DB 3:1 Planar Inverted F
Type - - - PARTRON
6 C525
Capacitor
Ceramic,Chip
ECZH0001215
C1005X5R1A105KT000F 1uF 10% 10V X5R -
55TO+85C 1005 R/TP - TDK KOREA
COOPERATION
6
LD500
LD501
LED,Chip EDLH0013401
SWAA07 WHITE 3.0~3.2 20mA 1200~1400mcd
0.285~0.31 120mW 1005 R/TP 2P - SEOUL
SEMICONDUCTOR CO.,LTD
- 167 -
6 LD512 Numeric Displays EDLS0002001
19-237/R6GBB6C-B01/2T RED/GREEN/BLUE 3
3.3V 25A 360mCD 95mW COMMON ANODE R/TP
4P EVERLIGHT ELECTRONICS CO., LTD.
6 C19
Capacitor
Ceramic,Chip
ECZH0000816
C1005C0G1H120JT000F 12pF 5% 50V NP0 -
COOPERATION
6 EAX010000 PCB,Main EAX64780201 LGC207.ABRABK 1.0 FR-4 SBL 6 1.0 Main
5 EBR071600
PCB Assembly
Main,SMT Bottom
6
C103
C106
C111
C121
C166
C211
C221
C226
C228
C232
C245
C252
C254
C255
C256
C258
C261
C307
C308
C309
C317
C343
C344
C345
C401
C410
C411
C425
C427
C428
C432
C440
C504
C513
C544
Capacitor
Ceramic,Chip
ECZH0003103
GRM36X7R104K10PT 100nF 10% 10V X7R -
55TO+125C 1005 R/TP - MURATA
MANUFACTURING CO.,LTD.
- 168 -
6
VA536
VA537
VA538
VA539
VA540
VA541
VA542
VA543
VA544
ZD400
ZD401
ZD402
ZD404
ZD405
Diode,TVS EDTY0009401
VMNZ6.8CST2R 5.78V 0 10V 0A 100mW VMN2
R/TP 2P 1 ROHM.
6
R133
R252
R255
Resistor,Chip ERHZ0000204
MCR01MZP5F1003 100KOHM 1% 1/16W 1005
R/TP - ROHM.
6 R134 Resistor,Chip ERHZ0000217
MCR01MZP5F1303 130KOHM 1% 1/16W 1005
R/TP - ROHM.
MCR01MZP5J154 150KOHM 5% 1/16W 1005 R/TP
- ROHM.
6
VA300
VA306
VA307
VA308
VA309
VA310
VA311
VA312
VA313
VA316
VA317
VA407
VA408
VA409
Varistor SEVY0005101
ICVL0518050FR 18V 0% 5F 1.0*0.5*0.55 NONE
SMD R/TP INNOCHIPS TECHNOLOGY
6
C22
C225
C230
C231
C233
Capacitor
Ceramic,Chip
ECCH0000113
MCH155A180J 18pF 5% 50V NP0 -55TO+125C
1005 R/TP - ROHM Semiconductor KOREA
CORPORATION
6 C299
Capacitor
Ceramic,Chip
ECCH0000183
GRM1555C1H1R8C 1.8pF 0.25PF 50V NP0 -
6 C277
Capacitor
Ceramic,Chip
ECCH0007802
CL10A475KP8NNNC 4.7uF 10% 10V X5R -
55TO+85C 1608 R/TP - - SAMSUNG ELECTRO-
MECHANICS CO., LTD.
- 169 -
6 C430
Capacitor
Ceramic,Chip
ECCH0007803
CL10A106MP8NNNC 10uF 20% 10V X5R -
55TO+85C 1608 R/TP 0.8MM SAMSUNG
ELECTRO-MECHANICS CO., LTD.
6
C174
C270
Capacitor
Ceramic,Chip
ECCH0017601
CL05A475MQ5NRNC 4.7uF 20% 6.3V X5R -
6 C1321
Capacitor
Ceramic,Chip
ECZH0000802
C1005C0G1H010CT 1pF 0.25PF 50V NP0 -
COOPERATION
6
L209
L211
Inductor
Multilayer,Chip
ELCH0001054
1005GC2T5N6SLF 5.6NH 0.3NH - 300mA
0.27OHM 3.2GHZ 8 SHIELD NONE
1.0X0.5X0.5MM R/TP PILKOR ELECTRONICS
LTD.
6 U500 IC,Charger EUSY0410801
RT9524 DFN,10,R/TP,DFN Cal Test Mode Single
Charger IC for Micro USB,IC,ChargerIC,Charger
RICHTEK TECHNOLOGY CORP.
6
C128
C214
Capacitor
Ceramic,Chip
EAE62506501
CL05A475MP5NRNC 4.7uF 20% 10V X5R -
55TO+85C 1005 R/TP - - SAMSUNG ELECTRO-
MECHANICS CO., LTD.
6 L102
Inductor
Multilayer,Chip
ELCH0001048
1005GC2T10NJLF 10NH 5% - 250mA 0.42OHM
2.5GHZ 8 SHIELD NONE 1.0X0.5X0.5MM R/TP
PILKOR ELECTRONICS LTD.
6 L203
Inductor
Multilayer,Chip
ELCH0001052
1005GC2T18NJLF 18NH 5% - 200mA 0.65OHM
PILKOR ELECTRONICS LTD.
6 L400
Inductor
Multilayer,Chip
ELCH0001444
0402AF-101XJEW 100NH 5% - 900mA 0.16OHM
1.4GHZ 8 NON SHIELD NONE 1.12X0.66X0.66MM
R/TP COILCRAFT SINGAPORE PTE LTD.
6 L212
Inductor
Multilayer,Chip
ELCH0003818
LQG15HS9N1J02D 9.1NH 5% - 300mA 0.26OHM
MURATA MANUFACTURING CO.,LTD.
6 L213
Inductor
Multilayer,Chip
ELCH0003820
LQG15HS3N0S02D 3NH 0.3NH - 300mA 0.17OHM
6
L206
L220
Inductor
Multilayer,Chip
ELCH0003839
LQG15HS22NJ02D 22NH 5% - 300mA 0.42OHM
- 170 -
6 FL200 Filter,Saw,Dual EAM62470601
B9814 881.5/942.5MHz 1.5*1.1*0.4 SMD R/TP 10P
EPCOS PTE LTD.
6 FL204 Filter,Balun EAM62490001
LDM152G4505HC012 2400-2500 950mDB BPF
SMD R/TP 4P - MURATA MANUFACTURING
CO.,LTD.
6 U100
IC,Digital
Baseband
Processor,GSM
EAN61828501
MT6236 1.8VTO2.7V 1W 382P - BGA R/TP 382P
MEDIATEK INC.
6 U300 IC,MCP,NAND EAN61927501
H9DA2GH1GHMMMR-46M NAND/2G SDRAM/1G
1.7VTO1.95V 8.0x9.0x0.9 TR 130P NAND+DDR
SDRAM FBGA 2Gb NAND(LB/128Mx16)+1Gb
DRAM(DDR/200MHz/16Mx4x16) HYNIX
SEMICONDUCTOR INC.
6 U200 IC,FM EAN61956201
Si4705-D50-GMR FM Rx with RDS, Internal
Antenna, I2S, 130nm QFN R/TP 21P SILICON
LABORATORIES
6 U205
IC,RF
Transceiver,GSM
EAN62095601
AD6548BCPZ-RL3 GSM & EDGE RF Tranceiver
LFCSP-32 R/TP 32P MEDIATEK SINGAPORE
PTE.LTD.
6 U1 IC,Multiplexer EAN62228101
MT6306 3.2~4.3V 999 ANALOG
SWITCH/MULTIPLEXER QFN R/TP 28P SIM
Controller MEDIATEK INC.
6 U206 IC,WiFi EAN62306101
MT5931A WiFi Single, 2.4GHz 11b/g/n,
5.1x5.3x1.2, 0.5pitch TFBGA R/TP 84P MEDIATEK
INC.
6 Q400 FET EBK61952101
KTJ6131V P-CHANNEL MOSFET -30V +-20 -0.05A
40OHM 100mW VSM R/TP 3P KEC
CORPORAITION
6 C280
Capacitor
Ceramic,Chip
ECCH0000107
MCH155A060DK 6pF 0.5PF 50V NP0 -55TO+125C
CORPORATION
6
C206
C21
C229
C238
C240
C418
C509
Capacitor
Ceramic,Chip
ECCH0000110
MCH155A100D 10pF 0.5PF 50V NP0 -55TO+125C
CORPORATION
6 C257
Capacitor
Ceramic,Chip
ECCH0000117
CL05C270JB5NNNC 27pF 5% 50V NP0 -
55TO+125C 1005 R/TP 0.5 SAMSUNG ELECTRO-
MECHANICS CO., LTD.
- 171 -
6
C151
C154
C155
C156
C157
C275
C404
C405
C424
C426
C431
C435
C436
Capacitor
Ceramic,Chip
ECCH0000120
MCH155A390J 39pF 5% 50V NP0 -55TO+125C
CORPORATION
6
C260
C429
C433
C434
Capacitor
Ceramic,Chip
ECCH0000122
MCH155A470JK 47pF 5% 50V NP0 -55TO+125C
CORPORATION
6
C249
C250
Capacitor
Ceramic,Chip
ECCH0000127
MCH155A820J 82pF 5% 50V NP0 -55TO+125C
CORPORATION
6
C172
C173
C204
C223
C272
Capacitor
Ceramic,Chip
ECCH0000143
MCH155CN102KK 1nF 10% 50V X7R -55TO+125C
CORPORATION
6
L401
L402
Inductor
Multilayer,Chip
ELCH0005009
HK1005 R10J 100NH 5% - 150mA 1.5OHM
600MHZ 8 SHIELD NONE 1.0X0.5X0.5MM R/TP
TAIYO YUDEN CO.,LTD
6 L225
Inductor,Wire
Wound,Chip
ELCP0008017
CIG21L2R2MNE 2.2UH 20% - 500mA 0.5 0.95
0.16OHM - - SHIELD 2X1.25X1MM NONE R/TP
SAMSUNG ELECTRO-MECHANICS CO., LTD.
6
L100
L101
Inductor,Wire
Wound,Chip
ELCP0009409
LQM2HPN2R2MG0L 2.2UH 20% - 600mA 0.6 1.3
0.08OHM - - SHIELD 2.5X2X1MM NONE R/TP
GB042-24S-H10-E3000 24P 0.40MM STRAIGHT
SOCKET SMD R/TP 1M - LS Mtron Ltd.
GB042-20S-H10-E3000 20P 0.4MM STRAIGHT
SOCKET SMD R/TP 1M - LS Mtron Ltd.
6 J400 Jack,Phone ENJE0008001
JAM3333-F32-7F 1P 4P ANGLE R/TP 4mM BLACK
6P - HON HAI PRECISION INDUSTRY CO.,LTD.
- 172 -
6 CN300
Connector
FFC/FPC/PIC
ENQY0014201
04-6293-627-005-829+ 27P 0.30MM FPC
STRAIGHT BOTH SMD R/TP LOCKING -
KYOCERA ELCO KOREA SALES CO.,LTD.
6
R253
R9
Resistor,Chip ERHY0000104
MCR01MZP5F49R9 49.9OHM 1% 1/16W 1005
R/TP - ROHM.
6 R110 Resistor,Chip ERHY0000124
MCR01MZP5F7501 7.5KOHM 1% 1/16W 1005
R/TP - ROHM.
RC1005F821CS 820OHM 1% 1/16W 1005 R/TP -
6
R301
R302
MCR01MZP5J472 4.7KOHM 5% 1/16W 1005 R/TP
- ROHM.
6
R300
R414
R420
R421
MCR01MZP5J101 100OHM 5% 1/16W 1005 R/TP -
ROHM.
RC1005J221CS 220OHM 5% 1/16W 1005 R/TP -
MCR01MZP5F1002 10KOHM 1% 1/16W 1005
R/TP - ROHM.
MCR01MZP5F1004 1MOHM 1% 1/16W 1005 R/TP
- ROHM.
MCR01MZP5F1502 15KOHM 1% 1/16W 1005
R/TP - ROHM.
6
R285
R287
MCR01MZP5F2200 220OHM 1% 1/16W 1005 R/TP
- ROHM.
MCR01MZP5J240 24OHM 5% 1/16W 1005 R/TP -
ROHM.
6
R135
R418
- ROHM.
MCR01MZP5F3303 330KOHM 1% 1/16W 1005
R/TP - ROHM.
6 U302 IC,Charge Pump EUSY0344402
RT9367C QFN,20,R/TP,4CH,2LDO,3X3,IC,Sub
PMICIC,Sub PMIC RICHTEK TECHNOLOGY
CORP.
- 173 -
6 U501
IC,LDO Voltage
Regulator
EUSY0367001
RP101K332D RP101K332D
RP101K332D,DFN1612-4B ,4 ,R/TP ,300mA 3.3V
LDO RICOH COMPANY, LTD. RICOH COMPANY,
LTD.
6 IC400
IC,Audio Sub
System
EUSY0403901
WM9093ECS/R 1.71~5.5V 0W WLCSP R/TP 20P -
WOLFSON MICROELECTRONICS PLC
6 U401 IC,Comparator EUSY0407701
LMV331 2.7~5.5V - COMPARATOR SC70 R/TP 5P
- TEXAS INSTRUMENTS KOREA LTD,
HONGKONG BRANCH.
6 X202 Oscillator,TCXO EXST0002401
1XTW26000FAA 26MHZ 1.5PPM 2.8V
0.0x0.0x0.0MM NONE SMD R/TP DAISHINKU
CORPORATION.
6 X201 Crystal EXXY0025201
DSX321G-26M - 10PPM - - - SMD P/TP
DAISHINKU CORPORATION.
6 X100 Crystal EXXY0026801
NX3215SA 32.768KHZ 20PPM 0F NONE SMD
R/TP NIHON DEMPA KOGYO CO.,LTD.
6
VA400
VA401
VA509
VA510
VA511
VA512
VA513
VA514
VA515
VA517
VA518
VA519
VA520
VA521
VA522
VA523
VA524
VA526
VA527
VA532
VA533
VA534
VA535
VA545
ICVS0505500FR 5.6V 0% 50F 1.0*0.5*0.55 - SMD
R/TP INNOCHIPS TECHNOLOGY
6 FB200 Filter,Bead SFBH0007101
BLM15AG121SN1D 120 ohm 1.0X0.5X0.5 25%
0.25 ohm 0.5A SMD R/TP 2P 0 MURATA
- 174 -
6
FB407
FB408
FB409
FB410
Filter,Bead SFBH0008105
BLM15BD182SN1D 1800 ohm 1.0X0.5X0.5 25%
6 FL4 Filter,Dielectric SFDY0003001
DEA202450BT-1275A1 DEA202450BT-
1275A1,2450
MHz,2.0*1.25*1.05,SMD,2400M~2500M,IL
1.6,4pin,U-U,50-50,BT BPF TDK CORPORATION
6
FL300
FL301
FL302
Filter,EMI/Power SFEY0012501
ICVE10054E250R201FR ESD/EMI 0HZ 25pF 0H
SMD R/TP INNOCHIPS TECHNOLOGY
6 FL500 Filter,EMI/Power SFEY0016301
ICMEF112P900M COMMON MODE NOISE
FILTER 0HZ 0F 0H SMD R/TP INNOCHIPS
TECHNOLOGY
6 ANT2
Chip Antenna
Bluetooth
EAA62809101
DSBTPTR2010 DUAL -2DB 3:1 Planar Inverted F
Type - - - PARTRON
6 EAB01
Microphone
Condenser
EAB62291401
SOB410S44VRC 44DB 2.2KOHM OMNI 1.5TO4V
4pi 1.2t SMD BSE CO., LTD.
6 C502
Capacitor
Ceramic,Chip
EAE62505701
CL10A105KB8NNNC 1uF 10% 50V X5R -
55TO+85C 1608 R/TP 0.9T max. - SAMSUNG
6 C282
Capacitor
Ceramic,Chip
EAE62542701
CL21A226MPCLRNC 22uF 20% 10V X5R -
55TO+85C 2012 R/TP 0.95T max. SAMSUNG
6 CN500 Connector,I/O EAG63090001
04-5161-005-100-868 7P 0.90MM ANGLE
RECEPTACLE DIP R/TP Normal New IO Connector
KYOCERA ELCO KOREA SALES CO.,LTD.
6 J700
Socket
DIMM/SIMM
EAG63193601
SIMF006G2K55-00R 6P STRAIGHT STANDARD
SMD T/REEL - SHENZHEN EVERWIN
PRECISION TECHNOLOGY CO.,LTD.
6 CN502
Connector,Terminal
Block
EAG63193701
BATF003G6K95-00R 3P 3.00MM STRAIGHT DIP
T/REEL - SHENZHEN EVERWIN PRECISION
TECHNOLOGY CO.,LTD.
6 FB100 Filter,Bead EAM62071001
BLM18KG221SN1D 220 ohm 1.6X0.8X0.8 25%
6 FL203 Filter,Ceramic EAM62250401
LFB212G45CG7D227 BPF 2.45KHZ 100Hz SMD
R/TP 3P MURATA MANUFACTURING CO.,LTD.
- 175 -
6 FL201 Filter,Saw,Dual EAM62450901
B9817 1960/1842.5MHz 1.5*1.1*0.4 SMD R/TP 10P
EPCOS PTE LTD.
6
C235
C236
Capacitor
Ceramic,Chip
ECCH0001001
C1005C0G1H6R8CT000F 6.8pF 0.25PF 50V NP0 -
COOPERATION
6
C142
C144
C423
Capacitor
Ceramic,Chip
ECCH0005604
GRM188R60J106M 10000000
pF,6.3V,M,X5R,TC,1608,R/TP,0.8 mm MURATA
6
C20
C332
C333
C334
C336
C337
C400
C8
C9
Capacitor
Ceramic,Chip
ECCH0007804
CL05A225MP5NSNC 2.2uF 20% 10V X5R -
6 C125
Capacitor
Ceramic,Chip
ECZH0000806
C1005C0G1H050CT000F 5pF 0.25PF 50V NP0 -
COOPERATION
6
C234
C290
C293
C329
Capacitor
Ceramic,Chip
ECZH0000830
C1005C0G1H330JT000F 33pF 5% 50V NP0 -
COOPERATION
6 C1322
Capacitor
Ceramic,Chip
ECZH0000839
COOPERATION
6 C259
Capacitor
Ceramic,Chip
ECZH0001216
C1005X5R1A224KT000E 220nF 10% 10V X5R -
COOPERATION
6
C169
C170
C171
Capacitor
Ceramic,Chip
ECZH0004402
CL05F104ZO5NNNC 0.1uF -20TO+80% 16V Y5V -
30TO+85C 1005 R/TP - SAMSUNG ELECTRO-
MECHANICS CO., LTD.
6 ZD501 Diode,Zener EDNY0013602
EDZTE615.1B 4.98V 4.98TO5.2V 80OHM 150mW
EMD2 R/TP 2P 1 ROHM Semiconductor KOREA
CORPORATION
6 D500 Diode,Switching EDSY0011901
SDB310Q 340mV 30V 200mA 1A 0SEC 150mW
EMD2 R/TP 2P 1 AUK CORP
6
ZD502
ZD503
ZD504
Diode,TVS EDTY0010501
RCLAMP1521P.TCT 15V 16.7 28V 4A 0W
SLP1006P2 R/TP 2P 1 SEMTECH
CORPORATION
- 176 -
6
R524
R531
MCR01MZP5F2403 240KOHM 1% 1/16W 1005
R/TP - ROHM.
MCR01MZP5F3001 3KOHM 1% 1/16W 1005 R/TP
- ROHM.
MCR01MZP5F4702 47KOHM 1% 1/16W 1005
R/TP - ROHM.
MCR01MZP5F5102 51KOHM 1% 1/16W 1005
R/TP - ROHM.
MCR01MZP5F2402 24KOHM 1% 1/16W 1005
R/TP - ROHM.
MCR01MZP5J100 10OHM 5% 1/16W 1005 R/TP -
ROHM.
6
R101
R228
R310
R415
R525
MCR01MZP5J102 1KOHM 5% 1/16W 1005 R/TP -
ROHM.
6
R203
R281
- ROHM.
6
R205
R212
R230
R311
R403
R404
R504
R538
- ROHM.
6
R263
R406
MCR01MZP5J105 1MOHM 5% 1/16W 1005 R/TP -
ROHM.
6
R282
R284
MCR01MZP5J181 180OHM 5% 1/16W 1005 R/TP -
ROHM.
6
R312
R313
R429
R430
MCR01MZP5J1R0 1OHM 5% 1/16W 1005 R/TP -
ROHM.
6
R400
R401
MCR01MZP5J200 20OHM 5% 1/16W 1005 R/TP -
ROHM.
6
R240
R241
MCR01MZP5J202 2KOHM 5% 1/16W 1005 R/TP -
ROHM.
- 177 -
- ROHM.
MCR01MZP5J300 30OHM 5% 1/16W 1005 R/TP -
ROHM.
MCR01MZP5J471 470OHM 5% 1/16W 1005 R/TP -
ROHM.
6
R119
R120
R121
R122
R123
R124
R125
R126
R127
R128
R129
R130
R131
R132
R242
MCR01MZP5J681 680OHM 5% 1/16W 1005 R/TP -
ROHM.
6 SW201 Connector,RF EAG63012601
RF-800N 0.40MM STRAIGHT SOCKET SMD R/TP
AU 50OHM 500mDB DONG EUN
6 U215 Module,Tx Module EAT61473901
RF7180 36DBM,36DBM,33DBM,33DBM 0DB
42%,40%,36%,37% 0A 0A 0DB 0DBM 0DBM 23P
6.63x5.24x0.975MM RF7171 low cost ver, GPRS
QUAD TX DUAL RX MODULE RF MICRO
DEVICES INC
6 C17
Capacitor
Ceramic,Chip
ECCH0000108
C1005NP0709DGT 7pF 0.5PF 50V NP0 -
55TO+125C 1005 R/TP - NEOTECH CO., LTD
6 C274
Capacitor
Ceramic,Chip
ECCH0000112
MCH155C150J 15pF 5% 50V NP0 -55TO+125C
CORPORATION
6 C510
Capacitor
Ceramic,Chip
ECCH0000185
GRM1555C1H5R6C 5.6pF 0.25PF 50V NP0 -
6 C16
Capacitor
Ceramic,Chip
ECCH0000195
GRM1555C1H3R9C 3.9pF 0.25PF 50V NP0 -
- 178 -
6
C101
C134
C167
C176
C243
C306
C316
C402
C403
C412
C413
C414
C415
C416
C529
Capacitor
Ceramic,Chip
ECCH0000198
CL05A225MQ5NSNC 2.2uF 20% 6.3V X5R -
55TO+85C 1005 R/TP . SAMSUNG ELECTRO-
MECHANICS CO., LTD.
6
C10
C11
C1333
C1336
C200
C271
C276
C284
C285
C288
C289
Capacitor
Ceramic,Chip
ECZH0000813
C1005C0G1H101JT 100pF 5% 50V C0G -
COOPERATION
6
C123
C1338
Capacitor
Ceramic,Chip
ECZH0001002
C1005CH1H0R5BT000F 0.5pF 0.1PF 50V NP0 -
COOPERATION
6 C525
Capacitor
Ceramic,Chip
ECZH0001215
C1005X5R1A105KT000F 1uF 10% 10V X5R -
COOPERATION
6 L1
Inductor
Multilayer,Chip
ELCH0003847
LQG15HS1N8S02D 1.8NH 0.3NH - 300mA 0.1OHM
6 L230
Inductor
Multilayer,Chip
ELCH0005003
HK1005 12NJ 12NH 5% - 300mA 0.4OHM 2.7GHZ
8 SHIELD NONE 1.0X0.5X0.5MM R/TP TAIYO
YUDEN CO.,LTD
MCR01MZP5F5101 5.1KOHM 1% 1/16W 1005
R/TP - ROHM.
6
VA314
VA315
EVLC5S02100 5.5V 0% 100F 1.0*0.5*0.6 UL SMD
R/TP AMOTECH CO., LTD.
- 179 -
6
FB101
FB103
FB303
FB304
FB305
FB402
FB403
Filter,Bead SFBH0006806
CIM05J601NC 600 ohm 1.0X0.5X0.5 25% 0.6 ohm
0.3A SMD R/TP 2P 0 SAMSUNG ELECTRO-
MECHANICS CO., LTD.
6
C159
C160
C283
C286
C291
C503
L229
Capacitor
Ceramic,Chip
ECCH0000115
MCH155A220JK 22pF 5% 50V NP0 -55TO+125C
CORPORATION
6 C287
Capacitor
Ceramic,Chip
ECCH0000129
MCH155A121JK 120pF 5% 50V NP0 -55TO+125C
CORPORATION
6 C168
Capacitor
Ceramic,Chip
ECCH0000701
55TO+125C 1005 R/TP - TDK CORPORATION
6
C533
C534
Capacitor
TA,Conformal
ECTH0002002
F981A336MSA 33uF 20% 10V 3.3UA -55TO+125C
6OHM 2.0X1.25X0.8MM NONE SMD R/TP 0.9T
max. NICHICON CORPORATION, EAST JAPAN
SALES OFFICE
6 L231
Inductor
Multilayer,Chip
ELCH0005001
HK1005 2N2S 2.2NH 0.3NH - 300mA 0.13OHM
TAIYO YUDEN CO.,LTD
6
R104
R105
R108
R109
R140
R141
R222
R223
R224
R225
R417
R419
R422
- ROHM.
6 R118 Wire Pad,Open SAFO0000501
AX3100 ATL
SV_SHIPBACK,MAIN,A,0OHM_1005_DNI
6
R427
R428
PCB ASSY,MAIN
PAD SHORT
SAFP0000401 LG-LU3000 LGTBK,MAIN,A,
- 180 -
1 AGF000000 Package Assembly AGF76679301
LGC333.ABRABK ZZ:Without Color LG-C333(Q3t)
BRA, Brazil Package
1 AAD000000 Addition Assembly AAD86170601 LGC333.ABRABK BK:BLACK BLACK -
- 181 -
Note: This Chapterisused for reference,Part order is ordered
by SBOM standard onGCSC
2 SBPL00
Rechargeable
Battery
Lithium Ion
SBPL0095402
LGIP-530A PRISMATIC 3.7V 1.1AH 220mAH
50x34x5.5 50x34x5.5 BLACK Mold none TOCAD
DONGHWA
2 EBX000000
Accessory
Data Cable
SGDY0016701
KCA-ET-8-0020 KCA-ET-8-0020 Micro USB, 1.2M
KSD CO., LTD
2 EAB010200 Earphone,Stereo SGEY0003219
EMB-LGE001STKE ,BLACK,4 POLE PLUG,3.5
4,Earphone,Stereo CRESYN CO.,LTD
2 EAY060000 Adapters SSAD0036001
STA-U12BR 90Vac~264Vac 5.1V 700mA 5060
GOST NONE NONE - SUNLIN ELECTRONICS
CO.,LTD
2 AFN053800
Manual Assembly
Operation
AFN75893101
LGC333.ABRABK ZZ:Without Color Manual assy
for LGC333 BRA
3 MFL053800 Manual,Operation MFL67681601
PRINTING LGC333.ABRABK ZZ:Without Color
Brazil PORTUGUESE Manual for LGC333 BRA
12.3 Accessory

En LG-C333 SVC Eng 120824 PDF

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