En LG-C199 SVC Eng 120502 PDF

Internal Use Only
Service Manual
LG-C199
Date: May, 2012 / Issue 1.0
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Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Table Of Contents
1. INTRODUCTION ..................................................................... 3
1.1 Purpose ........................................................................................................ 3
1.2 Regulatory Information ......................................................................... 3
1.3 Abbreviations............................................................................................. 5
2. PERFORMANCE ...................................................................... 7
2.1 H/W Features .............................................................................................. 7
2.2 Technical Specifcation ........................................................................... 9
3. TECHNICAL BRIEF ................................................................ 15
3.1 Digital Main Processor ......................................................................... 15
3.2 Power Management ............................................................................ 22
3.3 FEM with integrated Power Amplifer Module (RF7180) ...... 27
3.4 Clocks ......................................................................................................... 29
3.5 Transceiver(AD6548,U205) ................................................................ 32
3.6 MEMORY(PF38F4050M0Y3DE, U300 ) .......................................... 35
3.7 Wi-Fi Module(MT5931, U206) ........................................................... 39
3.8 SIM Card Interface ................................................................................. 42
3.9 Micro-SD Card Interface ..................................................................... 44
3.10 LCD Interface ........................................................................................ 47
3.11 Battery Charger Interface ................................................................ 49
3.12 Keypad Interface ................................................................................. 50
3.13 Audio Front-End .................................................................................. 53
3.14 Camera Interface ................................................................................. 56
3.15 KEY BACLKLIGHT LED Interface .................................................... 58
3.16 Vibrator Interface ................................................................................ 59
4. TROUBLE SHOOTING .......................................................... 60
4.1 RF Component ....................................................................................... 60
4.2 RX Trouble ................................................................................................ 61
4.3 TX Trouble ................................................................................................. 65
4.4 Power On Trouble .................................................................................. 69
4.5 Charging Trouble ................................................................................... 72
4.6 Vibrator Trouble ..................................................................................... 74
4.7 LCD Trouble ............................................................................................. 76
4.8 Camera Trouble ...................................................................................... 80
4.9 Speaker Trouble ..................................................................................... 85
4.10 Earphone Trouble ............................................................................... 87
4.11 Receiver Trouble .................................................................................. 89
4.12 Microphone Trouble .......................................................................... 91
4.13 SIM1 Card Interface Trouble ........................................................... 93
4.14 SIM2 Card Interface Trouble ........................................................... 95
4.15 KEY backlight Trouble ....................................................................... 97
4.16 Micro SD Trouble ................................................................................. 99
4.17 Bluetooth Trouble ............................................................................. 101
4.18 FM Radio Trouble .............................................................................. 103
5. DOWNLOAD ....................................................................... 105
6. BLOCK DIAGRAM ............................................................... 118
7. CIRCUIT DIAGRAM ............................................................ 119
8. BGA PIN MAP .................................................................... 124
9. PCB LAYOUT ....................................................................... 127
10. ENGINEERING MODE ...................................................... 129
11. AUTO CALIBRATION ........................................................ 131
11.1 Confguration of Tachyon .............................................................. 131
11.2 How to use Tachyon ......................................................................... 133
12. EXPLODED VIEW & REPLACEMENT PART LIST ............. 135
12.1 EXPLODED VIEW ................................................................................ 135
12.2 Replacement Parts ........................................................................... 136
12.3 Accessory ............................................................................................. 155
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1. INTRODUCTION
1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the
1. INTRODUCTION
features of this model.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your companys employees, agents, subcontractors, or person working on your
companys behalf) can result in substantial additional charges for your telecommunications services.
System users are responsible for the security of own system. There are may be risks of toll fraud
associated with your telecommunications system. System users are responsible for programming and
configuring the equipment to prevent unauthorized use. The manufacturer does not warrant that this
d i i f h b b ill h i d f i product is immune from the above case but will prevent unauthorized use of common-carrier
telecommunication service of facilities accessed through or connected to it.
The manufacturer will not be responsible for any charges that result from such unauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possibly
causing harm or interruption in service to the telephone network, it should disconnect telephone service
until repair can be done. A telephone company may temporarily disconnect service as long as repair is
not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these
changes could reasonably be expected to affect the use of the this phone or compatibility with the
network, the telephone company is required to give advanced written notice to the user, allowing the
user to take appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on this model must be performed only by the manufacturer or its authorized
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agent. The user may not make any changes and/or repairs expect as specifically noted in this manual.
Therefore, note that unauthorized alternations or repair may affect the regulatory status of the system
and may void any remaining warranty.
1. INTRODUCTION
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1. INTRODUCTION
E. Notice of Radiated Emissions
This model complies with rules regarding radiation and radio frequency emission as defined by local
1. INTRODUCTION
This model complies with rules regarding radiation and radio frequency emission as defined by local
regulatory agencies. In accordance with these agencies, you may be required to provide information
such as the following to the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly
different.
G. Interference and Attenuation
Phone may interfere with sensitive laboratory equipment, medical equipment, etc.Interference from
unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated
by the sign. Following information is ESD handling:
Service personnel should ground themselves by using a wrist strap when exchange system boards.
When repairs are made to a system board, they should spread the floor with anti-static mat
which is also grounded.
Use a suitable, grounded soldering iron.
Keep sensitive parts in these protective packages until these are used.
When returning system boards or parts like EEPROM to the factory, use the protective
package as described.

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1. INTRODUCTION
1.3 Abbreviations
For the purposes of this manual, following abbreviations apply:
1. INTRODUCTION
Constant Current Constant Voltage CC-CV
Bit Error Ratio BER
Baseband BB
Automatic Power Control APC
Digital Signal Processing DSP
dB relative to 1 milli watt dBm
Digital Communication System DCS
Digital to Analog Converter DAC
General Purpose Interface Bus GPIB
Gaussian Minimum Shift Keying GMSK
Flexible Printed Circuit Board FPCB
Electrostatic Discharge ESD
Electrical Erasable Programmable Read-Only Memory EEPROM
Liquid Crystal Display LCD
Intermediate Frequency IF
International Portable User Identity IPUI
Global System for Mobile Communications GSM
General Purpose Interface Bus GPIB
Offset Phase Locked Loop OPLL
Light Emitting Diode LED
Low Drop Output LDO
Liquid Crystal Display LCD

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1. INTRODUCTION
P i d Ci i B d PCB
Power Amplifier Module PAM
1. INTRODUCTION
R di F RF
Public Switched Telephone Network PSTN
Phase Locked Loop PLL
Programmable Gain Amplifier PGA
Printed Circuit Board PCB
S f A ti W SAW
Real Time Clock RTC
Root Mean Square RMS
Receiving Loudness Rating RLR
Radio Frequency RF
Pseudo SRAM PSRAM
Static Random Access Memory SRAM
Sending Loudness Rating SLR
Subscriber Identity Module SIM
Surface Acoustic Wave SAW
Time Division Multiple Access TDMA
Time Division Duplex TDD
Travel Adapter TA
Side Tone Masking Rating STMR
Pseudo SRAM PSRAM
Wireless Application Protocol WAP
Voltage Control Temperature Compensated Crystal Oscillator VCTCXO
Voltage Controlled Oscillator VCO
Universal Asynchronous Receiver/Transmitter UART

2. PERFORMANCE
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2.1 H/W Features
2. SYSTEM SPECIFICATION
It F t C t Item Feature Comment
Standard Battery Li-ion Polymer, 3.7V 950mAh
Stand by TIME 475hours @Paging period : 5
Talk time 7.5 hours @GSM, TX Level : 10
Stand by time 475hours @Paging period : 5
Charging time Approx. 3 hours
RX Sensitivity GSM, EGSM: -109dBm, DCS: -108dBm
TX output power
GSM/EGSM: 33/32.5dBm(Level 5),
DCS/PCS: 30/29.5dBm(Level 0)
GPRS compatibility Class 12
SIM card type 3V Small
Display TFT LCD 2.3 Landscape QVGA (320 x 240, 262K)
Status Indicator
Hard icons. QWERTY Key Pad
0 ~ 9, #, *, Up/Down Navigation Key
Menu Key, Clear Key, Back Key, Confirm Key
Send Key, Soft Key(Left/Right)
V l K (U /D ) PWR K C K Volume Key(Up/Down), PWR Key, Camera Key
ANT Internal
EAR Phone Jack Yes
PC Synchronization Yes
Speech coding EFR/FR/HR
Data and Fax Yes Data and Fax Yes
Vibrator Yes
Loud Speaker Yes
Voice Recoding Yes
Microphone Yes

2. PERFORMANCE
2. PERFORMANCE
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Item Feature Comment
Speaker/Receiver 18 x 10 (Speaker & Receiver Dual Mode Assembly) Speaker/Receiver 18 x 10 (Speaker & Receiver Dual Mode Assembly)
Travel Adapter Yes
MIDI SW MIDI (Mono SPK)
Camera 2.0M FF
Bluetooth / FM Radio Bluetooth version 2.1 / 76~108MHz supported
Wi-Fi IEEE 802.11g/b

2. PERFORMANCE
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2.2 Technical Specification
Item Description Specification
1 Frequency Band
GSM850 EGSM
TX: 824 ~ 849 MHz TX: 880 ~ 915MHz
RX: 869 ~ 894 MHz RX: 925 ~ 960 MHz
DCS
TX: 1710 ~ 1785 MHz
RX: 1805 ~ 1880 MHz
PCS
TX: 1850 ~ 1910 MHz TX: 1850 ~ 1910 MHz
RX: 1930 ~ 1990 MHz
2 Phase Error
RMS < 5 degrees
Peak < 20 degrees
3 Frequency Error < 0.1 ppm
Level Power Toler. Level Power Toler.
GSM850/EGSM
6 31dBm 3dB 14 15dBm 3dB
5 32.5/33dBm 2dB 13 17dBm 3dB
4 Power Level
12 19dBm 3dB
Level Power Toler. Level Power Toler.
DCS/PCS
0 30/29.5dBm 2dB 8 14dBm 3dB

2. PERFORMANCE
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GSM850/ EGSM
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 -30
250 -33
400 -60
GSM850/ EGSM
5
Output RF Spectrum
(due to modulation)
600~ <1,200 -60
1,200~ <1,800 -60
1,800~ <3,000 -63
3,000~ <6,000 -65
6,000 -71
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 -30
250 -33
400 -60
DCS/PCS
600~ <1,200 -60
1,200~ <1,800 -60
1,800~ <3,000 -65
3,000~ <6,000 -65
6,000 -73
6
Output RF Spectrum
(due to switching
transient)
1 800 -24
GSM850/ EGSM
Offset from Carrier (kHz). Max. dBm
400 -19
600 -21
1,200 -21

1,800 -24
2. PERFORMANCE
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DCS/PCS
6
Output RF Spectrum
(due to switching
transient)
Offset from Carrier (kHz). Max. dBm
400 -22
600 -24
1,200 -24
1 800 27
DCS/PCS
1,800 -27
7 Spurious Emissions Conduction, Emission Status
8 Bit Error Ratio
GSM850, EGSM
BER (Class II) < 2.439% @-102 dBm
DCS,PCS
BER (Class II) < 2.439% @-100 dBm
9 RX Level Report Accuracy 3 dB
10 SLR 83 dB
Frequency (Hz) Max.(dB) Min.(dB)
100 -
200 -
-12
0
11 Sending Response
300 -12
1,000 -6
2,000 -6
3,000 -6
3,400 -9
0
0
4
4
4
4,000 - 0
12 RLR 23 dB

2. PERFORMANCE
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Frequency (Hz) Max.(dB) Min.(dB)
13 Receiving Response
300 -7
500 -5
1,000 -5
100 -
200 -
2
*
0
-12
0
3,000 -5
4,000
3,400 -10
2
2
2
14 STMR 135 dB
* Mean that Adopt a straight line in between 300 Hz
and 1,000 Hz to be Max. level in the range.
15 Stability Margin > 6 dB
-20
dB to ARL (dB) Level Ratio (dB)
-35
-30
30.7
17.5
22.5
-10
0
7
10
33.3
33.7
31.7
25.5
16 Distortion
17 Side Tone Distortion Three stage distortion < 10%
18
System frequency
(13 MHz) tolerance
2.5 ppm
19 32.768KHz tolerance 30 ppm
20 Ringer Volume
At least 65 dBspl under below conditions:
1. Ringer set as ringer.
2. Test distance set as 50 cm

2. Test distance set as 50 cm
2. PERFORMANCE
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Fast Charge : Typ. 430 mA
21 Charge Current Slow Charge : Typ. 80mA
Total Charging Time : < 3 hours
Bar Number Power
7
7 -> 5
-92dBm 2dBm
-93dBm 2dBm
2 -> 1
0 -> OFF
4 -> 2
-104dBm 2dBm
Under -106
-98dBm 2dBm
-101dBm 2dBm
22 Antenna Display
5 -> 4
1 -> 0 -106dBm 2dBm
14
13
Battery Bar Status Voltage(%) Voltage level(V)
16 level (Full)
15
4.20V ~ 4.04V 100 ~ 94%
4.04V ~ 3.98V 93 ~ 88%
3.98V ~ 3.94V 87 ~ 82%
3.94V ~ 3.90V
75 ~ 69% 12 3.90V ~ 3.86V
81 ~ 76%
23 Battery Indicator
10
9
11 3.86V ~ 3.82V 68 ~ 63%
3.82V ~ 3.78V 62 ~ 57%
3.78V ~ 3.76V 56 ~ 51%
8
7
3.76V ~ 3.74V 50 ~ 44%
3.74V ~ 3.72V 43 ~ 38%
6
4
3.72V ~ 3.70V 37 ~ 32%
3.68V ~ 3.66V 25 ~ 19%
2
3
2
3.66V ~ 3.64V 18 ~ 13%
3.64V ~ 3.62V 12 ~ 11%
3.62V ~ 3.58V 10 ~ 7%
5 3.70V ~ 3.68V 31 ~ 26%

1 3.58V ~ 3.32V 6 ~ 1%
0(Empty) 3.30V 0%
2. PERFORMANCE
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10%, 5%2times (standby) - Speaker
24 Low Voltage Warning
10%, 5% 2times (standby) Speaker
10%, 5% 2times, 5% at every 1min. (call) - Receiver
25 Shut down Voltage 0% ( about 3.3V )
26 Battery Type
Li-Ion Battery, Inner pack
Standard Voltage = 3.7 V
B tt f ll h lt 4 2 V
y yp
Battery full charge voltage = 4.2 V
Capacity: 950mAh
27 Travel Charger
Switching-mode charger
Input: 100 ~ 240V, 50/60 Hz
Output: 4.8 V, 400 mA

3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.1 Digital Main Processor
Figure. 3.1.1 MT6236 Hardware Block Diagram
ARM9EJS
Data cache
Data TCM
Instruction
cache
Instruction
TCM
ARM7EJS
Bluetooth
baseband
processor
External
memory
interface
slave DSP
ROM
RAM
Patch
unit
Bluetooth
control I/F
MCU / DSP
interface
Graphic memory controller
Boot
ROM
DMA
controller
USB
controller
LCD
controller
Multimedia
memory
JPEG
encoder
Image post
processing
Multimedia
DMA
2D
graphics
engine
Image
resizer
NAND
flash
controller
Image
signal
processor
JTAG
JTAG
T/R
switch
ADC
DAC
ADC
Audio
path
Baseband
path
Baseband TRX-I
Baseband TRX-Q
ADC
ADC
FM input L
FM input R
Auxiliary ADC
Touch panel input
DAC
AFC
APC
RF control
interface
System
clock
generation
Bluetooth
clock
generation
32K crystal
oscillator
Real
time
clock
Charger
LDOs
LED driver
Serial RF control
Parallel RF control
DAC AFC
APC
Program
memory
Trap unit Data memory
Patch
unit
Image sensor
DSP
copro-
cessor
I2C UART IrDA
MMC
SD/MS
MS PRO
Keypad GPIO PWM SIM
Watchdog
timer
General
purpose
timer
TDMA timer
Master DSP
Program
memory
Trap unit Data memory
Patch
unit
DSP
copro-
cessor
Share
memory
LDOs
LDOs
Bulk converters
Power up
sequencer
Vibrator driver
ISINK
VRF, VTCXO, VM,
VUSB, VMC, VIO,
VA, VRTC, VSIM,
VSIM2, VBT,
VCAMA, VCAMD
VCORE
Boost converter
MCU / DSP
interface
System clock input
13/26MHz
+
DAC
DAC
VOICE
AUDIO L
AUDIO R
MIC 0
MIC 1
Bus bridge
AUXADC
Serial LCD I/F
Serial LCD I/F
NAND flash I/F
SPI
controller
Voice control
interface
DAC
DAC
System clock input
13/26MHz
GSM/GPRS
coprocessor
ADC
Slow clock
unit
T/R
mux
Flash light
Backlight
Vibrator
SIM card
Serial interface User interface Memory card
Bluetooth radio
32KHz Xtal
NOR flash
pSRAM
DDR SDRAM

3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.1.1 General
Integrated voice-band, audio-band and base-band analog front ends.
Package: Package:
12.5x12.5mm
0.5 mm pitch
TFBGA 382balls, 0.5mm pitch package
3.1.2 MCU Subsystem
ARM926EJ-S
TM
32-bit RISC processor
High performance multi-layer AMBA bus
O ti f 13 / 78 / 156 / 312 MH Operating frequency 13 / 78 / 156 / 312 MHz
Dedicated DMA bus with 18 DMA channels
Java hardware acceleration for fast Java-based games and applets
On-chip boot ROM for Factory Flash Programming
Watchdog timer for system crash recovery
3 sets of General Purpose Timer
64K Byte Instruction TCM and 176K byte Data TCM
16K Byte Instruction Cache and 16K byte Data Cache
Circuit Switch Data coprocessor p
Division coprocessor
PPP Framer coprocessor
3.1.3 External Memory Interface
Supports up to 2 external devices
Supports 16-bit memory components with maximum size of up to 128M Bytes for each bank
Supports Flash and PSRAM with Burst Mode
Support legacy industry standard parallel LCD Interface Support legacy industry standard parallel LCD Interface
Support multi-media companion chips with 8/16 bits data width
Configurable driving strength for memory interface
Support Mobile DDR SDRAM and Cellular RAM
Flexible I/O voltage of 1.8V ~ 2.8V for memory interface
3.1.4 User Interface
8-row x 8-column keypad control with hardware scanner yp
Support multi key press for gaming
Dual SIM/USIM Controller with hardware T=0/T=1 protocol control
Real Time Clock(RTC) operating with a low quiescent current power supply
General Purpose I/Os (GPIOs) available for auxiliary application
4 set of Pulse Width Modulation(PWM) Output
4 channel auxiliary 10 bit A/D converter
Maximum 7 external interrupt lines
3 1 5 S i

3.1.5 Security
Support security key and 128bit chip unique ID
3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.1.6 Connectivity
3 UARTs with hardware flow control and supports of baud rate up to 921600 bps
IrDA modulator/demodulator with hardware framer supports SIR / MIR / FIR operating speeds IrDA modulator/demodulator with hardware framer. supports SIR / MIR / FIR operating speeds
USB 2.0 high speed capability
Multi Media Card/Secure Digital Memory Card/Memory Stick/Memory Stick Pro host controller with
flexible I/O voltage power
Supports SDIO interface for SDIO peripherals as well as WIFI connectivity
DAI/PCM and I2S interface for Audio application
I2C master interface for peripheral management including image sensor.
SPI master interface for peripheral management including digital TV chip.
3.1.7 Power Management
Li-ion battery charger
High efficiency bulk converter for core power and memory power supply with programmable voltage scaling
13 LDOs for the power supply of memory card, camera, Bluetooth, RF, SIM card, and other diversified
usage
One boost regulator and Four Open-Drain Output Switches to Supply / control the LED
LDO type Vibrator
One NMOS switch to control R(GB) LED One NMOS switch to control R(GB) LED
Thermal Overload Protection
Under voltage Lock out Protection
Over voltage Protection
Different level of power down modes with sophisticated software control enables excellent power saving
performance
3.1.8 Radio Interface and Baseband Front End
GMSK modulator with analog I and Q channel outputs
10-bit D/A Converter for uplink baseband I and Q signals
14-bit high resolution A/D Converter for downlink baseband I and Q signals
Calibration mechanism of offset and gain mismatch for baseband A/D Converter and D/A
Converter
10-bit D/A Converter for Automatic Power Control.
13-bit high resolution D/A converter for Automatic Frequency Control
Programmable Radio RX filter with adaptive bandwidth control
Bi directional BSI interface RF chip register read access with 3 Wire or 4 wire interface Bi directional BSI interface. RF chip register read access with 3 Wire or 4 wire interface
2 channels Baseband Serial Interface(BSI) whith 3 wire control
10-Pin Baseband Parallel Interface(BRI) with programmable driving strength
Multi-band support

3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.1.9 Voice and Modem CODEC
Digital tone generation
Voice Memo Voice Memo
Noise Reduction
Echo Suppression
Advanced Sidetone Oscillation Reduction
Digital sidetone generator with programmable gain
Two programmable acoustic compensation filters
GSM/GPRS quad vocoders for adaptive multirate(AMR), enhanced full rate(EFR), full
rate(FR), and half rate(HR)
GSM channel coding, equalization and A5/1, A5/2 and A5/3 ciphering
GPRS GEA1, GEA2 and GEA3 ciphering
Programmable GSM/GPRS modem
Packet Switched Data With CS1/CS2/CS3/CS4 coding schemes
GSM circuit switch Data
3.1.10 Voice Interface and Voice Front End
Two microphone inputs sharing one low noise amplifier with programmable gain and automatic gain
control(AGC) mechanism
Voice power amplifier with programmable gain
2
nd
order Sigma-delta A/D Converter for voice uplink path
D/A Converter for voice downlink path
Supports half-duplex hands-free operation
Compliant with GSM 03.05
3.1.11 LCD/NAND Flash Interface
Dedicated Parallel Interface supports 3 external devices with 8_/16-bit NAND flash interface,
8_/9_/16_/18-bit parallel interface, and serial interface for LCM
Built-in NAND Flash Controller with 1-bit ECC for mass storage
3.1.12 LCD Controller
Supports LCM format: RGB332, RGB444, RGB565, RGB666, RGB888
Supports LCD module with maximum resolution up to 320x480 at 24bpp
Capable of combining display memories with up to 4 blending layers
Supports simultaneous connection to up to 3 parallel LCD and 2 serial LCD modules
Supports hardware display rotation for each layer
Per pixel alpha channel
True color engine

3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.1.13 Audio CODEC
Wavetable synthesis with up to 64 tones
Advanced wavetable synthesizer capable of generating and 47 sets of percussions Advanced wavetable synthesizer capable of generating and 47 sets of percussions
PCM Playback and Record
Digital Audio Playback
Supports HE-AAC codec decode
Supports ASC codec decode
3.1.14 Audio Interface and Audio Front End
Supports I2S interface
High resolution D/A Converters for Stereo Audio playback
Stereo analog input for stereo audio source
Analog multiplexer for Stereo Audio
Stereo to Mono Conversion
Bluetooth Features
3.1.15 Image Signal Processor
8/10 bit Bayer format image input
RGB565/YUV422 format image input
Capable of processing image of size up to 5M pixels
Color correction matrix
Gamma correction
Automatic exposure(AE) control
Automatic focus control
Automatic white balance(AWR) control
Programmable AE/AWB windows Programmable AE/AWB windows
Edge enhancement support
Shading compensation
Defect Pixel compensation
3.1.16 JPEG Decoder
SW based JPEG decode
Supports various YUV format, DC/AC Huffman tables, and quatization Tables
3.1.17 JPEG Encoder
ISO/IEC 10918-1 JPEG baseline mode
ISO/IEC 10918-2 compliance
Supports YUV422 and YUV420 and grayscale formats
Supports EXIF/JFIF
Standard DC and AC Huffman tables

Standard DC and AC Huffman tables
Provides 14 levels of encode quality
Supports continuous shooting
3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.1.18 Image Data Processing
Supports Digital Zoom
Supports RGB and YCbCr image processing
High throughput hardware scaler. Capable of tailoring an image to an arbitrary size
Horizontal scaling with bicubic interpolation
vertical scaling with bicubic interpolation
Simultaneous scaling for video buffer and display buffer
YUV and RGB color space conversion
Boundary padding
Pixel processing: hue/saturation/intensity/color adjustment, Gamma correction and grayscale/
invert/sepia-tone effects invert/sepia tone effects
Hardware accelerated image editing
Photo frame capability
RGB/YCbCr format thumbnail output
3.1.19 MPEG-4/H.263 CODEC
Software Video CODEC
ISO/IEC 14496-2 simple profile
decode @ level 0/1/2/3
ITU-T H.263 profile 0 @ level 10
Encoder resync maker and HEC
Supported visual tools for decoder: I-VOP, P-VOP, AC/DC Prediction, 4-MV, Unrestricted MV,
Error Resilience, Short Header
Error Resilience for decoder : Slice Resynchronization, Data Partitioning, Reversible VLC
Supported visual tools for encoder : I-VOP, P-VOP, Half-Pel, DC Prediction, Unrestricted MV,
Reversible VLC, Short Header
Supports encoding motion vector of range up to -64/+63 5 pixels Supports encoding motion vector of range up to -64/+63.5 pixels
HE-AAC decode support
AAC/AMR/WB-AMR audio decode support
AMR/WB-AMR audio encode support
3.1.20 H.264 Decode
Software Decoder
ISO/IEC 14496-10 baseline profile : decode @level 3 ISO/IEC 14496 10 baseline profile : decode @ level 3
3.1.21 2D Accelerator
Supports 32-bpp ARGB8888, 24-bpp RGB888, 16-bpp RGB565, and 8-bpp index color modes
Rectangle fill with constant or gradient color
BitBlt : capable with 7 rotation types, ROP4, Mask
Alpha blending with 7 rotation types, per-pixel alpha and pre-multiplied alpha
Font caching : normal and italic font

Font caching : normal and italic font
Linear transform : Support perspective transform, truncate/nearest/bi-linear sample filter
Command queue with max depth of 1024
3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.1.22 Bluetooth Radio Features
Fully compliant with Bluetooth specification 2.1 + EDR
Low out-of-band spurious emissions supports simultaneous operation with GPS,GSM/GPRS
worldwide radio systems
Low-IF architecture with high degree of linearity and high order channel filter
Integrated T/R switch and Balun
Fully integrated PA provides 10dBm output power
-90dBm sensitivity with excellent interference rejection performance
Hardware AGC dynamically adjusts receiver performance in changing environments
3 1 23 Bluetooth Baseband Feature 3.1.23 Bluetooth Baseband Feature
Up to 7 simultaneous active ACL links
Up to 3 simultaneous SCO and eSCO links with CVSD coding
eSCO support
Scatternet support: Up to 4 piconets simultaneously with background inquiry/page scan
Sniff mode, hold mode, and park mode support
AFH and PTA collaborative support for WLAN/BT coexistence
Idle mode and sleep mode enables ultra lowpower consumption Idle mode and sleep mode enables ultra low power consumption
PCM interface and built-in transcoders for A-law, u-law and linear voice with re-transmission support
Built-in hardware modem engine for access code correlation, header error correction, forward error
correction, CRC whitening, and encryption
Channel quality driven data rate adaptation
Channel assessment for AFH
3.1.24 Bluetooth Platform features
Embedded ARM7 processor for Bluetooth protocol stack with built-in memory system
Fully verified ROM based system with code patch for feature enhancement

3. TECHNICAL BRIEF
- 22 -
3.2 Power Management
An power management is embedded in MT6236 to provide the rich features that an high-end feature
3. TECHNICAL BRIEF
p g p g
phone supports, including Li-ion battery charger, high performance and low quiescent current LDOs,
power efficient switching regulator, and drivers for LED and backlight.
The MT6236 offers various low-power features to help reduce system power consumption. MT6236 is
also fabricated in an advanced low power 65nm CMOS process, hence providing an overall ultra low
leakage solution.
3.2.1 Low Dropout Regulators(LDOs), Buck converter and Reference
The PMU Integrates 13 LDOs that are optimized for their given functions by balancing quiescent current,
dropout voltage, line/load regulation, ripple rejection, and output noise
RF LDO (Vrf)
The RF LDO is a linear regulator that could source 250mA (max) with 2.8V output voltage. It
supplies the RF circuitry of the handset. The LDO is optimized for high performance and adequate
quiescent current.
Digital Core Buck Converter (Vcore)
The digital core regulator is a DC-DC step-down converter (Buck converter) that could source
350mA (max) with 1.3V to 0.8V programmable output voltage based on software register setting.
It supplies the power for baseband circuitry of the SoC. The buck converter is optimized for high
efficiency and low quiescent current.
Digital Memory Buck Converter (VM) Digital Memory Buck Converter (VM)
The digital core regulator is a DC-DC step-down converter (Buck converter) that could source
300mA (max) with 1.8V. It supplies the power for baseband circuitry of the SoC. The buck
converter is optimized for high efficiency and low quiescent current.
Digital IO LDO (Vio)
The digital IO LDO is a linear regulator that could source 100mA (max) with 2.8V output voltage. It
supplies the power for baseband circuitry of the SoC The LDO is optimized for very low quiescent supplies the power for baseband circuitry of the SoC. The LDO is optimized for very low quiescent
current and turns on automatically together with Vm/Va LDOs.
Analog LDO (Va)
The analog LDO is a linear regulator that could source 125mA (max) with 2.8V output voltage. It
supplies the analog sections of the SoC. The LDO is optimized for low frequency ripple rejection in
order to reject the ripple coming from the burst at 217Hz of RF power amplifier.
TCXOLDO(Vtcxo)

TCXO LDO (Vtcxo)
The TCXO LDO is a linear regulator that could source 40mA (max) with 2.8V output voltage. It
supplies the temperature compensated crystal oscillator, which needs ultra low noise supply with
very good ripple rejection.
3. TECHNICAL BRIEF
- 23 -
3. TECHNICAL BRIEF
Single-Step RTC LDO (Vrtc)
The single-step RTC LDO is a linear regulator that can charge up a capacitor-type backup coin cell to 2.8
V which also supplies the RTC module even at the absence of the main battery The single-step LDO V, which also supplies the RTC module even at the absence of the main battery. The single step LDO
features the reverse current protection and is optimized for ultra low quiescent current while sustaining
the RTC function as long as possible.
Memory buck converter (Vm)
The memory regulator is a DC-DC step-down converter (Buck converter) that could source 300mA (max)
with 1.8V output voltage. It supplies the memory circuitry in the handset. The buck converter is
optimized for high efficiency and low quiescent current.
SIM LDO (Vsim)
The SIM LDO is a linear regulator that could source 100mA (max) with 1.8V or 3.0V output voltage
selection based on the supply specs of subscriber identity modules (SIM) card. It supplies the SIM card
and SIM level shifter circuitry in the handset. The Vsim LDO is controlled independently by the register
named VSIM_EN.
SIM2 LDO (Vsim2)
The SIM2 LDO is a linear regulator that could source 100mA (max) with 1.3V, 1.5V, 1.8V, 2.5V, 2.8V, 3.0V
or 3.3V output voltage selection based on the supply specs of the 2nd subscriber identity modules (SIM)
card. It supplies the 2nd SIM card and SIM level shifter circuitry in the handset. The Vsim2 LDO is
controlled independently by the register named VSIM2_EN.
USB LDO (Vusb)
The USB LDO is a linear regulator that could source 100mA (max) with 3.3V output dedicated for USB
ll d d d l b h d circuitry. It is controlled independently by the register named RG_VUSB_EN.
Bluetooth LDO (Vbt)
The VBT LDO is a linear regulator that could source 100mA (max) with 1.3V, 1.5V, 1.8V, 2.5V, 2.8V, 3.0V,
3.1V or 3.3V output for Bluetooth module. It is controlled independently by the register named
RG_VBT_EN.
Camera Analog LDO (Vcama)
The Vcama LDO is a linear regulator that could source 250mA (max) with 1.5V, 1.8V, 2.5V or 2.8V output
which is selected by the register named VCAMA_SEL[1:0]. It supplies the analog power of the camera
module. Vcama is controlled independently by the register named RG_VCAMA_EN.
Camera Digital LDO (Vcamd)
The Vcamd LDO is a linear regulator that could source 100mA (max) with 1.3V, 1.5V, 1.8V, 2.5V, 2.8V,

3.0V or 3.3V output which is selected by the register named VCAMD_SEL[2:0]. It supplies the digital
power of the camera module. Vcamd is controlled independently by the register named
RG_VCAMD_EN.
3. TECHNICAL BRIEF
- 24 -
Name of
PMIC
Net Name Output Voltage(V)
Output
Current(mA)
Description
(Connected Device)
VCORE VCORE_1V2 0.9 to 1.3 350 Digital Core
VM VMEM_1V8 1.8 300
Extemal Memory,
Selectable
VIO VIO_2V8 2.8 100 Digital IO
VRF VRF_2V8 2.8 250 RF Chip
va avdd_2v8 2.8 125 Analog Baseband
VRTC VRTC_2V8 2.8 0.6 RTC
VTCXO ---- 2.8 40
13/26 MHz Reference
Clock
VSIM VSIM1_PWR 1.8/3.0 100 SIM Card, Selectable
VSIM2 VSIM2_PWR 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100 SIM Card2, Selectable
VIBR --- 1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 Vibrator
VUSB VUSB_3V3 3.3 100 USB
VBT VBT_2V8 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100
Memory Card or
Bluetooth
VCAM_A VCAM_2V8 1.3/1.5/1.8/2.8 250 Analog Camera Power
VCAM_D VCAM_1V8 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100 Digital Camera Power
VMC VMC 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100 Memory Card
2 Bucks
13 LDOs
(4 Analog LDOs
+ 9 Digital
LDOs)
Table3.2.1. Power Supply Domains (Without RF)
3. TECHNICAL BRIEF
- 25 -
3. TECHNICAL BRIEF
3.2.2 Power On Sequence
The PMU handles the powering ON and OFF of the handset. There are three ways to power-on the
handset system: handset system :
1. Push PWRKEY (Pull the PWRKEY pin to the low level)
Pulling PWRKEY low is the typical way to turn on the handset. The Vcore buck converter will be turned-
on first, and then Va/Vio LDOs turn-on at the same time. After Va/Vio turn-on, Vm buck and then
Vusb/Vmc LDOs, and finally Vrf/Vtcxo LDOs will be turn on. The supplies for the baseband are ready and
then the system reset ends at the moment when the Vcore/Va/Vio/Vm/Vusb/Vmc/Vrf/Vtcxo are fully
turned-on to ensure the correct timing and function. After that, baseband would send the PWRBB signal
back to PMU for acknowledgement To uccessfully power-on the handset PWRKEY should be kept low back to PMU for acknowledgement. To uccessfully power-on the handset, PWRKEY should be kept low
until PMU receives the PWRBB from baseband.
2. RTC module generate PWRBB to wakeup the system
If the RTC module is scheduled to wakeup the handset at some time, the PWRBB signal will directly send
to the PMU. In this case, PWRBB becomes high at the specific moment and let PMU power-on just like
the sequence described above. This is the case named RTC alarm.
3. Valid charger plug-in (CHRIN voltage is within the valid range)
Charger plugging-in will also turn on the handset if the charger is valid (no OVP take place). However, if
the battery voltage is too low to power-on the handset (UVLO state), the system wont be turned-on by
any of these three ways. In this case, charger will charge the battery first and the handset will be
powered-on automatically as long as the battery voltage is high enough.
Table 18 States of mobile handset and regulator
Under-voltage Lockout (UVLO)
The UVLO state in the PMU prevents startup if the initial voltage of the main battery is below the 3.2V
threshold. It ensures that the handset is powered-on with the battery in good condition. The UVLO
function is performed by a hysteretic comparator which can ensure the smooth power-on sequence. In
addition, when the battery voltage is getting lower and lower, it will enter UVLO state and the PMU will
be turned-off by itself, except for Vrtc LDO, to prevent further discharging. Once the PMU enters UVLO
state, it draws low quiescent current. The RTC LDO is still working until the DDLO disables it.
Deep Discharge Lockout (DDLO)

PMU will enter to the deep discharge lockout (DDLO) state when the battery voltage drops below 2.5V.
In this state, the Vrtc LDO will be shutdown. Otherwise, it draws very low quiescent current to prevent
further discharging or even damage to the cells.
3. TECHNICAL BRIEF
- 26 -
3. TECHNICAL BRIEF
Reset
The PMU contains a reset control circuit which takes effect at both power-up and power-down. The
RESETB pin is held at low in the beginning of power-up and returns to high after the pre-determined
delay time. The delay time is controlled by a large counter, which use clock from internal ring-oscillator.
At power-off, RESETB pin will return to low immediately without any delay.

3. TECHNICAL BRIEF
- 27 -
3.3.1 Internal Block Diagram
3.3 FEM with integrated Power Amplifier Module (RF7180)
3. TECHNICAL BRIEF
Figure. 3 RF7180 FUNCTIONAL BLOCK DIAGRAM
3.3.2 General Description
The RF7180 is a quad-band (GSM850/EGSM900/DCS1800/PCS1900) GSM/GPRS Class 12compliant transmit
module with two symmetrical receive ports. This transmit module buildsupon RFMDs leading power
amplifier with PowerStar integrated power control technology,pHEMT switch technology, and integrated
transmit filtering for best-in-class harmonic perfor-mance. The results are high performance, a reduced
solution size, and ease of implementation.The device is designed for use as the final portion of the
transmitter section in aGSM850/EGSM900/DCS1800/PCS1900 handset and eliminates the need for PA-to-
antennaswitch module matching network. The device provides 50matched input and output
portsrequiring no external matching components.The RF7180 features RFMDs latest integrated power-
flattening circuit, which significantlyreduces current and power variation into load mismatch. Additionally,
a VBATT tracking feature isincorporated to maintain switching performance as supply voltage decreases

a VBATT tracking feature isincorporated to maintain switching performance as supply voltage decreases.
The RF7180 alsointegrates an ESD filter to provide excellent ESD protection at the antenna port.
GND
GND
GND
GND
G
N
D
G
N
D
G
N
D
GND
GND
RFIN LB
RFIN LB
R
X
0
R
X
1
ANTENNA
NC
N
C
V
B
A
T
T
V
R
A
M
P
T
X

E
N
A
B
L
E
G
P
C
T
R
L
0
G
P
C
T
R
L
1
ESD
Protection
Switch
Amplifer
CMOS Controller
1
2
3
4
5
6 7 8 9 10 11 12
13
14
15
16
17 18 19 20 21 22
3. TECHNICAL BRIEF
- 28 -
C1322 4.7p
C283 22p
C284
100p
C280 6p
C282 22u
C288 100p
C289 100p
DNI
C1327
VBAT
DNI
C1326
C287
220p
C285
100p
U215
12
1
1
0
1
987
13
6
14
5
15
4
16
3
17
2
8
1
1
9
1
0
2
1
2
2
2
3
2
G
U
L
S
_
D
N
G
P
M
A
R
V
E
L
B
A
N
E
_
X
T
0
L
R
T
C
P
G
1
L
R
T
C
P
G
GND1
T
T
A
B
V
GND2
NC3
RFIN_LB
GND9
GND3
GND8
RFIN_HB
ANT
GND4
NC2
5
D
N
G
6
D
N
G
7
D
N
G
1
C
N
0
X
R
RX1
C291
22p
C290
33p
C286
22p
R282
180
R288
24K
R281
10K
R284
180
R283
30
C293
33p
R286
24
R287
220
R285
220
RF_TX_RAMP
RF_ANT_SW1
LowBand_Tx
HighBand_Tx
x
R
_
d
n
a
B
w
o
L
x
R
_
d
n
a
B
h
g
i
H
RF_ANT_SW2
RF_PA_EN
TX Module Mode Tx ENABLE GpCtrl1 GpCtrl0
Of 0 0 0
RX 0 0 1 0
RX 1 0 1 1
GSM850/900 TX Mode 1 1 0
DCS1800/PCS1900 TX Mode 1 1 1
Figure 2 RF-module CIRCUIT DIAGRAM
3. TECHNICAL BRIEF
- 29 -
3.4 Clocks
3. TECHNICAL BRIEF
There are two major time bases in the MT6236. For the faster one is the 26 MHz clock originated from the
digital control oscillator(DCXO) of RF chip. This signal is then converted to the square-wave signal
through CLKSQ. The other time base is the 32768 Hz clock generated by an on-chip oscillator connected
to an external crystal. Figure 3.4.1 shows the clock sources as well as their utilizations inside the chip.
Figure. 3.4.1 Clock distributions inside the MT6236.

Figure. 3.4.2 Crystal Oscillator External Connection
CG
EN
MCU_DCM
TCVCXO
CLKSQ
1/2
XOSC_ANA
UPLL
MPLL
&
NPLL
32KHz
26MHz
CLKSQ_CON (0x801A_0100)
MPLL_636M_CK
CLKSQ_26M_CK
UPLL_624M_CK
USB_PHY_CLK
XOSCOUT
1/2
MPLLSEL
(0x801A_0204[1:0])
FMCU_CK
CG
EN
DSP_DCM
FDSP_CK
DPLLSEL
(0x801A_0204[3:2])
UPLLSEL
(0x801A_0204[7:6])
CG
EN
USB_DCM
FUSB_CK
F32K_CK
UPLL_48M_USB_CK
GUSB_CK
104MHz GDSP2_CK
CG
EN
CG
EN
104MHz GDSP1_CK
USB PHY
52MHz AHB clock
104MHz EMI clock
312MHz MCU clock
MSDCclock
IrDA clock
SLOW_CK
GPLLSEL
(0x801A_0204[5:4])
CG
EN
CG
EN
GSM_DCM
FGSM_CK
52MHz GSM_CK
52MHz BFE clock
0
1
2
1
0
CG
EN
MSDC_DCM
CG
EN
SLOW_DCM
XOSC_CON (0x801A_0000)
CPLL
MPLLDIV
UPLLDIV
CLKSQ_13M_CK
MPLL_312M_CK
MPLL_104M_CK
UPLL_52M_CK
UPLL_96M_CK
UPLL_48M_CK
0
1
2
0
1
2
0
1
2
CPLLDIV
CPLL_208M_CK
CG
EN
CPLL_DIV_CK
Cameraclock
CPLL_CON2(0x801A_0608)
RF
ABB
CLKSW_TOP
MPLL_208M_CK
208MHz EMI clock
MPLL_CLKSW
(frequency hoppingswitch)
CLKCTL
UPLL_104M_CK
NPLL_636M_CK
Figure. 3.4.1 Clock distributions inside the MT6236.
3. TECHNICAL BRIEF
- 30 -
X201
DSX321G-26M
26MHz
2 1
3 4
R289
0
R222
2.2K
220n
C259
2.2K
R224
2.2K
R223
2.2K
R225
1u
C262
C272
1n
C275 39p
1K R228
82p
C250
C252 0.1u
C258
0.1u
C260
47p
82p
C249
VRF_2V8 AVDD_2V8
C261
0.1u
VBAT
0.1u
C254 C255
0.1u
C256
0.1u
C257
27p
U205
6
1
5
1
4
1
3
1
2
1
1
1
0
1
9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
5
2
6
2
7
2
8
2
9
2
0
3
1
3
2
3
3
3
D
N
G
0
5
8
X
R
B
0
5
8
X
R
0
0
9
X
R
B
0
0
9
X
R
0
0
8
1
X
R
B
0
0
8
1
X
R
0
0
9
1
X
R
B
0
0
9
1
X
R
VCC_FE VCC_BBQ
I Q
IB QB
VCC_BBI REF_OP
SDATA REFIN
SCLK REFINB
SEN VAFC_NC
NC VCC_REF
3
O
D
L
V
O
L
_
P
O
X
T
I
H
_
P
O
X
T
O
C
V
X
T
_
C
C
V
D
D
V
T
A
B
V
1
O
D
L
V
2
O
D
L
V
RF_S_EN
RF_S_DATA
RF_S_CLK
RF_IN
RF_IP
RF_QN
RF_QP
RF_AFC
CLK_26M
BT_TRX
x
T
_
d
n
a
B
w
o
L
x
T
_
d
n
a
B
h
g
i
H
N
x
R
_
0
5
8
M
S
G
N
x
R
_
M
S
G
E
N
x
R
_
S
C
P
N
x
R
_
S
C
D
P
x
R
_
M
S
G
E
P
x
R
_
0
5
8
M
S
G
P
x
R
_
S
C
P
P
x
R
_
S
C
D
Figure. 3.4.2 Crystal Oscillator External Connection
3. TECHNICAL BRIEF
- 31 -
3.4.1 32.768KHz Time Base
The 32768 Hz clock is always running. Its mainly used as the time base of the Real Time Clock(RTC)
module which maintains time and date with counters Therefore both the 32768Hz oscillator and the RTC
3. TECHNICAL BRIEF
module, which maintains time and date with counters. Therefore, both the 32768Hz oscillator and the RTC
module is powered by separate voltage supplies that shall not be powered down when the other supplies
do.
In low power mode, the 13Mhz time base is turned off, so the 32768Hz clock shall be employed to update
the critical TDMA timer and Watchdog Timer. This time base is also used to clocks the keypad scanner
logic
3.4.2 26MHz Time Base
Since PLL are based on 13MHz reference clock. There is an -dividers for PLL existing to allow using
26MHz DCXO.
There are 3 phase-locked loops(PLL) in MT6236. The UPLL generates 624Mhz clock output, then a
frequency divider to generate fixed 52Mhz and 48Mhz for GSM_CLOCK and USB_CLOCK respectively. The
MPLL generates dynamically programmable clock from 624 ~ 660Mhz for MCU_CLOCL and DSP_CLOCK.
These four primary clocks then feed into GSM, USB, MCU and DSP clock Domain, respectively. Besides,
There is a CPLL generates 6.5 ~ 208Mhz clock output, with a post-divider from 1 ~ 1/16 clock for Camera- g
Sensor. These 3 PLLs require no off-chip components for operations and can be turn off in order to save
power. After power-on, the PLLs are off by default and the source clock signal is selected through
multiplexers. The software shall take cares of the PLL lock time while changing the clock selections. The
PLL and usages are listed below.
- PLL supply four clock source : MCU_CLOCK(312~330Mhz), DSP_CLOCK(104~110Mhz),
GSM_CLOCK(104Mhz) and USB_CLOCK(48Mhz)
- For DSP/MCU system clock, MCU_CLOCK and DSP_CLOCK. The outputted 624~660Mhz clock is y , _ _ p
controlled by MCU for 1.0Mhz per step and settled time is under 100uS. The clock is also connected to
DSP/MCU DCM (dynamic clock manager) for dynamically adjusting clock rate by digital clock divider.
MCU_CLOCK paces the operations of the MCU cores, MCU memory system, and MCU peripherals as well
- Modem system clock, GSM_CLOCK, which paces the operations of the GSM/GPRS hardware,
coprocessors as well. The outputted 52Mhz clock is connecter to GSM_DCM for dynamically adjusting
clock rate by digital clock divider.
Note that PLL need some time to become stable after being powered up. The software shall take cares of
the PLL lock time before switching them to the proper frequency. Usually, a software loop longer than the
PLL lock time is employed to deal with the problem.
For power management, the MCU software program may stop MCU Clock by setting the Sleep Control
Register. Any interrupt requests to MCU can pause the sleep mode, and thus MCU return to the running
mode.
AHB also can be stop by setting the Sleep Control Register. However the behavior of AHB in sleep mode is

a little different from that of MCU. After entering Sleep Mode, it can be temporarily waken up by any
hreq(bus request), and then goes back to sleep automatically after all hreqs de-assert. Any transactions
can take place as usual in sleep mode, and it can save power while there is no transaction on it. However
the penalty is losing a little system efficiency for switching on and off bus clock, but the impact is small
3. TECHNICAL BRIEF
- 32 -
3.5 Transceiver(AD6548,U205)
Figure. 3.5.1 Block DIAGRAM AD6548
e
l
u
d
o
M

h
c
t
i
w
S

a
n
n
e
t
n
A
DC Offset
Correction
DC Offset
Correction
PFD
/2
LDO
Reg 3
LDO
Reg 2
LDO
Reg 1
Frac-N Synth
RX LO
Generator
TX LO
Generator
Xtal Osc
+ Tuning
Serial
Interface
/4
SEN
SCLK
SDATA
RX1900B
RX1900
RX1800B
RX1800
RX900B
RX900
RX850B
RX850
TXOP_HI
TXOP_LO
VDD
VBAT VLDO3 VLDO2 VLDO1
LO VCO
Supply
REF_OP
REFIN
REFINB
VAFC
VCC_REF
Q
QB
I
IB
VCC_BBI
VCC_BBQ
LNA Gain
Reduction
TX_LO2
TX_LO1
TX_LO2
TX_LO1
General
Supply
TX circuits
supply
CLK
RXQB
RXQ
TXQB
TXQ
RXIB
RXI
TXI
TXIB
AFC
REF_OP
Band
Control
TX Loop
Filter
GSM1800/1900
GSM850/900
PA Module
AD6548
VCC_FE
VCC_TXVCO
Ref
Supply
VCC_
TXVCO
3. TECHNICAL BRIEF
- 33 -
3.5 Transceiver(AD6548,U205)
3. TECHNICAL BRIEF
3.5.1 GENERAL DESCRIPTION
The AD6548 provides a highly integrated direct conversion radio solution that combines, on a single chip, all
radio and power management functions necessary to build the most compact GSM radio solution possible.
The only external components required for a complete radio design are the Rx SAWs, PA, Switch plexer and a
f i bli t l ll t ff ti GSMR di l ti
Figure. 3.5.1 Block DIAGRAM AD6548
few passives enabling an extremely small cost effective GSM Radio solution.
The AS6548 uses the industry proven direct conversion receiver architecture of the Othello
TM
Family. For Quad band applications the front end features four fully integrated programmable gain
differential LNAs. The RF is then downconverted by quadrature mixers and then fed to the baseband
programmable-gain amplifiers and active filters for channel selection. The Receiver output pins can be
directly connected to the baseband analog processor. The Receive path features automatic calibration and
tracking to remove DC offsets.
The transmitter features a translation-loop architecture for di-rectly modulating baseband signals onto the

The transmitter features a translation loop architecture for di rectly modulating baseband signals onto the
integrated TX VCO.
The translation-loop modulator and TX VCO are extremely low noise removing the need for external SAW
filters prior to the PA.
The AD6548 uses a single integrated LO VCO for both the receive and the transmit circuits. The synthesizer lock
times are optimized for GPRS applications up to and including class12. To dramatically reduce the BOM both TX
Translational loop and main PLL Loop Filters are fully integrated into the device.
3. TECHNICAL BRIEF
AD6548 incorporates a complete reference crystal calibration system. This allows the external VCTXO to be
replaced with a low cost crystal. No other external components are required.
The AD6548 also contains on-chip low dropout voltage regulators(LDOs) to deliver regulated supply voltages to
the functions on chip, with a battery input voltage of between 2.9V and 5.5V. Comperehensive power down
options are included to minimize power consumption in normal use.
A standard 3 wire serial interface is used to program the IC. The interface features low-voltage digital interface
buffers compatible with logic levels from 1.6V to 2.9V
3.5.2 Features
Fully integrated GSM Transceiver including.
Direct Conversion Receiver
- 4 Differential LNAs
- Integrated Active RX channel Select Filters Integrated Active RX channel Select Filters
- Programmable gain baseband amplifiers
Translation Loop Direct VCO Modulator
- Integrated TX VCO and tank
- External TX filters eliminated
-Integrated Loop filter components
High performance multi band PLL system
- Fast Fractional-N-Synthesizer
-Integrated Local Oscillator VCO
- Fully integrated Loop filters
-Crystal Reference Oscillator & Tuning System
Power Management
I d LDO ll di b l i - Integrated LDOs allow direct battery supply connection
Small footprint
- 32-Lead 5X5mm Chip scale Package
Dual Triple and Quad band radios
- GSM850,EGSM900,DCS1800 and PCS1900
- GPRS to Class 12-EDGE RX

GPRS to Class 12 EDGE RX
3. TECHNICAL BRIEF
- 34 -
The AD6548 uses a single integrated LO VCO for both the receive and the transmit circuits. The synthesizer lock
times are optimized for GPRS applications up to and including class12. To dramatically reduce the BOM both TX
Translational loop and main PLL Loop Filters are fully integrated into the device.
3. TECHNICAL BRIEF
AD6548 incorporates a complete reference crystal calibration system. This allows the external VCTXO to be
replaced with a low cost crystal. No other external components are required.
The AD6548 also contains on-chip low dropout voltage regulators(LDOs) to deliver regulated supply voltages to
the functions on chip, with a battery input voltage of between 2.9V and 5.5V. Comperehensive power down
options are included to minimize power consumption in normal use.
A standard 3 wire serial interface is used to program the IC. The interface features low-voltage digital interface
buffers compatible with logic levels from 1.6V to 2.9V
3.5.2 Features
Fully integrated GSM Transceiver including.
Direct Conversion Receiver
- 4 Differential LNAs
- Integrated Active RX channel Select Filters Integrated Active RX channel Select Filters
- Programmable gain baseband amplifiers
Translation Loop Direct VCO Modulator
- Integrated TX VCO and tank
- External TX filters eliminated
-Integrated Loop filter components
High performance multi band PLL system
- Fast Fractional-N-Synthesizer
-Integrated Local Oscillator VCO
- Fully integrated Loop filters
-Crystal Reference Oscillator & Tuning System
Power Management
I d LDO ll di b l i - Integrated LDOs allow direct battery supply connection
Small footprint
- 32-Lead 5X5mm Chip scale Package
Dual Triple and Quad band radios
- GSM850,EGSM900,DCS1800 and PCS1900
- GPRS to Class 12-EDGE RX

GPRS to Class 12 EDGE RX
3. TECHNICAL BRIEF
- 35 -
3.6 MEMORY(PF38F4050M0Y3DE, U300 )
3. TECHNICAL BRIEF
3 6 1 Functional Description
Hynix NAND Flash is a 128Mx16bit with spare 4Mx16 bit capacity.
The device is offered in 1.8 Vcc Power Supply, and with x16 I/O interface
Its NAND cell provides the most cost-effective solution for the solid state mass storage market.
The memory is divided into blocks that can be erased independently so it is possible to preserve valid
data while old data is erased.
The device contains 2048 blocks, composed by 64 pages.
Memory array is split into 2 planes each of themconsisting of 1024 blocks
3.6.1 Functional Description
Memory array is split into 2 planes, each of them consisting of 1024 blocks.
Like all other 2KB - page NAND Flash devices, a program operation allows to write the 2112-byte page in
typical 250us and an erase operation can be performed in typical 3.5ms on a 128K-byte block.
In addition to this, thanks to multi-plane architecture, it is possible to program 2 pages at a time (one per
each plane) or to erase 2 blocks at a time (again, one per each plane). As a consequence, multi-plane
architecture allows program time to be reduced by 40% and erase time to be reduction by 50%. In case of
multi-plane operation, there is small degradation at 1.8V application in terms of program/erase time.
The multiplane operations are supported both with traditional and ONFI 1.0 protocols.
Data in the page can be read out at 45ns cycle time per byte. The I/O pins serve as the ports for address
and data input/output as well as command input. This interface allows a reduced pin count and easy
migration towards different densities, without any rearrangement of footprint.
Commands, Data and Addresses are synchronously introduced using CE#, WE#, ALE and CLE input pin.
The on-chip Program/Erase Controller automates all read, program and erase functions including pulse
repetition, where required, and internal verification and margining of data.
A WP# pin is available to provide hardware protection against program and erase operations.
The output pin RB# (open drain buffer) signals the status of the device during each operation. In a system
with multiple memories the RB# pins can be connected all together to provide a global status signal.
Each block can be programmed and erased up to 100,000 cycles with ECC (error correction code) on. To
extend the lifetime of Nand Flash devices, the implementation of an ECC is mandatory.
The chip supports CE# don't care function. This function allows the direct download of the code from the
NAND Flash memory device by a microcontroller since the CE# transitions do not stop the read operation NAND Flash memory device by a microcontroller, since the CE# transitions do not stop the read operation.
In addition, device supports ONFI 1.0 specification.
The copy back function allows the optimization of defective blocks management: when a page program
operation fails the data can be directly programmed in another page inside the same array section
without the time consuming serial data insertion phase. Copy back operation automatically executes
embedded error detection operation: 1 bit error out of every 264-word (x16) can be detected. With this
feature it is no longer necessary to use an external to detect copy back operation errors.

Multiplane copy back is also supported, both with traditional and ONFI 1.0 protocols. Data read out after
copy back read (both for single and multiplane cases) is allowed.
In addition, Cache program and multi cache program operations improve the programming throughput
by programming data using the cache register.
3. TECHNICAL BRIEF
- 36 -
3. TECHNICAL BRIEF
The devices provide two innovative features: page re-program and multiplane page re-program. The
page re-program allows to re-program one page. Normally, this operation is performed after a previously
failed page program operation. Similarly, the multiplane page re-program allows to re-program two
pages in parallel, one per each plane. The first page must be in the first plane while the second page must
be in the second plane; the multiplane page re-program operation is performed after a previously failed
multiplane page program operation. The page re-program and multiplane page re-program guarantee
improve performance, since data insertion can be omitted during re-program operations, and save ram
buffer at the host in the case of program failure.
The devices support the ONFI1.0 specification and come with four security features:
OTP (one time programmable) area which is a restricted access area where sensitive data/code can be - OTP (one time programmable) area, which is a restricted access area where sensitive data/code can be
stored permantely.
- Serial number (unique identifier), which allows the devices to be uniquely indentified.
-Read ID2 extension
These security features are subject to an NDA (non-disclosure agreement) and are, therefore, no
described in the datasheet. For more details about them, contact your nearest Hynix sales office.
Table 3_6_1 Signal Names
Figure. 3.6.1 LOGIC DIAGRAM

DQ0~DQ15 Data Input /outputs(x16)
CLE Command latch enable
ALE Address latch enable
CE# Chip Enable
RE# Read Enable
WE# Write Enable
WP# Write Protect
RB# Ready / Busy
Vcc Power supply
Vss Ground
NC No Connected internally
VDD
CE#
WE#
RE#
ALE
CLE
WP#
DQ0~DQ7(x8)
DQ0~DQ15(x16)
RB#
VSS
3. TECHNICAL BRIEF
The devices provide two innovative features: page re-program and multiplane page re-program. The
page re-program allows to re-program one page. Normally, this operation is performed after a previously
failed page program operation. Similarly, the multiplane page re-program allows to re-program two
pages in parallel, one per each plane. The first page must be in the first plane while the second page must
be in the second plane; the multiplane page re-program operation is performed after a previously failed
multiplane page program operation. The page re-program and multiplane page re-program guarantee
improve performance, since data insertion can be omitted during re-program operations, and save ram
buffer at the host in the case of program failure.
The devices support the ONFI1.0 specification and come with four security features:
OTP (one time programmable) area which is a restricted access area where sensitive data/code can be - OTP (one time programmable) area, which is a restricted access area where sensitive data/code can be
stored permantely.
- Serial number (unique identifier), which allows the devices to be uniquely indentified.
-Read ID2 extension
These security features are subject to an NDA (non-disclosure agreement) and are, therefore, no
described in the datasheet. For more details about them, contact your nearest Hynix sales office.
Figure. 3.6.1 LOGIC DIAGRAM

3. TECHNICAL BRIEF
- 37 -
3. TECHNICAL BRIEF
Figure. 3.6.2 BLOCK DIAGRAM

ADDRESS
REGISTER/
COUNTER
PROGRAM
ERASE
CONTROLLER
HV GENERATION
COMMAND
INTERFACE
LOGIC
COMMAND
REGISTER
DATA
REGISTER
WE#
CE#
WP#
RE#
BUFFERS
IO
Y DECODER
PAGE BUFFER
2048 Mbit + 64 Mbit
NAND Flash
MEMORY ARRAY
X
D
E
C
O
D
E
R
3. TECHNICAL BRIEF
- 38 -
3. TECHNICAL BRIEF
[ MCP ]
Operation Temperature
3.6.2 Features
[ DDR SDRAM ]
Double Data Rate architecture Operation Temperature
- -30oC ~ 85oC
Package
- 130-ball FBGA - 8.0x9.0mm2, 1.0t, 0.65mm pitch
- Lead & Halogen Free
[ NAND Flash ]
MULTIPLANE ARCHITECTURE
SUPPLY VOLTAGE
Double Data Rate architecture
- two data transfer per clock cycle
x16 bus width
Supply Voltage
- VDD / VDDQ = 1.7 - 1.95 V
Memory Cell Array
- 16Mb x 4Bank x 16 I/O
Bidirectional data strobe (DQS)
Input data mask signal (DQM)
- Vcc = 1.7 - 1.95 V
MEMORY CELL ARRAY
- (1K + 32) Words x 64 pages x 2048 blocks
PAGE SIZE
- (1K+ 32 spare) Words
BLOCK SIZE
- (64K + 2K spare) Words
PAGE READ / PROGRAM
- Randomaccess : 25us (max.)
Input data mask signal (DQM)
Input Clock
- Differential Clock Inputs (CK, /CK)
MRS, EMRS
- JEDEC Standard guaranteed
CAS Latency
- Programmable CAS latency 2 or 3 supported
Burst Length
P bl b t l th 2 / 4 / 8 ith b th
Random access : 25us (max.)
- Sequential access : 45ns (min.)
- Page program time : 250us (typ.)
- Multi-page program time (2 pages): 250us (Typ.)
BLOCK ERASE / MULTIPLE BLOCK ERASE
- Block erase time: 3.5 ms (Typ)
- Multi-block erase time (2 blocks): 3.5ms (Typ.)
SEQURITY
- OTP area
S i l b ( i ID)
- Programmable burst length 2 / 4 / 8 with both
sequential and interleave mode
- Sreial number (unique ID)
- Hardware program/erase disabled during
- power transition
ADDITIONAL FEATURE
- Multiplane Architecture:
Array is split into two independent planes.
Parallel operations on both planes are available,
having program and erase time.
- Single and multiplane copy back program with automatic g p py p g
EDC (error detection code)
- Single and multiplane page re-program
- Single and multiplane cache program
- Cache read
- Multiplane block erase
RELIABILITY
- 100,000 Program / Erase cycles (with 1bit /528Byte ECC)
- 10 Year Data retention
ONFI 1 0 COMFLIANT COMMANDSET

ONFI 1.0 COMFLIANT COMMAND SET
ELECTRICAL SIGNATURE
- Munufacture ID: ADh
- Device ID
3. TECHNICAL BRIEF
- 39 -
3.7 Wi-Fi Module(MT5931, U206)
The MT5931 WLAN is designed to support IEEE 802.11 a/b/g/n single with the state-of-the-art design techniques and
process technology to achieve low power consumption and high throughput performance to address the requirement
of mobile devices. The MT5931 WLAN low power function uses the innovative design techniques and the optimized
architecture which best utilizes the advanced process technology to reduce active and idle power, and achieve extreme
low power consumption at sleep state to extend the battery life. The MT5931 WWLAN TX A-MPD function uses the
stat-of-the-are design technique to maximize the throughput performance while achieving the best bufer utilization at
low cost. Further, the MT5931 WLAN also implements the highly sophisticated coexistence scheme to allow extremely
collaborative WLAN, BT and external WiMax coexistence. As a result, the enhanced overall quality has been achieved for
simultaneous voice, video, and data transmission on a mobile device.
Figure 3.7.1. Wi-Fi BLOCK DIAGRAM
3. TECHNICAL BRIEF
- 40 -
100p
C1316
C263 4.7n
C265
8.2n
X202 1XTW26000FAA
26MHz
2 1
3 4
VCC OUT
GND1 GND2
C1341
18p
FL203
3
2
1
IN D
N
G
OUT
U206
K1
F7
F6
7
G
6
G
D9
D7
D6
C9
A10
5
A
5
E
5
C
3
B
4
A
3
A
3
C
2
A
1
B
1
A
5
B
J4
K4
E3
G3
G2
G1
J2
H2
K2
J1
J3
H3
H7
K9
J9
D1
D2
E8
E9
E6
E7
F10
F4
F8
G9
J8
K8
E2
H8
B8
C6
B9
A7
F9
D4
D3
C2
E10
A8
D10
A9
A6
C10
B10
4
H
5
H
6
H
6
K
5
J
6
J
2
F
3
F
0
1
G
9
H
0
1
H
0
1
J
1
C
4
G
0
1
K
7
K
7
J
1
H
1
E
E
C
R
U
O
S
F
3
OI
D
D
V
D
2
OI
D
D
V
D
1
OI
D
D
V
D
0
OI
D
D
V
D
1
K
D
D
V
_
D
A
P
O
D
L
C
X
T
_
G
B
D
_
T
R
A
U
X
R
_
G
B
D
_
T
R
A
U
1
_
OI
P
G
0
_
OI
P
G
N
_
S
C
N
_
E
W
5
1
D
4
1
D
3
1
D
2
1
D
1
1
D
0
1
D
TRX_IO_P
TRX_IO_N
AVDD33_XO
AVDD33_TX
AVDD16_TRX
AVDD16_SX
AVDD16_LF
AVDD16_CLDO
AVDDRTC
AVSSRTC
OSC_EN
OSC_IN
AVSS33_PA3
AVSS16_WF1
AVSS16_VCO
EXT_INT_B
WIFI_INT_B
ANTSEL_0
ANTSEL_1
ANTSEL_2
ANTSEL_3
CGND1
PAD_ICAL_EXTR
TRXIN
TRXIP
TRXQN
TRXQP
X32K_OUT
X32K_IN
XTEST
SYSRST_B
BT_PRI
D0
D1
A0
D3
D2
OE_N
D4
D5
D6
D7
D8
D9
N
E
_
D
A
P
F
E
R
F
E
R
_
D
N
G
F
E
R
_
3
4
D
D
V
A
B
F
_
T
U
O
K
B
X
L
S
P
M
S
_
3
4
D
D
V
A
S
P
M
S
_
3
4
D
N
G
A
O
D
L
A
P
_
D
N
G
B
F
_
O
D
L
A
P
O
D
L
A
P
AVSS33_PA1
AVSS33_PA2
AVSS16_WF2
AVSS16_WF3
AVSS16_WF4
2
K
D
D
V
_
D
A
P
3
K
D
D
V
_
D
A
P
CGND2
CGND3
CGND4
PALDO_3V3
C299
1.8p
FL205
7
4 3
5 2
6 1
V1 J1
RFC GND
V2 J2
G
U
L
S
_
G
0.1u
C245
PALDO_3V3
C266
18p
C253
DNI
C278
DNI
C298
DNI
2
0
2
T
N
A
5
1
0
3
R
T
P
T
B
D
S
2 3
1
4
3Y
M
MUD
DEEF
2Y
M
MUD
1Y
M
MUD
C1319
1u
R252
100K
C295
1u
TP202
VBAT
C1332 100p
C270
4.7u
SMPSLDO_1V6
VBAT
R254
24K
C1317
10p
VIO_2V8
R255
100K
C264
0.5p
C269 1.2p
R260
10K
TP200
TP201 C244
1u
C246
1u
C247
1u
VIO_2V8
VMEM_1V8
R253
49.9
C232 0.1u
C229 10p
C227 1u
0.1u C226
C223 1n
R270
10K
R268
0
R267
0
C1328
DNI
C214 4.7u
4.7u
C277
C243
2.2u
R262
10K
3
2
3
1
C
I
N
D
4
2
3
1
C
I
N
D
1p
C1321
10K
R259
VTCXO_2V8
U207
3 2
4 1
OUT TER
IN COU
C279
100p
C276
8.2p
FL204
3
1
2
4
B/P_2
B/P_1
Gnd/DC_fd
UnB/P
8.2p
C267
10K
R264
0.1u C228
1M
R263
L233 1.8n
1u
C239
VRTC_2V8 SMPSLDO_1V6
PALDO_3V3
0.1u
C221
L225
2.2u
FB200
120
C251
18p
C248 18p C1338 18p
L232
3.9n
L230
1.2n
L231
5.6n C1330
DNI
12p
C274
GND
LCD_WR_N
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[00]
LCD_RS
LCD_RD_N
WIFI_INT
WiFi_RST
BT_PRI
WIFI_32K
WiFi_CS
BT_TRX
WiFi_TX_CLK_EN
WiFi_EN
BT_WIFI_SEL_1
BT_WIFI_SEL_1
BT_WIFI_SEL_0
BT_WIFI_SEL_0
BT_IN_OUT
BT_IN_OUT
WIFI_IN_OUT
WIFI_IN_OUT
Star connection
MT5931 WIFI
Figure 3.7.2. WiFi CIRCUIT DIAGRAM
3. TECHNICAL BRIEF
- 41 -
3.7.1 Feature
** MAC features
-802.11 a/b/g/e/i/h/k/w compatible
-802 11n throughput : 35M/70Mbps for 20M/40MHz BW
-Hardware state machine controller for extreme low power consumption
** WLAN/BT/WiMax coexistence mechanisms:
-WLAN supports frequency domain division (FDD) mode by extensive frequency plan and
interference cancellation with BT/WiMAX for optimal throughput (even in single antenna)
- Based on the frequencies of WLAN, BT and WiMAX, WLAN adjusts its TX power
- WLAN adapts its Rx path when the BT trafc is busy.
-WLAN supports time domain division (TDD) mode by scheduling WLAN/BT/WiMAX blocks for
optimal distance with acceptable throughput.
-WLAN supports time domain division (TDD) mode by PTA (Packet Trafc Arbiter) with BT and
external device, like WiMAX
** 802.11n optional features
- A-MPD TX
- Up to 8 simultaneous links
- Up to 16 MPDUs A-MPD
- TX window size up to 64 (maximum)
- MMSS full support (0~16 us)
- Instantly releasing the acknowledged MPDUs data bufer to achieve perfect data bufer
utilization
- Instantly aggregation for not acknowledged retry MPDUs and outstanding MPDUs within
SIFS to achieve A-MPD burst for best throughput performance
- BAR for life time out to help RX side re-ordering bufer early releasing.
-TXOP protection and truncation
-Reverse Direction
-Link Adaptation (MCS Feedback)
-PCO
-RIFS TX/RX
-PSMP
** AP/STA/ad-hoc mode
** Up to 20 peers for Direct Link or ad-hoc mode
** Up to 32 multicast addresses
** Rate adaption mechanism
3. TECHNICAL BRIEF
- 42 -
J300
9 8
10 7
6 3
5 2
4 1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VA306 VA307 VA308
VSIM1
C300
DNI
C301
DNI
DNI
C302
1u
C303
R304
DNI
SIM_RST1_N
SIM_CLK1 SIM_DATA1
Figure 3.8.1 SIM Connector Circuit Diagram
3.8 SIM Card Interface
J301
9 8
10 7
6 3
5 2
4 1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VA309 VA310
VA311
1u
C315
C314
DNI DNI
C313 C312
DNI
VSIM2
DNI
R305
SIM_RST2_N
SIM_CLK2 SIM_DATA2
3. TECHNICAL BRIEF
- 43 -
The Main Base Band Processor(MT6236) contains two dedicated smart card interfaces to allow the
MCU to access the two SIM cards. Each interface can operator via 5 terminals. As shown is the Figure
3.8.2, SIMVCC, SIMSEL, SIMRST, SIMCLK and SIMDATA are for one SIM interface, while SIM2VEE, SIM2SEL,
3. TECHNICAL BRIEF
SIM2RST, SIM2CLK and SIM2DATA are for the other one.
The functions of the two SIM interfaces are identical; therefore, only first SIM interface will be described
in this document.
The VSIM is used to control the external voltage supply to the SIM card and SIM SEL determines the
regulated smart card supply voltage. SIMRST is used as the SIM card reset signal. Besides, SIMDATA and
SIMCLK are used for data exchange purpose
Figure 3 8 2 SIMInterface block diagram Figure 3.8.2 SIM Interface block diagram

Figure 3.8.2 SIM Interface block diagram
3. TECHNICAL BRIEF
- 44 -
3. TECHNICAL BRIEF
3.9 Micro-SD Card Interface
Figure 3.9.1 Micro-SD Card Interface
The controller fully supports the Memory Stick bus protocol as defined in Format Specification version
2.0 of Memory Stick Standard (Memory Stick PRO) and the SD Memory Card bus protocol as defined in
SD Memory Card Specification Part 1 Physical Layer Specification version 2.0 as well as the Multi Media
Card(MMC) bus protocol as defined in MMC system specification version 4.1. Since SD memory Card
bus protocol is backward compatible to MMC bus protocol, the controller is capable of working well as
the host on MMC bus under control of proper firmware. Furthermore, the controller also support SDIO
card specification version 1.0 partially. However, the controller can only be configured as either the card specification version 1.0 partially. However, the controller can only be configured as either the
host controller.

3.9 Micro-SD Card Interface
VMC_3V3_LDO
C321
DNI
C323
1n
473091265
S300
G2
G1 G3
8
G4
7
6
3
5
2
4
1
DAT2
VDD
CD/DAT3
CLK
CMD
VSS
DAT0
DET
DAT1
POL GND1
GND2
R312
10
VA301 VA302 VA303
VA312 VA305 VA304
VIO_2V8
R303
100K
C322
2.2u
MSD_CLK
MSD_CMD
MSD_DET_N
MSD_D[3]
MSD_D[2]
MSD_D[0]
MSD_D[1]
u-SD CARD
3. TECHNICAL BRIEF
- 45 -
3. TECHNICAL BRIEF
3.9.1 Pin Assignment
Since the controller can only be configured as either the host of Memory Stick or the host of SD/MMC
Memory Card at one time pins for Memory Stick and SD/MMC Memory Card are shared in order to save Memory Card at one time, pins for Memory Stick and SD/MMC Memory Card are shared in order to save
pin counts. The following lists pins required for Memory Stick and SD/MMD Memory Card. Figure
3.9.2 shows how they are shared. In Table 3.9.1, all I/O pads have embedded both pull up and pull
down resistor because they are shared by both the Memory Stick and SD/MMC Memory Card. Pins
2,4,5,8 are only useful for SD/MMC Memory Card. Pull down resistor for these pins can be used for
power saving. All embedded pull-up and pull-down resistors can be disabled by programming the
corresponding control registers if optimal pull-up or pull-down resistor are required on the system
b d Th i VDDPD i d f i P f M S i k SD/MMC M C d board. The pin VDDPD is used for power saving. Power for Memory Stick or SD/MMC Memory Card can
be shut down by programming the corresponding control register. The pin WP(Write Protection) is
only valid when the controller is configured for SD/MMC Memory Card. It is used to detect the status of
Write Protection Switch on SD/MMC Memory Card.
Table 3.9.1 Sharing of pins for Memory Stick and SD/MMC Memory Card controller

3. TECHNICAL BRIEF
- 46 -
3. TECHNICAL BRIEF
3.9.2 Card Detection
For SD/MMC Memory Card, detection of card insertion/removal by hardware is also supported.
Because a pull down resistor with about 470 Kresistance which is impractical to embed in an I/Opad Because a pull down resistor with about 470 Kresistance which is impractical to embed in an I/O pad
is needed on the signal CD/DAT3, and it has to be capable of being connected or disconnected
dynamically onto the signal CD during initialization period, an additional I/O pad is needed to switch
on/off the pull down resistor on the system board. The scenario of card detection for SD/MMC Memory
Card is shown in Figure 3.9.2. Before SD/MMD Memory Card is inserted or powered on, SW1 and SW2
shall be opened for card detection of the host side. Meanwhile, pull down resistor R
CD
on system board
shall attach onto the signal CD/DAT3 by the output signal RCDEN. In addition, SW3 on the card is
d f l b l d U i i f SD/MMC M C d h i l CD/DAT3 ill h i i default to be closed. Upon insertion of SD/MMC Memory Card the signal CD/DAT3 will have a transition
from low to high. If SD/MMC Memory Card is removed then the signal CD/DAT3 will return to logic low.
After the card identification process, pull down resistor R
CD
on system board shall disconnect with the
signal CD/DAT3 and SW3 on the card shall be opened for normal operation.
Since the scheme above needs a mechanical switch such as a relay on system board, it is not ideal
enough. Thus, a dedicated pin INS is used to perform card insertion and removal for SD/MMC. The pin
INS will connect to the pin VSS2 of a SD/MMC connector.
Figure 3.9.2 Card Detection for SD/MMC Memory Card

HOST CARD
R
PU
SW1
R
PD
SW2
O
u
t
p
u
t

e
n
a
b
l
e
DAT3 OUT
CD/DAT3 IN
PAD PAD
O
u
t
p
u
t

e
n
a
b
l
e
10-90K
SW3
470Kohm
RCDEN
3. TECHNICAL BRIEF
- 47 -
3. TECHNICAL BRIEF
3.10 LCD Interface
MT6236 contains a versatile LCD controller which is optimized for multimedia applications. This controller
s pports man t pes of LCD mod les and contains a rich feat re set to enhance the f nctionalit These
Figure 3.10.1 LCD Interface
supports many types of LCD modules and contains a rich feature set to enhance the functionality. These
features are:
Up to 320 x 480 resolution
The internal frame buffer supports 8bpp indexed color, RGB 565, RGB 888, ARGB 8888, PARGB 8888
and YUYV422 format.
Supports 8-bpp (RGB332), 12-bpp (RGB444), 16-bpp (RGB565), 18-bpp (RGB666) and 24-bpp (RGB888)
LCD modules.
4 Layers Overlay with individual color depth, windowsize, vertical and horizontal offset, source key, 4 Layers Overlay with individual color depth, window size, vertical and horizontal offset, source key,
alpha value and display rotation control(90,180, 270, mirror and mirror then 90, 180 and 270)
One Color Look-Up Table
Three Gamma Correction Tables
For parallel LCD modules, the LCD controller can reuse external memory interface or use dedicated 16/18-bit
parallel interface to access them and 8080 type interface is supported. It can transfer the display data from the
internal SRAM or external SRAM/Flash Memory to the off-chip LCD modules.
For serial LCD modules, this interface performs parallel to serial conversion and both 8- and 9- bit serial interface

is supported. The 8-bit serial interface uses four pins LSCE#, LSDA, LSCK and LSA0 to enter commands and
data.
Meanwhile, the 9-bit serial interface uses three pins LSCE#, LSDA and LSCK for the same purpose. Data read
is not available with the serial interface and data entered must be 8 bit.
3.10 LCD Interface

C338 C339
25pF
FL302
0
1
5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1
G
2
G
VA300
1u
C310
100K
R311
25pF
FL300
0
1
5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1
G
2
G
1u
C311
VIO_2V8 VMEM_1V8
R300
100
FL301
25pF
0
1
5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1
G
2
G
VBAT
C336
2.2u
CN300
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LCD_CS_N
LCD_RST_N
LCD_WR_N
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[00]
LCD_RS
LCD_RD_N
LCD_VSYN
LCD_ID
BLED_CA0
BLED_CA1
BLED_CA2
BLED_CA3
LCD INTERFACE
3. TECHNICAL BRIEF
- 48 -
3. TECHNICAL BRIEF
The RT9367C is an integrated solution for backlighting and phone camera input supply. The part contains
Figure 3.10.2 Charge Pump CIRCUIT DIAGRAM
a charge pump white LED driver and dual low dropout linear regulators. This IC can be shut down by
pulling EN low.
In the section of charge pump, The RT9367C can power up 4 white LEDs with regulated constant current
for uniform intensity. Each channel (LED1-LED4) can support up to 25mA. The part maintains highest
efficiency by utilizing a x1/x1.5/x2 fractional charge pump and low dropout current regulators. An internal
5-bit DAC is used for brightness control. Users can easily configure up to 32-step of LED current by I2C
i t f interface.
In the section of linear regulator, The RT9367C comprises a dual channel, low noise, and low dropout
regulator sourcing up to 300mA at each channel. The range of output voltage can be configured from
1.1V to 3.3V by I2C interface. The outputs of LDO offer 3% accuracy and low dropout voltage of 250mV @
300mA. The LDO also provides current limiting and output short circuit thermal folded back protection.

1K
R310
2.2u
C337
VHP_1V8
2.2u
C332
DNI
C324
DNI
C325
2.2u
C334
VIO_2V8
VBAT
C331 1u 1u C330
2.2u
C333
VHP_MIC_2V6
C328
1u
C329
33p DNI
C326
DNI
C327
U302
1
2
20
19
18
8
7
6
5
9
4
10
3
1
1
2
2
1
1
13
4
1
15
16
17
LED3
LED4
NC2
2
O
D
L
AVIN
N
1
C
1
O
D
L
N
2
C
D
N
G
A
D
N
G
P
NC1
P
2
C
ENA
P
1
C
PVIN
SCL
SDA
LED2
LED1
VOUT
G
_
G
U
L
S
I2C_SCL1
I2C_SDA1
BLED_CA0
BLED_CA1
BLED_CA2
BLED_CA3
LCD Charge Pump
3. TECHNICAL BRIEF
- 49 -
3. TECHNICAL BRIEF
3.11 Battery Charger Interface
From External Source
(Wall Adaptor or Computer)
Figure 3.11.1 BATTERY CHARGER BLOCK
The RT9524 is a fully integrated single-cell Li-Ion battery charger IC ideal for portable applications. The
RT9524 optimizes the charging task by using a control algorithm including pre-charge mode, fast charge
mode and constant voltage mode. The input voltage range of the VIN pin can be as high as 30V. When the
input voltage exceeds the OVP threshold, it will turn off the charging MOSFET to avoid overheating of the
chip.
In RT9524, the maximum charging current can be programmed with an external resister. For the USB
application, user can set the current to 100mA/500mA through EN/SET pin. For the factory mode, the RT9524 pp , g p y ,
can allow 4.2V/2.3A power pass through to support system operation. It also provides a 50mA LDO to
support the power of peripheral circuit. The internal thermal feedback circuit regulates the die temperature
to optimize the charge rate for all ambient temperatures. The RT9524 provides protection functions such as
under voltage protection, over voltage protection for VIN supply and thermal protection for battery
temperature.
The RT9524 is available in a WDFN 10L 2x3 package to achieve optimized solution for PCB space and

The RT9524 is available in a WDFN-10L 2x3 package to achieve optimized solution for PCB space and
thermal considerations.
3.11 Battery Charger Interface

C523
1u
R536
DNI
0.1u
C504
1300
R502
100K
R504
VIO_2V8
VUSB_LDO_4V9
R503
3K
VBAT VBUS_USB
U500
6 5
7 4
8 3
9 2
10 1
11
PGND
VIN BATT
ISET PGB
GND1 CHGSB
LDO GND2
IEOC EN_SET
CHG_EN
EOC
(1%) (1%)
3. TECHNICAL BRIEF
- 50 -
KB546 KB547
7
1
5
A
V
5
1
5
A
V
6
1
5
A
V
3
1
5
A
V
4
1
5
A
V
1
1
5
A
V
2
1
5
A
V
9
1
5
A
V
8
1
5
A
V
1
2
5
A
V
0
2
5
A
V
3
2
5
A
V
2
2
5
A
V
4
2
5
A
V
7
2
5
A
V
8
2
5
A
V
DNI
9
2
5
A
V
DNI
0
3
5
A
V
DNI
1
3
5
A
V
DNI
KB504 KB500 KB501 KB502 KB503 KB505 KB506
KB507 KB513 KB512 KB511 KB510 KB509 KB508
KB540
KB515 KB514 KB518 KB519
KB516 KB517
KB520
KB521 KB522 KB523
KB531 KB530
KB524
KB533 KB534
KB536 KB538
KB529
KB528
KB527
KB526
KB525
KB537 KB535 KB541 KB542
KB543 KB544 KB539
KB532
1
W
O
R
_
Y
E
K
KEY_COL5
0
W
O
R
_
Y
E
K
2
W
O
R
_
Y
E
K
3
W
O
R
_
Y
E
K
4
W
O
R
_
Y
E
K
KEY_COL0
KEY_COL1
KEY_COL3
KEY_COL4
5
W
O
R
_
Y
E
K
KEY_COL2
KEY_COL7
7
W
O
R
_
Y
E
K
Dual SIM CAMERA
KEY MATRIX
Q W E R T Y U
I O P A S D F
WiFi
G H J K L Del Fn
Z X C V B N M
,(comma) ENTER Shift @
SEND
RIGHT SOFT LEFT SOFT
SYM Message/Lock DOWN
.(period) SPACE
OK
LEFT RIGHT UP
3.12 Keypad Interface
VA526
KB545
END_KEY
End Key
END
Figure 3.12.1 MAIN KEY STRUCTURE
3. TECHNICAL BRIEF
- 51 -
The keypad can be divided into two parts: one is the keypad interface including 8 columns and 8 rows
with one dedicated power-key, as shown in Figure 3.12.2; the other is the key detection block which
id k d k l d d d b h i E h i h k i d l d
3. TECHNICAL BRIEF
provides key pressed, key released and de-bounce mechanisms. Each time the key is pressed or released,
i.e. something different in the 8 x 8 matrix or power-key, the key detection block senses the change and
recognizes if a key has been pressed or released. Whenever the key status changes and is stable, a KEYPAD
IRQ is issued. The MCU can then read the key(s) pressed directly in KP_MEM1, KP_MEM2, KP_MEM3,
KP_MEM4 and KP_MEM5 registers. To ensure that the key pressed information is not missed, the status
register in keypad is not read-cleared by APB read command. The status register can only be changed by
the key-pressed detection FSM.
Figure 3.12.2 8x8 matrix with one power-key

Dedicated for Power-key (8x8 + one power-key) key matrix
ROW0
ROW1
ROW2
ROW3
ROW4
Baseband
PMIC integrated BB chip
COL1 COL2 COL3 COL4 COL5 COL6
PMIC
COL0 COL7 PWR_KEY
1 1 1 1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1
1
1
1
1
1
1
1
1
1
1
1
1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1
ROW5
ROW6
ROW7
Figure 3.12.2 8x8 matrix with one power-key
3. TECHNICAL BRIEF
- 52 -
3. TECHNICAL BRIEF
This keypad can detect one or two key-pressed simultaneously with any combination. Figure 3.12.3
shows one key pressed condition. Figure 3.12.4(a) and Figure 3.12.4(b) illustrate two keys pressed cases.
Si h k d i d d h HIGH LOWl l f h l k d i f if k Since the key press detection depends on the HIGH or LOW level of the external keypad interface, if keys
are pressed at the same time and there exists a key that is on the same column and the same row with
the other keys, the pressed key cannot be correctly decoded. For example, if there are three key presses:
key1 = (x1, y1), key2 = (x2, y2), and key3 = (x1, y2), then both key3 and key4 = (x2, y1) are detected, and
therefore they cannot be distinguished correctly. Hence, the keypad can detect only one or two keys
pressed simultaneously at any combination. More than two keys pressed simultaneously in a specific
pattern retrieve the wrong information.
Figure 3.12.3 One key pressed with de-bounce mechanism denoted

Figure 3.12.4 Two keys pressed, case 1 (b) Two keys pressed, case 2

Key-pressed Status
De-bounce time
De-bounce time
Key Pressed
KP_IRQ
KEY_PRESS_IRQ KEY_RELEASE_IRQ
Key1 pressed
Key2 pressed
Status
IRQ
Key1 pressed Key2 pressed Key1 released Key2 released
Key1 pressed
Key2 pressed
Status
IRQ
( a)
( b)
Key1 pressed
Key2 pressed
Status
IRQ
Key1 pressed
Key2 pressed
Status
IRQ
( a)
( b)
Figure 3.12.3 One key pressed with de-bounce mechanism denoted
Figure 3.12.4 Two keys pressed, case 1 (b) Two keys pressed, case 2
3. TECHNICAL BRIEF
- 53 -
3. TECHNICAL BRIEF
3.13 Audio Front-End
The audio front-end essentially consists of voice and audio data paths. Figure 3.13.1 shows the block
diagram of the audio front-end. All voice band data paths comply with the GSM 03.50 specification. Mono
hands-free audio or external FM radio playback paths are also provided. The audio stereo path facilitates CD-
quality playback, external FM radio, and voice playback through a headset.
Figure 3.13.1 Block diagram of audio front end
Figure 3.13.2 shows the digital circuits block diagram of the audio front-end. The APB register block is an
APB peripheral that stores settings from the MCU. The DSP audio port (DAP) block interfaces with the DSP
for control and data communications. The digital filter block performs filter operations for voice band and
audio band signal processing. The Digital Audio Interface (DAI) block communicates with the System

g p g g ( ) y
Simulator for FTA or external Bluetooth modules.
AU_MOUTR
AU_MOUTL
AU_OUT0_P
AU_OUT0_N
AU_FMINR
AU_FMINL
M
U
X
M
U
X
Stereo-
to-Mono
FM/AM radio
chip
Voice Signal
Stereo or Mono
Audio Signal
Voice Amp-0
Audio Amp-L
Audio Amp-R
AU_VIN0_P
AU_VIN0_N
AU_VIN1_N
AU_VIN1_P
M
U
X
Voice Signal
Audio
RCH-DAC
Audio
LCH-DAC
Voice
ADC
PGA
PGA ClassD
SPK1_P
SPK1_N
Voice Signal
Stereo or Mono
Audio Signal
3. TECHNICAL BRIEF
3.13 Audio Front-End
The audio front-end essentially consists of voice and audio data paths. Figure 3.13.1 shows the block
diagram of the audio front-end. All voice band data paths comply with the GSM 03.50 specification. Mono
hands-free audio or external FM radio playback paths are also provided. The audio stereo path facilitates CD-
quality playback, external FM radio, and voice playback through a headset.
Figure 3.13.2 shows the digital circuits block diagram of the audio front-end. The APB register block is an
APB peripheral that stores settings from the MCU. The DSP audio port (DAP) block interfaces with the DSP
for control and data communications. The digital filter block performs filter operations for voice band and
audio band signal processing. The Digital Audio Interface (DAI) block communicates with the System

g p g g ( ) y
Simulator for FTA or external Bluetooth modules.
3. TECHNICAL BRIEF
- 54 -
3. TECHNICAL BRIEF
Figure 3.13.2 Block diagram of digital circuit of audio front end
To communicate with the external Bluetooth module, the master-mode PCM interface and master-
mode I2S/EIAJ interface are supported. The clock of PCM interface is 256 kHz while the frame sync is 8
kHz. Both long sync and short sync interfaces are supported. The PCM interface can transmit 16-bit
stereo or 32-bit mono 8 kHz sampling rate voice signal. Figure 3.13.3 shows the timing diagram of the
PCM interface. Note that the serial data changes when the clock is rising and is latched when the clock is
falling.

3. TECHNICAL BRIEF
- 55 -
3. TECHNICAL BRIEF
Figure 3.13.3 Timing diagram of Bluetooth application
I2S/EIAJ interface is designed to transmit high quality audio data. Figure 3.13.4 and Figure 3.13.5 illustrate
the timing diagram of the two types of interfaces. I2S/EIAJ can support 32 kHz, 44.1 kHz, and 48 kHz
sampling rate audio signals. The clock frequency of I2S/EIAJ can be 32(sampling frequency), or
64(sampling frequency). For example, to transmit a 44.1 kHz CD-quality music, the clock frequency should
be 32 44.1 kHz = 1.4112 MHz or 64 44.1 kHz = 2.8224 MHz.
I2S/EIAJ interface is not only used for Bluetooth module, but also for external DAC components. Audio data
can easily be sent to the external DAC through the I2S/EIAJ interface In this document the I2S/EIAJ interface can easily be sent to the external DAC through the I2S/EIAJ interface. In this document, the I2S/EIAJ interface
is referred to as EDI (External DAC Interface).

3. TECHNICAL BRIEF
- 56 -
3. TECHNICAL BRIEF
3.14 Camera Interface
Figure 3.14.1 Camera Interface
The YACD511SBDBC is a high quality 2mega-pixel single chip Cmos image sensor for mobile phone camera
applications and digital still camera products. The YACD511SBDBC incorporates a 1644 X 1260 pixel array,
on-chip 10-bit ADC, and an image signal processor. Unique sensor technology enhances image quality by
reducing FPN(Fixed Pattern Noise), horizontal/vertical line noise, and random noise. The Image Signal
Processor (ISP) performs sophisticated image processing functions including color interpolation and
correction, lens shading correction, edge enhancement, gamma correction, image scaling, noise reduction,
auto exposure (AE), auto white balance (AWB), auto flicker cancellation, and auto defect correction. The AE
and AWB functions are performed by an embedded 8-bit processor which uses to run built-in these
sophisticated algorithms. The programmable functions are controlled by host processor via 2-wire I2C bus
interface. The YACD511SBDBC, which needs a single master clock(48Mhz(Max)), is suitable for low power
camera module with 2.8V/1.8V power supply.

3.14 Camera Interface
FB302
600
FB301
600
FB300
600
U301
8
2
7
2
6
2
5
2
8
1
7
1
6
1
5
1
4
1
3
1
12
24
11
23
10
22 9
21
8
20
7
19
654321
3
D
4
D
5
D
6
D
7
D
D
N
G
D
VSYNC
MCLK
PCLK
GND1
GND4
/RESET D0
SDA
D1
SCL
D2
/STANDBY
V
8
_
1
D
D
V
D
V
8
_
2
D
D
V
O
I
2
D
N
G
V
8
_
2
D
D
V
A
3
D
N
G
C
N
Y
S
H
1
D
N
G
P
2
D
N
G
P
3
D
N
G
P
4
D
N
G
P
TP315
TP316
VCAM_2V8
0.1u
C319 C320
0.1u
TP318
TP319
C318
0.1u
VCAM_1V8
TP321
CAM_MCLK
CAM_HSYNC
CAM_VSYNC
CAM_PCLK I2C_SCL1
CAM_DATA[7]
CAM_DATA[6]
CAM_DATA[5]
CAM_DATA[4]
CAM_DATA[3]
CAM_DATA[2]
CAM_DATA[1]
CAM_DATA[0]
I2C_SDA1
CAM_PWDN
CAM_RST_N
3. TECHNICAL BRIEF
- 57 -
3. TECHNICAL BRIEF
3.14.1 FEATURES
Optical size : 1/5 inch
Unit pixel size : 1.75 um x 1.75 um
Resolution : 1,600H X 1,200V
Active image Size : 2.856mm(H) X 2.156mm(V)
Output format : Yuv4:2:2, RGB5:6:5, ITU656-like
Frame rate : 15fps@UXGA, 30fps@SVGA p p
ADC resolution : 10-Bit
Lens shading correction
Color interpolation and color correction
Noise reduction
Edge enhancement
Edge Data for Auto Focus Edge Data for Auto Focus
Motion data for Auto Focus
Windowing : Programmable
Sub-Sample : 1/2. 1/4 (SVGA, QSVGA)
Gamma correction
Image effect: Mono, Sepia, Solarization, Negative, Sketch, Embossing etc
Image scaling: 1x ~ 1/64x
Auto flicker Cancellation
Image Flip : X/Y Flip
Auto exposure (AE)
Auto white balance (AWB)
Black Level Calibration
Strobe Control : Support Xenon / LED Type
On-Chip Dead Pixel Correction
Host interface: two-wire serial bus interface
Internal PLL
Operating temperature: -20C to +60C
Supply voltage: 2.8V / 1.8V

Supply voltage: 2.8V / 1.8V
3. TECHNICAL BRIEF
- 58 -
3. TECHNICAL BRIEF
3.15 KEY BACLKLIGHT LED Interface
Two built-in open-drain output switches drive the FLASH and Keypad LED in the handset Each switch is Two built in open drain output switches drive the FLASH and Keypad LED in the handset. Each switch is
controlled by baseband with enable registers. The switch of keypad LED can sink 150mA. The switch of FLASH
can sink 300mA. And both the open-drain output switches are high impedance when disabled.
Current Sink (ISINK)
Five built-in current sinks output drive the backlight LED in the handset. Each current sink is controlled by
baseband with enable registers and provide six options for output current selection (4mA, 8mA, 12mA, 16mA,
20mA 24mA) The current sink output are high impedance when disabled 20mA, 24mA) The current sink output are high impedance when disabled.
Backlight Driver (BL)
The backlight (BL) driver control is responsible for controlling the external boost DC/DC converter, which is
required to drive up to 6 white LEDS (2 legs, 3 in series or 1 leg, 6 in series). BLDRV connects to the gate of the
external MOSFET; CS_BL senses the current flow through the MOSFET, and FB_BL feeds the voltage drop on
ballast resistor back to the PMIC for LED light intensity control. DC_OV helps prevent the over-voltage of the
t t output.

Figure 3.15.1 Key Backlight Block
Figure 3.15.1 Key Backlight Block

1
0
5
D
L
2
1
A
C
0
0
5
D
L
2
1
A
C
DNI
VA509 VA510
DNI
C501
1u
VBAT
KEY_BL0
KEY_BL1
3. TECHNICAL BRIEF
- 59 -
3. TECHNICAL BRIEF
3.16 Vibrator Interface
Vibrator is driven by MT6236.
VBAT is connected with + terminal of vibrator and terminal is connected with
VIB_N. It is controlled by VIBRATOR signal of MT6253 with 8 step function.
Figure 3.16.1 Vibrator Driver Block

VA532
C512
1u
47p
C516
270n
L501
R537
4.7
47p
C515
VBAT
L500
22n
VB500
2
1
VIB_N
Vibrator
Figure 3.16.1 Vibrator Driver Block
4. TROUBLE SHOOTING
- 60 -
4.1 RF Component
4. TROUBLE SHOOTING
U300
U100
U206
X201
U205
Figure 4.1
U215
g
U100 Main Chip (MT6236)
U201 TX Module (SKY77550)
U206 WIFI (MT5931)
U215 GSM Transceiver (AD6548)
M ( G/ GDDR)

U300
Memory(2G/1G DDR)
H9DA2GH1GHMMMR-46M
X201 Crystal, 26MHz Clock
4. TROUBLE SHOOTING
4.1 RF Component
U100
U300
U206
X201
U205
U215
4. TROUBLE SHOOTING
- 61 -
4.2 RX Trouble
4. TROUBLE SHOOTING
START
HP8960 : Test mode
62 CH, 7 level setting (TCH)
62CH, -60dBm setting (BCCH)
Spectrumanalyzer setting Spectrum analyzer setting
Oscilloscope setting
(1) Check (page52)
Crystal Circuit
(2) Check (page53)
Mobile SW &TX module
Re-download SW or
Do calibration again
(3) Check PLL Control

4.2 RX Trouble
4. TROUBLE SHOOTING
- 62 -
(1) Checking Crystal Circuit
26 MHz
O.K?
Replace TP1
No
Crystal is OK.
See next page to check PLL Circuit
Yes
X201
DSX321G-26M
26MHz
2 1
3 4
R289
0
2.2K
R223
2.2K
R225
C272
C275 39p
1K R228
82p
C250
C252 0.1u
C260
47p
U205
6
1
5
1
4
1
3
1
2
1
1
1
0
1
9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
5
2
6
2
7
2
8
2
9
2
0
3
1
3
2
3
3
3
D
N
G
0
5
8
X
R
B
0
5
8
X
R
0
0
9
X
R
B
0
0
9
X
R
0
0
8
1
X
R
B
0
0
8
1
X
R
0
0
9
1
X
R
B
0
0
9
1
X
R
VCC_FE VCC_BBQ
I Q
IB QB
VCC_BBI REF_OP
SDATA REFIN
SCLK REFINB
SEN VAFC_NC
NC VCC_REF
3
O
D
L
V
O
L
_
P
O
X
T
I
H
_
P
O
X
T
O
C
V
X
T
_
C
C
V
D
D
V
T
A
B
V
1
O
D
L
V
2
O
D
L
V
TP1
TP1
Figure 4.2.1
TP1
4. TROUBLE SHOOTING
- 63 -
C1322 4.7p
C283 22p
C284
100p
C280 6p
C282 22u
C288 100p
C289 100p
DNI
C1327
VBAT
DNI
C1326
C287
220p
C285
100p
U215
12
1
1
0
1
987
13
6
14
5
15
4
16
3
17
2
8
1
1
9
1
0
2
1
2
2
2
3
2
G
U
L
S
_
D
N
G
P
M
A
R
V
E
L
B
A
N
E
_
X
T
0
L
R
T
C
P
G
1
L
R
T
C
P
G
GND1
T
T
A
B
V
GND2
NC3
RFIN_LB
GND9
GND3
GND8
RFIN_HB
ANT
GND4
NC2
5
D
N
G
6
D
N
G
7
D
N
G
1
C
N
0
X
R
RX1
C291
22p
C290
33p
C286
22p
R282
180
R288
24K
R281
10K
R284
180
R283
30
C293
33p
R286
24
R287
220
R285
220
RF_TX_RAMP
RF_ANT_SW1
LowBand_Tx
HighBand_Tx
x
R
_
d
n
a
B
w
o
L
x
R
_
d
n
a
B
h
gi
H
RF_ANT_SW2
RF_PA_EN
TP1
TP2
TP5
TP3
TP4
(2) Checking Mobile SW &Tx module
TP1
TP4
TP3
TP5
TP2
Figure 4.2.4
VBAT
RF_ANT_SW2
RF_ANT_SW1
RF_PA_EN
4. TROUBLE SHOOTING
- 64 -
Check TP1 of SW201
TP1 Signal is OK? Replace Mobile SW (SW201)
Yes
Check TP2 of U215
Control Signal
is (TP6,7,8,9,10)
OK ?
Yes
No
Mobile SW & TX
Module is OK.
TP2,3(High Band),
TP4,5(Low Band)
Signal is OK ?
Check MT6236(U100)
No
Yes
Replace TX module (U215)
Of 0 0 0
RX 0 0 1 0
RX 1 0 1 1
GSM850/900 TX Mode 1 1 0
4. TROUBLE SHOOTING
- 65 -
4. TROUBLE SHOOTING
4.3 TX Trouble
START
HP8960 : Test mode
62 CH, 7 level setting (TCH)
62CH, -60dBm setting (BCCH)
Spectrum analyzer setting
Oscilloscope setting
(1)Check
Crystal Circuit
(2) Check
Mobile SW &Tx module
Redownload SW or
(3) Check PLL Control

4.3 TX Trouble
4. TROUBLE SHOOTING
- 66 -
(1) Checking Crystal Circuit
26 MHz
O.K?
Replace TP1
No
Crystal is OK.
See next page to check PLL Circuit
Yes
X201
DSX321G-26M
26MHz
2 1
3 4
R289
0
2.2K
R223
2.2K
R225
C272
C275 39p
1K R228
82p
C250
C252 0.1u
C260
47p
U205
6
1
5
1
4
1
3
1
2
1
1
1
0
1
9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
5
2
6
2
7
2
8
2
9
2
0
3
1
3
2
3
3
3
D
N
G
0
5
8
X
R
B
0
5
8
X
R
0
0
9
X
R
B
0
0
9
X
R
0
0
8
1
X
R
B
0
0
8
1
X
R
0
0
9
1
X
R
B
0
0
9
1
X
R
VCC_FE VCC_BBQ
I Q
IB QB
VCC_BBI REF_OP
SDATA REFIN
SCLK REFINB
SEN VAFC_NC
NC VCC_REF
3
O
D
L
V
O
L
_
P
O
X
T
I
H
_
P
O
X
T
O
C
V
X
T
_
C
C
V
D
D
V
T
A
B
V
1
O
D
L
V
2
O
D
L
V
TP1
TP1
Figure 4.2.1
TP1
4. TROUBLE SHOOTING
- 67 -
(2) Checking Mobile SW & TX Module
C1322 4.7p
C283 22p
C284
100p
C280 6p
C282 22u
C288 100p
C289 100p
DNI
C1327
VBAT
DNI
C1326
C287
220p
C285
100p
U215
12
1
1
0
1
987
13
6
14
5
15
4
16
3
17
2
8
1
1
9
1
0
2
1
2
2
2
3
2
G
U
L
S
_
D
N
G
P
M
A
R
V
E
L
B
A
N
E
_
X
T
0
L
R
T
C
P
G
1
L
R
T
C
P
G
GND1
T
T
A
B
V
GND2
NC3
RFIN_LB
GND9
GND3
GND8
RFIN_HB
ANT
GND4
NC2
5
D
N
G
6
D
N
G
7
D
N
G
1
C
N
0
X
R
RX1
C291
22p
C290
33p
C286
22p
R282
180
R288
24K
R281
10K
R284
180
R283
30
C293
33p
R286
24
R287
220
R285
220
RF_TX_RAMP
RF_ANT_SW1
LowBand_Tx
HighBand_Tx
x
R
_
d
n
a
B
w
o
L
x
R
_
d
n
a
B
h
gi
H
RF_ANT_SW2
RF_PA_EN
TP1
TP2
TP5
TP3
TP4
TP1
TP4
TP3
TP5
TP2
Figure 4.3.4
VBAT
RF_ANT_SW2
RF_ANT_SW1
RF_PA_EN
4. TROUBLE SHOOTING
- 68 -
Of 0 0 0
RX 0 0 1 0
RX 1 0 1 1
GSM850/900 TX Mode 1 1 0
Check TP2 & TP3
Control Signal is
(TP4,5,6,7,8,9)
OK ?
Check MT6236 (U102)
Yes
Check TP9 of U303 ?
TP1 Signal is OK?
Yes
No
Mobile SW & TX module is OK.
TP11 signal
same as TP1?
Replace TX module (U303)
No
Yes
Replace SW200
TP2(High Band),
TP3(Low Band)
Signal is OK ?
Yes
Replace MT6236 (U102)
No
4. TROUBLE SHOOTING
- 69 -
4.4 Power On Trouble
B3
C2
RESETB
PWRKEY
1K R101
RST_N
END_KEY
DVDD28(VIO)
TP2
TP1 (U100)
TP2 1 K
4. TROUBLE SHOOTING
- 70 -
1u C130
51K
R116
K21
K23
L21
H24
L20
K24
L24
U1
B1
D5
A3
B5
D6
E8
D8
E9
C10
A8
G3
D9
A7
E11
D11
A12
B11
F11
C12
F10
A9
A10
C6
G4
H6
J5
F1
G5
D3
E2
B2
G8
C3
G7
C1
B3
C2
F7
F5
G10
SCLK
SIO
SRST
RESETB
PWRKEY
VCDT
PMU_TESTMODE
ISENSE
BATON
VDRV
VREF
BATSNS
VRF_S
VRF
VTCXO
VCAMA
VCAMA_S
VCAMD
BST_LX
BXT_OUT
ISINK4
ISINK3
ISINK2
ISINK1
ISINK0
KP_LED
FLASH_SW
VCORE
VCORE_FB
VA
VM
VM_FB
VBT
VIBR
VMC
VUSB
VIO
VSIM
VSIM2
CHR_LDO
SYSCLK
EINT0
EINT1
EINT2
EINT3
EINT4
EINT5
EINT6
C134
2.2u
VCAM_2V8
C101
2.2u
VCAM_1V8
VBAT
2
4
1
C
u
0
1
C167 2.2u
4
4
1
C
u
0
1
VUSB_LDO_4V9
2.2u
L100
R110
7.5K
VMC_3V3
R117
330k
VBAT
VUSB_LDO_4V9
VSIM2
VSIM1
VIO_2V8
VUSB_3V3
VBT_2V8
AVDD_2V8
2.2u L101
VMEM_1V8
VCORE_1V2
1K R101
u
1
8
3
1
C
VRF_2V8
C166 0.1u
C172
1n
C174
4.7u
RST_N
JACK_DETECT
SIM_RST1_N
SIM_CLK1
SIM_DATA1
END_KEY
WiFi_INT
FM_INT
CLK_26M
HOOK_DET
EOC
KEY_BL0
KEY_BL1
R_LED_EN
BAT_Temp
VIB_N
Seperate GND
VSIM
DVDD28(VIO)
DVDD_NFI(VM)
DVDD28(VIO) INTERRUPT
SIM
DVDD28(VIO) LCD_BL_COTROL
Supply Voltage
1%
(1%)
(1%)
FM I2S
TP1 (U100)
4. TROUBLE SHOOTING
- 71 -
START
Push power-on key
And check the level change
into high of POWERKEY
Check the contact of power key
Or dome-switch
Yes
Logic level at RPWRON of TP2
= HIGH(above 1.2V)?
No
The phone will
Properly operating.
Is the phone power on?
Re-download software
No
Yes
Replace TP1 (U100) and
Re-download software
Check Battery Voltage
> 3.30V
Yes
Charge or Change Battery
No
Check the voltage of
The LDO outputs at TP1
Replace TP1 (U100)
No
Yes
Does it work properly?
Replace the main board
No
No
4. TROUBLE SHOOTING
- 72 -
4.5 Charging Trouble
TP2
C523
1u
R536
DNI
0.1u
C504
1300
R502
100K
R504
VIO_2V8
VUSB_LDO_4V9
R503
3K
VBAT VBUS_USB
U500
6 5
7 4
8 3
9 2
10 1
11
PGND
VIN BATT
ISET PGB
GND1 CHGSB
LDO GND2
IEOC EN_SET
CHG_EN
EOC
(1%) (1%)
CN500
TP1
RT9524
TP2
USB onnector
Figure 4.5.1
4. TROUBLE SHOOTING
- 73 -
START
Is I/O Connector(TP1)
well-soldered ?
Re-solder the TP1
(Pin 1 : VBUS_USB)
Yes
Is the voltage
at Pin 10 of TP2 = 4.9V
No
Charging is
properly operating
Battery is charged?
Replace the
TP2 (U500)
No
Yes
Battery is charged?
Yes
Charging is
properly operating
No
Check the voltage at
Pin 1 of TP2 = 5V?
The TA is out of order
Change the TA
No
Yes
No
Charge or Change Battery
Yes
4. TROUBLE SHOOTING
- 74 -
VA532
C512
1u
47p
C516
270n
L501
R537
4.7
47p
C515
VBAT
L500
22n
VB500
2
1
VIB_N
Vibrator
TP1
TP2
TP3
4.6 Vibrator Trouble
Vibrator PAD
TP 2
TP 1
TP 3
Figure 4.6
4. TROUBLE SHOOTING
- 75 -
START
Is the voltage at TP3(L500)
(+) high?
Check the state of TP3
(L500)
Yes
Vibrator
Working well
Replace the vibrator
No
Is the vibrator connection
Correct?
Check the state of
Connection & replace vibrator
No
Is the voltage at TP1
(+) high?
Replace the U100
No
Yes
Yes
SETTING : Enter the engineering mode, and set vibrator on at vibration of BB test menu
4. TROUBLE SHOOTING
- 76 -
Pin 1
CN500
4.7 LCD Trouble
TP1
TP2
TP4
TP4
TP5
Figure 4.7.1
4. TROUBLE SHOOTING
- 77 -
1K
R310
2.2u
C337
VHP_1V8
2.2u
C332
DNI
C324
DNI
C325
2.2u
C334
VIO_2V8
VBAT
C331 1u 1u C330
2.2u
C333
VHP_MIC_2V6
C328
1u
C329
33p DNI
C326
DNI
C327
U302
1
2
20
19
18
8
7
6
5
9
4
10
3
1
1
2
2
1
1
13
4
1
15
16
17
LED3
LED4
NC2
2
O
D
L
AVIN
N
1
C
1
O
D
L
N
2
C
D
N
G
A
D
N
G
P
NC1
P
2
C
ENA
P
1
C
PVIN
SCL
SDA
LED2
LED1
VOUT
G
_
G
U
L
S
I2C_SCL1
I2C_SDA1
BLED_CA0
BLED_CA1
BLED_CA2
BLED_CA3
LCD Charge Pump
C338 C339
25pF
FL302
0
1
5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1
G
2
G
VA300
1u
C310
100K
R311
25pF
FL300
0
1
5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1
G
2
G
1u
C311
VIO_2V8 VMEM_1V8
R300
100
FL301
25pF
0
1
5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1
G
2
G
VBAT
C336
2.2u
CN300
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LCD_CS_N
LCD_RST_N
LCD_WR_N
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[00]
LCD_RS
LCD_RD_N
LCD_VSYN
LCD_ID
BLED_CA0
BLED_CA1
BLED_CA2
BLED_CA3
LCD INTERFACE
TP2
TP4
TP3
TP5
4. TROUBLE SHOOTING
- 78 -
4. TROUBLE SHOOTING
SCLK
SDAT
Graph 4.7.1. LCD Backlight Control Signal Waveform Graph 4.7.1. LCD Backlight Control Signal Waveform
LCD_RS
LCD_CS
LCD_WR
RS
CS
WR
G h 4 7 2 LCD D W f
DAT

Graph 4.7.2. LCD Data Waveform
4. TROUBLE SHOOTING
- 79 -
START
Check the Voltage Level of
TP5 is about Battery voltage ?
Resoldering or Replace U302
Yes
LCD working well !
No
Is the connection of
TP1 with LCD connector ok ?
Reassemble LCD connector
No
Check the Waveform of
EMI flter ?
Re-download & check the
State of U100
No
Yes
Does LCD work
properly ?
Yes
Yes
Replace LCD module
No
4. TROUBLE SHOOTING
- 80 -
4.8 Camera Trouble
U301
TP1
TP2
4. TROUBLE SHOOTING
- 81 -
F12
F13
G13
G14
9
1
U
2
2
W
9
1
V
3
2
A
A
4
2
A
A
4
2
B
A
4
2
C
A
3
2
C
A
3
2
D
A
2
2
D
A
1
2
C
A
8
1
V
9
1
B
A
8
1
A
A
9
1
W
8
1
Y
7
1
U
8
1
B
A
8
1
W
0
2
C
A
6
1
U
T
S
R
M
C
N
D
P
M
C
F
E
R
V
M
C
F
E
R
H
M
C
K
L
C
P
M
C
K
L
C
M
M
C
H
S
A
L
F
M
C
9
T
A
D
M
C
8
T
A
D
M
C
7
T
A
D
M
C
6
T
A
D
M
C
5
T
A
D
M
C
_
0
N
D
R
4
T
A
D
M
C
_
0
P
D
R
3
T
A
D
M
C
_
N
C
R
2
T
A
D
M
C
_
P
C
R
1
T
A
D
M
C
_
1
N
D
R
0
T
A
D
M
C
_
1
P
D
R
T
R
V
T
M
6
2
T
S
E
T
B
1
E
C
P
L
B
0
E
C
P
L
SPI_CS_N
SPI_SCK
SPI_MOSI
SPI_MISO
VMEM_1V8
K
L
C
M
_
M
A
C
C
N
Y
S
H
_
M
A
C
C
N
Y
S
V
_
M
A
C
K
L
C
P
_
M
A
C
]
7
[
A
T
A
D
_
M
A
C
]
6
[
A
T
A
D
_
M
A
C
]
5
[
A
T
A
D
_
M
A
C
]
4
[
A
T
A
D
_
M
A
C
]
3
[
A
T
A
D
_
M
A
C
]
2
[
A
T
A
D
_
M
A
C
]
1
[
A
T
A
D
_
M
A
C
]
0
[
A
T
A
D
_
M
A
C
N
D
W
P
_
M
A
C
N
_
S
C
_
D
C
L
N
_
T
S
R
_
M
A
C
S
C
_
i
F
i
W
DVDD_MC2(VIO)
DVDD_CAM(VIO)
DVDD28_MIPI(VIO) DVDD_NFI(VM)
CAMERA
FB302
600
FB301
600
FB300
600
U301
8
2
7
2
6
2
5
2
8
1
7
1
6
1
5
1
4
1
3
1
12
24
11
23
10
22 9
21
8
20
7
19
654321
3
D
4
D
5
D
6
D
7
D
D
N
G
D
VSYNC
MCLK
PCLK
GND1
GND4
/RESET D0
SDA
D1
SCL
D2
/STANDBY
V
8
_
1
D
D
V
D
V
8
_
2
D
D
V
O
I
2
D
N
G
V
8
_
2
D
D
V
A
3
D
N
G
C
N
Y
S
H
1
D
N
G
P
2
D
N
G
P
3
D
N
G
P
4
D
N
G
P
TP315
TP316
VCAM_2V8
0.1u
C319 C320
0.1u
TP318
TP319
C318
0.1u
VCAM_1V8
TP321
CAM_MCLK
CAM_HSYNC
CAM_VSYNC
CAM_PCLK I2C_SCL1
CAM_DATA[7]
CAM_DATA[6]
CAM_DATA[5]
CAM_DATA[4]
CAM_DATA[3]
CAM_DATA[2]
CAM_DATA[1]
CAM_DATA[0]
I2C_SDA1
CAM_PWDN
CAM_RST_N
TP1 TP2
Figure 4.8.2
4. TROUBLE SHOOTING
- 82 -
START
Check
the each voltage Level of
TP1(1.8V), TP2(2.8V),
is right ?
Check the state of
U100 (MT6236)
Yes
Camera working well !
No
Is state of the camera
Module correct?
Replace the U301
No
I2C_CLK, I2C_DATA ?
Re-download & Check
the state of U100
No
Yes
CAM_MCLK(26MHz) ?
Yes
Yes
Re-download & Check
the state of U100
No
Check the Waveform
Of Data pins
Yes
Re-download & Check
the state of U100
No
flter ?
Yes
Re-download & Check
the state of U100
No
Does Camera work
properly ?
Yes
Replace the U301 or
Change the board
No
4. TROUBLE SHOOTING
- 83 -
Process Detail Guide Description
Disassemble
Main Board
1. Disassemble
the main
board from
the Phone.
2. Disassemble
parts that
vulnerable
to heat
around the
camera
module.
(Ex) LCD,
Bracket
and so
on.
Main Board
(with camera Module)
Disassemble LCD , Bracket and
some part that vulnerable to
heat.
Main Board
(disassembled
parts that vulnerable
to heat)
Disassembly
Camera
Module
1. Temperature
of a Hot-
Gun : about
330
o
C~350
o
C
2. Heat rear
if the main
Board
(1) Distance
between Hot-
Gun and PCB :
about 3cm
(2) heating
time : about
25 sec
Before disassembling
the Camera module
Disassemble the camera
module
Using Hot-Gun
(heat rear of the main Board)
Main board
(disassembled
the Camera module)
Ready to
Rework
Camera
1. Spread
fux to space
that removed
camera
module
on the main
board.
2. Ready to
rework Camera
module.
3. Rework
Camera
Bottom Pad
Soldering.
Spread Flux to pad
on the board
Ready to rework Camera
Rework Camera
(Bottom Pad Soldering)
4. TROUBLE SHOOTING
- 84 -
Assembly
Camera
(Rework)
Process Oelal Gude Oescrplon
Osassemble Man
Board
!. Osassemble lhe man board lrom lhe Phone.
2 Osassemble parls lhal vulnerable lo heal Board 2. Osassemble parls lhal vulnerable lo heal
around lhe camera module.
(Ex) LCO. Brackel and so on..
Man Board
( lh M d l )
Man Board (dsassembled
)
Osassemble LCO . Brackel and
some parl lhal vulnerable lo heal.
Osassembly Camera
Module
!. Temperalure ol a HolGun aboul 330'350'
2. Heal rear l lhe man Board
(!) Oslance belween HolGun and PCB
aboul 3cm
(2) h b 2
(wlh camera Module)
parls lhal vulnerable lo heal)
(2) healnq lme aboul 25 sec
Peady lo Pework
Camera
!. Spread llux lo space lhal removed camera module
on lhe man board.
Belore dsassemblnq
lhe Camera module
Man board (dsassembled
lhe Camera module)
Osassemble lhe camera module
Usnq HolGun
(heal rear ol lhe man Board)
2. Peady lo rework Camera module.
3. Pework Camera Bollom Pad Soldernq.
Spread Flux lo pad
on lhe board
Peady lo rework Camera Pework Camera
(Bollom Pad Soldernq)
Assembly Camera
(Pework)
!. Check lhe sle lo assemble Camera
(!) Malch Pad =! and Camera =! on lhe board
2. Assemble lhe camera module malchnq base lne
on lhe board
Board =!
Camera =!
Base lne lo
assemble lhe
Camera
Soldernq Camera
Module and Funclon
Tesl
!. heal rear l lhe man Board
(!) Oslance belween HolGun and PCB
aboul 3cm
Malch Board Pn Map and Camera Pn Map
There are lwo base lne lke L
on lhe edqe ol lhe camera area
Tesl aboul 3cm
(2) healnq lme aboul 25 sec
2. Pemove lhe proleclon lape on lhe Camera Lens
3. Assemble anolher parls lhal dsassembled belore
4. Funclon Tesl
Soldernq lhe camera module
usnq HolGun
(heal rear ol lhe man Board)
Assemble anolher parls
lhal s dsassembled belore
Funclon Tesl
1. Check
the site to
assemble
Camera
(1) Match Pad
#1 and Camera
#1 on the
board
2. Assemble
the camera
module
matching base
line on the
board
Match Board Pin Map and Camera Pin Map There are two base line like Lon the
edge of the camera area
Soldering
Camera
Module and
Function Test
1. heat rear
if the main
Board
(1) Distance
between
Hot-Gun
and PCB :
about 3cm
(2) heating
time :
about 25
sec.
2. Remove the
protection
tape on the
Camera Lens
3. Assemble
another
parts that
disassembled
before
4. Function
Test
Soldering the
camera module
using Hot-Gun
(heat rear of the
main Board)
Assemble another
parts
that is
disassembled
before
Function Test
4. TROUBLE SHOOTING
- 85 -
R408
0
R432
0
FB402 600
C439 1u
C438 1u
FB403 600
1u C420
1u C419
0.1u
C401 C400
2.2u
1u C409
1u C408
2.2u
C413
C411
0.1u 0.1u
C410
20
R401 R400
20
VHP_1V8
VBAT
IC400
3
B
A4
C3
C2
2
B
D1
D3
4
D
C1
A1 D2
1
B
D5
A2
A5
A3
B5
4
B
C5
4
C
D
N
G
OUT+
D
D
V
P
H
CPVDD
CPVSS
CN
HPL
OUT-
S
AI
B
IN2- HPR
IN1+
D
D
V
S
IN3-
IN2+
A
D
S
IN1-
IN3+
CP
L
C
S
C403 1u
C415
2.2u 2.2u
C416
C412
2.2u
C414 2.2u
C402 1u
HS_R
HS_L
I2C_SCL2
I2C_SDA2
SPEECH_P
SPEECH_N
FM_AUDIO_L
FM_AUDIO_R
HS_OUT_L
HS_OUT_R
SPK_N
SPK_P
HS_GND
TP2
VA400 VA401
CN400
2
1
C437
DNI
R428
0
R427
0
39pF
C404
39pF
C405
SPK_N
SPK_P
RCV Circuit
TP1
4.9 Speaker Trouble
TP1
TP2
Figure 4.9.1
4. TROUBLE SHOOTING
- 86 -
START < Cal l >
Check the state of
TP1 (SPK)
Replace/
Change
Yes
Speaker
Working well!!
No
Check the state of
TP2 (IC400)
Replace/
Change
No
Check the state of
TP1 (SPK)
Yes
Check the state of
TP2 (IC400)
Yes
START < Mp3>
Yes
Speaker
Working well!!
No
No
4. TROUBLE SHOOTING
- 87 -
4.10 Earphone Trouble
R402
47K
R433 0
R431
DNI
C430
10u
ZD401
J400
2
3
4
5
6
1
M5
M4
M3
M4F
M1
M6
VA407
Q400
1
3
2
G
D
S
C435
39p
L400
100n
C436
39p
R434
470
VA410
C418
10p
R414
100
R430 1
U401
4 3
2
5 1
IN+ VCC
GND
IN- OUT
1M
R406
VIO_2V8
220K
R407
VIO_2V8
R404
100K
VIO_2V8
R429
1
39p
C426
C431
39p
FB408 1800
FB409 1800
FB407
1800
0.1u
C425
0.1u
C428
C424
39p
R403
100K
VA405
R419
2.2Kohms
VHP_MIC_2V6
VA404
VIO_2V8
C421
DNI
10
R405
ZD400
FB410
1800
1.5Kohms
R418
HP_MIC_P
HP_MIC_N
JACK_DETECT
HOOK_DET
FM_ANT
HS_OUT_L
HS_OUT_R
HS_GND
ON
OFF
HOOK_DET IN-
High
Low
0 V
1.44V
BB side place
3.5phi HEADSET
TP1
TP2
TP1
TP2
J400
Figure 4.11.1
4. TROUBLE SHOOTING
- 88 -
START
Is the TP2
(JACK DETECT)
LOW?
Check the state of
soldering TP1
Earphone working well
No
Check connected
Properly?
Please, Reconnect
The earphone
No
Can you hear
the sound?
Change the earphone
and try again
No
Yes
Yes
Yes
Can you hear
Your voice?
Change
the earphone and try again
No
Set the test instrument or
Play Continuous wave
Set the test instrument
to echo mode
4. TROUBLE SHOOTING
- 89 -
4.11 Receiver Trouble
R408
0
R432
0
FB402 600
C439 1u
C438 1u
FB403 600
1u C420
1u C419
0.1u
C401 C400
2.2u
1u C409
1u C408
2.2u
C413
C411
0.1u 0.1u
C410
20
R401 R400
20
VHP_1V8
VBAT
IC400
3
B
A4
C3
C2
2
B
D1
D3
4
D
C1
A1 D2
1
B
D5
A2
A5
A3
B5
4
B
C5
4
C
D
N
G
OUT+
D
D
V
P
H
CPVDD
CPVSS
CN
HPL
OUT-
S
AI
B
IN2- HPR
IN1+
D
D
V
S
IN3-
IN2+
A
D
S
IN1-
IN3+
CP
L
C
S
C403 1u
C415
2.2u 2.2u
C416
C412
2.2u
C414 2.2u
C402 1u
HS_R
HS_L
I2C_SCL2
I2C_SDA2
SPEECH_P
SPEECH_N
FM_AUDIO_L
FM_AUDIO_R
HS_OUT_L
HS_OUT_R
SPK_N
SPK_P
HS_GND
TP2
VA400 VA401
CN400
2
1
C437
DNI
R428
0
R427
0
39pF
C404
39pF
C405
SPK_N
SPK_P
RCV Circuit
TP1
TP1
TP2
IC400
Figure 4.11.1
4. TROUBLE SHOOTING
- 90 -
START
Can you hear
the sound?
Check the soldering TP1
No
Check the state of
TP2 (IC400)
Replace/
Change
No
Yes
Yes
Receiver will
work properly.
Yes
SETTING : After initialize Agilent 8960,Set the speech option at continuous wave.
Set the receiving volume of mobile as Max.
4. TROUBLE SHOOTING
- 91 -
4.12 Microphone Trouble
Figure 4.12.1
L401 100n
VA408
L402
100n
VA409
47p
C433
R415
1K
C434
47p
0.1u
C427
MIC400
2
1
100
R421
C432
0.1u
2.2K
R417
R422
2.2K
C429
47p
VMIC_BIAS_P
10u
C423
100
R420
MIC_N
MIC_P
BB side place
MIC side place
TP1 C423
TP2 C427
TP3 MIC400
TP3 MIC400
TP1 C423
TP2 C427
4. TROUBLE SHOOTING
- 92 -
START
Check the TP2
Signal While talking
to mic
Change the microphone
( TP3, MIC400)
No
Make a phone call,
then check TP1 mic bias
Check mic bias signal line
No
Yes
Yes
Microphone will work
properly.
SETTING : After initialize Agilent 8960, set the speech option at loopback.
Check microphone sound hole
4. TROUBLE SHOOTING
- 93 -
4.13 SIM1 Card Interface Trouble
J300
9 8
10 7
6 3
5 2
4 1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VA306 VA307 VA308
VSIM1
C300
DNI
C301
DNI
DNI
C302
1u
C303
R304
DNI
SIM_RST1_N
SIM_CLK1 SIM_DATA1
TP 1
J300
TP 1
4. TROUBLE SHOOTING
- 94 -
START
Is voltage of the TP1
3V?
Check the state of U100
(re-download or replace)
No
Does the SIM card
Support 3V ?
Change the SIM Card.
This phone supports 3V SIM card.
No
Yes
Yes
SIM card is
properly working
Change the main board
Change
the SIM Card and try again.
Does it work
Properly?
Re-download
Or replace SIM
Connector.
SIM card is
properly working.
Yes Yes
No No
4. TROUBLE SHOOTING
- 95 -
4.14 SIM2 Card Interface Trouble
J301
9 8
10 7
6 3
5 2
4 1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VA309 VA310
VA311
1u
C315
C314
DNI DNI
C313 C312
DNI
VSIM2
DNI
R305
SIM_RST2_N
SIM_CLK2 SIM_DATA2
TP1
J301
TP1
4. TROUBLE SHOOTING
- 96 -
START
3V?
Check the state of U100
(re-download or replace)
No
Does the SIM card
Support 3V ?
Change the SIM Card.
This phone supports 3V SIM card.
No
Yes
Yes
SIM card is
properly working
Change the main board
Change
the SIM Card and try again.
Does it work
Properly?
Re-download
Or replace SIM
Connector.
SIM card is
properly working.
Yes Yes
No No
4. TROUBLE SHOOTING
- 97 -
4.15 KEY backlight Trouble
1
0
5
D
L
2
1
A
C
0
0
5
D
L
2
1
A
C
DNI
VA509 VA510
DNI
C501
1u
VBAT
KEY_BL0
KEY_BL1
C501
TP2 TP1
Figure 4.14.1
C501
T
P
1
T
P
2
4. TROUBLE SHOOTING
- 98 -
START
TP1, TP2 is Low
Than C501?
Check the state of
LED or U100
No
VBAT = C501 ?
No
Yes
Yes
Backlight will
work properly.
4. TROUBLE SHOOTING
- 99 -
4.16 Micro SD Trouble
VMC_3V3_LDO
C321
DNI
C323
1n
473091265
S300
G2
G1 G3
8
G4
7
6
3
5
2
4
1
DAT2
VDD
CD/DAT3
CLK
CMD
VSS
DAT0
DET
DAT1
POL GND1
GND2
R312
10
VA301 VA302 VA303
VA312 VA305 VA304
VIO_2V8
R303
100K
C322
2.2u
MSD_CLK
MSD_CMD
MSD_DET_N
MSD_D[3]
MSD_D[2]
MSD_D[0]
MSD_D[1]
u-SD CARD
TP1
VMC_3V3_LDO
VBAT
C341
1u
C340
1u
U303
5
3 2
4 1
VOUT VDD
GND CE
D
N
G
P
u_SD_LDO_EN
TP2
TP2
TP1
4. TROUBLE SHOOTING
- 100 -
START
Is
MC_CLK & Data
Timing Correct?
Re-download SW
No
Micro SD Detect
OK?
Re-download SW
No
Yes
Yes
Change the Micro SD Card
Yes
Micro SD Card will
work properly
VBat ?
3.3V ?
Check the state of
R303 or U100
and Replace U303
Check the state of
Battery Voltage
No
Yes
Yes
No
4. TROUBLE SHOOTING
- 101 -
4.17 Bluetooth Trouble
100p
C1316
C263 4.7n
C265
8.2n
X202 1XTW26000FAA
26MHz
2 1
3 4
VCC OUT
GND1 GND2
C1341
18p
FL203
3
2
1
IN D
N
G
OUT
U206
K1
F7
F6
7
G
6
G
D9
D7
D6
C9
A10
5
A
5
E
5
C
3
B
4
A
3
A
3
C
2
A
1
B
1
A
5
B
J4
K4
E3
G3
G2
G1
J2
H2
K2
J1
J3
H3
H7
K9
J9
D1
D2
E8
E9
E6
E7
F10
F4
F8
G9
J8
K8
E2
H8
B8
C6
B9
A7
F9
D4
D3
C2
E10
A8
D10
A9
A6
C10
B10
4
H
5
H
6
H
6
K
5J 6J 2
F
3
F
0
1
G
9
H
0
1
H
0
1J
1
C
4
G
0
1
K
7
K
7J 1
H
1
E
E
C
R
U
O
S
F
3
OI
D
D
V
D
2
OI
D
D
V
D
1
OI
D
D
V
D
0
OI
D
D
V
D
1
K
D
D
V
_
D
A
P
O
D
L
C
X
T
_
G
B
D
_
T
R
A
U
X
R
_
G
B
D
_
T
R
A
U
1
_
OI
P
G
0
_
OI
P
G
N
_
S
C
N
_
E
W
5
1
D
4
1
D
3
1
D
2
1
D
1
1
D
0
1
D
TRX_IO_P
TRX_IO_N
AVDD33_XO
AVDD33_TX
AVDD16_TRX
AVDD16_SX
AVDD16_LF
AVDD16_CLDO
AVDDRTC
AVSSRTC
OSC_EN
OSC_IN
AVSS33_PA3
AVSS16_WF1
AVSS16_VCO
EXT_INT_B
WIFI_INT_B
ANTSEL_0
ANTSEL_1
ANTSEL_2
ANTSEL_3
CGND1
PAD_ICAL_EXTR
TRXIN
TRXIP
TRXQN
TRXQP
X32K_OUT
X32K_IN
XTEST
SYSRST_B
BT_PRI
D0
D1
A0
D3
D2
OE_N
D4
D5
D6
D7
D8
D9
N
E
_
D
A
P
F
E
R
F
E
R
_
D
N
G
F
E
R
_
3
4
D
D
V
A
B
F
_
T
U
O
K
B
X
L
S
P
M
S
_
3
4
D
D
V
A
S
P
M
S
_
3
4
D
N
G
A
O
D
L
A
P
_
D
N
G
B
F
_
O
D
L
A
P
O
D
L
A
P
AVSS33_PA1
AVSS33_PA2
AVSS16_WF2
AVSS16_WF3
AVSS16_WF4
2
K
D
D
V
_
D
A
P
3
K
D
D
V
_
D
A
P
CGND2
CGND3
CGND4
PALDO_3V3
C299
1.8p
FL205
7
4 3
5 2
6 1
V1 J1
RFC GND
V2 J2
G
UL
S_
G
0.1u
C245
PALDO_3V3
C266
18p
C253
DNI
C278
DNI
C298
DNI
2
0
2
T
N
A
5
1
0
3
R
T
P
T
B
D
S
2 3
1
4
3YMMUD
DEEF
2YMMUD
1YMMUD
C1319
1u
R252
100K
C295
1u
TP202
VBAT
C1332 100p
C270
4.7u
SMPSLDO_1V6
VBAT
R254
24K
C1317
10p
VIO_2V8
R255
100K
C264
0.5p
C269 1.2p
R260
10K
TP200
TP201 C244
1u
C246
1u
C247
1u
VIO_2V8
VMEM_1V8
R253
49.9
C232 0.1u
C229 10p
C227 1u
0.1u C226
C223 1n
R270
10K
R268
0
R267
0
C1328
DNI
C214 4.7u
4.7u
C277
C243
2.2u
R262
10K
3231
C
I
N
D
4231
C
I
N
D
1p
C1321
10K
R259
VTCXO_2V8
U207
3 2
4 1
OUT TER
IN COU
C279
100p
C276
8.2p
FL204
3
1
2
4
B/P_2
B/P_1
Gnd/DC_fd
UnB/P
8.2p
C267
10K
R264
0.1u C228
1M
R263
L233 1.8n
1u
C239
PALDO_3V3
0.1u
C221
L225
2.2u
FB200
120
C251
18p
C248 18p C1338 18p
L232
3.9n
L230
1.2n
L231
5.6n C1330
DNI
12p
C274
GND
LCD_WR_N
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[00]
LCD_RS
LCD_RD_N
WIFI_INT
WiFi_RST
BT_PRI
WIFI_32K
WiFi_CS
BT_TRX
WiFi_TX_CLK_EN
WiFi_EN
BT_WIFI_SEL_1
BT_WIFI_SEL_1
BT_WIFI_SEL_0
BT_WIFI_SEL_0
BT_IN_OUT
BT_IN_OUT
WIFI_IN_OUT
WIFI_IN_OUT
Star connection
MT5931 WIFI
ANT202
TP1
TP2
FL203 FL205
U207
FL204
U207
FL204
FL205
FL203
ANT202
TP2
TP1
[Top view]
[Bottom view]
4. TROUBLE SHOOTING
- 102 -
START
Check of BT Ant condition
1. Check FL203
2. Check FL205
1. Replace FL203
2. Replace FL205
No
A condition is good?
Give the additory
solder in TP1,TP2
No
Yes
Yes
BT will
work properly
Check condition of
matching components
(TP1, TP2)
Replace ANT202
No
1. Check U207
2. Check FL204
Yes
1. Replace U207
2. Replace FL204
No
Yes
4. TROUBLE SHOOTING
- 103 -
4.18 FM Radio Trouble
R433 0
J400
2
3
4
5
6
1
M5
M4
M3
M4F
M1
M6
L400
100n
VA410
C418
10p
1800
1800
FB407
1800
ZD400
FM_ANT
HS_GND
TP1
C206
10p
0.1u
C211
C207
1u
U200
1
2
6
1
7
1
8
1
9
1
0
2
11
12
13
14
15
0
1
9 8 7 6
5
4
3
2
1
NC1
FMI
RFGND
LPI
RST_
_
N
E
S
K
L
C
S
O
I
D
S
K
L
C
R
D
V
DOUT
LOUT
ROUT
GND
VA
2
C
N
1
O
P
G
_
T
N
I
_
2
0
P
G
K
L
C
D
_
3
O
P
G
S
F
D
G
U
L
S
_
G
R204
0
1n C204
220
R239
R230
100K
10K
R203
R205
100K
R240 2K
2K R241
R212
100K
L220 22n
VIO_2V8
VBAT
R242
680
VIO_2V8
C234
33p
VIO_2V8
I2C_SCL1
I2C_SDA1
FM_RST
FM_32K
FM_INT
DCLK
DFS
DIN
FM_ANT FM_AUDIO_L
FM_AUDIO_R
as close as possible to pin
TP3
TP2
TP4
U200
TP2
TP3
TP4
U200
J400
TP1
4. TROUBLE SHOOTING
- 104 -
START
Check of ear_jack condition
Check Bias Voltage
TP2, TP3
Replace
U100
No
Give the additory
solder in TP1, TP2
No
Yes
Yes
FM_radio will
work properly
Check condition of
matching components
(TP1, TP2)
Replace J400
No
Yes
5. DOWNLOAD
- 105 -
5. DOWNLOAD
Oownload lool (GSMULT ver 3.0)
!.Counlry or buyer BPAZL (TMG)
2. SiW ( PV ;{. )
LG-C199
LG-C199
5. DOWNLOAD
- 106 -
OLL (GU280 XXX OLL) OLL (GU280_XXX.OLL)
LG-C199
LG-C199
LG-C199
5. DOWNLOAD
- 107 -
LG-C199
LG-C199
LG-C199
5. DOWNLOAD
- 108 -
Sel Up_USB_Porl Mappnq ver (04)
LG-C199
5. DOWNLOAD
- 109 -
USB Orver (LG USB Modem Orver ver 4.9.4)
5. DOWNLOAD
- 110 -
5. DOWNLOAD
- 111 -
USB Map = ( NFNECN Aqold Seres) p ( q )
LG-C199
5. DOWNLOAD
- 112 -
5. DOWNLOAD
- 113 -
; I; l (MullGSM_V30) ( )
5. DOWNLOAD
- 114 -
LG-C199
LG-C199
LG-C199
LG-C199
LG-C199 LG-C199
LG-C199
LG-C199
LG-C199
5. DOWNLOAD
- 115 -
LG-C199 LG-C199
LG-C199 LG-C199
LG-C199
LG-C199
5. DOWNLOAD
- 116 -
LG-C199
LG-C199
5. DOWNLOAD
- 117 -
LG-C199
LG-C199
6. BLOCK DIAGRAM
- 118 -
6.Block diagram
- 119 - Copyright 2012 LG Electronics. Inc. All right reserved.
7. CIRCUIT DIAGRAM
7. CIRCUIT DIAGRAM
OJ100
OJ102
1u
C
100
0 3 1 C u 1
C109 1u
22p
C159
51K
R116
DNI
R118
VA100
VBAT
VIO_2V8
U100
C
24
C
19
C
16
B23
B19
B16
A23
A22
A20
A19
B24
A16
E24
A21
G
24
C
11
B10
E1 F4 C
9
B9 C
4
A5 B4 B6 C
7
F3 W
2
V5 T6 R
6
T4 U
2
R
1
Y21
W
21
K3 J4 K4 K2 C
13
B13
W
3
Y2 W
1
V1 J8 H
8
Y20
AB21
U
18
R
9
N
16
N
15
N
14
N
13
N
9
M
16
M
15
M
13
L14
L11
L9 K15
K13
J10
H
9
H
2
P16
P12
L17
L16
G
16
AB22
AA22
N
18
T19
C
14
AC
1
AB17
V13
V12
T15
T14
T13
T12
T11
Y19
T18
T17
P18
N
11
L19
L18
K8 K12
K10
J15
H
15
A11
A13
A14
L23
N23
M23
M22
N19
R2
R7
R4
R5
T2
R3
N4
P2
M4
P3
M3
N3
N1
N2
N6
N7
M7
L7
N8
L3
H1
G1
M1
M2
J6
J7
J1
K1
AD9
AD10
AB10
W11
AA13
AB11
W12
U9
T10
AC10
W9
AC8
AB9
AC12
AB7
AB8
AC11
AA15
Y13
AB14
AA12
AD13
U11
AB12
Y12
W14
U13
U15
AB13
W15
AC14
AD15
W13
AD7
AC7
AA7
Y9
AC9
AC6
AA9
AC13
AD12
V9
AA10
Y10
W8
AD6
AC5
AB6
G23
G22
G20
G19
G18
G17
F24
F23
F22
F21
F20
E23
E19
E17
D23
D22
D19
F12
F13
G13
G14
H22
H19
J22
H14
A15
U7
H21
AB15
H20
AB20
AA19
W20
Y23
Y22
U3
V3
Y1
K19
J19
J18
K18
J23
K20
H23
L22
M19
K22
M18
K21
K23
L21
H24
L20
K24
L24
U1
B1
D5
A3
B5
D6
E8
D8
E9
C10
A8
G3
D9
A7
E11
D11
A12
B11
F11
C12
F10
A9
A10
C6
G4
H6
J5
F1
G5
D3
E2
B2
G8
C3
G7
C1
B3
C2
F7
F5
G10
F9
A2
C5
D
17
D
18
D
21
B21
B22
C
22
D
24
AD
4 Y7
AB5 Y6
AC
4
AA5
AB4
AA4
AD
3
AA3
AD
2
W
7
AB3
B15
E14
D
15
D
13
C
15
E15 V6
AC
2
W
4
AB1
W
5
AA2
AD
21
W
17
AD
20
Y16
AC
19
W
16
AC
18
AA16
AB16
Y15
AD
19
AC
17
AD
18
AC
16
AD
16
AC
15
N
22
N
24
P23
N
21
P24
P21
R
23
N
20
T24
P22
R
22
P19
T23
R
18
T22
R
19
U
24
P20
U
23
T21
U
22
T20
W
23
V23
U
21
Y24
W
24
U
20
V22
U
19
W
22
V19
AA23
AA24
AB24
AC
24
AC
23
AD
23
AD
22
AC
21
V18
AB19
AA18
W
19
Y18
U
17
AB18
W
18
AC
20
U
16
C
M
R
S
T
C
M
P
D
N
C
M
V
R
E
F
C
M
H
R
E
F
C
M
P
C
LK
C
M
M
C
LK
C
M
FLA
S
H
C
M
D
A
T9
C
M
D
A
T8
C
M
D
A
T7
C
M
D
A
T6
R
D
N
0_C
M
D
A
T5
R
D
P
0_C
M
D
A
T4
R
C
N
_C
M
D
A
T3
R
C
P
_C
M
D
A
T2
R
D
N
1_C
M
D
A
T1
R
D
P
1_C
M
D
A
T0
TV
R
T
TE
S
T26M
LP
C
E
1B
LP
C
E
0B
LP
TE
LR
S
TB
LR
D
B
LW
R
B
LP
A
0
N
LD
17
N
LD
16
N
LD
15
N
LD
14
N
LD
13
N
LD
12
N
LD
11
N
LD
10
N
LD
9
N
LD
8
N
LD
7
N
LD
6
N
LD
5
N
LD
4
N
LD
3
N
LD
2
N
LD
1
N
LD
0
N
R
N
B
N
C
LE
N
A
LE
N
W
E
B
N
R
E
B
N
C
E
B
K
C
O
L7
K
C
O
L6
K
C
O
L5
K
C
O
L4
K
C
O
L3
K
C
O
L2
K
C
O
L1
K
C
O
L0
K
R
O
W
7
K
R
O
W
6
K
R
O
W
5
K
R
O
W
4
K
R
O
W
3
K
R
O
W
2
K
R
O
W
1
K
R
O
W
0
M
C
0C
M
0
M
C
0D
A
0
M
C
0D
A
1
M
C
0D
A
2
M
C
0D
A
3
M
C
0C
K
JTR
S
T_B
JTC
K
JTD
I
JTM
S
JTD
O
JR
TC
K
B
S
I_C
S
0
B
S
I_D
A
TA
B
S
I_C
LK
B
P
I_B
U
S
0
B
P
I_B
U
S
1
B
P
I_B
U
S
2
B
P
I_B
U
S
3
B
P
I_B
U
S
4
B
P
I_B
U
S
5
B
P
I_B
U
S
6
B
P
I_B
U
S
7
B
P
I_B
U
S
8
B
P
I_B
U
S
9
O
S
C
_IN
V
C
O
_M
O
N
ITO
R
TR
X
IQ
_N
TR
X
IQ
_P
R
B
IA
S
R
F2G
_P
R
F2G
_N
SCLK2
SIO2
SRST2
SCLK
SIO
SRST
RESETB
PWRKEY
VCDT
PMU_TESTMODE
ISENSE
BATON
VDRV
VREF
BATSNS
VRF_S
VRF
VTCXO
VCAMA
VCAMA_S
VCAMD
BST_LX
BXT_OUT
ISINK4
ISINK3
ISINK2
ISINK1
ISINK0
KP_LED
FLASH_SW
VCORE
VCORE_FB
VA
VM
VM_FB
VBT
VIBR
VMC
VUSB
VIO
VSIM
VSIM2
CHR_LDO
SYSCLK
EINT0
EINT1
EINT2
EINT3
EINT4
EINT5
EINT6
URXD2
UTXD2
URXD3
UTXD3
IRDA_TXD
IRDA_RXD
IRDA_PDN
PWM3
PWM4
PWM5
PWM6
USB_VRT
USB_DP
USB_DM
LSA0
LSCK
LSDA
SCL
SDA
SYSRST_B
WATCHDOG
SRCLKENA
FSOURCE
SECU_EN
XBOOT
GPIO58
GPIO63
GPIO64
SPI_CS_N
SPI_SCK
SPI_MOSI
SPI_MISO
VSS_BTRF_11
VSS_BTRF_12
VSS_BTRF_13
VSS_BTRF_14
VSS_BTRF_15
VSS_BTRF_16
VSS_BTRF_17
VSS_BTRF_18
VSS_BTRF_19
VSS_BTRF_20
VSS_BTRF_21
VSS_BTRF_22
VSS_BTRF_23
VSS_BTRF_24
VSS_BTRF_25
VSS_BTRF_26
VSS_BTRF_27
EA0
EA1
EA2
EA3
EA4
EA5
EA6
EA7
EA8
EA9
EA10
EA11
EA12
EA13
EA14
EA15
ED0
ED1
ED2
ED3
ED4
ED5
ED6
ED7
ED8
ED9
ED10
ED11
ED12
ED13
ED14
ED15
ERD_B
EWR_B
ECS0_B
ECS1_B
EWAIT
ECAS_B
ERAS_B
ECKE
ED_CLK_B
ED_CLK
DQS0
DQS1
DQM0
DQM1
EADV_B
EC_CLK_FB
EC_CLK
AU_MOUTR
AU_MOUTL
AU_FMINR
AU_FMINL
AU_OUT0_P
AU_OUT0_N
SPK_P
SPK_N
AU_MICBIAS_P
AVSS
AU_VIN0_P
AU_VIN0_N
AU_VIN1_P
AU_VIN1_N
AUX_XP
AUX_XM
AUX_YP
AUX_YM
AUX_IN4
AUX_IN5
AUX_IN6
AUX_IN7
BDLAIP
BDLAIN
BLKAQP
BDLAQN
APC
AFC
DAICLK
DAIPCMOUT
DAIPCMIN
DAIRST
DAISYNC
XOUT
XIN
TESTMODE
V
D
D
K
1
V
D
D
K
2
V
D
D
K
3
V
D
D
K
4
V
D
D
K
5
V
D
D
K
6
V
D
D
K
7
V
D
D
K
8
V
D
D
K
9
V
D
D
K
10
V
D
D
K
11
D
V
D
D
_C
A
M
D
V
D
D
_E
M
I_1
D
V
D
D
_E
M
I_2
D
V
D
D
_E
M
I_3
D
V
D
D
_E
M
I_4
D
V
D
D
_E
M
I_5
D
V
D
D
_E
M
I_6
D
V
D
D
_E
M
I_7
D
V
D
D
_K
P
D
V
D
D
_M
C
D
V
D
D
_M
C
2
D
V
D
D
_N
FI
D
V
D
D
_P
C
M
D
V
D
D
12_M
IP
I
D
V
D
D
28_M
IP
I
D
V
D
D
28_1
D
V
D
D
28_2
D
V
D
D
28_3
D
V
D
D
28_4
D
V
D
D
28_5
D
V
D
D
43_S
P
K
V
S
S
_1
V
S
S
_2
V
S
S
_3
V
S
S
_4
V
S
S
_5
V
S
S
_6
V
S
S
_7
V
S
S
_8
V
S
S
_9
V
S
S
_10
V
S
S
_11
V
S
S
_12
V
S
S
_13
V
S
S
_14
V
S
S
_15
V
S
S
_16
D
V
S
S
12_M
IP
I
D
V
S
S
28_M
IP
I_1
D
V
S
S
28_M
IP
I_2
D
V
S
S
43_S
P
K
_1
D
V
S
S
43_S
P
K
_2
A
V
D
D
12_P
LL
A
V
S
S
12_P
LL
A
V
D
D
12_U
S
B
A
V
S
S
12_U
S
B
V
C
C
_R
TC
G
N
D
_R
TC
A
V
D
D
28_A
FE
A
V
S
S
28_A
FE
A
V
D
D
28_M
B
U
F
A
V
S
S
28_M
B
U
F
A
V
D
D
28_M
IP
I
A
V
S
S
28_M
IP
I
A
V
D
D
28_P
LL
A
V
S
S
28_P
LL
A
V
D
D
28_R
FE
A
V
S
S
28_R
FE
_1
A
V
S
S
28_R
FE
_2
A
V
D
D
33_U
S
B
A
V
S
S
33_U
S
B
A
V
D
D
43_V
A
A
V
D
D
43_V
C
O
R
E
A
V
S
S
43_V
C
O
R
E
A
V
D
D
43_V
D
1
A
V
D
D
43_V
D
2
A
V
S
S
43_LD
O
S
A
V
D
D
43_V
M
A
V
S
S
43_V
M
A
V
D
D
43_V
R
F
A
V
S
S
43_V
R
F
A
V
S
S
43_B
S
T
A
V
S
S
43_D
R
V
V
C
C
28_B
B
LD
O
V
C
C
28_LD
O
_R
X
R
F
V
C
C
28_O
S
C
V
C
C
28_P
A
V
C
C
28_S
X
V
S
S
_B
TR
F_1
V
S
S
_B
TR
F_2
V
S
S
_B
TR
F_3
V
S
S
_B
TR
F_4
V
S
S
_B
TR
F_5
V
S
S
_B
TR
F_6
V
S
S
_B
TR
F_7
V
S
S
_B
TR
F_8
V
S
S
_B
TR
F_9
V
S
S
_B
TR
F_10
C134
2.2u
VRTC_2V8
22p
C160
VCAM_2V8
C101
2.2u
VCAM_1V8
0.1u
C129
VBAT
1u
C
110
C
142
10u
C167 2.2u
C
144
10u
R104
2.2K
BAT100
VUSB_LDO_4V9
2.2u
L100
A
V
D
D
_2V
8
A
V
D
D
_2V
8
A
V
D
D
_2V
8
V
B
A
T
V
B
A
T
V
B
A
T
V
B
T
_2V
8
V
B
T
_2V
8
C
126
1u
V
M
E
M
_1V
8
R110
7.5K
VMEM_1V8
1u
C
120
R105
2.2K
V
IO
_2V
8
V
IO
_2V
8
V
M
C
_3V
3
0.5p
C
123
C
122
1u
5p
C
125
V
B
T
_2V
8
1u
C
102
FB100
220
C
117
1u
V
B
A
T
V
IO
_2V
8
1u
C
118
C
121
0.1u
C
119
1u
A
V
D
D
_2V
8
V
R
T
C
_2V
8
1u
C
116
V
U
S
B
_3V
3
C
112
1u
V
C
O
R
E
_1V
2
V
B
A
T
C
103
0.1u
VMC_3V3
V
C
O
R
E
_1V
2
1u
C
107
1u
C
104
C
105
1u
0.1u
C
111
V
M
E
M
_1V
8
V
IO
_2V
8
R117
330k
VBAT
V
C
O
R
E
_1V
2
5.1K
R106
VUSB_LDO_4V9
VSIM2
VSIM1
VIO_2V8
VUSB_3V3
VBT_2V8
AVDD_2V8
2.2u L101
VMEM_1V8
VCORE_1V2
1K R101
1u
C
138
VRF_2V8
C
168
1.2p
C169
100n
C170
100n
C171
100n
R119
680
5.6K
R100
C166 0.1u
VIO_2V8
R108
2.2K
R109
2.2K
VMIC_BIAS_P
39p C151
39p
C
157
C
156
39p
39p
C
155
C
154
39p
R120
680
C106
0.1u
R121
680
X100
NX3215SA
32.768KHz
2 1
R122
680
R123
680
R124
680
R125
680
R126
680
R127
680
R128
680
R129
680
R130
680
R131
680
R132
680
C172 1n
C174
4.7u
L102
10n
C173
1n
C128
4.7u
FB101
600
FB103
600
CN100
8 7
9 6
10 5
11 4
12 3
13 2
14 1
R111
15K
R
F
_S
_E
N
R
F
_S
_D
A
T
A
R
F
_S
_C
LK
RF_IN
RF_IP
RF_TX_RAMP
RF_QN
RF_QP
RF_AFC
MIC_N
MIC_P
SD_D_[09]
SD_D_[08]
SD_D_[07]
SD_D_[06]
SD_D_[05]
SD_D_[04]
SD_D_[03]
SD_D_[02]
SD_D_[01]
SD_D_[00]
C
A
M
_M
C
LK
C
A
M
_H
S
Y
N
C
C
A
M
_V
S
Y
N
C
C
A
M
_P
C
LK
I2C_SCL1
M
S
D
_C
LK
M
S
D
_C
M
D
HS_R
HS_L
C
A
M
_D
A
T
A
[7]
C
A
M
_D
A
T
A
[6]
C
A
M
_D
A
T
A
[5]
C
A
M
_D
A
T
A
[4]
C
A
M
_D
A
T
A
[3]
C
A
M
_D
A
T
A
[2]
C
A
M
_D
A
T
A
[1]
C
A
M
_D
A
T
A
[0]
SD_CS_N
SD_CAS_N
SD_RAS_N
RST_N
RST_N
RST_N
SD_D_[15]
SD_D_[14]
SD_D_[13]
SD_D_[12]
SD_D_[11]
SD_D_[10]
I2C_SDA1
SD_CKE
SD_DQM_0
SD_DQM_1
SD_A_[00]
SD_A_[01]
SD_A_[02]
SD_A_[03]
SD_A_[04]
SD_A_[05]
SD_A_[06]
SD_A_[07]
SD_A_[08]
SD_A_[09]
SD_A_[10]
SD_A_[11]
SD_A_[12]
C
A
M
_P
W
D
N
LC
D
_C
S
_N
LC
D
_R
S
T
_N
I2C_SCL2
I2C_SDA2
LC
D
_W
R
_N
UART_RX
UART_RX
UART_TX
UART_TX
JTAG_TRST_B
JT
A
G
_T
R
S
T
_B
JTAG_TCK
JT
A
G
_T
C
K
JTAG_TDI
JT
A
G
_T
D
I
JTAG_TMS
JT
A
G
_T
M
S
JTAG_TDO
JT
A
G
_T
D
O
JTAG_RTCK
JT
A
G
_R
T
C
K
K
E
Y
_R
O
W
1
LN
A
N
D
_D
_[15]
LN
A
N
D
_D
_[13]
LN
A
N
D
_D
_[12]
LN
A
N
D
_D
_[11]
LN
A
N
D
_D
_[10]
LN
A
N
D
_D
_[09]
LN
A
N
D
_D
_[08]
LN
A
N
D
_D
_[07]
LN
A
N
D
_D
_[06]
LN
A
N
D
_D
_[05]
LN
A
N
D
_D
_[04]
LN
A
N
D
_D
_[03]
LN
A
N
D
_D
_[02]
LN
A
N
D
_D
_[01]
LN
A
N
D
_D
_[00]
N
A
N
D
_W
R
_N
K
E
Y
_C
O
L5
K
E
Y
_R
O
W
0
K
E
Y
_R
O
W
2
K
E
Y
_R
O
W
3
K
E
Y
_R
O
W
4
K
E
Y
_C
O
L0
K
E
Y
_C
O
L1
K
E
Y
_C
O
L3
K
E
Y
_C
O
L4
LN
A
N
D
_D
_[14]
C
A
M
_R
S
T
_N
NAND_WP_N
N
A
N
D
_C
S
_N
N
A
N
D
_B
S
Y
_N
USB_DP_UART_TX
USB_DM_UART_RX
SPEECH_P
SPEECH_N
HP_MIC_P
HP_MIC_N
N
A
N
D
_R
E
_N
N
A
N
D
_C
LE
_N
M
S
D
_D
E
T
_N LC
D
_R
S
JACK_DETECT
FM_RST
SIM_RST1_N
SIM_CLK1
SD_WR_N
SD_DQS_0
SD_DQS_1
SD_CLKN
SIM_DATA1
SD_CLKP
N
A
N
D
_A
LE
_N
FM_32K
M
S
D
_D
[3]
M
S
D
_D
[2]
LC
D
_R
D
_N
R
F
_A
N
T
_S
W
1
END_KEY
K
E
Y
_R
O
W
5
SIM_RST2_N
SIM_CLK2
SIM_DATA2
WiFi_INT
WiFi_RST
B
T
_P
R
I
W
IF
I_32K
LC
D
_V
S
Y
N
W
iF
i_C
S
FM_INT
K
E
Y
_C
O
L2
K
E
Y
_C
O
L7
SD_BA_[0]
SD_BA_[1]
C
LK
_26M
CLK_26M
CHG_EN
ACC_ID
K
E
Y
_R
O
W
7
DCLK
DFS
DIN
SD_A_[13]
HOOK_DET
LCD_ID
EOC
M
S
D
_D
[0]
M
S
D
_D
[1]
KEY_BL0
KEY_BL1
R_LED_EN
BAT_Temp
BAT_Temp
BT_TRX
VIB_N
W
iF
i_E
N
R
F
_
A
N
T
_
S
W
2
R
F
_P
A
_E
N
u_SD_LDO_EN
Seperate GND
VSIM2
VSIM
DVDD28(VIO)
DVDD_NFI(VM)
DVDD28(VIO)
DVDD28(VIO)
DVDD28(VIO)
DVDD_MC
DVDD_NFI(VM)
DVDD_CAM(VIO)
DVDD28 (VIO)
DVDD28 (VIO)
DVDD28 (VIO)
DVDD_MC2(VIO)
DVDD_CAM(VIO) DVDD28_MIPI(VIO) DVDD_NFI(VM) DVDD_NFI(VM) DVDD_NFI(VM) DVDD_KP(VIO) DVDD28(VIO) DVDD28
(VIO)
DVDD28 (VIO)
VCC28_LDO_RXRF (VBT)
VCC28_SX (VBT)
VCC28_OSC (VBT)
VCC_RTC
(VRTC)
AVDD28_RFE
(VA)
AVDD28_RFE
(VA)
AVDD28_RFE
(VA)
AVDD28_RFE
(VA)
AVDD28_AFE
(VA)
AVDD28_AFE
DVDD43-SPK
(VBAT)
AVDD28_AFE
(VA)
AVDD28_MBUF
(VA)
DVDD_EMI
(VM)
DVDD_EMI
(VM)
DVDD_EMI
(VM)
DVDD_DMI (VM)
INTERRUPT
UART&IrDA
USB
PWM
LCD_PMIC
CAMERA LCD_NAND_IO(DATA) KEY u-SD JTAG
AUDIO
MEMORY_CONTROL
SDRAM-DATA
SDRAM_ADDRESS
RF_IQ
RF serial Parallel
SIM
DVDD28(VIO) LCD_BL_COTROL
Supply Voltage
ADC_PORT
AVDD33_USB
(VUSB)
(VMC_3V3)
SPI block
BT_CLOCK
Seperate GND
Close to Ic
1%
(1%)
(1%)
1%
13 LDOs
(4 Analog LDOs + 9 Digital LDOs)
Memory Card or Bluetooth
Digital Camera Power 100 1.3/1.5/1.8/2.5/2.8/3.0/3.3
VMC
VM
SIM Card2, Selectable
SIM Card, Selectable
13/26 MHz Reference Clock
RTC
Analog Baseband
RF Chip
Digital IO
External Memory, Selectable
100
1.3/1.5/1.8/2.5/2.8/3.0/3.1/3.3
DNI
DNI
----
VSIM2
100
100 VBT_2V8 VBT
1.3/1.5/1.8/2.5/2.8/3.0/3.3 VSIM2_PWR
100 1.8 / 3.0 VSIM1_PWR
VRTC_2V8 VRTC 0.6 2.8
125
250
100
2.8
2.8
1.8
0.9 to 1.3
2 Bucks
VIO_2V8
VCORE Digital Core 350 VCORE_1V2
Description
(Connected Device)
Output Current(mA) Output Voltage(V) Net Name Name of PMIC
MTK Recommended
S
eperate G
N
D
MTK Recommended
USB
Analog Camera Power 250
2.8
3.3
1.3/1.5 / 1.8 /2.8
VUSB_3V3
VCAM_2V8
VCAM_1V8
VRF_2V8
VCAM_D
VCAM_A
VUSB
VSIM
VA
VRF
VIO
AVDD_2V8
VMEM_1V8 300
VTCXO 2.8 40
VIBR ---- 1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 Vibrator
VMC 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100 Memory Card
ON-Board JTAG, UART Debug Interface
Array TP
Factory TP
Super Cap
FM I2S
7. CIRCUIT DIAGRAM
100p
C1316
C263 4.7n
C265
8.2n
C1322 4.7p
X202 1XTW26000FAA
26MHz
2 1
3 4
VCC OUT
GND1 GND2
C1341
18p
FL203
3
2
1
IN
GND OUT
X201
DSX321G-26M
26MHz
2 1
3 4
R289
0
C283 22p
R291
51
C284
100p
C271 100p C280 6p
U206
K1
F7
F6
G
7
G
6
D9
D7
D6
C9
A10
A5 E5 C
5
B3 A4 A3 C
3
A2 B1 A1 B5
J4
K4
E3
G3
G2
G1
J2
H2
K2
J1
J3
H3
H7
K9
J9
D1
D2
E8
E9
E6
E7
F10
F4
F8
G9
J8
K8
E2
H8
B8
C6
B9
A7
F9
D4
D3
C2
E10
A8
D10
A9
A6
C10
B10
H
4
H
5
H
6 K6 J5 J6 F2 F3
G
10
H
9
H
10
J10
C
1
G
4
K10 K7 J7
H
1 E1
FS
O
U
R
C
E
D
V
D
D
IO
3
D
V
D
D
IO
2
D
V
D
D
IO
1
D
V
D
D
IO
0
P
A
D
_V
D
D
K
1
C
LD
O
U
A
R
T_D
B
G
_TX
U
A
R
T_D
B
G
_R
X
G
P
IO
_1
G
P
IO
_0
C
S
_N
W
E
_N
D
15
D
14
D
13
D
12
D
11
D
10
TRX_IO_P
TRX_IO_N
AVDD33_XO
AVDD33_TX
AVDD16_TRX
AVDD16_SX
AVDD16_LF
AVDD16_CLDO
AVDDRTC
AVSSRTC
OSC_EN
OSC_IN
AVSS33_PA3
AVSS16_WF1
AVSS16_VCO
EXT_INT_B
WIFI_INT_B
ANTSEL_0
ANTSEL_1
ANTSEL_2
ANTSEL_3
CGND1
PAD_ICAL_EXTR
TRXIN
TRXIP
TRXQN
TRXQP
X32K_OUT
X32K_IN
XTEST
SYSRST_B
BT_PRI
D0
D1
A0
D3
D2
OE_N
D4
D5
D6
D7
D8
D9
P
A
D
_E
N
R
E
F
G
N
D
_R
E
F
A
V
D
D
43_R
E
F
O
U
T_FB
LX
B
K
A
V
D
D
43_S
M
P
S
A
G
N
D
43_S
M
P
S
G
N
D
_P
A
LD
O
P
A
LD
O
_FB
P
A
LD
O
AVSS33_PA1
AVSS33_PA2
AVSS16_WF2
AVSS16_WF3
AVSS16_WF4
P
A
D
_V
D
D
K
2
P
A
D
_V
D
D
K
3
CGND2
CGND3
CGND4
PALDO_3V3
DNI C1342
C299
1.8p
FL205
7
4 3
5 2
6 1
V1 J1
RFC GND
V2 J2
G_SLUG
0.1u
C245
PALDO_3V3
C266
18p
C253
DNI
DNI R200
C278
DNI
C298
DNI
A
N
T202
S
D
B
TP
TR
3015
2 3
1
4
DUMMY3
FEED
DUMMY2
DUMMY1
C282 22u
C1319
1u
C206
10p
R252
100K
C295
1u
TP202
VBAT
C1332 100p
C270
4.7u
SMPSLDO_1V6
VBAT
R254
24K
C1317
10p
VIO_2V8
R255
100K
AN203
HJ-ICT-08Y
1
L221
DNI
C200 100p
C288 100p
C264
0.5p
C289 100p
0.1u
C211
C207
1u C269 1.2p
L203
18n 5.6n
L209
C235 6.8p
U200
21
16 17 18 19 20
11
12
13
14
15
10 9 8 7 6
5
4
3
2
1 NC1
FMI
RFGND
LPI
RST_
S
E
N
_
S
C
LK
S
D
IO
R
C
LK
V
D
DOUT
LOUT
ROUT
GND
VA
N
C
2
G
P
O
1
G
P
02_IN
T_
G
P
O
3_D
C
LK
D
FS
G
_S
LU
G
R204
0
4 0 2 C n 1
R260
10K
TP200
TP201 C244
1u
C246
1u
C247
1u
VIO_2V8
VMEM_1V8
R253
49.9
C232 0.1u
C229 10p
C227 1u
0.1u C226
9.1n
L212
18p C225
18p C231
C233 18p
AN201
HJ-ICT-08Y
1
220
R239
C223 1n
R270
10K
AN200
HJ-ICT-08Y
1
R222
2.2K
R268
0
220n
C259
2.2K
R224
2.2K
R223
R267
0
C1328
DNI
2.2K
R225
C214 4.7u
C203
DNI
R230
100K
4.7u
C277
6.8p C236
DNI
C1327
1u
C262
L213
3n
10K
R203
VBAT
PALDO_3V3
10p C240
C238 10p
R205
100K
DNI
C1326
C243
2.2u
R262
10K
FL200
2 3 5 0 1
6 4
7
8
9 1 IN O1_1
O1_2
O2_1
GND O2_2
C_G1
C_G2
C_G3
C_G4
C1323
DNI
C1324
DNI
FL201
2 3 5 0 1
6 4
7
8
9 1 IN O1_1
O1_2
O2_1
G1 O2_2
G2G3G4G5
DNI R290
5.6n
L211 L206
22n
C230 18p
R240 2K
2K R241
1p
C1321
R212
100K
10K
R259
2.2u
C220
VTCXO_2V8
L228
3.3n
U207
3 2
4 1
OUT TER
IN COU
C279
100p
C276
8.2p
L229
3.3n
FL204
3
1
2
4
B/P_2
B/P_1
Gnd/DC_fd
UnB/P
8.2p
C267
C1325
1.2p
L220 22n
VIO_2V8
VBAT
R242
680
10K
R264
0.1u C228
1M
R263
L233 1.8n
1u
C239
PALDO_3V3
0.1u
C221
VBAT
1u
C222
VIO_2V8
C272
1n
C275 39p
C234
33p
1K R228
U202
5
3 2
4 1
OUT IN
GND EN
P
G
N
D
82p
C250
C252 0.1u
C258
0.1u
C260
47p
82p
C249
VRF_2V8 AVDD_2V8
VIO_2V8
C261
0.1u
VBAT
0.1u
C254 C255
0.1u
C256
0.1u
C257
27p
L225
2.2u
C1333 100p
U205
16 15 14 13 12 11 10 9
17 8
18 7
19 6
20 5
21 4
22 3
23 2
24 1
25 26 27 28 29 30 31 32 33
GND
RX850
RX850B
RX900
RX900B
RX1800
RX1800B
RX1900
RX1900B
VCC_FE VCC_BBQ
I Q
IB QB
VCC_BBI REF_OP
SDATA REFIN
SCLK REFINB
SEN VAFC_NC
NC VCC_REF
VLDO3
TXOP_LO
TXOP_HI
VCC_TXVCO
VDD
VBAT
VLDO1
VLDO2
FB200
120
C287
220p
C285
100p
U215
12
1110987
13
6
14
5
15
4
16
3
17
2
18
1
1920212223
GND_SLUG
VRAMP
TX_ENABLE
GPCTRL0
GPCTRL1
GND1
VBATT
GND2
NC3
RFIN_LB
GND9
GND3
GND8
RFIN_HB
ANT
GND4
NC2
GND5
GND6
GND7
NC1
RX0
RX1
C291
22p
C29033p
C286
22p
R282
180
R288
24K
R281
10K
R284
180
R283
30
C293
33p
C1337
DNI
R286
24
C1336 100p
C1334
DNI
C251
18p
C248 18p C1338 18p
L232
3.9n
L230
1.2n
L231
5.6n
R287
220
R285
220
C1330
DNI
SW201
G2 ANT RF G1
C1339 DNI
DNI
C1340
12p
C274
GND
RF_S_EN
RF_S_DATA
RF_S_CLK
RF_IN
RF_IP
RF_TX_RAMP
RF_QN
RF_QP
RF_AFC
I2C_SCL1
I2C_SDA1
LCD_WR_N
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[00]
LCD_RS
FM_RST
FM_32K
LCD_RD_N
RF_ANT_SW1
WIFI_INT
WiFi_RST
BT_PRI
WIFI_32K
WiFi_CS
FM_INT
CLK_26M
DCLK
DFS
DIN
BT_TRX
FM_ANT
LowBand_Tx
Low
B
and_T
x
HighBand_Tx
H
ighB
and_T
x
GSM850_RxN
G
S
M
850_R
xN
EGSM_RxN
E
G
S
M
_R
xN
WiFi_TX_CLK_EN
WiFi_TX_CLK_EN
Low
B
and_R
x
LowBand_Rx
H
ighB
and_R
x
HighBand_Rx
PCS_RxN
P
C
S
_R
xN
DCS_RxN
D
C
S
_R
xN
E
G
S
M
_R
xP
EGSM_RxP
G
S
M
850_R
xP
GSM850_RxP
P
C
S
_R
xP
PCS_RxP
D
C
S
_R
xP
DCS_RxP
VTCXO_2V8
FM_AUDIO_L
FM_AUDIO_R
WiFi_EN
RF_ANT_SW2
RF_PA_EN
BT_WIFI_SEL_1
BT_WIFI_SEL_1
BT_WIFI_SEL_0
BT_WIFI_SEL_0
BT_IN_OUT
BT_IN_OUT
ANT_FEED
ANT_FEED
WIFI_IN_OUT
WIFI_IN_OUT
Star connection
MT5931 WIFI
WiFi_LDO & Setting
FM RADIO_SI4705
ANT_PAD
as close as possible to pin
7. CIRCUIT DIAGRAM
FB302
600
FB301
600
R
301
4.7K
C338 C339
FB300
600
J300
9 8
10 7
6 3
5 2
4 1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
J301
9 8
10 7
6 3
5 2
4 1
VCC GND1
RST VPP
CLK IO
GND2 GND5
GND3 GND4
VA306 VA307 VA308
R
302
4.7K
VA309 VA310
VA311
VMC_3V3_LDO
C321
DNI
C323
1n
25pF
FL302
105
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G1 G2
U301
28272625
18 17 16 15 14 13
12
24
11
23
10
22 9
21
8
20
7
19
654321
D3 D4 D5 D6 D7 DGND
VSYNC
MCLK
PCLK
GND1
GND4
/RESET D0
SDA
D1
SCL
D2
/STANDBY
DVDD1_8V
IOVDD2_8V
GND2
AVDD2_8V
GND3
HSYNC
PGND1
PGND2
PGND3
PGND4
1K
R310
VA300
2.2u
C337
1u
C310
VHP_1V8
2.2u
C332
2.2u C306
DNI
C324
DNI
C325
2.2u
C334
VIO_2V8
VBAT
C331 1u 0 3 3 C u 1
2.2u
C333
100K
R311
VHP_MIC_2V6
C328
1u
C329
33p DNI
C326
DNI
C327
U302
21
20
19
18
8
7
6
5
9
4
10
3 11
2
12
1
13
14
15
16
17
LED3
LED4
NC2 LDO2
AVIN
C1N
LDO1
C2N
AGND
PGND
NC1
C2P
ENA
C1P
PVIN
SCL
SDA
LED2
LED1
VOUT
SLUG_G
473091265 S300
G2
G1 G3
8
G4
7
6
3
5
2
4
1
DAT2
VDD
CD/DAT3
CLK
CMD
VSS
DAT0
DET
DAT1
POL GND1
GND2
25pF
FL300
10 5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G1G2
1u
C311
VSIM1
R312
10
VA301 VA302 VA303
VA312 VA305 VA304
VIO_2V8
R303
100K
C322
2.2u
1u
C315
U300
B6
B3
B4
A4
A7
A3
A6
M8
L7
M7
N5
N4
M4
N3
N2
L8
M6
L6
N7
L5
M3
M2
M1
H7
D5
H8
D7
J1
G2
F2
H2
D3
F8
G8
B7
B8
C7
C8
C6
D8
C5
E6
J5
J7
K8
J8
K7
K6
K5
K4
J2
H3
E1
E2
J3
C4
D2
C3
D1
C2
B2
K3
K2
K1
J4
N9
N6
M10
L9
L2
K10
J10
H9
H1
G9
F10
E9
D10
C9
B10
B5
B1
A9
M5
A5
L4
L3
J6
H6
H5
H4
G7
G6
G5
G4
G3
F7
F6
F5
F4
F3
F1
E8
E7
E5
E4
E3
D6
D4
A2
M9
L10
K9
J9
H10
F9
E10
D9
C10
B9
N8
L1
G10
G1
C1
A8
N
10
N
1
A
10
A
1
N
C
1
N
C
26
N
C
28
N
C
29
VDD1
VDD2
VDD3
VDD5
VDD4
VDD6
VDDQ1
VDDQ6
VDDQ5
VDDQ4
VDDQ10
VDDQ9
VDDQ2
VDDQ8
VDDQ7
VDDQ3
NC27
NC20
NC21
NC9
NC19
NC8
NC11
NC12
NC17
NC18
NC7
NC16
NC25
NC6
NC10
NC5
NC13
NC14
NC4
NC2
NC24
NC22
NC23
A13
NC3
VCC1
VCC2
VSS1
VSS4
VSS8
VSSQ5
VSSQ4
VSSQ9
VSSQ8
VSSQ3
VSS2
VSS3
VSSQ10
VSSQ1
VSSQ2
VSS5
VSSQ6
VSSQ7
VSS6
VSS7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
/CK
CK
CKE
/CS
/RAS
/CAS
/WED
UDQM
LDQM
UDQS
LDQS
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO8
IO9
IO10
IO11
IO12
IO13
IO14
IO15
/CE
/RE
/WE
CLE
ALE
/WP
R/B
C300
DNI
C301
DNI DNI
C302
C314
DNI DNI
C313 C312
DNI
VSIM2
1u
C303
VIO_2V8 VMEM_1V8
C309 0.1u
C307 0.1u
C308 0.1u
C317 0.1u
VMEM_1V8
VMEM_1V8
VMEM_1V8
R300
100
TP315
FL301
25pF
105
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
G1 G2
TP316
VMC_3V3_LDO
VBAT
C341
1u C340
1u
U303
5
3 2
4 1
VOUT VDD
GND CE
P
G
N
D
TP310
TP311
TP312
TP313
VCAM_2V8
0.1u
C319 C320
0.1u
TP314
TP318
TP319
C318
0.1u
VCAM_1V8
TP321
VBAT
R304
DNI
DNI
R305
C336
2.2u
CN300
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
2.2u C316
SD_D_[09]
SD_D_[08]
SD_D_[07]
SD_D_[06]
SD_D_[05]
SD_D_[04]
SD_D_[03]
SD_D_[02]
SD_D_[01]
SD_D_[00]
CAM_MCLK
CAM_HSYNC
CAM_VSYNC
CAM_PCLK
I2C_SCL1
I2C_SCL1
MSD_CLK
MSD_CMD
CAM_DATA[7]
CAM_DATA[6]
CAM_DATA[5]
CAM_DATA[4]
CAM_DATA[3]
CAM_DATA[2]
CAM_DATA[1]
CAM_DATA[0]
SD_CS_N
SD_CAS_N
SD_RAS_N
SD_D_[15]
SD_D_[14]
SD_D_[13]
SD_D_[12]
SD_D_[11]
SD_D_[10]
I2C_SDA1
I2C_SDA1
SD_CKE
SD_DQM_0
SD_DQM_1
SD_A_[00]
SD_A_[01]
SD_A_[02]
SD_A_[03]
SD_A_[04]
SD_A_[05]
SD_A_[06]
SD_A_[07]
SD_A_[08]
SD_A_[09]
SD_A_[10]
SD_A_[11]
SD_A_[12]
CAM_PWDN
LCD_CS_N
LCD_RST_N
LCD_WR_N
LNAND_D_[15]
LNAND_D_[13]
LNAND_D_[12]
LNAND_D_[11]
LNAND_D_[10]
LNAND_D_[09]
LNAND_D_[08]
LNAND_D_[07]
LNAND_D_[07]
LNAND_D_[06]
LNAND_D_[06]
LNAND_D_[05]
LNAND_D_[05]
LNAND_D_[04]
LNAND_D_[04]
LNAND_D_[03]
LNAND_D_[03]
LNAND_D_[02]
LNAND_D_[02]
LNAND_D_[01]
LNAND_D_[01]
LNAND_D_[00]
LNAND_D_[00]
NAND_WR_N
LNAND_D_[14]
CAM_RST_N
NAND_WP_N
NAND_CS_N
NAND_BSY_N
NAND_RE_N
NAND_CLE_N
MSD_DET_N
LCD_RS
SIM_RST1_N
SIM_CLK1
SD_WR_N
SD_DQS_0
SD_DQS_1
SD_CLKN
SIM_DATA1
SD_CLKP
NAND_ALE_N
MSD_D[3]
MSD_D[2]
LCD_RD_N
SIM_RST2_N
SIM_CLK2 SIM_DATA2
LCD_VSYN
SD_BA_[0]
SD_BA_[1]
SD_A_[13]
LCD_ID
MSD_D[0]
MSD_D[1]
BLED_CA0
BLED_CA0
BLED_CA1
BLED_CA1
BLED_CA2
BLED_CA2
BLED_CA3
BLED_CA3
u_SD_LDO_EN
VA309 VA310 VA311 C315
NA NA
R305 J301
LG-C195(Single) NA NA NA NA
LCD Charge Pump
LCD INTERFACE
Camera Connector (2M)
hynix 2G/1G DDR
SIM_CONNECTOR
u-SD CARD
7. CIRCUIT DIAGRAM
R402
47K
L401 100n
VA400
R433 0
R408
0
R431
DNI
C430
10u
R432
0
VA408
VA401
ZD401
FB402 600
C439 1u
C438 1u
CN400
2
1
C437
DNI
R428
0
R427
0
FB403 600
L402 100n
J400
2
3
4
5
6
1 M5
M4
M3
M4F
M1
M6
VA409
VA407
Q400
1
3
2
G
D
S
C435
39p
L400
100n
C436
39p
R434
470
VA410
47p
C433
R415
1K
C418
10p
R414
100
C434
47p
0 2 4 C u 1
9 1 4 C u 1
0.1u
C427
R430 1
MIC400
2
1
U401
4 3
2
5 1
IN+ VCC
GND
IN- OUT
1M
R406
VIO_2V8
220K
R407
VIO_2V8
R404
100K
VIO_2V8
R429 1
0.1u
C401 C400
2.2u
39p
C426
C431
39p
9 0 4 C u 1
8 0 4 C u 1
2.2u
C413
C411
0.1u 0.1u
C410
20
R401 R400
20
VHP_1V8
VBAT
IC400
B
3
A4
C3
C2
B
2
D1
D3
D
4
C1
A1 D2
B
1
D5
A2
A5
A3
B5
B
4
C5
C
4
G
N
D
OUT+
H
P
V
D
D
CPVDD
CPVSS
CN
HPL
OUT-
B
IA
S
IN2- HPR
IN1+
S
V
D
D
IN3-
IN2+
S
D
A
IN1-
IN3+
CP
S
C
L
C403 1u
C415
2.2u 2.2u
C416
C412
2.2u
C414 2.2u
C402 1u
100
R421 C432
0.1u
2.2K
R417
R422
2.2K
C429
47p
VMIC_BIAS_P
10u
C423
FB408 1800
FB409 1800
FB407
1800
0.1u
C425
0.1u
C428
C424
39p
R403
100K
VA405
R419
2.2Kohms
VHP_MIC_2V6
VA404
VIO_2V8
C421
DNI
10
R405
ZD400
FB410
1800
1.5Kohms
R418
100
R420
39pF
C404
39pF
C405
MIC_N
MIC_P
HS_R
HS_L
I2C_SCL2
I2C_SDA2
SPEECH_P
SPEECH_N
HP_MIC_P
HP_MIC_N
JACK_DETECT
HOOK_DET
FM_ANT
FM_AUDIO_L
FM_AUDIO_R
HS_OUT_L
HS_OUT_L
HS_OUT_R
HS_OUT_R
SPK_N
SPK_N
SPK_P
SPK_P
HS_GND
HS_GND
ON
OFF
HOOK_DET IN-
High
Low
0 V
1.44V
Speaker and Receiver
MAIN MIC
BB side place
MIC side place
BB side place
3.5phi HEADSET
AUDIO SUBSYSTEM
RCV Circuit
7. CIRCUIT DIAGRAM
C514
1u
C524
1u
VA532
VA526
VA525
KB546 KB547
ZD502
VA517
VA515
VA516
VA513
VA514
VA511
VA512
VA519
VA518
VA521
VA520
VA523
VA522
VA524
C511
100u
CN500
11
10
9
5
4
3
2
1
8
7
6
ZD503 ZD504
ZD501
VA527
VA528
DNI
VA529
DNI
VA530
DNI
VA531
DNI
LD501
2
1 A
C
LD500
2
1 A
C
C502
1u
C523
1u
C512
1u
DNI
VA509
47p
C516
R536
DNI
270n
L501
LD512
DNI
C518
DNI
C521
DNI
C522
R537
4.7
0.1u
C504
R525
1K
1300
R502
47p
C515
100K
R504
VIO_2V8
KB504
22pF
C503
VBUS_USB
39p
C508
5.6p
C510
VBAT
VUSB_LDO_4V9
0.1u
C513
R503
3K
VA510
DNI
VBAT VBUS_USB
KB545
U500
6 5
7 4
8 3
9 2
10 1
11
PGND
VIN BATT
ISET PGB
GND1 CHGSB
LDO GND2
IEOC EN_SET
AVDD_2V8
C501
1u
240K
R531
VBAT
VBAT
CN502
3
2
1
D1
D2
240K
R524
AVDD_2V8
VBAT
L500
22n
KB500 KB501
VB500
2
1
KB502 KB503 KB505 KB506
KB507 KB513 KB512 KB511 KB510 KB509 KB508
C509
10p
KB540
KB515 KB514 KB518 KB519 KB516 KB517 KB520
KB521 KB522 KB523
KB531 KB530
KB524
KB533 KB534
KB536 KB538
KB529 KB528
KB527 KB526 KB525
KB537 KB535 KB541 KB542
KB543 KB544 KB539
KB532
GND
K
E
Y
_
R
O
W
1
KEY_COL5
K
E
Y
_
R
O
W
0
K
E
Y
_
R
O
W
2
K
E
Y
_
R
O
W
3
K
E
Y
_
R
O
W
4
KEY_COL0
KEY_COL1
KEY_COL3
KEY_COL4
USB_DP_UART_TX
USB_DM_UART_RX
END_KEY
K
E
Y
_
R
O
W
5
KEY_COL2
KEY_COL7
CHG_EN
ACC_ID
K
E
Y
_
R
O
W
7
EOC
KEY_BL0
KEY_BL1
R_LED_EN
BAT_Temp
VIB_N
Dual SIM CAMERA
Micro-USB 5pin normal
BATTERY CONNECTOR
Vibrator
End Key
KEY MATRIX
KEY BACKLIGHT
END
Message blinker
(1%) (1%)
(1%)
Q W E R T Y U
I O P A S D F
WiFi
G H J K L Del Fn
Z X C V B N M
,(comma)
Line Width: 2mm
ENTER Shift @
SEND
RIGHT SOFT LEFT SOFT
SINGLE CHARGING IC for u-USB
SYM Message/Lock DOWN
.(period) SPACE
OK
LEFT RIGHT UP (1%)
8. BGA PIN MAP
- 124 -
8. BGA PIN MAP
BGA IC pin check (U100)
MT6236 TFBGA 12.5mm x 12.5mm, 382ball
8. BGA PIN MAP
- 125 -
130bal 8.0X9.0 MCP(x16 SLC NAND + x16 LPDDR)
8. BGA PIN MAP

130bal 8.0X9.0 MCP(x16 SLC NAND + x16 LPDDR)
: not in use
8. BGA PIN MAP
- 126 -
TFBGA ball Type
8. BGA PIN MAP

TFBGA ball Type
ALL USED PIN
9. PCB LAYOUT
7 8
14
K
B
519
KB547
K
B
509
K
B
508
K
B
518
K
B
529
LD501
LD512
K
B
503
K
B
523
KB541
C
N
100
K
B
513
K
B
532
ANT202
C1316
KB539
KB545
K
B
536
K
B
528
K
B
507
K
B
527
K
B
517
K
B
535
K
B
506
K
B
526
KB542
K
B
516
K
B
534
K
B
505
K
B
525
K
B
515
K
B
504
K
B
524
KB538
KB543
KB540
K
B
514
KB533
LD500
K
B
502
K
B
522
K
B
512
K
B
531
C269
K
B
530
KB546
K
B
501
K
B
511
K
B
521
K
B
510
KB544
KB537
K
B
500
K
B
520
LG-C199_MAIN_EAX64641701_1.0_ TOP
9. PCBLAYOUT
ANT202
Bluetooth antenna
- No BT working
LD512
Charging LED
- No Charging Light
LD501,502,
Abnormal operation
- No Key Light on
9. PCB LAYOUT
Y BL
E
B
7
10
M
E
8
14
N
F
G
H
J
K
L
1
A
B
C
D
AD AAABACAE MNPRTUVW
1 5
D
CDEFGHJK A
A
B
C
D
e
1 5
1
24
25
13
1
A B C D HGF NMLKJ
10
1
A J KE F G HDC
FB407
R403
R420
C418
FB408
ZD400
VA404
R402
R300
VA510
R101
C313
C315
R305
VA310
VA532
L501
C423
VA409
J301
R230
C402
U200 C415
C420
R310
C329
C328
CN502
FB103
FB101
V
B
5
0
0
C416
C
111
R404
R414
VA407
FB402
C414
FB403
C413
C319
C511
C138
C157
C123
L401
J300
VA520
C514
U303
C340
C341
VA100
C107
C220
C501
R130
R268
C258
X
201
C293
VA531
L228
C274
C
N
400
C298
L233
F
L205
FL204
C266
C1321
R264
U207
R262C299
C1326
C1325
L229
C203
A
N
201
U215
C404
C437
ZD503
ZD504
U205
C436
C309
VA512
R421
R430
VA509
R123
VA517
R121
VA513
VA515
VA511
VA527
VA516
VA309
C314
L500
C515
R
537
C432
C427
C429
C434
R422
R405
C
N
300
C316
R124
L400
R433
C435
FB409
R429
Q400
VA405
R431
C338
C336
VA525
ZD401
C310
C339
R311
C311
C317
C306
C307
C308
U300
TP312
TP310
TP313
VA514
R119
R122
R125
R120
VA526
C312
VA311
C516
C512
R417
R415
VA408
C433
C206
C204 L220
R212
C234
R203
R205
R204
F
L300
FL302
C325
C327
C326
FL301VA300
R108
TP314
TP311
R302
R301
C337
C333
C324
C332
R242
J400
R239
R241
R240
C419
C211
C207
C439
U
302
C330
C331
C334
R105 R104
C116 R109 C112
C103
C401
C411
C410
C412
C400
C408
B
A
T
100
R100
R400 R406
R407R
401
IC400
C403
C438
C409
C129
C151
C118
L102
C109R106
C121
U100
C104
C126
R408
VA528
VA530
C421U401
TP316
FB302
R432
TP315
C318
C509
C518
Z
D
501
C510
C174
R503
C130
C154
C155
C119
C120
C156
C173
C102
C122
C172
C160
C128
VA522
VA521
VA523
R419
VA410
FB410 R434
R418 C430
U301
TP319 C320
FB300
TP318 FB301
C521
C522
C508
R525
U500
C523
R502
C504
C167
R116
C100
R118
C101
R110
C166
C117
R117
C
134
L101
L100
FB100
C159X
100
C264
VA306
C170
C263
R111
VA307
C265
C171
C169
C168
C125
C301
R127
R128
R129
L402
MIC400
VA305
C424
C
144
C110
VA518
VA519
VA524
C425
C426
C428
C431
C323
VA303
VA304
R303
TP321
C321
C322
R312
VA312
VA301
R524 C524
VA302
R504
R536
C
142
C
105
C106
C303
R304
C300
R252
C302
VA308
R131
R132
R126
S
3
0
0
R267
C1339
C223
VA529
C253
C276
L231
C251
L230
C1330
C1317
C1332
C1319U
202
C1340
C1342
C222
C232
X
202
R291
C226
R253
C239
C243
L225
C277
FB200
C214 C270
C295
C271
A
N
203
U
2
0
6
C1327
C1334
C278
C1323
FL203 C1341
C248
C267
C1328C1338
L232
R259
R260
C229
R254
C227
TP201 TP200
TP202
C244
C247
R270
C221
C228
C252
C275
R228
R223
R225
C272
C200 C1336
A
N
200
R255
C262
C257
FL201
C284
VA401
VA400
C1324
R531
C513
C279
C246
R263
C245
C254
C
259
C261
C256
C250
L209 L211
R289
C236
C240
C238
C235
L213
C282
C283
C1322
C280
S
W
201
C1337
C1333 L221
R200
R290
C
N
500
R222
R224
C288
FL200
C287
C285
R288
C286
R281
C405
R427
R428
ZD502
C503
C
502
R284
R285
R282
R287
C291
C290
R286 R283
C255
C249
C260
C225
L206
C233
C231
L203
C230
C289
L212
LG-C199_MAIN_EAX64641701_1.0_ BOT
J400 Ear-Jack
- No Ear-Jack Detect
U200 FM Radio
- No FM Radio
CN300 LCD Connector
- No LCD
U302 LCD Charge Pump
- No LCD Backlight
CN502:Main Batt connector
- No Battery detect
U100 MT6236
Can not power on
- No LCD Display
- No Service, No BT
X100 X-tal(32.768KHz)
Abnormal operation
- No power on
- Main chip cant work
J300: SIM card socket
- No SIM
MIC400 : Main MIC
- Cant make
TX voice signal
U215 TX module
- No Service
FL200 FL201: GSM RX SAW Filter
- No service
U205 Transceiver
- No Service
X201 Crystal, 26MHz
- No Power On
U206 WIFI
- No WIFI
X202 Crystal, 26MHz
- No Wif
FL204 Balun Filter
- No WIFI
U207 Coupler
- No Bluetooth & WIFI
U303: SD card LDO
- No SD memory detect
U500: Single Charging IC
Abnormal operation
- No USB,TA,HPH
S300: SD card socket
- No SD memory detect
CN400 SPK & RCV PAD
- No SPK&RCV
U301:Main Camera
U300: Memory
Abnormal operation
- No power on
- System cant work
IC400: Audio subsystem
Abnormal operation
- No SPK/HPH sound
J301 : SIM card socket
- No SIM
10. ENGINEERING MODE
- 129 -
Engineering mode is designed to allow a service man/engineer to viewand test the basic functions Engineering mode is designed to allow a service man/engineer to view and test the basic functions
provided by a handset. The key sequence for switching the engineering mode on is 3845#*375#
Select. Pressing END will switch back to non-engineering mode operation. Use Up and Down key to
select a menu and press select key to progress the test. Pressing back key will switch back to the
original test menu.
[1] Device Test
[1-1]ALL Auto Test
[1-20-1]Speaker&VIB
[1-20-2]Speaker ONLY
[ ]
[1-2]All Auto Test Result
[1-3]Auto Detecting test
[1-4]Charging LED Test
[1-5]Key Press Test
[1-6]Camera Test
[1-7]LCD Display Test
[1-8]Sound Test
[1-9]Vibrator Test
[1-10]WIFI Test
[1 11]L b k T t
[1-20-3]VIBRATOR ONLY
[1-21]Vibrator Duration
[1-21-1]Call Alert
[1-21-2]Massage Alert
[1-21-3]Alarm
[2]ELT TEST
[2-1]automatic
[2-1-1]1 Time
[2-1-2]2 Times
[1-11]Loopback Test
[1-12]FM Radio Test
[1-13]Main LCD
[1-13-1]White
[1-13-2]Red
[1-13-3]Green
[1-13-4]Blue
[1-13-5]Black
[1-13-6]Gray
[1 13 6 1]Gra 0
[2 1 2]2 Times
[2-1-3]3 Times
[2-1-4]4 Times
[2-1-5]5 Times
[2-1-6]100 Times
[2-1-7]Infinite
[2-2]Manual
[2-2-1]LCD Backlight
[2-2-2]Ringtones
[2-2-3]Vibrator
[2 2 4]C
[1-13-6-1]Gray0
[1-13-6-2]Gray1
[1-13-6-3]Gray2
[1-13-6-4]Gray3
[1-13-6-5]Gray4
[1-13-6-6]Gray5
[1-13-6-7]Gray6
[1-13-6-8]Gray7
[1-13-6-9]Gray8
[1-13-6-10]Gray9
[2-2-4]Camera
[2-2-5]Audio Loopback
[3]SW sanity Test
[3-1]FPRITest
[3-2]DB Check
[3-1-1]Copy DB to UserDisk
[3-1-2]Copy DB file to ExtMem
[3-1-3]Copy CRC
[3-3]E Serial no y
[1-13-6-11]Gray10
[1-13-6-12]Gray11
[1-13-6-13]Gray12
[1-13-6-14]Gray13
[1-13-6-15]Gray14
[1-13-6-16]Gray15
[1-13-6-17]Gray16
[1-14]Sub LCD
[1-15]LCD Backlight
[3-4]UA,String
[3-5]Unlock
[4]Factory Reset
[5]Version
[5-1]SW Version Info

[1-16]KEY Backlight
[1-17]Speaker
[1-18]Vibrator
[1-19]Sub Camera
[1-20]Speaker VibTest
[6]Usage info
- 130 -
[7]ERS
[7-1]Client Status
[7-1-1]Active
[7 1 2]Active + File Save
[8-11-9]IP_configuration
[8-11-10]PS_Mode
[8-11-11]WPS
[8-11-12]WPSE
[7-1-2]Active + File Save
[7-1-3]Inactive
[7-1-4]Inactive + File Save
[8-11-13]Test Page
[8-11-14]Threshold Setting
[8-11-15]GAN Mode
[8-11-16]Certs Info
[8-11-17]Cert Set Up
[8-11-18]Wi-fi UI
[8-12]Packet data connection
[8-12-1]SIM1
[8-12-2]SIM2
[8 13]FMRadio
[7-2]Ers Test
[7-3]Carrier Setting
[7-2-1]QM test
[8]Engineer mode
[8-1]PS
[8-13]FMRadio
[8-14]WebEngMode
[9]WISE Debug
[9-1]Variable Watch
[8-1-1] Band selection
[8-2]DRM
[8-3]RF(BER)
[8-2-1] DRM Cert Check
[8-2-2] DRM Cert Info
[8-3-1] preview
[8-3-2] LCD
[8-3-3] Vibrator
[8-14-1]UA String Editor
[8-14-2]UA String Selector
[8-14-3]UA profile Editor
[8-14-4]Set MCC MNC
[8-14-5]Enable page Dump
[8-14-6]Trace Mode
[9 1]Variable Watch
[9-2]heap Freesize
[9-3]heap Leakage
[9-4]heap Assert
[9-5]QM heap Freesize
[9-6]Deceloper Debug
[8-4]BaseBand
[8-5]Audio Tunning
[8-4-1]Battery Log
[8-4-2]Battery Info
[8-4-3]LCD(MAIN)
[8-4-4]LCD(SUB) l;7
[8-4-5]BackLight(Key)
[8-4-6]RF CAL Info
[8 5 1]H d
[9-6-1]Debug_None
[9-6-2]Debug_LOW
[9-6-3]DebugMIDDLE
[9-6-4]HIGH
[8-6]Bluetooth
[8 7]aging Test
[8-5-1]Handset
[8-5-2]Headset
[8-5-3]Speaker Phone
[8-5-4]Bluetooth Headset
[8-5-5]Info
[8-6-1]Set BT Addres
[8-6-2]BT Audio/RF Test
[8-6-3]BT Test Menu
[10]MTK Debug
[10-1]Catcher
[10-2]SleepMode
[10-3]DCM
[10-4]Memory Dump
[10-5]Buffer Monitor
[10-5-1]Disable
[10-5-2]ALL
[10-5-3]8 Byte
[ ]
[8-7]aging Test
[8-8]JAVA
[8-9]User Pattern Test
[8-10]NetWork Info
[8-10-1] SIM1
[8-10-2] SIM2
[8-11]WIFI Eng MENU
[8-11-1]Net Info
[8-11-2]FTM mode
[8-11-3]OTA Test
[10-5-4]32 Byte
[10-5-5]64 Byte
[10-5-6]128 Byte
[10-5-7]256 Byte
[10-5-8]512 Byte
[10-5-9]1024 Byte
[10-5-10]2048 Byte
[10-6]FS Trace Mode
[10-6-1]Disable
[10 6 2]Error
i !3! !27
[8-11-3]OTA Test
[8-11-4]wlCmd
[8-11-5]open
[8-11-6]close
[8-11-7]Available net
[8-11-8]disconnect
[10-6-2]Error
[10-6-3]API + Error
[10-7]Watch Dog
[10-8]VM setting
[10-9]VM Common Param
11.AUTO CALIBRATION
- 131 -
11.AUTO CALIBRATION
11. RF CALIBRATION
11. RF CALIBRATION
11.1 Configuration of Tachyon
11.1.1 Configuration of directory
LG-C375
LG-C375
LG-C375
LG-C375
LG-C375
LG-C375

LG-C199
LG-C199
LG-C199
LG-C199
LG-C199
11.AUTO CALIBRATION
- 132 -
11. RF CALIBRATION
11.1.2 Description of basic folders
F ld D i ti Folder Description
Tachyon Exe file and MFC dll, UI dll is present.
Common Common dll files.
(XML Data I/O , Auto Test Logic, Tachyon Logic Control, Communication)
Config Envirement files.
(Port configuration, Loss adjust)
Instrument Tester control dll Instrument Tester control dll.
Model Model files is present.
(Model -> Solution (Qualcomm, EMP, ADI, INFINEON) -> MODEL
NAME(LGGM630, LGSH470, ..) -> BUYER NAME(SKT, TEL, V, )
OCX Conponent files.
PhoneCmd Phone communication file
Report Report Files is present
11.1.3 Description of configuration files
Report Report Files is present.
(Cal data, test data)
Folder Description
MODEL NAME_Calibration.XML There are imformations to calibrate.
It consist of calibration items.
MODEL NAME_CallSetup.XML There are imformations to call.
MODEL NAME_NV.INI It consists of default values.
It is written when cal&auto is begun.
MODEL NAME_Sequence.XML It is described a testing procedures.

11.AUTO CALIBRATION
- 133 -
11. RF CALIBRATION
11 2 1 Model selection
11.2 How to use Tachyon
11.2.1 Model selection
Follow the procedure before start calibration & auto test
a. Click the icon, in tool bar.
Then, You can make a choice of LG-C375 for loading cfg files before run.
b. Select model name and then do double-click the buyer name.
You will see configuration files loaded in the right window with PASS information above

LG-C199
LG-C199
LG-C199
LG-C199
LG-C199
LG-C199
LG-C199
11.AUTO CALIBRATION
- 134 -
11.2.2 Start cal & auto
a. Click calibration & autotest button, in Tool bar
b. Calibration & autotest will be executed in order.
1) Precede Action.
- NV write
- Test command send.
2) RF Calibration
3) RF Auto test
4) After action
- Phone reset
- Change UE to AMSS
12. EXPLODED VIEW & REPLACEMENT PART LIST
12.1 EXPLODED VIEW(SBOM)
Location Description
ACQ00
EAA00
SJMY00
MBL00
MBL01
EBR00
ABA00
ABM00
EAJ00
ADB00
EAB01
EBP00
EAB00
GMEY00
ACQ01
MJN00
AEX00
AJX00
EAC00
ACQ02
Cover Assembly,Rear
PIFA Antenna,Multiple
Motor,DC
Cap
Cap
PCB Assembly,Main
Bracket Assembly
Can Assembly,Shield
LCD Module
Dome Assembly,Metal
Speaker,Dual Mode
Camera Module
Microphone,Condenser
Screw,Machine
Cover Assembly,Front
Tape,Window
Keypad Assembly,Main
WindowAssembly,LCD
Rechargeable Battery,LithiumIon
Cover Assembly,Battery
EAC00
GMEY00
EAA00
MBL01
SJMY00
ACQ00
ABM00
EBP00
EAB00
ABA00 EAB01
EAJ00
EBR00
ADB00
AEX00
ACQ01
MJN00
AJX00
MBL00
ACQ02
- 136 -
Note: This Chapterisused for reference,Part order is ordered
by SBOM standard on GCSC
Level LocationNo. Description PartNumber Spec Remark
1 AGQ000000 Phone Assembly AGQ86717302 LGC199.ABRASV SV:Silver -
2 MEZ002100 Label,Approval MLAA0062320
COMPLEX GU280 OREBK ZZ:Without Color
COMPLEX, (empty), , , , ,
2 ACQ100400
Cover
Assembly,EMS
ACQ85962103 LGC199.ABRASV SG:Soft Gray -
3 ACQ063300
Cover
Assembly,Rear
ACQ85954001 LGC195.ANLDSV SS:SHINE SILVER -
4 ACQ00
Cover Assembly
Rear(SVC)
ACQ86074001 LGC195.ANLDSV ZZ:Without Color -
5 MBL00 Cap MBL65223301
MOLD RUBBER LGC195.ANLDSV BK:BLACK
BLACK -
5 MBL01 Cap MBL65263201 MOLD RUBBER LGC195.ANLDSV BK:Black -
5 MCK063300 Cover,Rear MCK67119701 MOLD PC LGC195.ANLDSV SV:SILVER SILVER -
5 MCQ074200 Damper,Speaker MCQ66957501
CUTTING PSR LGC195.ANLDSV BK:BLACK
BLACK -
5 MCQ074201 Damper,Speaker MCQ66957601
BLACK -
5 MDJ000000 Filter MDJ63426801
CUTTING NYLON LGC195.ANLDSV BK:BLACK
BLACK -
5 MKC009400 Window,Camera MKC64322501 CUTTING ACRYLYL LGC195.ANLDSV BK:Black -
5 MEZ000900 Label,After Service MEZ64319901
COMPLEX LGF120L.ALGTWA ZZ:Without Color
F120l AS Label
5 MJN089300 Tape,Window MJN68081301
CUTTING 480R LGC195.AGBRSV ZZ:Without
Color -
5 MJN061100 Tape,Protect MJN68139701
CUTTING PET LGC195.ANLDSV ZZ:Without Color
-
3 ACQ01
Cover
Assembly,Front
ACQ86042001 LGC199.ANGRSV SV:SILVER SILVER -
12.2 ReplacementParts
<Mechanic component>
- 137 -
4 MCK032700 Cover,Front MCK67230701 MOLD PC LGC195.ANLDSV SV:SILVER SILVER -
4 AEX00
Keypad
Assembly,Main
AEX73958201 LGC199.ANGRSV SV:SILVER SILVER -
4 MJN061100 Tape,Protect MJN68174401 COMPLEX LGC195.ANLDSV ZZ:Without Color -
4 AJX00
Window
Assembly,LCD
AJX73465002 LGC199.ANGRSV ZZ:Without Color -
5 MKC043300 Window,LCD MKC64360602
CUTTING ACRYLYL LGC195.AGBRSV SV:SILVER
SILVER -
5 MCQ043300 Damper,LCD MCQ66919501 CUTTING PSR LGC195.ANLDSV BK:Black -
4 MCQ074200 Damper,Speaker MCQ66919601 CUTTING PSR LGC195.ANLDSV BK:Black -
4 MJN00 Tape,Window MJN68081001
BLACK -
4 MET099500 INSERT,NUT MICE0016904 MECH_COMMON ZY,ZZ,PRESS, STS, , , , ,
4 MCQ000000 Damper MCQ66919701 CUTTING PSR LGC195.ANLDSV BK:Black -
4 MDJ000000 Filter MDJ63446401 CUTTING 480R LGC195.ANLDSV BK:Black -
5 MEZ000000 Label MLAZ0038301
COMPLEX LG-VX6000 ZZ:Without Color PID Label
4 Array PRINTING,
6 AN201,AN203 Contact MCIZ0008301
COMPLEX LGKU3800.AKTFPK ZZ:Without Color
PRESS, BeCu, , 4.5, 2.7, 1.5,
5 ABA00 Bracket Assembly ABA74271201 LGC195.ANLDSV BK:BLACK BLACK -
6 MCQ000000 Damper MCQ67068001 COMPLEX LGC195.ANLDSV BK:Black -
6 MAZ000000 Bracket MAZ63469901 MOLD PC LGC195.ANLDSV BK:BLACK BLACK -
6 MCQ074200 Damper,Speaker MCQ66919801 CUTTING PSR LGC195.ANLDSV BK:Black -
6 MJN000000 Tape MJN68081201
CUTTING PET LGC195.ANLDSV BK:BLACK
BLACK -
5 ABM00
Can
Assembly,Shield
ABM73758801 LGC199.ANGRSV SV:SILVER SILVER -
- 138 -
6 MBK070300 Can,Shield MBK63235701
PRESS 35PNF1800 0.3 LGC199.ANGRSV
SE:SILVER BEIGE -
6 MEV000000 Insulator MEV64082201 CUTTING SILICON LGC195.ANLDSV BK:Black -
5 ADB00
Dome
Assembly,Metal
ADB73878501 LGC195.AGBRSV ZZ:Without Color -
5 MJN000000 Tape MJN67989401
COMPLEX LGC375.AINDDB ZZ:Without Color
Tape_LCD_Sub
5 MEV000000 Insulator MEV63758701
COMPLEX LGC375.AINDBK ZZ:Without Color
C375 INSULATOR, LCD CON
5 MDS000000 Gasket MDS63976401
CUTTING C1220T LGC195.ANLDSV BK:BLACK
BLACK -
3 GMEY00 Screw,Machine GMEY0013901
BH + 1.4mM 4mM MSWR FZB N - ARIMA
COMMUNICATIONS CORP.
2 ACQ02
Cover
Assembly,Battery
ACQ86128401 LGC195.ABRASV SV:Silver -
3 MCK004100 Cover,Battery MCK67140001 MOLD PC LGC195.ANLDSV BK:BLACK BLACK -
3 MEZ002100 Label,After Service MEZ64503701
COMPLEX LGE400F.AVIVBK ZZ:Without Color
E400F BRAZIL SAC LABEL
- 139 -
Note: This Chapterisused for reference, Part order is ordered
by SBOM standard on GCSC
4 EAA00
PIFA
Antenna,Multiple
EAA62787801
LS01-I-11090-A0 QUAD -5DB 5.0:1 IMA Type - LS
Mtron Ltd.
4 SJMY00 Motor,DC SJMY0007905
DM-YK407-6F2 3V 80mA 0A 11KRPM 0RPM 0SEC
0GF.CM 0OHM DONGYANG CHENGJI CO.
3 EBR00
PCB
Assembly,Main
EBR75396802 LGC199.ABRASV 1.0 Main
4 EBR071800
PCB Assembly
Main,SMT
5 SAD010000 Software,Mobile SAD33350401 Base V10a - BRAZIL MTK -
5 EBR071700
PCB Assembly
Main,SMT Top
EBR75396901 LGC199.ANGRSV 1.0 Main
6 EAX010000 PCB,Main EAX64641701 LGC195.AVIVSV 1.0 FR-4 SBL 6 1.0 Main
6 C1316
Inductor
Multilayer,Chip
ELCH0003847
LQG15HS1N8S02D 1.8NH 0.3NH - 300mA 0.1OHM
6GHZ 8 SHIELD NONE 1.0X0.5X0.5MM R/TP
MURATA MANUFACTURING CO.,LTD.
6
LD500
LD501
LED,Chip EDLH0013401
SWAA07 WHITE 3.0~3.2 20mA 1200~1400mcd
0.285~0.31 120mW 1005 R/TP 2P - SEOUL
SEMICONDUCTOR CO.,LTD
6 LD512 LED,Chip EDLH0015104
19-217/R6C-BM1N1LY/3T RED 1.7~2.3 25mA
18~36mcd 617.5~629.5nm 60mW 1608 R/TP 2P -
EVERLIGHT ELECTRONICS CO., LTD.
6 C269
Capacitor
Ceramic,Chip
ECCH0000701
C1005C0G1H1R2CT000F 1.2pF 0.25PF 50V NP0 -
55TO+125C 1005 R/TP - TDK CORPORATION
6 ANT202 Antenna,Helical SNMF0051501
SDBTPTR3015 SINGLE -5DB 50OHM 5
PARTRON COMPANY LIMITED
5 EBR071600
PCB Assembly
Main,SMT Bottom
EBR75372601 LGC199.ANGRSV 1.0 Main
12.2 ReplacementParts
<Main component>
- 140 -
6 ZD501 Diode,Zener EDNY0013602
EDZTE615.1B 4.98V 4.98TO5.2V 80OHM 150mW
EMD2 R/TP 2P 1 ROHM Semiconductor KOREA
CORPORATION
6 C287
Capacitor
Ceramic,Chip
ECCH0000129
MCH155A121JK 120pF 5% 50V NP0 -55TO+125C
1005 R/TP - ROHM Semiconductor KOREA
CORPORATION
6 C274
Capacitor
Ceramic,Chip
ECCH0000104
MCH155A030C 3pF 0.25PF 50V NP0 -55TO+125C
CORPORATION
6
C100
C102
C104
C105
C107
C109
C110
C112
C116
C117
C118
C119
C120
C122
C126
C130
C1319
C138
C207
C222
C227
C239
C244
C246
C247
C262
C295
C303
C310
C311
C315
C328
C330
C331
Capacitor
Ceramic,Chip
ECZH0001215
C1005X5R1A105KT000F 1uF 10% 10V X5R -
55TO+85C 1005 R/TP - TDK KOREA
COOPERATION
- 141 -
6
C340
C341
C402
C403
C408
C409
C419
C420
C438
C439
C501
C512
C514
C524
Capacitor
Ceramic,Chip
ECZH0001215
C1005X5R1A105KT000F 1uF 10% 10V X5R -
COOPERATION
6
C249
C250
Capacitor
Ceramic,Chip
ECCH0000127
MCH155A820J 82pF 5% 50V NP0 -55TO+125C
CORPORATION
6 X201 Crystal EXXY0025201
DSX321G-26M - 10PPM - - - SMD P/TP
DAISHINKU CORPORATION.
6 U100
IC,Digital
Baseband
Processor,GSM
EAN61828501
MT6236 1.8VTO2.7V 1W 382P - BGA R/TP 382P
MEDIATEK INC.
6
R119
R120
R121
R122
R123
R124
R125
R126
R127
R128
R129
R130
R131
R132
R242
Resistor,Chip ERHZ0000505
MCR01MZP5J681 680OHM 5% 1/16W 1005 R/TP -
ROHM.
6
C128
C214
C277
Capacitor
Ceramic,Chip
EAE62506501
CL05A475MP5NRNC 4.7uF 20% 10V X5R -
55TO+85C 1005 R/TP - SAMSUNG ELECTRO-
MECHANICS CO., LTD.
6 U303
IC,LDO Voltage
Regulator
EUSY0367001
RP101K332D RP101K332D
RP101K332D,DFN1612-4B ,4 ,R/TP ,300mA 3.3V
LDO RICOH COMPANY, LTD. RICOH COMPANY,
LTD.
- 142 -
6
C1317
C206
C229
C238
C240
C418
C509
Capacitor
Ceramic,Chip
ECCH0000110
MCH155A100D 10pF 0.5PF 50V NP0 -55TO+125C
CORPORATION
6 R503 Resistor,Chip ERHZ0000264
MCR01MZP5F3001 3KOHM 1% 1/16W 1005 R/TP
- ROHM.
6
C101
C134
C167
C243
C306
C316
C322
C412
C413
C414
C415
C416
Capacitor
Ceramic,Chip
ECCH0000198
CL05A225MQ5NSNC 2.2uF 20% 6.3V X5R -
55TO+85C 1005 R/TP . SAMSUNG ELECTRO-
MECHANICS CO., LTD.
6 FL204 Filter,Balun EAM62490001
LDM152G4505HC012 2400-2500 950mDB BPF
SMD R/TP 4P - MURATA MANUFACTURING
CO.,LTD.
6 C1316
Inductor
Multilayer,Chip
ELCH0003847
LQG15HS1N8S02D 1.8NH 0.3NH - 300mA 0.1OHM
6 R415 Resistor,Chip ERHY0000241
MCR01MZP5J102 1KOHM 5% 1/16W 1005 R/TP -
ROHM.
6 L212
Inductor
Multilayer,Chip
ELCH0003818
LQG15HS9N1J02D 9.1NH 5% - 300mA 0.26OHM
3.4GHZ 8 SHIELD NONE 1.0X0.5X0.5MM R/TP
6 L501
Inductor
Multilayer,Chip
ELCH0001556
LL1608-FSLR27J 270NH 5% - 150mA - - 3.5OHM
470MHZ 8 SHIELD NONE 1.6X0.8X0.8MM R/TP
TOKO, INC.
6 U500 IC,Charger EUSY0410801
RT9524 DFN,10,R/TP,DFN Cal Test Mode Single
Charger IC for Micro USB,IC,ChargerIC,Charger
RICHTEK TECHNOLOGY CORP.
- 143 -
6
C103
C106
C111
C121
C129
C166
C211
C221
C226
C228
C232
C245
C252
C254
C255
C256
C258
C261
C307
C308
C309
C317
C318
C319
C320
C401
C410
C411
C425
C427
C428
C432
C504
C513
Capacitor
Ceramic,Chip
ECZH0003103
GRM36X7R104K10PT 100nF 10% 10V X7R -
55TO+125C 1005 R/TP - MURATA
MANUFACTURING CO.,LTD.
6
R203
R281
MCR01MZP5J103 10KOHM 5% 1/16W 1005 R/TP
- ROHM.
MCR01MZP5F7501 7.5KOHM 1% 1/16W 1005
R/TP - ROHM.
MCR01MZP5F5102 51KOHM 1% 1/16W 1005
R/TP - ROHM.
6
C169
C170
C171
Capacitor
Ceramic,Chip
ECZH0004402
CL05F104ZO5NNNC 0.1uF -20TO+80% 16V Y5V -
MECHANICS CO., LTD.
- 144 -
6
C151
C154
C155
C156
C157
C275
C404
C405
C424
C426
C431
C435
C436
C508
Capacitor
Ceramic,Chip
ECCH0000120
MCH155A390J 39pF 5% 50V NP0 -55TO+125C
CORPORATION
6
C1332
C1333
C1336
C271
C279
C284
C285
C288
C289
Capacitor
Ceramic,Chip
ECZH0000813
C1005C0G1H101JT 100pF 5% 50V C0G -
COOPERATION
6
C1341
C225
C230
C231
C233
C266
Capacitor
Ceramic,Chip
ECCH0000113
MCH155A180J 18pF 5% 50V NP0 -55TO+125C
CORPORATION
6 C257
Capacitor
Ceramic,Chip
ECCH0000117
CL05C270JB5NNNC 27pF 5% 50V NP0 -
55TO+125C 1005 R/TP 0.5 SAMSUNG ELECTRO-
MECHANICS CO., LTD.
6
C172
C173
C204
C223
C272
C323
Capacitor
Ceramic,Chip
ECCH0000143
MCH155CN102KK 1nF 10% 50V X7R -55TO+125C
CORPORATION
6
C260
C429
C433
C434
C515
C516
Capacitor
Ceramic,Chip
ECCH0000122
MCH155A470JK 47pF 5% 50V NP0 -55TO+125C
CORPORATION
- 145 -
6
VA400
VA401
VA511
VA512
VA513
VA514
VA515
VA516
VA517
VA518
VA519
VA520
VA521
VA522
VA523
VA524
VA526
VA527
VA532
Varistor SEVY0005402
ICVS0505500FR 5.6V 0% 50F 1.0*0.5*0.55 - SMD
R/TP INNOCHIPS TECHNOLOGY
6 S300 Card Socket EAG63016001
473091265 Micro-SD 8P STRAIGHT SMD T/REEL -
MOLEX
6
R259
R260
R262
R264
R270
MCR01MZP5F1002 10KOHM 1% 1/16W 1005
R/TP - ROHM.
6 U200 IC,FM EAN61956201
SI4705-D50-GMR FM Rx with RDS, Internal
Antenna, I2S, 130nm QFN R/TP 21P SILICON
LABORATORIES
6
R263
R406
MCR01MZP5J105 1MOHM 5% 1/16W 1005 R/TP -
ROHM.
6
R300
R414
R420
R421
Resistor,Chip ERHY0003301
MCR01MZP5J101 100OHM 5% 1/16W 1005 R/TP -
ROHM.
6
FB101
FB103
FB300
FB301
FB302
FB402
FB403
Filter,Bead SFBH0006806
CIM05J601NC 600 ohm 1.0X0.5X0.5 25% 0.6 ohm
0.3A SMD R/TP 2P 0 SAMSUNG ELECTRO-
MECHANICS CO., LTD.
6 C269
Capacitor
Ceramic,Chip
ECCH0000701
55TO+125C 1005 R/TP - TDK CORPORATION
- 146 -
6
R104
R105
R108
R109
R222
R223
R224
R225
R417
R419
R422
MCR01MZP5J222 2.2KOHM 5% 1/16W 1005 R/TP
- ROHM.
6
VA301
VA302
VA303
VA304
VA305
VA306
VA307
VA308
VA309
VA310
VA311
VA312
VA407
VA408
VA409
ICVL0518050FR 18V 0% 5F 1.0*0.5*0.55 NONE
SMD R/TP INNOCHIPS TECHNOLOGY
6
C123
C264
Capacitor
Ceramic,Chip
ECZH0001002
C1005CH1H0R5BT000F 0.5pF 0.1PF 50V NP0 -
COOPERATION
6
C332
C333
C334
C336
C337
C400
Capacitor
Ceramic,Chip
ECCH0007804
CL05A225MP5NSNC 2.2uF 20% 10V X5R -
55TO+85C 1005 R/TP 0.5MM SAMSUNG
ELECTRO-MECHANICS CO., LTD.
6 U205
IC,RF
Transceiver,GSM
EAN62095601
AD6548BCPZ-RL3 GSM & EDGE RF Tranceiver
LFCSP-32 R/TP 32P MEDIATEK SINGAPORE
PTE.LTD.
6
R524
R531
MCR01MZP5F2403 240KOHM 1% 1/16W 1005
R/TP - ROHM.
6 C259
Capacitor
Ceramic,Chip
ECZH0001216
C1005X5R1A224KT000E 220nF 10% 10V X5R -
COOPERATION
6
R301
R302
Resistor,Chip ERHY0000254
- ROHM.
- 147 -
6
C234
C290
C293
C329
Capacitor
Ceramic,Chip
ECZH0000830
C1005C0G1H330JT000F 33pF 5% 50V NP0 -
COOPERATION
6
R267
R268
R289
R427
R428
MCR01MZSJ000 0OHM 5% 1/16W 1005 R/TP -
ROHM.
- ROHM.
6
L401
L402
Inductor
Multilayer,Chip
ELCH0005009
HK1005 R10J 100NH 5% - 150mA 1.5OHM
600MHZ 8 SHIELD NONE 1.0X0.5X0.5MM R/TP
TAIYO YUDEN CO.,LTD
6
FB407
FB408
FB409
FB410
Filter,Bead SFBH0008105
BLM15BD182SN1D 1800 ohm 1.0X0.5X0.5 25%
1.4 ohm 0.1A SMD R/TP 2P 0 MURATA
6
R205
R212
R230
R303
R311
R403
R404
R504
- ROHM.
MCR01MZP5J471 470OHM 5% 1/16W 1005 R/TP -
ROHM.
6
C502
C523
Capacitor
Ceramic,Chip
EAE62505701
CL10A105KB8NNNC 1uF 10% 50V X5R -
55TO+85C 1608 R/TP 0.9T max. SAMSUNG
6
R204
R408
R432
R433
Wire Pad,Short SAFP0000501 LG-VS760 VRZ
6
R282
R284
MCR01MZP5J181 180OHM 5% 1/16W 1005 R/TP -
ROHM.
6
FL300
FL301
FL302
Filter,EMI/Power SFEY0012501
ICVE10054E250R201FR ESD/EMI 0HZ 25pF 0H
SMD R/TP INNOCHIPS TECHNOLOGY
MCR01MZP5J240 24OHM 5% 1/16W 1005 R/TP -
ROHM.
- 148 -
6 C430
Capacito
Ceramic,Chip
ECCH0007803
CL10A106MP8NNNC 10uF 20% 10V X5R -
6
C1338
C248
C251
Capacitor
Ceramic,Chip
ECCH0009504
MCH032A180JK 18pF 5% 25V NP0 -55TO+125C
0603 R/TP - ROHM.
6
J300
J301
Card Socket ENSY0024302
KP09NC-6S-2.54SF SIM 6P ANGLE SMD R/TP
Stroke : 11.25mm HIROSE KOREA CO.,LTD
6
R252
R255
MCR01MZP5F1003 100KOHM 1% 1/16W 1005
R/TP - ROHM.
6 C511
Capacitor,TA,Confo
rmal
ECTH0002703
TCTAL1A107M8R-V2 100uF 20% 10V 50UA -
55TO+125C 2.5OHM 3.2X1.6X1.1MM NONE SMD
R/TP 1.2T max. ROHM CO.,LTD.
6
R101
R228
R310
R525
ROHM.
6 EBP00 Camera Module EBP61321701
C2FD-H367A C2FD-H367A 2M hynix 1/5 LG
INNOTEK CO., LTD
6 X100 Crystal EXXY0026801
NX3215SA 32.768KHZ 20PPM 0F NONE SMD
R/TP NIHON DEMPA KOGYO CO.,LTD.
MCR01MZP5F2402 24KOHM 1% 1/16W 1005
R/TP - ROHM.
6
VA404
VA405
VA410
EVLC5S02100 5.5V 0% 100F 1.0*0.5*0.6 UL SMD
R/TP AMOTECH CO., LTD.
6 CN300
Connector,FFC/FP
C/PIC
ENQY0014201
04-6293-627-005-829+ 27P 0.30MM FPC
STRAIGHT BOTH SMD R/TP LOCKING -
KYOCERA ELCO KOREA SALES CO.,LTD.
6 SW201 Connector,RF EAG63012601
RF-800N 0.40MM STRAIGHT SOCKET SMD R/TP
AU 50OHM 500mDB DONG EUN
6 L203
Inductor
Multilayer,Chip
ELCH0001052
1005GC2T18NJLF 18NH 5% - 200mA 0.65OHM
PILKOR ELECTRONICS LTD.
6
L100
L101
Inductor,Wire
Wound,Chip
ELCP0009409
LQM2HPN2R2MG0L 2.2UH 20% - 600mA 0.6 1.3
0.08OHM - - SHIELD 2.5X2X1MM NONE R/TP
- 149 -
6 C299
Capacitor
Ceramic,Chip
ECCH0000183
GRM1555C1H1R8C 1.8pF 0.25PF 50V NP0 -
6
C235
C236
Capacitor
Ceramic,Chip
ECCH0001001
COOPERATION
6 C282
Capacitor
Ceramic,Chip
EAE62542701
CL21A226MPCLRNC 22uF 20% 10V X5R -
55TO+85C 2012 R/TP 0.95T max. SAMSUNG
6
L209
L211
Inductor
Multilayer,Chip
ELCH0001054
1005GC2T5N6SLF 5.6NH 0.3NH - 300mA
0.27OHM 3.2GHZ 8 SHIELD NONE
1.0X0.5X0.5MM R/TP PILKOR ELECTRONICS
LTD.
6 U206 IC,WiFi EAN62306101
MT5931A WiFi Single, 2.4GHz 11b/g/n,
5.1x5.3x1.2, 0.5pitch TFBGA R/TP 84P MEDIATEK
INC.
MCR01MZP5F4702 47KOHM 1% 1/16W 1005
R/TP - ROHM.
6 C270
Capacitor
Ceramic,Chip
ECCH0017601
CL05A475MQ5NRNC 4.7uF 20% 6.3V X5R -
6
C159
C160
C283
C286
C291
C503
Capacitor
Ceramic,Chip
ECCH0000115
MCH155A220JK 22pF 5% 50V NP0 -55TO+125C
CORPORATION
MCR01MZP5F3303 330KOHM 1% 1/16W 1005
R/TP - ROHM.
6 C174
Capacitor
Ceramic,Chip
ECCH0007802
CL10A475KP8NNNC 4.7uF 10% 10V X5R -
MECHANICS CO., LTD.
6
ZD502
ZD503
ZD504
Diode,TVS EDTY0010501
RCLAMP1521P.TCT 15V 16.7 28V 4A 0W
SLP1006P2 R/TP 2P 1 SEMTECH
CORPORATION
6
C200
L228
L229
Inductor,Multilayer,
Chip
ELCH0004709
1005GC2T3N3SLF 3.3NH 0.3NH - 300mA
LTD.
6 U401 IC,Comparator EUSY0407701
LMV331 2.7~5.5V - COMPARATOR SC70 R/TP 5P
- TEXAS INSTRUMENTS KOREA LTD,
HONGKONG BRANCH.
- 150 -
6
R400
R401
MCR01MZP5J200 20OHM 5% 1/16W 1005 R/TP -
ROHM.
6 C280
Capacitor
Ceramic,Chip
ECCH0000107
MCH155A060DK 6pF 0.5PF 50V NP0 -55TO+125C
CORPORATION
6 L230
Inductor
Multilayer,Chip
ELCH0004105
LLV0603-FH1N2S 1.2NH 0.3NH - 300mA - -
0.14OHM 13GHZ 4 SHIELD NONE 0.6X0.3X0.3MM
R/TP TOKO, INC.
6
C267
C276
Capacitor
Ceramic,Chip
ECZH0000846
COOPERATION
6 FL205
Filter
Separator,Spdt
EAM62492201
SKY13348-374LF Max 1.25 Min 15 38 -
SKYWORKS SOLUTIONS INC.
6 FL200 Filter,Saw,Dual SFSB0002305
B9512 881.5MHz, 942.5MHz 1.8*1.4*0.68 SMD
R/TP 10P EPCOS PTE LTD.
6 C1322
Capacitor
Ceramic,Chip
ECZH0000839
COOPERATION
6 C125
Capacitor
Ceramic,Chip
ECZH0000806
C1005C0G1H050CT000F 5pF 0.25PF 50V NP0 -
COOPERATION
RC0603JR-074R7L 4.7OHM 5% 1/10W 1608 R/TP
- YAGEO CORPORATION
6 FL203 Filter,Ceramic EAM62250401
LFB212G45CG7D227 BPF 2.45KHZ 100Hz SMD
R/TP 3P MURATA MANUFACTURING CO.,LTD.
6
R240
R241
ROHM.
6 L232
Inductor
Multilayer,Chip
ELCH0004111
LLV0603-FH3N9S 3.9NH 0.3NH - 250mA - -
R/TP TOKO, INC.
MCR01MZP5F1502 15KOHM 1% 1/16W 1005
R/TP - ROHM.
- ROHM.
- 151 -
6 U215 Module,Tx Module EAT61473901
RF7180 36DBM,36DBM,33DBM,33DBM 0DB
42%,40%,36%,37% 0A 0A 0DB 0DBM 0DBM 23P
6.63x5.24x0.975MM RF7171 low cost ver, GPRS
QUAD TX DUAL RX MODULE RF MICRO
DEVICES INC
6 CN502
Connector
Terminal Block
EAG62832501
KQ03LV2-3R 3P 3.00MM ANGLE SMD T/REEL -
HIROSE KOREA CO.,LTD
6
C142
C144
C423
Capacitor
Ceramic,Chip
ECCH0005604
GRM188R60J106M 10000000
pF,6.3V,M,X5R,TC,1608,R/TP,0.8 mm MURATA
6 IC400
IC,Audio Sub
System
EUSY0403901
WM9093ECS/R 1.71~5.5V 0W WLCSP R/TP 20P -
WOLFSON MICROELECTRONICS PLC
6 L500
Inductor
Multilayer,Chip
ELCH0001413
LL1005-FHL22NJ 22NH 5% - 300mA 0.7OHM
TOKO, INC.
MCR01MZP5F1301 1.3KOHM 1% 1/16W 1005
R/TP - ROHM.
6
C338
C339
EVL5M02200 5.5V 0% 480F 1.0*0.5*0.6 NONE
SMD R/TP AMOTECH CO., LTD.
6 C263
Inductor
Multilayer,Chip
ELCH0004704
1005GC2T4N7SLF 4.7NH 0.3NH - 300mA
LTD.
6
R312
R405
MCR01MZP5J100 10OHM 5% 1/16W 1005 R/TP -
ROHM.
6
ZD400
ZD401
Diode,TVS EDTY0009401
VMNZ6.8CST2R 5.78V 0 10V 0A 100mW VMN2
R/TP 2P 1 ROHM.
MCR01MZP5J300 30OHM 5% 1/16W 1005 R/TP -
ROHM.
6 U302 IC,Charge Pump EUSY0344402
RT9367C QFN,20,R/TP,4CH,2LDO,3X3,IC,Sub
PMICIC,Sub PMIC RICHTEK TECHNOLOGY
CORP.
- ROHM.
6 X202 Oscillator,TCXO EXST0002401
1XTW26000FAA 26MHZ 1.5PPM 2.8V
0.0x0.0x0.0MM NONE SMD R/TP DAISHINKU
CORPORATION.
- 152 -
6 L213
Inductor
Multilayer,Chip
ELCH0003820
LQG15HS3N0S02D 3NH 0.3NH - 300mA 0.17OHM
6 C265
Inductor
Multilayer,Chip
ELCH0004705
1005GC2T8N2JLF 8.2NH 5% - 250mA 0.37OHM
MCR01MZP5F49R9 49.9OHM 1% 1/16W 1005
R/TP - ROHM.
6
R285
R287
MCR01MZP5F2200 220OHM 1% 1/16W 1005 R/TP
- ROHM.
6
L206
L220
Inductor
Multilayer,Chip
ELCH0003839
LQG15HS22NJ02D 22NH 5% - 300mA 0.42OHM
6 U207
Coupler,RF Bi-
Directional
SCDY0004401
LDC15874M19Q-360 LDC15874M19Q-360
LDC15874M19Q-360,19.4 dB,0.25 dB,32
dB,1.0*0.5*0.4 ,SMD ,Pb-free_DCN+JCDMA
MURATA MANUFACTURING CO.,LTD. MURATA
6 J400 Jack,Phone ENJE0008001
JAM3333-F32-7F 1P 4P ANGLE R/TP 4mM BLACK
6P - HON HAI PRECISION INDUSTRY CO.,LTD.
6 U300 IC,MCP,NAND EAN61927501
H9DA2GH1GHMMMR-46M NAND/2G SDRAM/1G
1.7VTO1.95V 8.0x9.0x0.9 TR 130P NAND+DDR
SDRAM FBGA 2Gb NAND(LB/128Mx16)+1Gb
DRAM(DDR/200MHz/16Mx4x16) HYNIX
SEMICONDUCTOR INC.
MCR01MZP5F5101 5.1KOHM 1% 1/16W 1005
R/TP - ROHM.
6 FL201 Filter,Saw,Dual SFSB0002306
B9513 1805M~1880M, 1930M~1990M 1.8*1.4*0.68
SMD R/TP 10P EPCOS PTE LTD.
6 L400
Inductor
Multilayer,Chip
ELCH0001444
0402AF-101XJEW 100NH 5% - 900mA 0.16OHM
1.4GHZ 8 NON SHIELD NONE 1.12X0.66X0.66MM
R/TP COILCRAFT SINGAPORE PTE LTD.
6 C1321
Capacitor
Ceramic,Chip
ECZH0000802
C1005C0G1H010CT 1pF 0.25PF 50V NP0 -
COOPERATION
- 153 -
6 EAB00
Microphone
Condenser
EAB62291401
SOB410S44VRC 44DB 2.2KOHM OMNI 1.5TO4V
4pi 1.2t SMD BSE CO., LTD.
6 CN500 Connector,I/O EAG63090001
04-5161-005-100-868 7P 0.90MM ANGLE
RECEPTACLE DIP R/TP Normal New IO Connector
KYOCERA ELCO KOREA SALES CO.,LTD.
MCR01MZP5F51R0 51OHM 1% 1/16W 1005 R/TP
- ROHM.
6 R118 Wire Pad,Open SAFO0000501
AX3100 ATL
SV_SHIPBACK,MAIN,A,0OHM_1005_DNI
6
R429
R430
MCR01MZP5J1R0 1OHM 5% 1/16W 1005 R/TP -
ROHM.
6 L102
Inductor
Multilayer,Chip
ELCH0001048
1005GC2T10NJLF 10NH 5% - 250mA 0.42OHM
6 FB100 Filter,Bead EAM62071001
BLM18KG221SN1D 220 ohm 1.6X0.8X0.8 25%
6 FB200 Filter,Bead SFBH0007101
BLM15AG121SN1D 120 ohm 1.0X0.5X0.5 25%
6 L231
Inductor
Multilayer,Chip
ELCH0004113
LLV0603-FH5N6S 5.6NH 0.3NH - 220mA - -
R/TP TOKO, INC.
6 Q400 FET EBK61952101
KTJ6131V P-CHANNEL MOSFET -30V +-20 -0.05A
40OHM 100mW VSM R/TP 3P KEC
CORPORAITION
6 L225
Inductor,Wire
Wound,Chip
ELCP0008017
CIG21L2R2MNE 2.2UH 20% - 500mA 0.5 0.95
0.16OHM - - SHIELD 2X1.25X1MM NONE R/TP
SAMSUNG ELECTRO-MECHANICS CO., LTD.
RC1005J221CS 220OHM 5% 1/16W 1005 R/TP -
SAMSUNG ELECTRO-MECHANICS CO., LTD.
6 C510
Capacitor
Ceramic,Chip
ECCH0000185
GRM1555C1H5R6C 5.6pF 0.25PF 50V NP0 -
4 EBR071500
PCB Assembly
Main,Insert
- 154 -
5 EAB01
Speaker
Dual Mode
EAB62628701
BRS-181027SL08-P Nd-Fe-B, N42H 700mW 8OHM
92DB 850HZ 18x10x3T wire 10mm WIRE BUJEON
ELECTRONICS CO., LTD
5 EAJ00 LCD Module EAJ61929201
TM023KDH60 QVGA 2.3INCH 320X240 400CD
COLOR 50% 4/3 450 60Hz Inverter N - - -
Shanghai Tianma Micro-Electronics Co., Ltd.
5 RAA050100 Resin,PC BRAH0001301 UF2040 or 3075BHF . . NONE
3 EAN060000
Memory Card
Assembly
EAN62531201 -
4 EAN011400
IC,Memory
Card,MICRO SD
EAN62416001
SD-C02G2CYB(PYBKP) 2GBYTE 2.7VTO3.6V
MICRO SD CARD 15.0x11.0x1.0MM TR 8P 2GB
MicroSD Card (24nm 16Gb MLC x 1) TOSHIBA
ELECTRONICS KOREA CORPORATION
- 155 -
Note: This Chapterisused for reference,Part order is ordered
by SBOM standard onGCSC
1 AGF000000 Package Assembly AGF76519812
LGC199.ABRABK ZZ:Without Color LG-C199(Q3n)
BRA, Brazil Package
1 AAD000000 Addition Assembly AAD86055621 LGC199.ABRASV ZY:Color Unfixed -
2 EAC00
Rechargeable
Battery
Lithium Ion
EAC61700101
LGIP-531A-WWU-LGC PRISMATIC 3.7V 950mAH
190mAH 34x50x5.5 34.15x53.55x5.7 BLACK Bar
Type 553450, 950mAh, Bar Type, WW, Up LG
Chem,LTD.
2 EAY060000 Adapters EAY62410401
STA-U35BR2 100-240V 4.8V 400mA 50-60Hz CB,
Anatel WALL 2P USB - SUNLIN ELECTRONICS
CO.,LTD
2 EBX000000
Accessory
Data Cable
SGDY0018001
LG0029 LG0029 Micro USB, 0.8M ningbo broad
telecommunication co.,ltd
2 EAB010200 Earphone,Stereo SGEY0003219
EMB-LGE001STKE ,BLACK,4 POLE PLUG,3.5
4,Earphone,Stereo CRESYN CO.,LTD
2 AFN053800
Manual Assembly
Operation
AFN75792902
LGC199.ABRASV ZZ:Without Color LGC199
Manual Assy for BRA
3 MFL053800 Manual,Operation MFL67477807
PRINTING LGC199.ABRASV ZZ:Without Color
LGC199 Manual for BRA
12.3 Accessory

En LG-C199 SVC Eng 120502 PDF

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En LG-C199 SVC Eng 120502 PDF

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Internal Use Only

3.10 LCD Interface

3.11 Battery Charger Interface

Figure 3.15.1 Key Backlight Block

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