Current source design for electrical impedance tomography

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INSTITUTE OF PHYSICS PUBLISHING PHYSIOLOGICAL MEASUREMENT
Physiol. Meas. 24 (2003) 509516 PII: S0967-3334(03)54203-4
Current source design for electrical impedance
tomography
Alexander S Ross
1
, G J Saulnier
2
, J C Newell
1
and D Isaacson
3
1
Department of Biomedical Engineering, Rensselaer Polytechnic Institute, Troy,
NY 12180-3590, USA
2
Department of Electrical, Computer & Systems Engineering, Rensselaer Polytechnic Institute,
Troy, NY 12180-3590, USA
3
Department of Mathematical Sciences, Rensselaer Polytechnic Institute, Troy,
NY 12180-3590, USA
E-mail: rossa@rpi.edu
Received 30 September 2002, in nal form 20 February 2003
Published 30 April 2003
Online at stacks.iop.org/PM/24/509
Abstract
Questions regarding the feasibility of using electrical impedance tomography
(EIT) to detect breast cancer may be answered by building a sufciently precise
multiple frequency EIT instrument. Current sources are desirable for this
application, yet no current source designs have been reported that have the
required precision at the multiple frequencies needed. We have designed an
EIT current source using an enhanced Howland topology in parallel with a
generalized impedance converter (GIC). This combination allows for nearly
independent adjustment of output resistance and output capacitance, resulting
in simulated output impedances in excess of 2 G between 100 Hz and
1 MHz. In this paper, the theoretical operation of this current source is
explained, and experimental results demonstrate the feasibility of creating a
high precision, multiple frequency, capacitance compensated current source
for EIT applications.
Keywords: electrical impedance imaging, electrical impedance tomography,
current source, generalized impedance converter
1. Introduction
In electrical impedance tomography (EIT), electrical currents or voltages are applied to the
surface of a volume, an electromagnetic eld is established inside the volume and the resulting
voltages or currents that appear on the surface of the volume are measured. The determination
of the internal impedance distribution is mathematically ill-posed in that a large change in
the unknown impedance distribution may result in a small change in the measured data. To
address this difculty, one needs to use an impedance imaging instrument having the maximum
0967-3334/03/020509+08$30.00 2003 IOP Publishing Ltd Printed in the UK 509
510 A S Ross et al
precision available. One ultimate limit on the precision of such an instrument is the precision
of the sources used for signal generation.
Isaacson (1986) has shown that noise due to spatial variation in applied currents or voltages
is reduced if currents are applied and voltages are measured rather than if voltages are applied
and currents are measured. Realizable current sources are limited in their precision by their
output impedance, a parallel combination of output resistance and capacitance that shunts
output current away from the load. Output impedance compensation networks consisting of
negative impedances may be used to increase the maximum achievable output impedance by
orders of magnitude.
2. Current source design requirements
Creating a high precision current source requires that the output impedance be high compared
to the load that the source will drive. Additional considerations include stability, voltage
compliance, drive current capability and sensitivity with respect to the various circuit
components. One goal among researchers in this eld is to use EIT for imaging a
conductivity distribution at multiple frequencies, either simultaneously or sequentially. This
means designing a current source for the previously mentioned parameters that maintains its
performance at a number of discrete frequencies or across a frequency band.
Of the existing designs, the highest reported output impedance is associated with the
Howland type current source used in the RPI ACT 3 instrument (Cook 1992, Cook et al
1994). This single frequency source operates at 28.8 kHz and achieves a 50 M output
impedance using a negative impedance converter (NIC) to cancel the effects of stray and
output capacitance, but exhibits instability at higher frequencies and in the presence of large
(>100 pF) load capacitances. No current source has been reported to maintain stable operation
over a broad range of frequencies with greater than 12 bits of precision.
The present design produces a waveform with at least 19 bits of precision in the presence
of a 10 000 + j4000 load at discrete frequencies from 100 Hz to 1 MHz. Assuming that this
load may vary by 5% across an array of electrodes, 19 bits of precision is equivalent to an
output impedance of 524 M. The current source must remain stable over a wide range of
load impedances. This complex load value is an approximation to the maximum impedance
of healthy or malignant breast tissue based on available data from the literature and from our
own studies.
3. Enhanced Howland topology
This paper reports on a current source for EIT that has been designed and built using
an enhanced Howland topology (Franco 1998) in parallel with a generalized impedance
converter (GIC) (Franco 1998, Van Valkenburg 1982, Sedra and Brackett 1978). This
combination allows for nearly independent adjustment of output resistance and output
capacitance, resulting in simulated output impedances in excess of 2 G from 100 Hz to
1 MHz. Stability, sensitivity and voltage compliance design goals have been achieved at
discrete frequencies of operation from 100 Hz to 1 MHz.
The enhanced Howland topology current source uses a single operational amplier with
both negative and positive feedback (gure 1). Advantages of this topology over other designs
include its small number of components, a single active device and the ability to adjust output
resistance. The transconductance of the source is a function of three resistors:
I
load
V
in
=

R
2
R
1
R
4b

.
Current source design for electrical impedance tomography 511
Figure 1. Enhanced Howland circuit.
The expression for output resistance of this circuit is calculated by groundingthe input terminal
and connecting a Theveninized voltage source to the output:
R
out
=
R
1
R
4b
(R
3
+ R
4a
)
R
2
R
3
R
1
(R
4a
+ R
4b
)
.
The value of resistor R
3
is present in the output resistance expression, but not in the
transconductance equation. Substitution of a potentiometer for resistor R
3
allows for
adjustment of output resistance without affecting load current.
While the presence of both positive and negative feedback allows for simple adjustment
of output resistance, these two feedback paths may cause the enhanced Howland circuit to
oscillate when driving large capacitive loads at high frequencies. To stabilize the circuit, a
10 pF capacitor may be added in parallel with the negative feedback element (Cook 1992,
Cook et al 1994). The need for this capacitor may be determined after construction and testing.
It is recommended that the footprint for such a capacitor be included in the printed circuit
board design.
Voltage compliance of the op-amp must be maintained in order for the current source
output to remain linear. For this topology, the voltage compliance is calculated with respect
to the op-amp output:
|V
saturation
|

R
3
R
3
+ R
4a

R
1
+ R
2
R
1

V
load

R
2
R
1
V
in

where V
saturation
is the maximumop-amp output voltage for linear operation, V
load
is the voltage
appearing at the load and V
in
is the input voltage. Since voltage compliance is a function of
the resistive elements in the enhanced Howland circuit, the input voltage and the load voltage,
either the input voltage or the passive elements may be modied to ensure linear operation for
a given load.
In the real implementationof this circuit, the presence of output capacitance acts in parallel
with the nite output resistance to limit the total output impedance. Although output resistance
is adjustable, output and stray capacitance are still present, degrading output impedance and
hence the circuit performance.
4. Generalized impedance converter
The generalized impedance converter (GIC) is a textbook circuit normally used to synthesize
lter transfer functions (Franco 1998, Van Valkenburg 1982, Sedra and Brackett 1978). There
512 A S Ross et al
Figure 2. Generalized impedance converter topology for inductance synthesis.
are several topologies of this circuit, and here it is implemented to synthesize an inductance.
This particular circuit was selected due to its excellent stability, its ability to synthesize a high-
Qinductance and its superior performance at high frequencies (Sedra and Brackett 1978). The
GIC contains two operational ampliers and a chain of ve passive elements, whose types
determine the impedance of the synthesized element. An inductance is produced using the
topology given in gure 2 with a value given by
L =
R
1
R
3
R
5
C
4
R
2
.
A parallel RLC circuit is representative of the parallel combination of the GIC in parallel with
the output of the enhanced Howland circuit. In this equivalent RLC circuit, the resistance and
capacitance are associated with the output of the enhanced Howland circuit, and the inductor
is synthesized by the GIC. In an ideal compensation scheme, the effects of the capacitance are
completely cancelled. This occurs when the imaginary part of the parallel impedance is set to
zero. The imaginary part of the parallel combination is given by
Im(Z
EQ
) =
RL(R
2
RLC)
(R
2
RLC)
2
+ (L)
2
where is the angular frequency. Letting the imaginary part equal zero, we nd that the
cancellation equation is
=
1

LC
the condition for LC resonance. In practice, non-idealities of the op-amps in the GIC result in
a negative resistance appearing in parallel with the synthesized inductance, and the equations
for compensation vary from those already given.
For proper multiple frequency operation, many of the elements in the passive element
chain must be switchable and/or adjustable. The inductance necessary for capacitance
cancellation varies over orders of magnitude with the desired range of excitation frequencies.
The methods used for element adjustment and switching must be chosen to minimize the
impact of capacitances to ground on the input pins to the GIC op-amps.
Current source design for electrical impedance tomography 513
Figure 3. Block diagram of current source with GIC and stray capacitance present.
5. Complete current source
Stray capacitance in the circuit degrades the overall output impedance by shunting current away
from the load. As illustrated in gure 3, the total current source behaviour is dened by the
parallel combination of the enhanced Howland circuit with output resistance and capacitance,
the GIC including its synthesized negative resistance, and stray capacitance.
For proper calibration, adjustment must be made to the output resistance and capacitance of
the complete system, rather than to the enhanced Howland circuit or the GIC individually. The
maximumoutput resistance condition is achieved when the value of the parallel combination of
the Howland source output resistance and the synthesized GIC negative resistance approaches
innity:
R
EQ
=
R
S
(R
G
)
R
S
+ (R
G
)
.
The ideal capacitance condition is given by a rearrangement of the resonance condition:
L
G
=
1

2
(C
S
+ C
X
)
in which the output and stray capacitances are cancelled by proper adjustment of the
synthesized inductance in the GIC.
In practice, adjustment of the GIC and of resistor R
3
in the enhanced Howland circuit
is performed using digital potentiometers. The resolution of these digipots is the limiting
factor in determining how precisely either parameter is adjusted. Adjustment of R
EQ
and L
G
is performed iteratively such that R
EQ
is adjusted until the maximum value is achieved, then
L
G
is adjusted until the equivalent capacitance is at a minimum. This process is repeated until
the values no longer change.
6. Simulation setup
Schematic entry and simulation of the complete current source was performed using OrCad
Capture CIS 9.2.3 and OrCad PSpice A/D 9.2.3. The active element, the Analog Devices
AD8610, was simulated using Analog Devices enhanced Spice model
4
. Stray capacitances
were added as individual capacitors to ground at various locations in the schematic. Simulation
was performed before and after the addition of the GIC to the enhanced Howland circuit. This
allowed for evaluation of the benets associated with capacitance compensation.
4
The datasheet for the AD8610 low noise precision operational amplier is available at http://www.analog.com/
UploadedFiles/Datasheets/734705833AD8610 20 c.pdf.
514 A S Ross et al
Figure 4. Simulated current source output resistance, capacitance and magnitude of output
impedance without capacitance compensation at 1 MHz.
Output impedance was measured by grounding the current source input terminal and
attaching a Theveninized voltage source in place of a load. The complex output voltage
was divided by the complex output current to produce a complex output impedance value.
Sweeping the Theveninizedsource from100 Hz to 1 MHz produced a plot of output impedance
versus frequency.
Without the GIC connected, resistor R
3
in the enhanced Howland circuit was adjusted, the
output impedance was calculated and the output resistance was determined from this quantity
assuming a parallel RC model of the output resistance and capacitance. R
3
was adjusted in
steps of 0.01 , the same precision as in the digital potentiometer used in the real system,
until a maximum value of R
out
was found (results in gure 4).
To examine the benets of capacitance cancellation, the GIC was connected in parallel
with the output of the enhanced Howland circuit, and stray capacitance was added. The
output resistance of the enhanced Howland circuit was adjusted as previously described at
a single excitation frequency. Next, the total capacitance was calculated given the output
impedance and excitation frequency and the required inductance for capacitance cancellation
was calculated. These GIC element values were chosen to produce this inductance, the new
output capacitance was calculated, and GIC elements were adjusted to minimize this value.
The output resistance and output capacitance were iteratively adjusted in this manner until
both the output resistance and capacitance values no longer changed, or until the nite digital
potentiometer precision prevented further adjustment (results in gure 5).
Stability of the enhanced Howland circuit and then of the total current source was examined
after each iteration at 100 Hz, 1 kHz, 28.8 kHz, 100 kHz and 1 MHz. The Theveninizedvoltage
source at the output was removed, a 10 000 + j4000 load was attached to the output and a
step response was applied to the input. The time domain response of the output was examined
to conrm stability.
Current source design for electrical impedance tomography 515
Figure 5. Simulated current source output resistance, capacitance and magnitude of output
impedance with GIC capacitance compensation at 1 MHz.
7. Experimental setup
These circuits were constructed using Analog Devices AD8610 operational ampliers in
surface mount packages on a six-layer printed circuit board. A current-to-voltage converter
with a selectable series input resistor was connected to the output of the current source and
GIC circuit and used to measure the output impedance using the droop method (Cook 1992,
Cook et al 1994). For an ideal current source, the measured current is independent of the load
impedance; for a real current source measuring the change in current for a known change in
load impedance allows the output impedance to be calculated. The output impedance was
measured while digital potentiometers in the current source were adjusted to maximize output
resistance. The output impedance was then measured while digital potentiometers in the GIC
were adjusted to minimize output capacitance. This process was repeated at multiple operating
frequencies.
8. Results
The simulated data in gure 4 illustrate how, at 1 MHz, output capacitance will limit the
maximum output impedance even in the presence of a very high, tuned output resistance.
Output impedance was increased in simulation from 9.4 kto over 2 G at 1 MHz by tuning
capacitance in addition to output resistance (gure 5). Tuning at lower frequencies resulted in
even higher output impedances.
Experimental testing yielded output impedances of 143 M at 1 kHz, 67 M at 20 kHz
and 37 M at 100 kHz. The current source and GIC remained stable over the full frequency
range before, during and after tuning during both simulation and experimental testing.
9. Discussion
A new multiple frequency current source has been simulated and experimentally tested. An
enhanced Howland topology is used with a generalized impedance converter for both output
516 A S Ross et al
resistance and output capacitance trimming for minimizing the effects of output and stray
capacitance at multiple frequencies. The results in gure 4 show an output capacitance of
16.76 pF independent of output resistance adjustment. Furthermore, the output resistance
and output impedance peaks reach a maximum at the same optimal digital potentiometer
adjustment setting (optimal). The presence of output capacitance limits the maximum output
impedance to less than 10 k, even with an output resistance over 2 G. As shown in gure 5,
the addition of a GIC for capacitance cancellation produces an output resistance of over 85 G
and an output impedance over 2 G. The increase in output impedance is due to a reduction
of output capacitance to 1 fF. The peaks of output resistance and output impedance do not
occur at the same adjustment point, since the nite precision of the digital potentiometer limits
this adjustment capability.
PSpice simulation has demonstrated a current source output impedance sufcient for
greater than 19 bit operation from 100 Hz to 1 MHz while driving loads in excess of
10 000 + j4000 . The current source has remained stable at all frequencies of operation,
although long settling times associated with a tuned RLC compensation circuit may limit the
speed at which currents may be changed. For frequencies less than 1 MHz, tuning of output
resistance and capacitance was accomplished in a single iteration, and the output resistance
and impedance peaks converged. At 1 MHz, the nite adjustment precision of the digital
potentiometers prevented the output resistance and impedance peaks from converging. These
results demonstrate the feasibility of creating a high precision, multiple frequency, capacitance
compensated current source.
We have collected limited data indicating that the algorithm used for tuning the Howland
source functions as designed. Given the experimental validation of our theoretical premise,
we are now designing a second version of these circuits with integrated voltmeter hardware.
The measurement of output impedance values was limited by our ability to measure the
voltages. We expect to measure higher output impedance values over the full range of
operating frequencies with this new hardware.
Acknowledgment
This study was supported in part by CenSSIS, the Center for Subsurface Sensing and Imaging
Systems, under the Engineering Research Center Programof the National Science Foundation
(Award number EEC-9986821).
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