Вы находитесь на странице: 1из 2

7/16/2014 oscilloscope - 8284 Clock Generator Output wave - Electrical Engineering Stack Exchange

http://electronics.stackexchange.com/questions/41787/8284-clock-generator-output-wave 1/2


sign up log in tour help
Take the 2-minute tour
Electrical Engineering Stack Exchange is a question and answer site for electronics and electrical
engineering professionals, students, and enthusiasts. It's 100% free, no registration required.
8284 Clock Generator Output wave
I am attempting to build my very own 8086 computer. (I know, awesome right?) But not to confuse you, this post focuses only on the
8284A. We have started to cover the Intel 8086 chip in my microprocessor class but unfortunately the class only covers textbook and
Assembly stuff, not the actual hands on hardware.
I thought the systems clock would be a good place to start. After all without a good clock the processor is wasted. I purchased a
handful of 8284As and a 15MHz crystal to use with the . I have put together my test circuit and it is shown below. x1 and x2 outputs
The wave output from the CLK pin looks like this:
Based on the datasheet for this chip the clk output is suppose to be 5Mhz with a 33% duty cycle. The output is extremely close to
7/16/2014 oscilloscope - 8284 Clock Generator Output wave - Electrical Engineering Stack Exchange
http://electronics.stackexchange.com/questions/41787/8284-clock-generator-output-wave 2/2
5Mhz. The time division knob is set to .1us. The voltage is also consistent. However, it looks like the capacitors are discharging too
soon. It's no where close to a square wave! My guess is bigger capacitors on the x1 pin. Any suggestions?
As always, thanks for your help.
oscilloscope clock microprocessor
edited Sep 20 '1 2 at 1 7 :42 asked Sep 20 '1 2 at 1 6:59
atomSmasher
422 3 1 4
The datasheet link say s "Your require pages is cannot open by blow" :-) stev env h Sep 20 '1 2 at 1 7 :1 9


@stev env h Hahaha that's quite the error msg! I added a new link. Thanks for the heads up.
atomSmasher Sep 20 '1 2 at 1 7 :22
What's with the three caps at the left? Are they 1 nF or 1 0 pF?? stev env h Sep 20 '1 2 at 1 7 :23


@stev env h They are 1 0pF. I didn't ev en notice that! That's sloppy (and PSPICE) for y ou. I will fix this as
well. atomSmasher Sep 20 '1 2 at 1 7 :25
1

Seriously , y ou need to go back and fix all the ty pos in y our part numbers. Are y ou really using the 8060
chip (a.k.a. SC/MP from National Semiconductor)? Or are y ou using the 8086, the Intel chip normally
driv en by an 8284 (not 8486 as shown in y our schematic)? Dav e Tweed Sep 20 '1 2 at 1 7 :31
1 Answer
The 100 pF load on the CLK signal shown in the data sheet is a test load used to verify worst-
case timing. You don't need to have it in your circuit, and the waveform will probably look a
lot better without it.
But actually, given that load, that waveform looks fine. Those old clock drivers didn't produce
particularly "square" waves and in fact, you wouldn't want them to, because it would just
add to EMI and other bad effects. The key things are that the edges are monotonic (no glitches
or "hooks" near the logic thresholds) and that the spacing of the crossings (about halfway
between the peaks, third line down on the 'scope graticule) has the right timing (frequency and
duty cycle), which it does.
BTW, your reset wiring is incorrect. R4, C5 and U1 should connect to the RES- pin, which is
an input. The RESET pin is an output intended to drive the CPU's reset input.
Also, the PCLK pin is an output, and should be tied to Vcc. Just leave it open if you're not
using it.
not
edited Sep 20 '1 2 at 20:33 answered Sep 20 '1 2 at 1 8:29
Dav e Tweed
42.6k 5 50 88