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MS Curriculum in
Computer Engineering and Electronic Engineering
Testing
(02NPB)
Matteo SONZA REORDA Paolo BERNARDI
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CAD Group
Both teachers work in the CAD Group
Major research group within the Dept. of Control and Computer
Engineering (Dip. di Automatica e Informatica)
Currently composed of 7 permanent researchers and about 10
temporary researchers (including PhD students)
Mission: providing support to designers of electronic circuits and
systems in the areas of
- Testing
- Fault tolerant design
- Verification
Wide network of contacts with
industries and research centers worldwide.
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3
CAD Group
Both teachers work in the CAD Group
Major research group within the Dept. of Control and Computer
Engineering (Dip. di Automatica e Informatica)
Currently composed of 7 permanent researchers and about 10
temporary researchers (including PhD students)
Mission: providing support to designers of electronic circuits and
systems in the areas of
- Testing
- Fault tolerant design
- Verification
Wide network of contacts with
industries and research centers worldwide.
Paolo BERNARDI
Maurizio REBAUDENGO
Ernesto SANCHEZ
Matteo SONZA REORDA
Giovanni SQUILLERO
Luca STERPONE
Massimo VIOLANTE
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CAD Group
Both teachers work in the CAD Group
Major research group within the Dept. of Control and Computer
Engineering (Dip. di Automatica e Informatica)
Currently composed of 7 permanent researchers and about 10
temporary researchers (including PhD students)
Mission: providing support to designers of electronic circuits and
systems in the areas of
- Testing
- Fault tolerant design
- Verification
Wide network of contacts with
industries and research centers worldwide.
Several different countries currently
represented in the group
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Industrial partners
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Academic partners
LIRMM, Montpellier, France
Linkoping University, Linkoping, Sweeden
INPG, Grenoble, France
Un. of Freiburg, Freiburg, Germany
Delft Technical University, Delft, The Netherlands
Universidad Carlos III, Madrid, Spain
Universidad de Sevilla, Seville, Spain
Universit di Padova, Padova, Italy
University of Cyprus, Nicosia, Cyprus
University of Athens, Athens, Greece
UFRGS, Porto Alegre, Brazil
PUCRS, Porto Alegre, Brazil
Universidad del Valle, Cali, Colombia
Universidad de la Republica, Montevideo, Uruguay

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Goal of the course
The course introduces methods and techniques for the test
of electronic circuits and systems.
What is testing?
Testing is the operation of checking whether a product (in
our case an electronic one) works correctly (i.e., as
mandated by the specifications).
Faults may arise, and thus cause a product to behave
differently than expected: accurate test is thus mandatory.
The cost for test is today a major component of the total
cost for manufacturing a product.
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What is an electronic product?
An Integrated Circuit (IC)
- Custom
- Off-the-shelf
An IP
A board
A system
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Why this course?
Because testing is increasingly important in electronic
products design, manufacturing, and usage
Because testing is increasingly difficult to achieve in
electronic products and several standards require its
rigorous application
Hence, companies do require this kind of skills
Because at Politecnico di Torino there is a research
group with international reputation and strong links
with industries in this area.
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Prerequisites
The course is better followed if the student owns the
knowledge about
Digital system design
Microelectronics.
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Content
Introduction to test
Fault models
Techniques for test of digital systems
- Fault Simulation and ATPG
- Test application
- Design for Testability
+ Scan
+ BIST
+ IEEE 1149.1
- SoC testing
Basics of Fault Tolerant design.
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Textbooks
M. Bushnell, V. Agrawal:
Essentials of Electronic Testing for Digital, Memory, and
Mixed-Signal VLSI Circuits
Kluwer Academic Publisher, 2000
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Website
Students may access to the web pages of this year course in
the Portale della Didattica
(http://didattica.polito.it/) where they will find:
Transparencies and support material
General information
Sample texts of previous exams
Results of the exams.
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Lecture schedule
Monday 10.00-13.00 room 12D
Wednesday 11.30-13.00 room 10I
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Labs
Students will perform some practical experiences using
commercial tools for testing.
Lab activities will be guided, so that for each session
students will be asked to perform some specific activity,
and produce some result.
Lab activities will take place at LABINF every Thursday
from 10.00 to 11.30.
Lab activities will start on October 10.
Students need an account to access LABINF.
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Exam
It consists in a written part including some (typically 6)
questions and/or exercizes
It lasts for about 90 minutes
Students are strictly required to pre-register for the
exam in the due dates through the web service
During the exam students are not allow to
- Access to any written material
- Use any electronic device
- Communicate with anyone in the room or outside.
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After the exam
Results will be published on the course web site some
days after the exam
Students will be able to check their exam and receive
explanations about their mistakes by the teacher: a
meeting may be organized by the teacher for this
purpose
After result publications, if a student does not want the
result to be recorded (e.g., because he/she wants to
improve it) he/shes required to explicitly inform the
teacher (by email).
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Written exam procedure
Written exam
Result published
Result
18?
Message
by student?
Result is not recorded
Result is recorded
END
NO
YES
NO
YES
BEGIN
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Exam dates
4.2.2014 8.30am
18.2.2014 8.30am
These dates are still unofficial and may be modified in
the next weeks
Dates for the exam period of June/July and September
are expected soon to be published.
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Assignments
Students may work (in groups of up to 2 people) on an
assignment, consisting in implementing some technique related
to the course.
Specifications for assignments are released on request; the first
ones will be released in November.
Assignment must be completed by the end of the course (e.g., by
Jan. 18, 2014).
Making an assignment practically requires having followed the
Lab sessions and owning a reasonable expertise in the usage of
the tools.
The successful completion of the assignment, if evaluated
positively, may grant up to 4 additional points on the exam
marking.
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Assignment result validity
The validity of all scores stemming from completed
assignments lasts until Sept. 30, 2014
On Sept. 30, 2014, all assignment scores associated to
students that still didnt pass the exam will be canceled.
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Students from previous years
They have to follow the current year rules for exams,
assignments, and whichever
They have to prepare the exam based on this year
program.
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Exceptions and exam results
Exceptions to the exam and evaluation rules will hardly
be considered
The teacher will do his best to fairly evaluate every
student
based on the above rules
based on the student achievements in the exam (and
possibly in the assignment)
independently on any other personal
considerations.
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Some statistics
about last year course
Students who registered for the course last year 61
Students who passed the exam 46 (75%)
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Hints
Students are suggested to
check periodically the course web site and their official
email address for possible communications by the
teacher (before the exam)
check whether their result has been correctly recorded
(after the exam).
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Thesis work offers
Students interested to make their thesis work with the
CAD group are invited to
Look at the thesis offers existing within the Portale della
Didattica
Ask the teacher.
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Contacting the teachers
Students may contact the teachers using the following
references:
Matteo SONZA REORDA
Dipartimento di Automatica e Informatica
E-mail matteo.sonzareorda@polito.it
Paolo BERNARDI
Dipartimento di Automatica e Informatica
E-mail paolo.bernardi@polito.it