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Published by ER/TY 1062 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18770

2010-Feb-19

Copyright 2010 Koninklijke Philips Electronics N.V.


All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.
Colour Television Chassis
Q552.1E
LA
18770_000_100210.eps
100210
Contents Page Contents Page
1. Revision List 2
2. Technical Specifications, Diversity, and Connections2
3. Precautions, Notes, and Abbreviation List 6
4. Mechanical Instructions 10
5. Service Modes, Error Codes, and Fault Finding 23
6. Alignments 41
7. Circuit Descriptions 47
8. IC Data Sheets 60
9. Block Diagrams
Wiring diagram Rembrandt 32" 77
Wiring diagram Rembrandt 37" - 42" 78
Wiring diagram Van Gogh 32" - 40" 79
Wiring diagram Matisse 32" 80
Wiring Matisse 40" 81
Block Diagram Video 82
Block Diagram Audio 83
Block Diagram Control & Clock Signals 84
Block Diagram I2C 85
Supply Lines Overview 86
10. Circuit Diagrams and PWB Layouts Drawing PWB
AL1 820400089786 AmbiLight Common 87 94
AL2 820400089773 3 LED LiteOn 89 94
AL1 820400089691 9 LED LiteOn 90 94
AL1 820400089703 15 LED LiteOn 92 94
AL1 820400090592 AmbiLight Common 95 102
AL1 820400090611 3 LED Everlight 97 102
AL1 820400090601 9 LED Everlight 98 102
AL1 820400090621 15 LED Everlight 100 102
B01 820400089943 Tuner, HDMI & CI 103
B02 820400089506 PNX85500 114
B03 820400089514 CLASS D 123
B04 820400089524 Analog I/O 131
B05 820400089832 DDR 136
B05 820400089535 DDR 137
B06 820400089962 LVDS DVBS 138
B06 820400089572 LVDS Non DVBS 142
B07 820400089602 DVBS FE 146
B08 820400089624 DVBS Supply 147
B09 820400089822 DVBS Con. 149
B09 820400089812 Non DVBS Con. 150
B11 820400090693 TCON LGD 151
B11 820400090704 TCON LGD 155
B13 820400090732 TCON AL CPLD 159
B13 820400090742 TCON AL CPLD 160
B14 820400090714 TCON SHARP 161
B14 820400090724 TCON SHARP 167
310431363643 SSB Layout 173
310431364003 SSB Layout 175
310431364025 SSB Layout 177
310431364064 SSB Layout 179
11. Styling Sheets
Rembrandt 32" 181
Rembrandt 37" & 42" 182
Van Gogh 32" - 52" 183
Matisse 32" - 46" 184
Revision List EN 2 Q552.1E LA 1.
2010-Feb-19
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1. Revision List
Manual xxxx xxx xxxx.0
First release.
2. Technical Specifications, Diversity, and Connections
Index of this chapter:
2.1 Technical Specifications
2.2 Directions for Use
2.3 Connections
2.4 Chassis Overview
Notes:
Figures can deviate due to the different set executions.
Specifications are indicative (subject to change).
2.1 Technical Specifications
For on-line product support please use the links in Table 2-1.
Here is product information available, as well as getting started,
user manuals, frequently asked questions and software &
drivers.
Table 2-1 Described Model numbers and diversity
2.2 Directions for Use
You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com
CTN
Styling
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32PFL5405H/05 Rembrandt
11-1
64025 10-31 2.3 4-1 4.5 4.5.9 7.2 7.4.1 - 7.10 9-1 - - - - 10-
11
10-
12
10-
13
10-
14
10-
15
- - - - 10-23 10-25 -
32PFL5405H/12 Rembrandt
11-1
64025 10-31 2.3 4-1 4.5 4.5.9 7.2 7.4.1 - 7.10 9-1 - - - - 10-
11
10-
12
10-
13
10-
14
10-
15
- - - - 10-23 10-25 -
32PFL5405H/60 Rembrandt
11-1
64025 10-31 2.3 4-1 4.5 4.5.9 7.2 7.4.1 - 7.10 9-1 - - - - 10-
11
10-
12
10-
13
10-
14
10-
15
- - - - 10-23 10-25 -
32PFL5605H/05 van Gogh
11-3
64003 10-30 2.3 4-4 4.6 4.6.8 7.2 7.4.1 - 7.10 9-3 - - - - 10-
11
10-
12
10-
13
10-
14
10-
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- - - - - 10-25 10-27
32PFL5605H/12 van Gogh
11-3
64003 10-30 2.3 4-4 4.6 4.6.8 7.2 7.4.1 - 7.10 9-3 - - - - 10-
11
10-
12
10-
13
10-
14
10-
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- - - - - 10-25 10-27
32PFL5605H/60 van Gogh
11-3
64003 10-30 2.3 4-4 4.6 4.6.8 7.2 7.4.1 - 7.10 9-3 - - - - 10-
11
10-
12
10-
13
10-
14
10-
15
- - - - - 10-25 10-27
32PFL7605H/05 Matisse
11-4
64064 10-32 2.3 4-7 4.7 4.6.8 7.2 7.4.1 7.9 7.10 9-4 10-1
10-2
10-5 10-6
10-7
10-
10
10-
11
10-
12
10-
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10-
14
10-
16
- - - - 10-23 10-25 -
32PFL7605H/12 Matisse
11-4
64064 10-32 2.3 4-7 4.7 4.6.8 7.2 7.4.1 7.9 7.10 9-4 10-1
10-2
10-5 10-6
10-7
10-
10
10-
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10-
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10-
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10-
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10-
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- - - - 10-23 10-25 -
37PFL5405H/05 Rembrandt
11-2
64025 10-31 2.3 4-2 4.5 4.5.9 7.2 7.4.1 - 7.10 9-2 - - - - 10-
11
10-
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10-
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10-
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10-
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- - - - 10-23 10-25 -
37PFL5405H/12 Rembrandt
11-2
64025 10-31 2.3 4-2 4.5 4.5.9 7.2 7.4.1 - 7.10 9-2 - - - - 10-
11
10-
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10-
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10-
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10-
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- - - - 10-23 10-25 -
40PFL5605H/05 van Gogh
11-3
64003 10-30 2.3 4-5 4.6 4.6.8 7.2 7.4.1 - 7.10 9-3 - - - - 10-
11
10-
12
10-
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10-
14
10-
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- - - - - 10-25 10-27
40PFL5605H/12 van Gogh
11-3
64003 10-30 2.3 4-5 4.6 4.6.8 7.2 7.4.1 - 7.10 9-3 - - - - 10-
11
10-
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10-
13
10-
14
10-
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- - - - - 10-25 10-27
40PFL5605H/60 van Gogh
11-3
64003 10-30 2.3 4-5 4.6 4.6.8 7.2 7.4.1 - 7.10 9-3 - - - - 10-
11
10-
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10-
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10-
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10-
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- - - - - 10-25 10-27
40PFL7605H/05 Matisse
11-4
63643 10-29 2.3 4-8 4.7 4.6.8 7.2 7.4.1 7.9 7.10 9-5 10-1
10-3
10-5 10-6
10-8
10-
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10-
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10-
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10-
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10-
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10-
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10-18 - - 10-22 - - -
40PFL7605H/12 Matisse
11-4
63643 10-29 2.3 4-8 4.7 4.6.8 7.2 7.4.1 7.9 7.10 9-5 10-1
10-3
10-5 10-6
10-8
10-
10
10-
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10-
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10-
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10-
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10-
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10-18 - - 10-22 - - -
42PFL5405H/05 Rembrandt
11-2
64025 10-31 2.3 4-3 4.5 4.5.9 7.2 7.4.1 - 7.10 9-2 - - - - 10-
11
10-
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10-
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10-
14
10-
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- - - - 10-23 10-25 -
42PFL5405H/12 Rembrandt
11-2
64025 10-31 2.3 4-3 4.5 4.5.9 7.2 7.4.1 - 7.10 9-2 - - - - 10-
11
10-
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10-
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10-
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10-
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- - - - 10-23 10-25 -
42PFL5405H/60 Rembrandt
11-2
64025 10-31 2.3 4-3 4.5 4.5.9 7.2 7.4.1 - 7.10 9-2 - - - - 10-
11
10-
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10-
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10-
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10-
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- - - - 10-23 10-25 -
Technical Specifications, Diversity, and Connections EN 3 Q552.1E LA 2.
2010-Feb-19
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2.3 Connections
Figure 2-1 Connection overview
Note: The following connector colour abbreviations are used
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy=
Grey, Rd= Red, Wh= White, Ye= Yellow.
2.3.1 Side Connections
1 - SD-Card: Secure Digital Card - In/Out (optional)
Figure 2-2 SD-Card connector
1 - DAT3/CS Signal jk
2 - CMD/DI Signal k
3 - GND1 Gnd H
4 - Vdd Supply k
5 - CLOCK Signal k
6 - GND2 Gnd H
7 - DAT0/D0 Signal jk
8 - DAT1/IRQ Signal jk
9 - DAT2/NC Signal jk
10 - CD Signal j
11 - GND Gnd H
12 - WP Signal j
13 - GND Gnd H
14 - GND Gnd H
2 - Common Interface
68p- See diagram B01F HDMI & CI jk
3 - USB2.0
Figure 2-3 USB (type A)
1 - +5V k
2 - Data (-) jk
3 - Data (+) jk
4 - Ground Gnd H
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GND
WP
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GND
13
GND
1
2
3
4
5
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7
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9
DAT3/CS
CMD/DI
GND1
VDD
CLOCK
GND2
DAT0/D0
DAT1/IRQ
DAT2/NC
1 2 3 4
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Technical Specifications, Diversity, and Connections EN 4 Q552.1E LA 2.
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4 - HDMI: Digital Video, Digital Audio - In
Figure 2-4 HDMI (type A) connector
1 - D2+ Data channel j
2 - Shield Gnd H
3 - D2- Data channel j
4 - D1+ Data channel j
5 - Shield Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j
8 - Shield Gnd H
9 - D0- Data channel j
10 - CLK+ Data channel j
11 - Shield Gnd H
12 - CLK- Data channel j
13 - Easylink/CEC Control channel jk
14 - n.c.
15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
17 - Ground Gnd H
18 - +5V j
19 - HPD Hot Plug Detect j
20 - Ground Gnd H
2.3.2 Rear Connections
5 - RJ45: Ethernet (optional)
Figure 2-5 Ethernet connector
1 - TD+ Transmit signal k
2 - TD- Transmit signal k
3 - RD+ Receive signal j
4 - CT Centre Tap: DC level fixation
5 - CT Centre Tap: DC level fixation
6 - RD- Receive signal j
7 - GND Gnd H
8 - GND Gnd H
6 - EXT2: Video RGB - In, CVBS - In/Out, Audio - In/Out
Figure 2-6 SCART connector
1 - Audio R 0.5 V
RMS
/ 1 kohm k
2 - Audio R 0.5 V
RMS
/ 10 kohm j
3 - Audio L 0.5 V
RMS
/ 1 kohm k
4 - Ground Audio Gnd H
5 - Ground Blue Gnd H
6 - Audio L 0.5 V
RMS
/ 10 kohm j
7 - Video Blue 0.7 V
PP
/ 75 ohm jk
8 - Function Select 0 - 2 V: INT
4.5 - 7 V: EXT 16:9
9.5 - 12 V: EXT 4:3 j
9 - Ground Green Gnd H
10 - n.c.
11 - Video Green 0.7 V
PP
/ 75 ohm j
12 - n.c.
13 - Ground Red Gnd H
14 - Ground P50 Gnd H
15 - Video Red 0.7 V
PP
/ 75 ohm j
16 - Status/FBL 0 - 0.4 V: INT
1 - 3 V: EXT / 75 ohm j
17 - Ground Video Gnd H
18 - Ground FBL Gnd H
19 - Video CVBS/Y 1 V
PP
/ 75 ohm k
20 - Video CVBS 1 V
PP
/ 75 ohm j
21 - Shield Gnd H
7 - Service Connector (UART)
1 - Ground Gnd H
2 - UART_TX Transmit k
3 - UART_RX Receive j
8 - EXT3: Cinch: Video YPbPr - In, Audio - In
Gn - Video Y 1 V
PP
/ 75 ohm jq
Bu - Video Pb 0.7 V
PP
/ 75 ohm jq
Rd - Video Pr 0.7 V
PP
/ 75 ohm jq
Rd - Audio - R 0.5 V
RMS
/ 10 kohm jq
Wh - Audio - L 0.5 V
RMS
/ 10 kohm jq
9 - Head phone (Output)
Bk - Head phone 32 - 600 ohm / 10 mW ot
2.3.3 Rear Connections - Bottom
10 - EXT1: Video RGB - In, CVBS - In/Out, Audio - In/Out
See 6 - EXT2: Video RGB - In, CVBS - In/Out, Audio - In/Out
11 - Cinch: S/PDIF - Out
Bk - Coaxial 0.4 - 0.6V
PP
/ 75 ohm kq
12 - HDMI 2 (& 3 optional): Digital Video, Digital Audio - In
See 4 - HDMI: Digital Video, Digital Audio - In
13 - HDMI 1: Digital Video - In, Digital Audio with ARC - In/
Out
Figure 2-7 HDMI (type A) connector
1 - D2+ Data channel j
2 - Shield Gnd H
3 - D2- Data channel j
4 - D1+ Data channel j
5 - Shield Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j
8 - Shield Gnd H
9 - D0- Data channel j
10 - CLK+ Data channel j
11 - Shield Gnd H
12 - CLK- Data channel j
13 - Easylink/CEC Control channel jk
14 - ARC Audio Return Channel k
15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
17 - Ground Gnd H
18 - +5V j
19 - HPD Hot Plug Detect j
20 - Ground Gnd H
14 - Cinch: Audio - In (VGA/DVI)
Rd - Audio R 0.5 V
RMS
/ 10 kohm jq
Wh - Audio L 0.5 V
RMS
/ 10 kohm jq
15 - Aerial - In
- - IEC-type (EU) Coax, 75 ohm D
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Technical Specifications, Diversity, and Connections EN 5 Q552.1E LA 2.
2010-Feb-19
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16 - VGA: Video RGB - In
Figure 2-8 VGA Connector
1 - Video Red 0.7 V
PP
/ 75 ohm j
2 - Video Green 0.7 V
PP
/ 75 ohm j
3 - Video Blue 0.7 V
PP
/ 75 ohm j
4 - n.c.
5 - Ground Gnd H
6 - Ground Red Gnd H
7 - Ground Green Gnd H
8 - Ground Blue Gnd H
9 - +5V
DC
+5 V j
10 - Ground Sync Gnd H
11 - n.c.
12 - DDC_SDA DDC data j
13 - H-sync 0 - 5 V j
14 - V-sync 0 - 5 V j
15 - DDC_SCL DDC clock j
2.4 Chassis Overview
Refer to chapter Block Diagrams for PWB/CBA locations.
1
6
10
11
5
15
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Precautions, Notes, and Abbreviation List EN 6 Q552.1E LA 3.
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3. Precautions, Notes, and Abbreviation List
Index of this chapter:
3.1 Safety Instructions
3.2 Warnings
3.3 Notes
3.4 Abbreviation List
3.1 Safety Instructions
Safety regulations require the following during a repair:
Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).
Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard. Of de set
ontploft!

Safety regulations require that after a repair, the set must be
returned in its original condition. Pay in particular attention to
the following points:
Route the wire trees correctly and fix them with the
mounted cable clamps.
Check the insulation of the Mains/AC Power lead for
external damage.
Check the strain relief of the Mains/AC Power cord for
proper function.
Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the on position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 M and 12 M.
4. Switch off the set, and remove the wire between the
two pins of the Mains/AC Power plug.
Check the cabinet for defects, to prevent touching of any
inner parts by the customer.
3.2 Warnings
All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
Be careful during measurements in the high voltage
section.
Never replace modules or other components while the unit
is switched on.
When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.
3.3 Notes
3.3.1 General
Measure the voltages and waveforms with regard to the
chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the
Service Default Mode with a colour bar signal and stereo
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for
NTSC (channel 3).
Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.
3.3.2 Schematic Notes
All resistor values are in ohms, and the value multiplier is
often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 k).
Resistor values with no multiplier may be indicated with
either an E or an R (e.g. 220E or 220R indicates 220 ).
All capacitor values are given in micro-farads ( = 10
-6
),
nano-farads (n = 10
-9
), or pico-farads (p = 10
-12
).
Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
An asterisk (*) indicates component usage varies. Refer
to the diversity tables for the correct values.
The correct component values are listed on the Philips
Spare Parts Web Portal.
3.3.3 Spare Parts
For the latest spare part overview, consult your Philips Spare
Part web portal.
3.3.4 BGA (Ball Grid Array) ICs
Introduction
For more information on how to handle BGA devices, visit this
URL: http://www.atyourservice-magazine.com. Select
Magazine, then go to Repair downloads. Here you will find
Information on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile.
Where applicable and available, this profile is added to the IC
Data Sheet information section in this manual.
3.3.5 Lead-free Soldering
Due to lead-free technology some rules have to be respected
by the workshop during a repair:
Use only lead-free soldering tin. If lead-free solder paste is
required, please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.
Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
To reach a solder-tip temperature of at least 400C.
To stabilize the adjusted temperature at the solder-tip.
To exchange solder-tips for different applications.
Adjust your solder tool so that a temperature of around
360C - 380C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch off unused equipment or
reduce heat.
Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.
Precautions, Notes, and Abbreviation List EN 7 Q552.1E LA 3.
2010-Feb-19
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3.3.6 Alternative BOM identification
It should be noted that on the European Service website,
Alternative BOM is referred to as Design variant.
The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then
result in sets which have the same CTN (Commercial Type
Number; e.g. 28PW9515/12) but which have a different B.O.M.
number.
By looking at the third digit of the serial number, one can
identify which B.O.M. is used for the TV set he is working with.
If the third digit of the serial number contains the number 1
(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is
a 2 (example: AG2B0335000001), then the set has been
produced according to B.O.M. no. 2. This is important for
ordering the correct spare parts!
For the third digit, the numbers 1...9 and the characters A...Z
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
indicated by the third digit of the serial number.
Identification: The bottom line of a type plate gives a 14-digit
serial number. Digits 1 and 2 refer to the production centre (e.g.
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers
to the Service version change code, digits 5 and 6 refer to the
production year, and digits 7 and 8 refer to production week (in
example below it is 2006 week 17). The 6 last digits contain the
serial number.
Figure 3-1 Serial number (example)
3.3.7 Board Level Repair (BLR) or Component Level Repair
(CLR)
If a board is defective, consult your repair procedure to decide
if the board has to be exchanged or if it should be repaired on
component level.
If your repair procedure says the board should be exchanged
completely, do not solder on the defective board. Otherwise, it
cannot be returned to the O.E.M. supplier for back charging!
3.3.8 Practical Service Precautions
It makes sense to avoid exposure to electrical shock.
While some sources are expected to have a possible
dangerous impact, others of quite high potential are of
limited current and are sometimes held in less regard.
Always respect voltages. While some may not be
dangerous in themselves, they can cause unexpected
reactions that are best avoided. Before reaching into a
powered TV set, it is best to test the high voltage insulation.
It is easy to do, and is a good service precaution.
3.4 Abbreviation List
0/6/12 SCART switch control signal on A/V
board. 0 = loop through (AUX to TV),
6 = play 16 : 9 format, 12 = play 4 : 3
format
AARA Automatic Aspect Ratio Adaptation:
algorithm that adapts aspect ratio to
remove horizontal black bars; keeps
the original aspect ratio
ACI Automatic Channel Installation:
algorithm that installs TV channels
directly from a cable network by
means of a predefined TXT page
ADC Analogue to Digital Converter
AFC Automatic Frequency Control: control
signal used to tune to the correct
frequency
AGC Automatic Gain Control: algorithm that
controls the video input of the feature
box
AM Amplitude Modulation
AP Asia Pacific
AR Aspect Ratio: 4 by 3 or 16 by 9
ASF Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
bars without discarding video
information
ATSC Advanced Television Systems
Committee, the digital TV standard in
the USA
ATV See Auto TV
Auto TV A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
AV External Audio Video
AVC Audio Video Controller
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz
BDS Business Display Solutions (iTV)
BLR Board-Level Repair
BTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries
B-TXT Blue TeleteXT
C Centre channel (audio)
CEC Consumer Electronics Control bus:
remote control bus on HDMI
connections
CL Constant Level: audio output to
connect with an external amplifier
CLR Component Level Repair
ComPair Computer aided rePair
CP Connected Planet / Copy Protection
CSM Customer Service Mode
CTI Color Transient Improvement:
manipulates steepness of chroma
transients
CVBS Composite Video Blanking and
Synchronization
DAC Digital to Analogue Converter
DBE Dynamic Bass Enhancement: extra
low frequency amplification
DCM Data Communication Module. Also
referred to as System Card or
Smartcard (for iTV).
DDC See E-DDC
D/K Monochrome TV system. Sound
carrier distance is 6.5 MHz
DFI Dynamic Frame Insertion
10000_024_090121.eps
100105
MODEL :
PROD.NO:
~
S
32PF9968/10 MADE IN BELGIUM
220-240V 50/60Hz
128W
AG 1A0617 000001 VHF+S+H+UHF
BJ3.0E LA
Precautions, Notes, and Abbreviation List EN 8 Q552.1E LA 3.
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DFU Directions For Use: owner's manual
DMR Digital Media Reader: card reader
DMSD Digital Multi Standard Decoding
DNM Digital Natural Motion
DNR Digital Noise Reduction: noise
reduction feature of the set
DRAM Dynamic RAM
DRM Digital Rights Management
DSP Digital Signal Processing
DST Dealer Service Tool: special remote
control designed for service
technicians
DTCP Digital Transmission Content
Protection; A protocol for protecting
digital audio/video content that is
traversing a high speed serial bus,
such as IEEE-1394
DVB-C Digital Video Broadcast - Cable
DVB-T Digital Video Broadcast - Terrestrial
DVD Digital Versatile Disc
DVI(-d) Digital Visual Interface (d= digital only)
E-DDC Enhanced Display Data Channel
(VESA standard for communication
channel and display). Using E-DDC,
the video source can read the EDID
information form the display.
EDID Extended Display Identification Data
(VESA standard)
EEPROM Electrically Erasable and
Programmable Read Only Memory
EMI Electro Magnetic Interference
EPG Electronic Program Guide
EPLD Erasable Programmable Logic Device
EU Europe
EXT EXTernal (source), entering the set by
SCART or by cinches (jacks)
FDS Full Dual Screen (same as FDW)
FDW Full Dual Window (same as FDS)
FLASH FLASH memory
FM Field Memory or Frequency
Modulation
FPGA Field-Programmable Gate Array
FTV Flat TeleVision
Gb/s Giga bits per second
G-TXT Green TeleteXT
H H_sync to the module
HD High Definition
HDD Hard Disk Drive
HDCP High-bandwidth Digital Content
Protection: A key encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a snow vision mode
or changed to a low resolution. For
normal content distribution the source
and the display device must be
enabled for HDCP software key
decoding.
HDMI High Definition Multimedia Interface
HP HeadPhone
I Monochrome TV system. Sound
carrier distance is 6.0 MHz
I
2
C Inter IC bus
I
2
D Inter IC Data bus
I
2
S Inter IC Sound bus
IF Intermediate Frequency
IR Infra Red
IRQ Interrupt Request
ITU-656 The ITU Radio communication Sector
(ITU-R) is a standards body
subcommittee of the International
Telecommunication Union relating to
radio communication. ITU-656 (a.k.a.
SDI), is a digitized video format used
for broadcast grade video.
Uncompressed digital component or
digital composite signals can be used.
The SDI signal is self-synchronizing,
uses 8 bit or 10 bit data words, and has
a maximum data rate of 270 Mbit/s,
with a minimum bandwidth of 135
MHz.
ITV Institutional TeleVision; TV sets for
hotels, hospitals etc.
LS Last Status; The settings last chosen
by the customer and read and stored
in RAM or in the NVM. They are called
at start-up of the set to configure it
according to the customer's
preferences
LATAM Latin America
LCD Liquid Crystal Display
LED Light Emitting Diode
L/L' Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I
LPL LG.Philips LCD (supplier)
LS Loudspeaker
LVDS Low Voltage Differential Signalling
Mbps Mega bits per second
M/N Monochrome TV system. Sound
carrier distance is 4.5 MHz
MHEG Part of a set of international standards
related to the presentation of
multimedia information, standardised
by the Multimedia and Hypermedia
Experts Group. It is commonly used as
a language to describe interactive
television services
MIPS Microprocessor without Interlocked
Pipeline-Stages; A RISC-based
microprocessor
MOP Matrix Output Processor
MOSFET Metal Oxide Silicon Field Effect
Transistor, switching device
MPEG Motion Pictures Experts Group
MPIF Multi Platform InterFace
MUTE MUTE Line
MTV Mainstream TV: TV-mode with
Consumer TV features enabled (iTV)
NC Not Connected
NICAM Near Instantaneous Compounded
Audio Multiplexing. This is a digital
sound system, mainly used in Europe.
NTC Negative Temperature Coefficient,
non-linear resistor
NTSC National Television Standard
Committee. Color system mainly used
in North America and Japan. Color
carrier NTSC M/N= 3.579545 MHz,
NTSC 4.43= 4.433619 MHz (this is a
VCR norm, it is not transmitted off-air)
NVM Non-Volatile Memory: IC containing
TV related data such as alignments
O/C Open Circuit
OSD On Screen Display
OAD Over the Air Download. Method of
software upgrade via RF transmission.
Upgrade software is broadcasted in
TS with TV channels.
OTC On screen display Teletext and
Control; also called Artistic (SAA5800)
P50 Project 50: communication protocol
between TV and peripherals
PAL Phase Alternating Line. Color system
mainly used in West Europe (color
carrier= 4.433619 MHz) and South
America (color carrier PAL M=
Precautions, Notes, and Abbreviation List EN 9 Q552.1E LA 3.
2010-Feb-19
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3.575612 MHz and PAL N= 3.582056
MHz)
PCB Printed Circuit Board (same as PWB)
PCM Pulse Code Modulation
PDP Plasma Display Panel
PFC Power Factor Corrector (or Pre-
conditioner)
PIP Picture In Picture
PLL Phase Locked Loop. Used for e.g.
FST tuning systems. The customer
can give directly the desired frequency
POD Point Of Deployment: a removable
CAM module, implementing the CA
system for a host (e.g. a TV-set)
POR Power On Reset, signal to reset the uP
PSDL Power Supply for Direct view LED
backlight with 2D-dimming
PSL Power Supply with integrated LED
drivers
PSLS Power Supply with integrated LED
drivers with added Scanning
functionality
PTC Positive Temperature Coefficient,
non-linear resistor
PWB Printed Wiring Board (same as PCB)
PWM Pulse Width Modulation
QRC Quasi Resonant Converter
QTNR Quality Temporal Noise Reduction
QVCP Quality Video Composition Processor
RAM Random Access Memory
RGB Red, Green, and Blue. The primary
color signals for TV. By mixing levels
of R, G, and B, all colors (Y/C) are
reproduced.
RC Remote Control
RC5 / RC6 Signal protocol from the remote
control receiver
RESET RESET signal
ROM Read Only Memory
RSDS Reduced Swing Differential Signalling
data interface
R-TXT Red TeleteXT
SAM Service Alignment Mode
S/C Short Circuit
SCART Syndicat des Constructeurs
d'Appareils Radiorcepteurs et
Tlviseurs
SCL Serial Clock I
2
C
SCL-F CLock Signal on Fast I
2
C bus
SD Standard Definition
SDA Serial Data I
2
C
SDA-F DAta Signal on Fast I
2
C bus
SDI Serial Digital Interface, see ITU-656
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Mmoire.
Color system mainly used in France
and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switched Mode Power Supply
SoC System on Chip
SOG Sync On Green
SOPS Self Oscillating Power Supply
SPI Serial Peripheral Interface bus; a 4-
wire synchronous serial data link
standard
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SRP Service Reference Protocol
SSB Small Signal Board
SSC Spread Spectrum Clocking, used to
reduce the effects of EMI
STB Set Top Box
STBY STand-BY
SVGA 800 600 (4:3)
SVHS Super Video Home System
SW Software
SWAN Spatial temporal Weighted Averaging
Noise reduction
SXGA 1280 1024
TFT Thin Film Transistor
THD Total Harmonic Distortion
TMDS Transmission Minimized Differential
Signalling
TS Transport Stream
TXT TeleteXT
TXT-DW Dual Window with TeleteXT
UI User Interface
uP Microprocessor
UXGA 1600 1200 (4:3)
V V-sync to the module
VESA Video Electronics Standards
Association
VGA 640 480 (4:3)
VL Variable Level out: processed audio
output toward external amplifier
VSB Vestigial Side Band; modulation
method
WYSIWYR What You See Is What You Record:
record selection that follows main
picture and sound
WXGA 1280 768 (15:9)
XTAL Quartz crystal
XGA 1024 768 (4:3)
Y Luminance signal
Y/C Luminance (Y) and Chrominance (C)
signal
YPbPr Component video. Luminance and
scaled color difference signals (B-Y
and R-Y)
YUV Component video
Mechanical Instructions EN 10 Q552.1E LA 4.
2010-Feb-19
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4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing Rembrandt series
4.2 Cable Dressing Van Gogh styling
4.3 Cable Dressing Matisse styling
4.4 Service Positions
4.5 Assy/Panel Removal Rembrandt Styling
4.6 Assy/Panel Removal Van Gogh Styling
4.7 Assy/Panel Removal Matisse Styling
4.8 Set Re-assembly
Notes:
Figures below can deviate slightly from the actual situation,
due to the different set executions.
4.1 Cable Dressing Rembrandt series
Figure 4-1 Cable dressing 32PFL5405H/xx
18770_100_100211.eps
100211
Mechanical Instructions EN 11 Q552.1E LA 4.
2010-Feb-19
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Figure 4-2 Cable dressing 37PFL5405H/xx
Figure 4-3 Cable dressing 42PFL5405H/xx
18770_101_100211.eps
100216
18770_102_100211.eps
100211
Mechanical Instructions EN 12 Q552.1E LA 4.
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4.2 Cable Dressing Van Gogh styling
Figure 4-4 Cable dressing 32PFL5605H/xx
Figure 4-5 Cable dressing 40PFL5605H/xx without DVB-S
18770_103_100211.eps
100211
18770_105_100211.eps
100216
Mechanical Instructions EN 13 Q552.1E LA 4.
2010-Feb-19
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Figure 4-6 Cable dressing 40PFL5605H/xx with DVB-S
18770_104_100211.eps
100211
Mechanical Instructions EN 14 Q552.1E LA 4.
2010-Feb-19
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4.3 Cable Dressing Matisse styling
Figure 4-7 Cable dressing 32PFL7605H/xx
Figure 4-8 Cable dressing 40PFL7605H/xx
18770_106_100211.eps
100211
18770_107_100211.eps
100211
Mechanical Instructions EN 15 Q552.1E LA 4.
2010-Feb-19
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4.4 Service Positions
For easy servicing of a TV set, the set should be put face down
on a soft flat surface, foam buffers or other specific workshop
tools. Ensure that a stable situation is created to perform
measurements and alignments. When using foam bars take
care that these always support the cabinet and never only the
display. Caution: Failure to follow these guidelines can
seriously damage the display!
Ensure that ESD safe measures are taken.
4.5 Assy/Panel Removal Rembrandt Styling
The instructions apply to the 42PFL5405H/xx.
4.5.1 Rear Cover
With the Rembrandt styling, a new concept of housing has
been introduced, having consequences for Service when
opening the set.
Part of the back cover now forms one assy with the LCD panel
and will be swapped together with this panel. For opening the
set, only remove the smaller part of the rear cover as
described below!
Warning!
The snaps on the backside of the LCD Panel secure the
backlight units and should never be released! Release
destroys the LCD Panel and voids warranty.
Refer to Figure 4-18 for details.
Warning: Disconnect the mains power cord before you remove
the rear cover.
Note: it is not necessary to remove the stand while removing
the rear cover.
Refer to Figure 4-9 for details.
Figure 4-9 Rear cover
1. Remove all screws of the rear cover; the part to be
removed [1] is indicated on Figure 4-9.
2. Lift the rear cover from the TV. Make sure that wires and
flat coils are not damaged while lifting the rear cover from
the set.
4.5.2 Speakers
Tweeters
Each tweeter unit is mounted with one screw.
When defective, replace the whole unit.
Subwoofer
The central subwoofer is located in the centre of the set, behind
the stand and the -subframe, and is secured by two bosses.
The stand and -subframe do not need to be removed for
removing the central subwoofer.
When defective, replace the whole unit.
4.5.3 Mains Switch
The mains switch is mounted on the front bezel with one screw.
4.5.4 Main Power Supply
Refer to Figure 4-10 and Figure 4-11 for details.
Figure 4-10 Main Power Supply
Figure 4-11 Main Power Supply - back shielding
1. Unplug all connectors [1].
2. Remove the fixation screws [2].
3. Take the board out.
When defective, replace the whole unit.
When remounting, ensure that the back shielding plate is
positioned correctly.
18770_120_100212.eps
100216
1
18770_122_100212.eps
100216
2
2
2
2
2
2
2
2
1
1
1
18770_123_100215.eps
100215
Mechanical Instructions EN 16 Q552.1E LA 4.
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4.5.5 Small Signal Board (SSB)
Refer to Figure 4-12 and Figure 4-13 for details.
Figure 4-12 SSB
Figure 4-13 SSB - back shielding
1. Unplug all connectors [1] and [2].
2. Remove the fixation screws [3].
3. Take the board out.
When defective, replace the whole unit.
When remounting, ensure that the back shielding plate is
positioned correctly.
4.5.6 Front Bezel
Refer to Figure 4-14 for details.
Figure 4-14 Front Bezel
1. Remove the mains switch as earlier described [1].
2. Remove the clamps [2].
3. Remove the screws [3].
The front bezel will now be detached from the set, together with
the IR & LED- and Keyboard Control Panel.
4.5.7 IR & LED Board
Refer to Figure 4-15 for details.
18770_124_100215.eps
100217
1
2
3
3
3
3 3
3
3
3
18770_125_100215.eps
100215
18770_126_100215.eps
100215
3 3 3 3
3
3
3
3
3
3
3
3
1
2 2
2
Mechanical Instructions EN 17 Q552.1E LA 4.
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Figure 4-15 IR & LED board
1. Detach the front bezel from the set as earlier described.
2. Release the clips [1] that secure the IR & LED board in the
bezel and take the board out.
3. Unplug the connectors.
When defective, replace the whole unit.
4.5.8 Keyboard Control Board
Refer to Figure 4-16 for details.
Figure 4-16 Keyboard Control board
1. Detach the front bezel from the set as earlier described.
2. Unplug the connector [1].
3. Release the clips that secure the board [2] and take the
board out.
When defective, replace the whole unit.
4.5.9 LCD Panel
Refer to Figure 4-17 and Figure 4-18 for details.
Figure 4-17 LCD board -1-
18770_127_100215.eps
100215
1
18850_104_100203.eps
100203
2 1
18770_128_100215.eps
100215
1
2
3
2
2
3
3 3
2
Mechanical Instructions EN 18 Q552.1E LA 4.
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Figure 4-18 LCD board -2-
Warning!
The snaps on the backside of the LCD Panel secure the
backlight units and should never be released!
1. Remove the tweeters as earlier described.
2. Remove the central subwoofer as earlier described.
3. Remove the mains switch as earlier described.
4. Remove the Main Power Supply board as earlier
described, together with its back shielding.
5. Remove the Small Signal Board as earlier described,
together with its back shielding.
6. Remove the cable from the clamp [1].
7. Remove the stand [2] together with its subframe [3].
8. Detach the front bezel together with the IR & LED board
and Keyboard Control board as earlier described.
9. Ensure all (sub-) frames, boards and cables that do not
belong to the LCD panel are removed before sending the
LCD Panel in.
18770_121_100212.eps
100212
Do not release
Mechanical Instructions EN 19 Q552.1E LA 4.
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4.6 Assy/Panel Removal Van Gogh Styling
The instructions apply to the 46PFL5605H/xx.
4.6.1 Rear Cover
Warning: Disconnect the mains power cord before you remove
the rear cover.
Note: it is not necessary to remove the stand while removing
the rear cover.
1. Remove all screws of the rear cover.
2. Lift the rear cover from the TV. Make sure that wires and
flat coils are not damaged while lifting the rear cover from
the set.
Special note for 40" sets
Refer to Figure 4-19 to Figure 4-22 for details.
Figure 4-19 Rear cover 40" -1-
Figure 4-20 Rear cover 40" -2-
Figure 4-21 Rear cover 40" -3-
Figure 4-22 Rear cover 40" -4-
1. Lift the rear cover on the bottom [1].
2. Push back the cover [2] to unlock the catches.
3. If the rear cover catches still lock, place a flat screwdriver
between flare and rear cover and turn it until the rear cover
and the flare are disassembled from the catch.
4. The location of the catches are indicated with [1], [2], [3]
and [4].
4.6.2 Speakers
Tweeters
Each tweeter unit is mounted with one screw.
When defective, replace the whole unit.
Subwoofer
The central subwoofer is located in the centre of the set, and is
mounted with two screws.
When defective, replace the whole unit.
18770_150_100218.eps
100219
11
2
18770_151_100218.eps
100218
18770_152_100218.eps
100218
18770_153_100218.eps
100218
24 23 22 21
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4.6.3 Main Power Supply
Refer to Figure 4-23 for details.
Figure 4-23 Main Power Supply
1. Unplug all connectors [1].
2. Remove the fixation screws [2].
3. Take the board out.
When defective, replace the whole unit.
4.6.4 Small Signal Board (SSB)
Refer to Figure 4-24 for details.
Figure 4-24 SSB
1. Unplug all connectors [1] and [2].
2. Remove the fixation screws [3].
3. Take the board out.
When defective, replace the whole unit.
4.6.5 Mains Switch
The mains switch is mounted on the front bezel with two
screws.
4.6.6 IR & LED Board
Refer to Figure 4-25, Figure 4-26 and Figure 4-27 for details.
Figure 4-25 IR & LED Board -1-
Figure 4-26 IR & LED Board -2-
18770_140_100215.eps
100217
1
1
1
2
2
2
2
2
2
18770_141_100215.eps
100217
2
2
1
3
3
3
3
3
18770_142_100215.eps
100215
1
1
1
1
18770_143_100215.eps
100215
2
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Figure 4-27 IR & LED Board -3-
1. Remove the stand [1].
2. Remove the IR & LED board cover [2].
3. Release the clips [3] that secure the IR & LED board.
4. Remove the connectors [4] on the IR/LED board.
4.6.7 Keyboard Control Board
Refer to Figure 4-28 for details.
Figure 4-28 Keyboard Control board
1. Unplug the connector on the IR & LED board that leads to
the Keyboard Control board as earlier described.
2. Release the cable from its clamps.
3. Release the clip on top of the unit [1] and take the unit out.
When defective, replace the whole unit.
4.6.8 LCD Panel
Refer to Figure 4-29 for details.
1. Remove the stand as earlier described.
2. Remove the brackets [1].
3. Remove the stand support [2].
4. Remove the central subwoofer as earlier described.
5. Remove the tweeters as earlier described.
6. Remove the mains switch as earlier described.
7. Remove the IR & LED board as earlier described.
8. Remove the keyboard control board as earlier described.
9. Remove the clamps [3].
10. Remove the flare.
11. Remove all remaining screws [4].
Now the LCD Panel can be lifted from the front cabinet.
18770_144_100215.eps
100215
4
3
3
18770_145_100216.eps
100217
1
Mechanical Instructions EN 22 Q552.1E LA 4.
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Figure 4-29 LCD Panel
4.7 Assy/Panel Removal Matisse Styling
The Matisse styling is similar to the Van Gogh styling. No
detailed information is available at time of publishing.
4.8 Set Re-assembly
To re-assemble the whole set, execute all processes in reverse
order.
Notes:
While re-assembling, make sure that all cables are placed
and connected in their original position.
Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.
18770_146_100216.eps
100216
1
1
1
1
1
2 2
2 2
2 2
1
1
1
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1
2
4 4 4 4 4
4
3
3
4
3
4
4
4
3
4
3
4
3
4
4
Service Modes, Error Codes, and Fault Finding EN 23 Q552.1E LA 5.
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5. Service Modes, Error Codes, and Fault Finding
Index of this chapter:
5.1 Test Points
5.2 Service Modes
5.3 Stepwise Start-up
5.4 Service Tools
5.5 Error Codes
5.6 The Blinking LED Procedure
5.7 Protections
5.8 Fault Finding and Repair Tips
5.9 Software Upgrading
5.1 Test Points
As most signals are digital, it will be difficult to measure
waveforms with a standard oscilloscope. However, several key
ICs are capable of generating test patterns, which can be
controlled via ComPair. In this way it is possible to determine
which part is defective.

Perform measurements under the following conditions:
Service Default Mode.
Video: Colour bar signal.
Audio: 3 kHz left, 1 kHz right.
5.2 Service Modes
Service Default mode (SDM) and Service Alignment Mode
(SAM) offers several features for the service technician, while
the Customer Service Mode (CSM) is used for communication
between the call centre and the customer.
This chassis also offers the option of using ComPair, a
hardware interface between a computer and the TV chassis. It
offers the abilities of structured troubleshooting, error code
reading, and software version read-out for all chassis.
(see also section 5.4.1 ComPair).
Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the
activation of the Service modes. For instance the old MENU
button is now called HOME (or is indicated by a house icon).
5.2.1 Service Default Mode (SDM)
Purpose
To create a pre-defined setting, to get the same
measurement results as given in this manual.
To override SW protections detected by stand-by
processor and make the TV start up to the step just before
protection (a sort of automatic stepwise start-up). See
section 5.3 Stepwise Start-up.
To start the blinking LED procedure where only LAYER 2
errors are displayed. (see also section 5.5 Error Codes).
Specifications
Table 5-1 SDM default settings
All picture settings at 50% (brightness, colour, contrast).
Sound volume at 25%.
All service-unfriendly modes (if present) are disabled, like:
(Sleep) timer.
Child/parental lock.
Picture mute (blue mute or black mute).
Automatic volume levelling (AVL).
Skip/blank of non-favourite pre-sets.
How to Activate SDM
For this chassis there are two kinds of SDM: an analog SDM
and a digital SDM. Tuning will happen according Table 5-1.
Analogue SDM: use the standard RC-transmitter and key
in the code 062596, directly followed by the MENU (or
HOME) button.
Note: It is possible that, together with the SDM, the main
menu will appear. To switch it off, push the MENU(or
HOME) button again.
Digital SDM: use the standard RC-transmitter and key in
the code 062593, directly followed by the MENU (or
HOME) button.
Note: It is possible that, together with the SDM, the main
menu will appear. To switch it off, push the MENU (or
HOME) button again.
Analogue SDM can also be activated by grounding for a
moment the solder path on the SSB, with the indication
SDM (see Service mode pad).
Figure 5-1 Service mode pad
After activating this mode, SDM will appear in the upper right
corner of the screen (when a picture is available).
How to Navigate
When the MENU (or HOME) button is pressed on the RC
transmitter, the TV set will toggle between the SDM and the
normal user menu.
How to Exit SDM
Use one of the following methods:
Switch the set to STAND-BY via the RC-transmitter.
Via a standard customer RC-transmitter: key in 00-
sequence.
Region Freq. (MHz)
Default
system
Europe, AP(PAL/Multi) 475.25 PAL B/G
Europe, AP DVB-T 546.00 PID
Video: 0B 06 PID
PCR: 0B 06 PID
Audio: 0B 07
DVB-T
18770_249_100215.eps
100215
SDM
Service Modes, Error Codes, and Fault Finding EN 24 Q552.1E LA 5.
2010-Feb-19
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5.2.2 Service Alignment Mode (SAM)
Purpose
To perform (software) alignments.
To change option settings.
To easily identify the used software version.
To view operation hours.
To display (or clear) the error code buffer.
How to Activate SAM
Via a standard RC transmitter: Key in the code 062596
directly followed by the INFO button. After activating SAM
with this method a service warning will appear on the screen,
continue by pressing the OK button on the RC.
Contents of SAM (see also Table 6-10)
Hardware Info.
A. SW Version. Displays the software version of the
main software (example: Q555X-1.2.3.4 =
AAAAB_X.Y.W.Z).
AAAA= the chassis name.
B= the SW branch version. This is a sequential
number (this is no longer the region indication, as
the software is now multi-region).
X.Y.W.Z= the software version, where X is the
main version number (different numbers are not
compatible with one another) and Y.W.Z is the sub
version number (a higher number is always
compatible with a lower number).
B. STBY PROC Version. Displays the software
version of the stand-by processor.
C. Production Code. Displays the production code of
the TV, this is the serial number as printed on the back
of the TV set. Note that if an NVM is replaced or is
initialized after corruption, this production code has to
be re-written to NVM. ComPair will foresee in a
possibility to do this.
Operation Hours. Displays the accumulated total of
operation hours (not the stand-by hours). Every time the
TV is switched on/off, 0.5 hours is added to this number.
Errors (followed by maximum 10 errors). The most recent
error is displayed at the upper left (for an error explanation
see section 5.5 Error Codes).
Reset Error Buffer. When cursor right (or the OK
button) is pressed and then the OK button is pressed, the
error buffer is reset.
Alignments. This will activate the ALIGNMENTS sub-
menu. See Chapter 6. Alignments.
Dealer Options. Extra features for the dealers.
Options. Extra features for Service. For more info
regarding option codes, 6. Alignments.
Note that if the option code numbers are changed, these
have to be confirmed with pressing the OK button before
the options are stored. Otherwise changes will be lost.
Initialize NVM. The moment the processor recognizes a
corrupted NVM, the initialize NVM line will be highlighted.
Now, two things can be done (dependent of the service
instructions at that moment):
Save the content of the NVM via ComPair for
development analysis, before initializing. This will give
the Service department an extra possibility for
diagnosis (e.g. when Development asks for this).
Initialize the NVM.
Note: When the NVM is corrupted, or replaced, there is a high
possibility that no picture appears because the display code is
not correct. So, before initializing the NVM via the SAM, a
picture is necessary and therefore the correct display option
has to be entered. Refer to Chapter 6. Alignments for details.
To adapt this option, its advised to use ComPair (the correct
HEX values for the options can be found in Chapter 6.
Alignments) or a method via a standard RC (described below).
Changing the display option via a standard RC: Key in the
code 062598 directly followed by the MENU (or HOME)
button and XXX (where XXX is the 3 digit decimal display
code as mentioned in Table 6-9). Make sure to key in all three
digits, also the leading zeros. If the above action is successful,
the front LED will go out as an indication that the RC sequence
was correct. After the display option is changed in the NVM, the
TV will go to the Stand-by mode. If the NVM was corrupted or
empty before this action, it will be initialized first (loaded with
default values). This initializing can take up to 20 seconds.
Figure 5-2 Location of Display Option Code sticker
Store - go right. All options and alignments are stored
when pressing cursor right (or the OK button) and then
the OK-button.
SW Maintenance.
SW Events. Not useful for Service purposes. In case
of specific software problems, the development
department can ask for this info.
HW Events. Not useful for Service purposes. In case
of specific software problems, the development
department can ask for this info.
Test settings. For development purposes only.
Development file versions. Not useful for Service
purposes, this information is only used by the development
department.
Upload to USB. To upload several settings from the TV to
an USB stick, which is connected to the SSB. The items are
Channel list, Personal settings, Option codes,
Display-related alignments, Identification data and
History list. First a directory repair\ has to be created
in the root of the USB stick. To upload the settings select
each item separately, press cursor right (or the OK
button), confirm with OK and wait until Done appears. In
case the download to the USB stick was not successful
Failure will appear. In this case, check if the USB stick is
connected properly and if the directory repair is present in
the root of the USB stick. Now the settings are stored onto
the USB stick and can be used to download onto another
TV or other SSB. Uploading is of course only possible if the
software is running and if a picture is available. This
method is created to be able to save the customers TV
settings and to store them into another SSB.
Download to USB. To download several settings from the
USB stick to the TV, same way of working needs to be
followed as with uploading. To make sure that the
download of the channel list from USB to the TV is
executed properly, it is necessary to restart the TV and
tune to a valid preset if necessary.
NVM editor. For NET TV the set type must be installed.
Also the production code can be entered via the RC-
transmitter.
How to Navigate
In SAM, the menu items can be selected with the
CURSOR UP/DOWN key on the RC-transmitter. The
selected item will be highlighted. When not all menu items
fit on the screen, move the CURSOR UP/DOWN key to
display the next/previous menu items.
With the CURSOR LEFT/RIGHT keys, it is possible to:
(De) activate the selected menu item.
(De) activate the selected sub menu.
PHILIPS
MODEL:
32PF9968/10
PROD.SERIAL NO:
AG 1A0620 000001
040
39mm
2
7
m
m
(CTN Sticker)
Display Option
Code
E_06532_038.eps
240108
Service Modes, Error Codes, and Fault Finding EN 25 Q552.1E LA 5.
2010-Feb-19
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With the OK key, it is possible to activate the selected
action.
How to Exit SAM
Use one of the following methods:
Switch the TV set to STAND-BY via the RC-transmitter.
Via a standard RC-transmitter, key in 00 sequence, or
select the BACK key.
5.2.3 Customer Service Mode (CSM)
Purpose
When a customer is having problems with his TV-set, he can
call his dealer or the Customer Helpdesk. The service
technician can then ask the customer to activate the CSM, in
order to identify the status of the set. Now, the service
technician can judge the severity of the complaint. In many
cases, he can advise the customer how to solve the problem,
or he can decide if it is necessary to visit the customer.
The CSM is a read only mode; therefore, modifications in this
mode are not possible.

When in this chassis CSM is activated, a testpattern will be
displayed during 5 seconds (1 second Blue, 1 second Green
and 1 second Red, then again 1 second Blue and 1 second
Green). This test pattern is generated by the PNX51X0. So if
this test pattern is shown, it could be determined that the back
end video chain (PNX51X0, LVDS, and display) of the SSB is
working. For TV sets without the PNX51X0 inside, every menu
from CSM will be used as check for the back end video chain.

When CSM is activated and there is a USB stick connected to
the TV set, the software will dump the complete CSM content
to the USB stick. The file (Csm.txt) will be saved in the root of
the USB stick. This info can be handy if no information is
displayed. To have fast feedback from the field, a flashdump
can be requested. While in CSM, push the red button + dial
serial digits 2679 (same keys to form the word COPY with a
cellphone). A file Dump_settype_serienumber.bin will be
written on the connected USB device. This can take 1/2 minute,
depending on the quantity of data that needs to be dumped.

Also when CSM is activated, the LAYER 1 error is displayed via
blinking LED. Only the latest error is displayed. (see also
section 5.5 Error Codes).
How to Activate CSM

Key in the code 123654 via the standard RC transmitter.
Note: Activation of the CSM is only possible if there is no (user)
menu on the screen!
How to Navigate
By means of the CURSOR-DOWN/UP knob on the RC-
transmitter, can be navigated through the menus.
Contents of CSM
The contents are reduced to 3 pages: General, Software
versions and Quality items. The group names itself are not
shown anywhere in the CSM menu.
General
Set Type. This information is very helpful for a helpdesk/
workshop as reference for further diagnosis. In this way, it
is not necessary for the customer to look at the rear of the
TV-set. Note that if an NVM is replaced or is initialized after
corruption, this set type has to be re-written to NVM.
ComPair will foresee in a possibility to do this.
Production Code. Displays the production code (the serial
number) of the TV. Note that if an NVM is replaced or is
initialized after corruption, this production code has to be
re-written to NVM. ComPair will foresee a in possibility to
do this.
Installed date. Indicates the date of the first installation of
the TV. This date is acquired via time extraction.
Options 1. Gives the option codes of option group 1 as set
in SAM (Service Alignment Mode).
Options 2. Gives the option codes of option group 2 as set
in SAM (Service Alignment Mode).
12NC SSB. Gives an identification of the SSB as stored in
NVM. Note that if an NVM is replaced or is initialized after
corruption, this identification number has to be re-written to
NVM. ComPair will foresee in a possibility to do this. This
identification number is the 12nc number of the SSB.
12NC display. Shows the 12NC of the display.
12NC supply. Shows the 12NC of the supply.
12NC 200Hz board. Shows the 12NC of the 200Hz Panel.
Software versions
Current main SW. Displays the build-in main software
version. In case of field problems related to software,
software can be upgraded. As this software is consumer
upgradeable, it will also be published on the Internet.
Example: Q555X_1.2.3.4
Standby SW. Displays the build-in stand-by processor
software version. Upgrading this software will be possible
via ComPair or via USB (see section 5.9 Software
Upgrading).
Example: STDBY_88.68.1.2.
e-UM version. Displays the electronic user manual SW-
version.
Quality items
Signal quality. bad / average /good
Ethernet MAC address. Dispays the MAC address
present in the SSB.
Wireless MAC address. Displays the wireless MAC
address to support the Wi-Fi functionality.
BDS key. Indicates if the set is in the BDS status.
CI slot present. If the common interface module is
detected.
Event counter.
How to Exit CSM
Press MENU (or HOME) / Back key on the RC-transmitter.
Service Modes, Error Codes, and Fault Finding EN 26 Q552.1E LA 5.
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5.3 Stepwise Start-up
When the TV is in a protection state due to an error detected by
stand-by software (error blinking is displayed) and SDM is
activated via shortcutting the SDM solder path on the SSB, the
TV starts up until it reaches the situation just before protection.
So, this is a kind of automatic stepwise start-up. In combination
with the start-up diagrams below, you can see which supplies
are present at a certain moment. Caution: in case the start-up
in this mode with a faulty FET 7U0X is done, you can destroy
all ICs supplied by the +1V8 and +1v1, due to overvoltage (12V
on XVX-line). It is recommended to measure first the FET
7U0X or others FETs on shortcircuit before activating SDM via
the service pads.
The abbreviations SP and MP in the figures stand for:
SP: protection or error detected by the Stand-by
Processor.
MP: protection or error detected by the MIPS Main
Processor.
Figure 5-3 Transition diagram
18770_250_100216.eps
100216
Active
Semi
St by
St by
Mains
on
Mains
off
GoToProtection
- WakeUp requested
- Acquisition needed
- Tact switch pushed
- stby requested and
no data Acquisition
required
- St by requested
- tact SW pushed
WakeUp
requested
Protection
WakeUp
requested
(SDM)
GoToProtection
Hibernate
- Tact switch pushed
- last status is hibernate
after mains ON
Tact switch
pushed
Service Modes, Error Codes, and Fault Finding EN 27 Q552.1E LA 5.
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Figure 5-4 Off to Semi Stand-by flowchart (part 1)
18770_251_100216.eps
100216
No
EJTAG probe
connected ?
No
Yes
Release AVC system reset
Feed warm boot script
Cold boot?
Yes
No
Set IC slave address
of Standby P to (A0h)
An EJTAG probe (e.g. WindPower ICE probe) can be
connected for Linux Kernel debugging purposes.
Detect EJTAG debug probe
(pulling pin of the probe interface to
ground by inserting EJTAG probe)
Release AVC system reset
Feed cold boot script
Release AVC system reset
Feed initializing boot script
disable alive mechanism
Off
Standby Supply starts running.
All standby supply voltages become available.
st-by P resets
Stand by or
Protection
Mains is applied
- Switch Audio-Reset high.
It is low in the standby mode if the standby
mode lasted longer than 10s.
start keyboard scanning, RC detection. Wake up reasons are
off.
If the protection state was left by short circuiting the
SDM pins, detection of a protection condition during
startup will stall the startup. Protection conditions in a
playing set will be ignored. The protection mode will
not be entered.
Detect2 is moved to an interrupt. To be checked if
the detection on interrupt base is feasible or not or if
we should stick to the standard 40ms interval.
+12V, +24Vs, AL and Bolt-on power
is switched on, followed by the +1V2 DCDC converter
Enable the supply detection algorithm
Switch ON Platform and display supply by switching
LOWthe Standby line.
Initialise I/O pins of the st-by P:
- Switch reset-AVC LOW (reset state)
- Switch reset-system LOW (reset state)
- Switch reset-Ethernet LOW (reset state)
- Switch reset-USB LOW (reset state)
- Switch reset-DVBs LOW (reset state)
- keep Audio-reset and Audio-Mute-Up HIGH
Enable the DCDC converters
(ENABLE-3V3n LOW)
No
Detect2 high received
within 2 seconds?
12V error:
Layer1: 3
Layer2: 16
Enter protection
Yes
Wait 50ms
Service Modes, Error Codes, and Fault Finding EN 28 Q552.1E LA 5.
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Figure 5-5 Off to Semi Stand-by flowchart (part 2)
18770_252_100216.eps
100216
Yes
MIPS reads the wake up reason
from standby P.
Semi-Standby
initialize tuner and channel decoders
Initialize video processing ICs
Initialize source selection
initialize AutoTV by triggering CHS AutoTV Init interface
3-th try?
No
Blink Code as
error code
Bootscript ready
in 1250 ms?
Yes
No
Enable Alive check mechanism
Wait until AVC starts to
communicate
SWinitialization
succeeded
within 20s?
No
Switch Standby I/O line high
and wait 4 seconds
RPC start (comm. protocol)
Set IC slave address
of Standby P to (60h)
Yes
Disable all supply related protections and
switch off the +3V3 +5V DC/DC converter.
switch off the remaining DC/DC
converters
Wait 5ms
Switch AVC PNX85500 in
reset (active low)
Wait 10ms
Flash to Ram
image transfer succeeded
within 30s?
No
Yes
Code =
Layer1: 2
Layer2: 53
Code =
Layer1: 2
Layer2: 15
Initialize Ambilight with Lights off.
Timing need to be updated if
more mature info is available.
Timing needs to
be updated if more
mature info is
available.
Timing needs to be
updated if more
mature info is
available.
Initialize audio
Enter protection
Reset-system is switched HIGH by the
AVC at the end of the bootscript
AVC releases Reset-Ethernet, Reset-USB and
Reset-DVBs when the end of the AVC boot-
script is detected
This cannot be done through the bootscript,
the I/O is on the standby P
Reset-Audio and Audio-Mute-Up are
switched by MIPS code later on in the
startup process
Reset-system is switched HIGH by the
AVC at the end of the bootscript
Reset-Audio and Audio-Mute-Up are
switched by MIPS code later on in the
startup process
Wake up reason
coldboot & not semi-
standby?
85500 sends out startup screen
Startup screen cfg file
present?
85500 starts up the display.
Startup screen visible
yes
yes
To keep this flowchart readable, the exact
display turn on description is not copied
here. Please see the Semi-standby to On
description for the detailed display startup
sequence.
During the complete display time of the
Startup screen, the preheat condition of
100% PWM is valid.
No
No
Startup screen shall only be visible when there is a coldboot to
an active state end situation. The startup screen shall not be
visible when waking up for reboot reasons or waking up to semi-
standby conditions or waking up to enter Hibernate mode..
The first time after the option turn on of the startup screen or
when the set is virgin, the cfg file is not present and hence
the startup screen will not be shown.
AVC releases Reset-Ethernet, Reset-USB and
Reset-DVBs when the end of the AVC boot-
script is detected
200Hz set?
No
yes
85500 sends out startup screen
200Hz Tcon has started up the
display.
Startup screen visible
85500 requests Lamp on
Service Modes, Error Codes, and Fault Finding EN 29 Q552.1E LA 5.
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Figure 5-6 Semi Stand-by to Active flowchart (EEFL or LED backlight 50/100 Hz only)
18770_253_100216.eps
100216
Active
Semi Standby
Initialize audio and video
processing IC's and functions
according needed use case.
Assert RGB video blanking
and audio mute
Wait until previous on-state is left more than 2
seconds ago. (to prevent LCD display problems)
The assumption here is that a fast toggle (<2s) can
only happen during ON->SEMI ->ON. In these states,
the AVC is still active and can provide the 2s delay. A
transition ON->SEMI->STBY->SEMI->ON cannot be
made in less than 2s, because the standby state will
be maintained for at least 4s.
Switch Audio-Reset low and wait 5ms
Constraints taken into account:
- Display may only be started when valid LVDS output clock can be delivered by the AVC.
- To have a reliable operation of the EEFL backlight, the backlight should be driven with a maximum PWM duty
cycle during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output
level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts,
the picture should only be unblanked after these first seconds.
Restore dimming backlight feature, PWM and BOOST output
and unblank the video.
Wait until valid and stable audio and video, corresponding to the
requested output is delivered by the AVC
AND
the backlight has been switched on for at least the time which is
indicated in the display file as preheat time.
The higher level requirement is that audio and video
should be demuted without transient effects and that
the audio should be demuted maximum 1s before or
at the same time as the unblanking of the video.
Release audio mute and wait 100ms before any other audio
handling is done (e.g. volume change)
CPipe already generates a valid output
clock in the semi-standby state: display
startup can start immediately when leaving
the semi-standby state.
Switch on LCD backlight (Lamp-ON)
Switch off the dimming backlight feature, set
the BOOST control to nominal and make sure
PWM output is set to maximum allowed PWM
Switch on the Ambilight functionality according the last status
settings.
Delay Lamp-on with the sum of the LVDS delay and
the Lamp delay indicated in the display file
Switch on the display power by
switching LCD-PWR-ON low
Wait x ms
Switch on LVDS output in the 85500
No
The exact timings to
switch on the
display (LVDS
delay, lamp delay)
are defined in the
display file.
Start POK line
detection algorithm
return
Display already on?
(splash screen)
Yes
Display cfg file present
and up to date, according
correct display option?
Startup screen Option
and Installation setting
Photoscreen ON?
Yes
No
Prepare Start screen Display config
file and copy to Flash
No
Yes
A LED set does not normally need a
preheat time. The preheat remains present
but is set to zero in the display file.
Service Modes, Error Codes, and Fault Finding EN 30 Q552.1E LA 5.
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Figure 5-7 Semi Stand-by to Active flowchart (LED backlight 200 Hz)
18770_254_100216.eps
100216
Active
Semi Standby
Initialize audio and video
processing IC's and functions
according needed use case.
Assert RGB video blanking
and audio mute
Wait until previous on-state is left more than 2
seconds ago. (to prevent LCD display problems)
The assumption here is that a fast toggle (<2s)
can only happen during ON->SEMI ->ON. In
these states, the AVC is still active and can
provide the 2s delay. If the transition ON->SEMI-
>STBY->SEMI->ON can be made in less than 2s,
we have to delay the semi -> stby transition until
the requirement is met.
Switch Audio-Reset low and wait 5ms
unblank the video.
Wait until valid and stable audio and video, corresponding to
the requested output is delivered by the AVC.
The higher level requirement is that audio and
video should be demuted without transient
effects and that the audio should be demuted
maximum 1s before or at the same time as the
unblanking of the video.
Release audio mute and wait 100ms before any other audio
handling is done (e.g. volume change)
Request Tcon to Switch on the backlight in a
direct LED or
set Lamp-on I/O line in case of a side LED
Switch on the Ambilight functionality according the last status
settings.
There is no need to define the
display timings since the timing
implementation is part of the Tcon.
Start POK line
detection algorithm
return
Display cfg file present
and up to date, according
correct display option?
Startup screen Option
and Installation setting
Photoscreen ON?
Yes
No
Prepare Start screen Display config
file and copy to Flash
No
Yes
Backlight already on?
(splash screen)
No
Yes
Service Modes, Error Codes, and Fault Finding EN 31 Q552.1E LA 5.
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Figure 5-8 Active to Semi Stand-by flowchart
18770_255_100216.eps
100216
Semi Standby
Active
Wait x ms (display file)
Mute all sound outputs via softmute
Mute all video outputs
switch off LCD backlight
(I/O or IC)
Force ext audio outputs to ground
(I/O: audio reset)
And wait 5ms
switch off Ambilight
Set main amplifier mute (I/O: audio-mute)
Wait 100ms
Wait until Ambilight has faded out: Output power
Observer should be zero
Switch off the display power by
switching LCD-PWR-ON high
Wait x ms
Switch off LVDS output in 85500
The exact timings to
switch off the
display (LVDS
delay, lamp delay)
are defined in the
display file.
Switch off POK line
detection algorithm
200Hz set?
No
Yes
Instruct 200Hz
Tcon to turn off
the display
Service Modes, Error Codes, and Fault Finding EN 32 Q552.1E LA 5.
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Figure 5-9 Semi Stand-by to Stand-by flowchart
18770_256_100216.eps
100216
transfer Wake up reasons to the Stand by P.
Stand by
Semi Stand by
Disable all supply related protections and switch off
the DC/DC converters (ENABLE-3V3n)
Switch OFF all supplies by switching HIGH the
Standby I/O line
Switch AVC system in reset state (reset-system and
reset-AVC lines)
Switch reset-USB, Reset-Ethernet and Reset-DVBs
LOW
Important remarks:
release reset audio 10 sec after entering
standby to save power
Also here, the standby state has to be
maintained for at least 4s before starting
another state transition.
Wait 5ms
Wait 10ms
Delay transition until ramping down of ambient light is
finished. *)
If ambientlight functionality was used in semi-standby
(lampadaire mode), switch off ambient light (see CHS
ambilight)
*) If this is not performed and the set is
switched to standby when the switch off of
the ambilights is still ongoing, the lights will
switch off abruptly when the supply is cut.
Switch Memories to self-refresh (this creates a more
stable condition when switching off the power).
Service Modes, Error Codes, and Fault Finding EN 33 Q552.1E LA 5.
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5.4 Service Tools
5.4.1 ComPair
Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products. and offers the following:
1. ComPair helps to quickly get an understanding on how to
repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. No
knowledge on I
2
C or UART commands is necessary,
because ComPair takes care of this.
3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the P
is working) and all repair information is directly available.
4. ComPair features TV software up possibilities.
Specifications
ComPair consists of a Windows based fault finding program
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an
USB cable. For the TV chassis, the ComPair interface box and
the TV communicate via a bi-directional cable via the service
connector(s).
The ComPair fault finding program is able to determine the
problem of the defective television, by a combination of
automatic diagnostics and an interactive question/answer
procedure.
How to Connect
This is described in the chassis fault finding database in
ComPair.
Figure 5-10 ComPair II interface connection
Caution: It is compulsory to connect the TV to the PC as
shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs will be
blown!
How to Order
ComPair II order codes:
ComPair II interface: 3122 785 91020.
Software is available via the Philips Service web portal.
ComPair UART interface cable for Q55x.x.
(using 3.5 mm Mini Jack connector): 3138 188 75051.

Note: While encounting problems, contact the local support
desk.
5.5 Error Codes
5.5.1 Introduction
The error code buffer contains all detected errors since the last
time the buffer was erased. The buffer is written from left to
right, new errors are logged at the left side, and all other errors
shift one position to the right.
When an error occurs, it is added to the list of errors, provided
the list is not full. When an error occurs and the error buffer is
full, then the new error is not added, and the error buffer stays
intact (history is maintained).
To prevent that an occasional error stays in the list forever, the
error is removed from the list after more than 50 hrs. of
operation.
When multiple errors occur (errors occurred within a short time
span), there is a high probability that there is some relation
between them.

New in this chassis is the way errors can be displayed:

If no errors are there, the LED should not blink at all in
CSM or SDM. No spacer must be displayed as well.
There is a simple blinking LED procedure for board
level repair (home repair) so called LAYER 1 errors
next to the existing errors which are LAYER 2 errors (see
Table 5-2).
LAYER 1 errors are one digit errors.
LAYER 2 errors are 2 digit errors.
In protection mode.
From consumer mode: LAYER 1.
From SDM mode: LAYER 2.
Fatal errors, if I2C bus is blocked and the set reboots,
CSM and SAM are not selectable.
From consumer mode: LAYER 1.
From SDM mode: LAYER 2.
In CSM mode.
When entering CSM: error LAYER 1 will be displayed
by blinking LED. Only the latest error is shown.
In SDM mode.
When SDM is entered via Remote Control code or the
hardware pins, LAYER 2 is displayed via blinking LED.
Error display on screen.
In CSM no error codes are displayed on screen.
In SAM the complete error list is shown.

Basically there are three kinds of errors:
Errors detected by the Stand-by software which lead to
protection. These errors will always lead to protection and
an automatic start of the blinking LED LAYER 1 error.
(see section 5.6 The Blinking LED Procedure).
Errors detected by the Stand-by software which not
lead to protection. In this case the front LED should blink
the involved error. See also section 5.5 Error Codes, 5.5.4
Error Buffer, Extra Info. Note that it can take up several
minutes before the TV starts blinking the error (e.g. LAYER
1 error = 2, LAYER 2 error = 15 or 53).
Errors detected by main software (MIPS). In this case
the error will be logged into the error buffer and can be read
out via ComPair, via blinking LED method LAYER 1-2
error, or in case picture is visible, via SAM.
5.5.2 How to Read the Error Buffer
Use one of the following methods:
On screen via the SAM (only when a picture is visible).
E.g.:
00 00 00 00 00: No errors detected
23 00 00 00 00: Error code 23 is the last and only
detected error.
37 23 00 00 00: Error code 23 was first detected and
error code 37 is the last detected error.
Note that no protection errors can be logged in the
error buffer.
10000_036_090121.eps
091118
TO
UART SERVICE
CONNECTOR
TO
UART SERVICE
CONNECTOR
TO
I2C SERVICE
CONNECTOR
TO TV
PC
HDMI
I
2
C only
Optional power
5V DC
ComPair II Developed by Philips Brugge
RC out
RC in
Optional
Switch
Power Mode Link/
Activity I
2
C
ComPair II
Multi
function
RS232 /UART
Service Modes, Error Codes, and Fault Finding EN 34 Q552.1E LA 5.
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Via the blinking LED procedure. See section 5.5.3 How to
Clear the Error Buffer.
Via ComPair.
5.5.3 How to Clear the Error Buffer
Use one of the following methods:
By activation of the RESET ERROR BUFFER command
in the SAM menu.
If the content of the error buffer has not changed for 50+
hours, it resets automatically.
5.5.4 Error Buffer
In case of non-intermittent faults, clear the error buffer before
starting to repair (before clearing the buffer, write down the
content, as this history can give significant information). This to
ensure that old error codes are no longer present.
If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another error
code and not the actual cause (e.g. a fault in the protection
detection circuitry can also lead to a protection).
There are several mechanisms of error detection:
Via error bits in the status registers of ICs.
Via polling on I/O pins going to the stand-by processor.
Via sensing of analog values on the stand-by processor or
the PNX85500.
Via a not acknowledge of an I
2
C communication.
Take notice that some errors need several minutes before they
start blinking or before they will be logged. So in case of
problems wait 2 minutes from start-up onwards, and then
check if the front LED is blinking or if an error is logged.
Table 5-2 Error code overview
Extra Info
Rebooting. When a TV is constantly rebooting due to
internal problems, most of the time no errors will be logged
or blinked. This rebooting can be recognized via a ComPair
interface and Hyperterminal (for Hyperterminal settings,
see section 5.8 Fault Finding and Repair Tips, 5.8.6
Logging). Its shown that the loggings which are generated
by the main software keep continuing. In this case
diagnose has to be done via ComPair.
Error 13 (I
2
C bus 3, SSB bus blocked). At the time of
release of this manual, this error was not working as
expected. Current situation: when this error occurs, the TV
will constantly reboot due to the blocked bus. The best way
for further diagnosis here, is to use ComPair.
Error 14 (I
2
C bus 2, TV set bus blocked). At the time of
release of this manual, this error was not working as
expected. Current situation: when this error occurs, the TV
will constantly reboot due to the blocked bus. The best way
for further diagnosis here, is to use ComPair.
Error 18 (I
2
C bus 4, Tuner bus blocked). At the time of
release of this manual, this error was not working as
expected. Current situation: when this error occurs, the TV
will constantly reboot due to the blocked bus. The best way
for further diagnosis here, is to use ComPair.
Error 15 (PNX8550 doesnt boot). Indicates that the main
processor was not able to read his bootscript. This error will
point to a hardware problem around the PNX8550
(supplies not OK, PNX 8550 completely dead, I
2
C link
between PNX and Stand-by Processor broken, etc...).
When error 15 occurs it is also possible that I
2
C1 bus is
blocked (NVM). I
2
C1 can be indicated in the schematics as
follows: SCL-UP-MIPS, SDA-UP-MIPS.
Other root causes for this error can be due to hardware
problems regarding the DDRs and the bootscript reading
from the PNX8550.
Error 16 (12V). This voltage is made in the power supply
and results in protection (LAYER 1 error = 3) in case of
absence. When SDM is activated we see blinking LED
LAYER 2 error = 16.
Error 17 (Invertor or Display Supply). Here the status of
the Power OK is checked by software, no protection will
occur during failure of the invertor or display supply (no
picture), only error logging. LED blinking of LAYER 1
error = 3 in CSM, in SDM this gives LAYER 2 error = 17.
Error 23 (HDMI). When there is no I
2
C communication
towards the HDMI mux after start-up, LAYER 2 error = 23
will be logged and displayed via the blinking LED
procedure if SDM is switched on.
Error 24 (I2C switch). When there is no I
2
C
communication towards the I
2
C switch, LAYER 2
error = 24 will be logged and displayed via the blinking LED
procedure when SDM is switched on. Remark : this only
works for TV sets with an I
2
C controlled screen included.
Error 28 (Channel dec DVB-S). When there is no I
2
C
communication towards the DVB-S channel decoder,
LAYER 2 error = 28 will be logged and displayed via the
blinking LED procedure if SDM is switched on.
Error 31 (Lnb controller). When there is no I
2
C
communication towards this device, LAYER 2 error = 31
Description Layer 1 Layer 2
Monitored
by
Error/
Prot
Error Buffer/
Blinking LED Device Defective Board
I
2
C3 2 13 MIPS E BL / EB SSB SSB
I
2
C2 2 14 MIPS E BL / EB SSB SSB
I
2
C4 2 18 MIPS E BL / EB SSB SSB
PNX doesnt boot (HW cause) 2 15 Stby P P BL PNX8550 SSB
12V 3 16 Stby P P BL / Supply
Inverter or display supply 3 17 MIPS E EB / Supply
HDMI mux 2 23 MIPS E EB Sil9x87A SSB
I2C switch 2 24 MIPS E EB PCA9540 SSB
Channel dec DVB-S 2 28 MIPS E EB STV0903 SSB
Lnb controller 2 31 MIPS E EB LNBH23 SSB
Tuner 2 34 MIPS E EB DTT 71300 SSB
Main nvm 2 35 MIPS E EB STM24C64 SSB
Tuner DVB-S 2 36 MIPS E EB STV6110 SSB
T sensor SSB/set 2 42 MIPS E EB LM 75 T sensor
T sensor LED driver/Tcon 7 42 MIPS E EB LM 75 T sensor
PNX doesnt boot (SW cause) 2 53 Stby P P BL PNX8550 SSB
Display 5 64 MIPS E BL / EB Altera Display
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will be logged and displayed via the blinking LED
procedure if SDM is activated.
Error 34 (Tuner). When there is no I
2
C communication
towards the tuner during start-up, LAYER 2 error = 34 will
be logged and displayed via the blinking LED procedure
when SDM is switched on.
Error 35 (main NVM). When there is no I
2
C
communication towards the main NVM during start-up,
LAYER 2 error = 35 will be displayed via the blinking LED
procedure when SDM is switched on. All service modes
(CSM, SAM and SDM) are accessible during this failure,
observed in the Uart logging as follows : "<< ERRO >>>
PFPOW_.C : First Error (id19, Layer_1= 2 Layer_= 35)".
Error 36 (Tuner DVB-S). When there is no I
2
C
communication towards the DVB-S tuner during start-up,
LAYER 2 error = 36 will be logged and displayed via the
blinking LED procedure when SDM is switched on.
Error 42 (Temp sensor). Only applicable for TV sets
equipped with temperature devices.
Error 53. This error will indicate that the PNX8550 has
read his bootscript (when this would have failed, error 15
would blink) but initialization was never completed because
of hardware problems (NAND flash, ...) or software
initialization problems. Possible cause could be that there
is no valid software loaded (try to upgrade to the latest main
software version). Note that it can take a few minutes
before the TV starts blinking LAYER 1 error = 2 or in SDM,
LAYER 2 error = 53.
Error 64. Only applicable for TV sets with an I
2
C controlled
screen .
5.6 The Blinking LED Procedure
5.6.1 Introduction
The blinking LED procedure can be split up into two situations:
Blinking LED procedure LAYER 1 error. In this case the
error is automatically blinked when the TV is put in CSM.
This will be only one digit error, namely the one that is
referring to the defective board (see table 5-2 Error code
overview) which causes the failure of the TV. This
approach will especially be used for home repair and call
centres. The aim here is to have service diagnosis from a
distance.
Blinking LED procedure LAYER 2 error. Via this procedure,
the contents of the error buffer can be made visible via the
front LED. In this case the error contains 2 digits (see table
5-2 Error code overview) and will be displayed when SDM
(hardware pins) is activated. This is especially useful for
fault finding and gives more details regarding the failure of
the defective board.
Important remark:
For an empty error buffer, the LED should not blink at all in
CSM or SDM. No spacer will be displayed.
When one of the blinking LED procedures is activated, the front
LED will show (blink) the contents of the error buffer. Error
codes greater then 10 are shown as follows:
1. n long blinks (where n = 1 to 9) indicating decimal digit
2. A pause of 1.5 s
3. n short blinks (where n= 1 to 9)
4. A pause of approximately 3 s,
5. When all the error codes are displayed, the sequence
finishes with a LED blink of 3 s (spacer).
6. The sequence starts again.

Example: Error 12 8 6 0 0.
After activation of the SDM, the front LED will show:
1. One long blink of 750 ms (which is an indication of the
decimal digit) followed by a pause of 1.5 s
2. Two short blinks of 250 ms followed by a pause of 3 s
3. Eight short blinks followed by a pause of 3 s
4. Six short blinks followed by a pause of 3 s
5. One long blink of 3 s to finish the sequence (spacer).
6. The sequence starts again.
5.6.2 How to Activate
Use one of the following methods:
Activate the CSM. The blinking front LED will show only
the latest layer 1 error, this works in normal operation
mode or automatically when the error/protection is
monitored by the standby processor.
In case no picture is shown and there is no LED blinking,
read the logging to detect whether error devices are
mentioned. (see section 5.8 Fault Finding and Repair
Tips, 5.8.6 Logging).
Activate the SDM. The blinking front LED will show the
entire content of the LAYER 2 error buffer, this works in
normal operation mode or when SDM (via hardware pins)
is activated when the tv set is in protection.
5.7 Protections
5.7.1 Software Protections
Most of the protections and errors use either the stand-by
microprocessor or the MIPS controller as detection device.
Since in these cases, checking of observers, polling of ADCs,
and filtering of input values are all heavily software based,
these protections are referred to as software protections.
There are several types of software related protections, solving
a variety of fault conditions:
Related to supplies: presence of the +5V, +3V3 and 1V2
needs to be measured, no protection triggered here.
Protections related to breakdown of the safety check
mechanism. E.g. since the protection detections are done
by means of software, failing of the software will have to
initiate a protection mode since safety cannot be
guaranteed any more.
Remark on the Supply Errors
The detection of a supply dip or supply loss during the normal
playing of the set does not lead to a protection, but to a cold
reboot of the set. If the supply is still missing after the reboot,
the TV will go to protection.
Protections during Start-up
During TV start-up, some voltages and IC observers are
actively monitored to be able to optimise the start-up speed,
and to assure good operation of all components. If these
monitors do not respond in a defined way, this indicates a
malfunction of the system and leads to a protection. As the
observers are only used during start-up, they are described in
the start-up flow in detail (see section 5.3 Stepwise Start-up).
5.7.2 Hardware Protections
The only real hardware protection in this chassis appears in
case of an audio problem e.g. DC voltage on the speakers. This
protection will only affect the Class D audio amplifier (item
7D10; see diagram B03A) and puts the amplifier in a
continuous burst mode (cyclus approximately 2 seconds).
Repair Tip
There still will be a picture available but no sound. While
the Class D amplifier tries to start-up again, the cone of the
loudspeakers will move slowly in one or the other direction
until the initial failure shuts the amplifier down, this cyclus
starts over and over again. The headphone amplifier will
also behaves similar.
Service Modes, Error Codes, and Fault Finding EN 36 Q552.1E LA 5.
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5.8 Fault Finding and Repair Tips
Read also section 5.5 Error Codes, 5.5.4 Error Buffer, Extra
Info.
5.8.1 Ambilight
Due to degeneration process of the LEDs fitted on the ambi
module, there can be a difference in the colour and/or light
output of the spare ambilight modules in comparison with the
originals ones contained in the TV set. Via SAM => alignments
=> ambilight, the spare module can be adjusted.
5.8.2 Audio Amplifier
The Class D-IC 7D10 has a powerpad for cooling. When the IC
is replaced it must be ensured that the powerpad is very well
pushed to the PWB while the solder is still liquid. This is needed
to insure that the cooling is guaranteed, otherwise the Class D-
IC could break down in short time.
5.8.3 CSM
When CSM is activated and there is a USB stick connected to
the TV, the software will dump the complete CSM content to the
USB stick. The file (Csm.txt) will be saved in the root of the USB
stick. If this mechanism works it can be concluded that a large
part of the operating system is already working (MIPS, USB...)
5.8.4 DC/DC Converter
Description basic board

The basic board power supply consists of 4 DC/DC converters
and 5 linear stabilizers. All DC/DC converters have +12V input
voltage and deliver :
+1V1 supply voltage (1.15V nominal), for the core voltage
of PNX85500, stabilized close to the point of load;
SENSE+1V1 signal provides the DC-DC converter the
needed feedback to achieve this.
+1V8 supply voltage, for the DDR2 memories and DDR2
interface of PNX85500.
+3V3 supply voltage (3.30V nominal), overall 3.3 V for
onboard ICs, for non-5000 series SSB diversities only.
+5V (5.15V nominal) for USB, WIFI and Conditional
Access Module and +5V5-TUN for +5V-TUN tuner
stabilizer.

The linear stabilizers are providing:
+1V2 supply voltage (1.2V nominal), stabilized close to
PNX85500 device, for various other internal blocks of
PNX85500; SENSE+1V2 signal provides the needed
feedback to achieve this.
+2V5 supply voltage (2.5V nominal) for LVDS interface and
various other internal blocks of PNX85500; for 5000 series
SSB diversities the stabilizer is 7UD2 while for the other
diversities 7UC0 is used.
+3V3 supply voltage (3V3 nominal) for 5000 series SSB
diversities, provided by 7UD3; in this case the 12V to 3V3
DC-DC converter is not present.
+5V-TUN supply voltage (5V nominal) for tuner and IF
amplifier.

+3V3-STANDY (3V3 nominal) is the permanent voltage,
supplying the standby microprocessor inside PNX85500.

Supply voltage +1V1 is started immediately when +12V voltage
becomes available (+12V is enabled by STANDBY signal when
low). Supply voltages +3V3, +2V5, +1V8, +1V2 and +5V-TUN
are switched on by signal ENABLE-3V3 when low, provided
that +12V (detected via 7U40 and 7U41) is present.
+12V is considered OK (=> DETECT2 signal becomes high,
+12V to +1V8, +12V to +3V3, +12V to +5V DC-DC converter
can be started up) if it rises above 10V and doesnt drop below
9V5. A small delay of a few milliseconds is introduced between
the start-up of 12V to +1V8 DC-DC converter and the two other
DC-DC converters via 7U48 and associated components.

Description DVB-S2:
LNB-RF1 (0V = disabled, 14V or 18V in normal operation)
LNB supply generated via the second conversion channel
of 7T03 followed by 7T50 LNB supply control IC.It provides
supply voltage that feeds the outdoor satellite reception
equipment.
+3V3-DVBS (3V3 nominal), +2V5-DVBS (2V5 nominal)
and +1V-DVBS (1.03V nominal) power supply for the
silicon tuner and channel decoder. +1V-DVBS is generated
via a 5V to 1V DC-DC converter and is stabilized at the
point of load (channel decoder) by means of feedback
signal SENSE+1V0-DVBS. +3V3-DVBS and +2V5-DVBS
are generated via linear stabilizers from +5V-DVBS that by
itself is generated via the first conversion channel of 7T03.
At start-up, +24V becomes available when STANDBY signal is
low (together with +12V for the basic board), when +3V3 from
the basic board is present the two DC-DC converters channels
inside 7T03 are activated. Initially only the 24V to 5V converter
(channel 1 of 7T03 generating +5V-DVBS) will effectively work,
while +V-LNB is held at a level around 11V7 via diode 6T55.
After 7T05 is initialized, the second channel of 7T03 will start
and generates a voltage higher then LNB-RF1 with 0V8. +5V-
DVBS start-up will imply +3V3-DVBS start-up, with a small
delay of a few milliseconds => +2V5-DVBS and +1V-DVBS will
be enabled.
If +24V drops below +15V level then the DVB-S2 supply will
stop, even if +3V3 is still present..
Debugging
The best way to find a failure in the DC/DC converters is to
check their start-up sequence at power-on via the mains cord,
presuming that the standby microprocessor and the external
supply are operational. Take STANDBY signal high-to-low
transition as time reference.
When +12V becomes available (maximum 1 second after
STANDBY signal goes low) then +1V1 is started immediately.
After ENABLE-3V3 goes low, all the other supply voltages
should rise within a few milliseconds.
Tips
Behaviour comparison with a reference TV550 platform
can be a fast way to locate failures.
If +12V stays low, check the integrity of fuse 1U40.
Check the integrity (at least no short circuit between drain
and source) of the power MOS-FETs before starting up the
platform in SDM, otherwise many components might be
damaged. Using a ohmmeter can detect short circuits
between any power rail and ground or between +12V and
any other power rail.
Short circuit at the output of an integrated linear stabilizer
(7UC0, 7UD2 or 7UD3) will heat up this device strongly.
Switching frequencies should be 500 kHz ...600 kHz for
12 V to 1.1 V and 12 V to 1.8 V DC-DC converters,
900 kHz for 12 V to 3.3 V and 12 V to 5 V DC-DC
converters. The DVB-S2 supply 24 V to 5 V and 24 V to +V
LNB DC-DC converters operates at 300 kHz while for 5 V
to 1.1 V DC-DC converter 900 kHz is used.
5.8.5 Exit Factory Mode
When an F is displayed in the screens right corner, this
means the set is in Factory mode, and it normally
happens after a new SSB is mounted. To exit this mode, push
the VOLUME minus button on the TVs local keyboard for 10
seconds (this disables the continuous mode).
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Then push the SOURCE button for 10 seconds until the F
disappears from the screen.
5.8.6 Logging
When something is wrong with the TV set (f.i. the set is
rebooting) you can check for more information via the logging
in Hyperterminal. The Hyperterminal is available in every
Windows application via Programs, Accessories,
Communications, Hyperterminal. Connect a ComPair UART-
cable (3138 188 75051) from the service connector in the TV to
the multi function jack at the front of ComPair II box.
Required settings in ComPair before starting to log :
- Start up the ComPair application.
- Select the correct database (open file Q55X.X, this will set
the ComPair interface in the appropriate mode).
- Close ComPair
After start-up of the Hyperterminal, fill in a name (f.i. logging)
in the Connection Description box, then apply the following
settings:
1. COMx
2. Bits per second = 115200
3. Data bits = 8
4. Parity = none
5. Stop bits = 1
6. Flow control = none
During the start-up of the TV set, the logging will be displayed.
This is also the case during rebooting of the TV set (the same
logging appears time after time). Also available in the logging
is the Display Option Code (useful when there is no picture),
look for item DisplayRawNumber in the beginning of the
logging. Tip: when there is no picture available during rebooting
you are able to check for error devices in the logging (LAYER
2 error) which can be very helpful to determine the failure cause
of the reboot. For protection state, there is no logging.
5.8.7 Loudspeakers
Make sure that the volume is set to minimum during
disconnecting the speakers in the ON-state of the TV. The
audio amplifier can be damaged by disconnecting the speakers
during ON-state of the set!
5.8.8 PSL
In case of no picture when CSM (test pattern) is activated and
backlight doesnt light up, its recommended first to check the
inverter on the PSL + wiring (LAYER 2 error = 17 is displayed
in SDM).
5.8.9 Tuner
Attention: In case the tuner is replaced, always check the tuner
options!
5.8.10 Display option code
Attention: In case the SSB is replaced, always check the
display option code in SAM, even when picture is available.
Performance with the incorrect display option code can lead to
unwanted side-effects for certain conditions.
New in this chassis:
While in the download application (start up in TV mode + OK
button pressed), the display option code can be changed via
062598 HOME XXX special SAM command (XXX=display
option in 3 digits).
Service Modes, Error Codes, and Fault Finding EN 38 Q552.1E LA 5.
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5.8.11 SSB Replacement
Follow the instructions in the flowchart in case a SSB has to be
exchanged. See figure SSB replacement flowchart.
Figure 5-11 SSB replacement flowchart
H_16771_007a.eps
091119
START
Connect the USB sti ck to the set,
go to SAM and save the current TV settings via Upload to USB
Set i s sti l l oper ati ng?
Yes
1. Di sconnect the WiFi modul e fr om the PCI connector (only for Q549.x SSB)
2. Replace the SSB by a Service SSB.
3. Place the WiFi module in the PCI connector.
4. Mount the Service SSB in the set.
Set behavi our?
Yes
No
No
Inst ruct ion not e SSB replacement Q543.x - Q548.x - Q549.x
Before starting:
- prepare a USB memory stick with the latest software
- download the latest Main Software (Fus) from www.p4c.philips.com
- unzip this file
- create a folder upgrades in the root of a USB stick (size > 50 MB) and
save the autorun.upg file in this "upgrades" folder.
Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this in
case there are more than one "autorun.upg" files on the USB stick.
No pi ctur e displayed Pi ctur e displayed
Set is starting up without software
upgrade menu appearing on screen
Pi ctur e displayed
Set is starting up with software
upgrade menu appearing on screen
Due to a possible wrong display option code in the received Service
SSB (NVM), its possible that no picture is displayed. Due to this
the download application will not be shown either. This tree enables you
to load the main software step-by-step via the UART logging on the PC
(this for visual feedback).
Start-up the set
1) Start up the TV set, equiped with the Service SSB,
and enable the UART logging on the PC.
2) The TV set will start-up automatically in the
download application if main TV software is not loaded.
3) Plug the prepared USB stick into the TV set. Follow the
instructions in the UART log file, press Right cursor key to enter
the list. Navigate to the autorun.upg file in the UART logging
printout via the cursor keys on the remote control. When the
correct file is selected, press Ok.
4) Press "Down" cursor and Ok to start flashing the main
TV software. Printouts like: L: 1-100%, V: 1-100% and
P: 1-100% should be visible now in the UART logging.
5) Wait until the message Operation successful ! is logged in
the UART log and remove all inserted media. Restart the TV set.
1) Plug the USB stick into the TV set and select
the autorun .upg file in the displayed browser.
2) Now the main software will be loaded automatically,
supported by a progress bar.
3) Wait until the message Operation successful ! is displayed
and remove all inserted media. Restart the TV set.
Set the correct Display code via 062598 -HOME- xxx where
xxx is the 3 digit display panel code (see sticker on the side
or bottom of the cabinet)
After entering the Display Option code, the set is going to
Standby
(= validation of code)
Restart the set
Connect PC via the ComPair interface to Service connector.
Start TV in Jett mode (DVD I + (OSD))
Open ComPair browser Q54x
Program set type number, serial number, and display 12 NC
Program E - DFU if needed.
Go to SAM and reload settings
via Download from USB function.
In case of settings reloaded from USB, the set type,
serial number, display 12 NC, are automatically stored
when entering display options.
- Check if correct display option code is programmed.
- Verify option codes according to sticker inside the set.
- Default settings for white drive > see Service Manual.
Q54x.E SSB Board swap VDS
Updated 19-08-2009
If not already done:
Check latest software on Service website.
Update main and Stand-by software via USB.
Check and perform alignments in SAM according to the
Service Manual. Option codes, colour temperature, etc.
Final check of all menus in CSM.
Special attention for HDMI Keys and Mac address.
Check if E - D F U is present.
End
Attention point for Net TV: If the set type and serial number are not
filled in, the Net TV functionality will not work. It will not be possible
to connect to the internet.
Saved settings
on USB stick?
Service Modes, Error Codes, and Fault Finding EN 39 Q552.1E LA 5.
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Figure 5-12 SSB replacement flowchart - Factory mode
H_16771_007b.eps
091119
Restart the set
Set is st art ing up in Fact ory mode
Set is starting up in Factory mode?
Noisy picture with bands/lines is visible and the
RED LED is continuous on.
An F is displayed and the HDMI 1
input is displayed.
- Press the volume minus button on the TVs local keyboard for 10
seconds
- Press the SOURCE button for 10 seconds until the F disappears
from the screen or the noise on the screen is replaced by blue mute
The noise on the screen is replaced
with the blue mute or the F is disappeared!
Unplug the mainscord to verify the correct
disabling of the factory-mode.
Program display option code
via 062598 MENU, followed by
the 3 digits code of the display
(this code can be found
on a sticker inside the set).
After entering display option code, the set is
going in stand-by mode (= validation of code)

Service Modes, Error Codes, and Fault Finding EN 40 Q552.1E LA 5.
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5.9 Software Upgrading
5.9.1 Introduction
The set software and security keys are stored in a NAND-
Flash, which is connected to the PNX85500.
It is possible for the user to upgrade the main software via the
USB port. This allows replacement of a software image in a
stand alone set, without the need of an E-JTAG debugger. A
description on how to upgrade the main software can be found
in the electronic User Manual.
Important: When the NAND-Flash must be replaced, a new
SSB must be ordered, due to the presence of the security keys!
(CI +, MAC address, ...).
Perform the following actions after SSB replacement:
1. Set the correct option codes (see sticker inside the TV).
2. Update the TV software => see the eUM (electronic User
Manual) for instructions.
3. Perform the alignments as described in chapter 6 (section
6.5 Reset of Repaired SSB).
4. Check in CSM if the CI + key, MAC address.. are valid.
For the correct order number of a new SSB, always refer to the
Spare Parts list!
5.9.2 Main Software Upgrade
The UpgradeAll.upg file is only used in the factory.
Automatic Software Upgrade
In normal conditions, so when there is no major problem with
the TV, the main software and the default software upgrade
application can be upgraded with the AUTORUN.UPG
(FUS part of the one-zip file: e.g. 3104 337 05661 _FUS
_Q555X_ x.x.x.x_commercial.zip). This can also be done by
the consumers themselves, but they will have to get their
software from the commercial Philips website or via the
Software Update Assistant in the user menu (see eUM). The
autorun.upg file must be placed in the root of the USB stick.
How to upgrade:
1. Copy AUTORUN.UPG to the root of the USB stick.
2. Insert USB stick in the set while the set is operational. The
set will restart and the upgrading will start automatically. As
soon as the programming is finished, a message is shown
to remove the USB stick and restart the set.
Manual Software Upgrade
In case that the software upgrade application does not start
automatically, it can also be started manually.
How to start the software upgrade application manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the OK button on a Philips TV remote control or a
Philips DVD RC-6 remote control (it is also possible to use
a TV remote in DVD mode). Keep the OK button
pressed while reconnecting the TV to the Mains/AC Power.
3. The software upgrade application will start.
Attention!
In case the download application has been started manually,
the autorun.upg will maybe not be recognized.
What to do in this case:
1. Create a directory UPGRADES on the USB stick.
2. Rename the autorun.upg to something else, e.g. to
software.upg. Do not use long or complicated names,
keep it simple. Make sure that AUTORUN.UPG is no
longer present in the root of the USB stick.
3. Copy the renamed upg file into this directory.
4. Insert USB stick into the TV.
5. The renamed upg file will be visible and selectable in the
upgrade application.
Back-up Software Upgrade Application
If the default software upgrade application does not start (could
be due to a corrupted boot sector) via the above described
method, try activating the back-up software upgrade
application.
How to start the back-up software upgrade application
manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the CURSOR DOWN-button on a Philips TV
remote control while reconnecting the TV to the Mains/AC
Power.
3. The back-up software upgrade application will start.
5.9.3 Stand-by Software Upgrade via USB
In this chassis it is possible to upgrade the Stand-by software
via a USB stick. The method is similar to upgrading the main
software via USB.
Use the following steps:
1. Create a directory UPGRADES on the USB stick.
2. Copy the Stand-by software (part of the one-zip file, e.g.
StandbySW_CFT72_88.0.0.0.upg) into this directory.
3. Insert the USB stick into the TV.
4. Start the download application manually (see section
Manual Software Upgrade.
5. Select the appropriate file and press the OK button to
upgrade.
5.9.4 Content and Usage of the One-Zip Software File
Below the content of the One-Zip file is explained, and
instructions on how and when to use it.
FUS_Q5492_x.x.x.x_commercial.zip. Contains the
autorun.upg which is needed to upgrade the TV main
software and the software download application.
StandbySW_CFTxx_x.x.x.x_commercial.zip. Contains
the Stand-by software in upg and hex format.
The StandbySW_xxxxx_prod.upg file can be used to
upgrade the Stand-by software via USB.
The StandbySW_xxxxx.hex file can be used to
upgrade the Stand-by software via ComPair.
The files StandbySW_xxxxx_exhex.hex and
StandbySW_xxxxx_dev.upg may not be used by
Service technicians (only for development purposes).
UpgradeAll_Q555X_x.x.x.x_commercial.zip. Only for
production purposes, not to be used by Service
technicians.
ProcessNVM_Q55XX_x.x.x.x.zip. Default NVM content.
Must be programmed via ComPair or can be loaded via
USB, be aware that all alignments stored in NVM are
overwritten here.
5.9.5 UART logging 2K10 (see section 5.8 Fault Finding and
Repair Tips, 5.8.6 Logging)
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6. Alignments
Index of this chapter:
6.1 General Alignment Conditions
6.2 Hardware Alignments
6.3 Software Alignments
6.4 Option Settings
6.5 Reset of Repaired SSB
6.6 Service SSB delivered without main software loaded
6.7 Total Overview SAM modes
6.1 General Alignment Conditions
Perform all electrical adjustments under the following
conditions:
Power supply voltage (depends on region):
AP-NTSC: 120 VAC or 230 V
AC
/ 50 Hz ( 10%).
AP-PAL-multi: 120 - 230 V
AC
/ 50 Hz ( 10%).
EU: 230 V
AC
/ 50 Hz ( 10%).
LATAM-NTSC: 120 - 230 V
AC
/ 50 Hz ( 10%).
US: 120 V
AC
/ 60 Hz ( 10%).
Connect the set to the mains via an isolation transformer
with low internal resistance.
Allow the set to warm up for approximately 15 minutes.
Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to
AUDIO_GND).
Caution: It is not allowed to use heat sinks as ground.
Test probe: Ri > 10 M, Ci < 20 pF.
Use an isolated trimmer/screwdriver to perform
alignments.
6.1.1 Alignment Sequence
First, set the correct options:
In SAM, select Option numbers.
Fill in the option settings for Group 1 and Group 2
according to the set sticker (see also paragraph 6.4
Option Settings).
Press OK on the remote control before the cursor is
moved to the left.
In submenu Option numbers select Store and press
OK on the RC.
OR:
In main menu, select Store again and press OK on
the RC.
Switch the set to Stand-by.
Warming up (>15 minutes).
6.2 Hardware Alignments
Not applicable.
6.3 Software Alignments
Put the set in SAM mode (see Chapter 5. Service Modes, Error
Codes, and Fault Finding). The SAM menu will now appear on
the screen. Select ALIGNMENTS and go to one of the sub
menus. The alignments are explained below.
The following items can be aligned:
White point
Ambilight
TCON Alignment
Reset TCON Alignment.

To store the data:
Press OK on the RC before the cursor is moved to the
left
In main menu select Store and press OK on the RC
Switch the set to stand-by mode.

For the next alignments, supply the following test signals via a
video generator to the RF input:
EU/AP-PAL models: a PAL B/G TV-signal with a signal
strength of at least 1 mV and a frequency of 475.25 MHz
US/AP-NTSC models: an NTSC M/N TV-signal with a
signal strength of at least 1 mV and a frequency of 61.25
MHz (channel 3).
LATAM models: an NTSC M TV-signal with a signal
strength of at least 1 mV and a frequency of 61.25 MHz
(channel 3).
6.3.1 White Point
Choose TV menu, Setup, More TV Settings and then
Picture and set picture settings as follows:
In menu Picture, choose Pixel Plus HD and set picture
settings as follows:
Go to the SAM and select Alignments-> White point.
White point alignment LCD screens:
Use a 90% white screen to the HDMI input and set the
following values:
Colour temperature: Normal.
All White point values to: 127.

In case you have a colour analyser:
Measure with a calibrated contactless colour analyser
(Minolta CA-210 or Minolta CS-200) in the centre of the
screen. Consequently, the measurement needs to be done
in a dark environment.
Adjust the correct x, y coordinates (while holding one of the
White point registers R, G or B on 127) by means of
decreasing the value of one or two other white points to the
correct x, y coordinates (see Table 6-1 White D alignment
values CCFL backlight panels, 6-2 White D alignment
values LED backlight panels - colour analyser Minolta CA-
210 or 6-3 White D alignment values LED backlight panels
- colour analyser Minolta CS-200). Tolerance: dx: 0.002,
dy: 0.002.
Repeat this step for the other colour temperatures that
need to be aligned.
When finished press OK on the RC and then press STORE
(in the SAM root menu) to store the aligned values to the
NVM.
Restore the initial picture settings after the alignments.
Table 6-1 White D alignment values CCFL backlight panels
Picture Setting
Contrast 100
Brightness 50
Colour 0
Light Sensor Off
Picture format Unscaled
Picture Setting
Dynamic Contrast Off
Dynamic Backlight Off
Colour Enhancement Off
Gamma 0
Value Cool (11000K) Normal (9000K) Warm (6500K)
x 0.276 0.287 0.313
y 0.282 0.296 0.329
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Table 6-2 White D alignment values LED backlight panels -
colour analyser Minolta CA-210
Table 6-3 White D alignment values LED backlight panels -
colour analyser Minolta CS-200

If you do not have a colour analyser, you can use the default
values. This is the next best solution. The default values are
average values coming from production.
Select a COLOUR TEMPERATURE (e.g. COOL,
NORMAL, or WARM).
Set the RED, GREEN and BLUE default values according
to the values in Table 6-4.
When finished press OK on the RC, then press STORE (in
the SAM root menu) to store the aligned values to the NVM.
Restore the initial picture settings after the alignments.
Table 6-4 White tone default setting 32"
Table 6-5 White tone default setting 37"
Table 6-6 White tone default setting 40"
Table 6-7 White tone default setting 42"
Table 6-8 TCON default settings
6.4 Option Settings
6.4.1 Introduction
The microprocessor communicates with a large number of I
2
C
ICs in the set. To ensure good communication and to make
digital diagnosis possible, the microprocessor has to know
which ICs to address. The presence / absence of these
PNX51XX ICs (back-end advanced video picture improvement
IC which offers motion estimation and compensation features
(commercially called HDNM) plus integrated Ambilight control)
is made known by the option codes.

Notes:
After changing the option(s), save them by pressing the OK
button on the RC before the cursor is moved to the left,
select STORE in the SAM root menu and press OK on the
RC.
The new option setting is only active after the TV is
switched off / stand-by and on again with the mains
switch (the NVM is then read again).
6.4.2 Dealer Options
For dealer options, in SAM select Dealer options.
See Table 6-10 SAM mode overview.
6.4.3 (Service) Options
Select the sub menu's to set the initialisation codes (options) of
the model number via text menus.
See Table 6-10 SAM mode overview.
6.4.4 Opt. No. (Option numbers)
Select this sub menu to set all options at once (expressed in
two long strings of numbers).
An option number (or option byte) represents a number of
different options. When you change these numbers directly,
you can set all options very quickly. All options are controlled
via eight option numbers.
When the NVM is replaced, all options will require resetting. To
be certain that the factory settings are reproduced exactly, you
must set both option number lines. You can find the correct
option numbers on a sticker inside the TV set and in Table 6-9
Option and display code overview.
Example: The options sticker gives the following option
numbers:
08192 00133 01387 45160
12232 04256 00164 00000
The first line (group 1) indicates hardware options 1 to 4, the
second line (group 2) indicate software options 5 to 8.
Every 5-digit number represents 16 bits (so the maximum value
will be 65536 if all options are set).
When all the correct options are set, the sum of the decimal
values of each Option Byte (OB) will give the option number.
See Table 6-9 Option and display code overview for the
options.
Diversity
Not all sets with the same Commercial Type Number (CTN)
necessarily have the same option code!
Use of Alternative BOM => an alternative BOM number usually
indicates the use of an alternative display or power supply. This
results in another display code thus in another Option code.
Refer to Chapter 2. Technical Specifications, Diversity, and
Connections.
6.4.5 Option Code Overview
Value Cool (9420K) Normal (8120K) Warm (6080K)
x 0.282 0.292 0.320
y 0.298 0.311 0.345
Value Cool (11000K) Normal (9000K) Warm (6500K)
x 0.276 0.287 0.313
y 0.282 0.296 0.329
White Tone Black level
offset
Colour Temp R G B R G
Normal t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
Cool t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
Warm t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
White Tone Black level
offset
Colour Temp R G B R G
Normal t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
Cool t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
Warm t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
White Tone Black level
offset
Colour Temp R G B R G
Normal t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
Cool t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
Warm t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
White Tone Black level
offset
Colour Temp R G B R G
Normal 127 109 106 t.b.d. t.b.d.
Cool 124 112 127 t.b.d. t.b.d.
Warm 127 95 61 t.b.d. t.b.d.
Screen size TCON Alignment
32" t.b.d.
37" t.b.d.
40" t.b.d.
42" t.b.d.
Alignments EN 43 Q552.1E LA 6.
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Table 6-9 Option and display code overview
Important: after having edited the option numbers as
described above, you must press OK on the remote control
before the cursor is moved to the left!
6.5 Reset of Repaired SSB
A very important issue towards a repaired SSB from a service
repair shop (SSB repair on component level) implies the reset
of the NVM on the SSB.
A repaired SSB in service should get the service Set type
00PF0000000000 and Production code 00000000000000.
Also the virgin bit is to be set. To set all this, you can use the
ComPair tool.
After a repaired SSB has been mounted in the set (set repair
on board level), the type number (CTN) and production code of
the TV has to be set according to the type plate of the set. For
this (new in this platform), you can use the NVM editor in
SAM. This action also ensures the correct functioning of the
Net TV feature and access to the Net TV portals. The loading
of the CTN and production code can also be done via ComPair
(Model number programming).
In case of a display replacement, reset the Operation hours
display to 0, or to the operation hours of the replacement
display.
6.5.1 SSB identification
Whenever ordering a new SSB, it should be noted that the
correct ordering number (12nc) of a SSB is located on a sticker
on the SSB. The format is <12nc SSB><serial number>. The
ordering number of a Service SSB is the same as the ordering
number of an initial factory SSB.
Figure 6-1 SSB identification
6.6 Service SSB delivered without main software
loaded
Due to a changed manufacturing process, new Service SSBs
can be delivered to the warehouse without main TV
software loaded. Below you find the steps to follow when such
an SSB is received.
6.6.1 When a picture is available
1. Mount the Service SSB into the TV set. After start-up,
normally the download application will appear on the
screen.
2. Download the latest main software (FUS) from the
www.p4c.philips.com website.
3. Create a folder upgrades in the root of a USB stick (size
> 50 MB) and save the autorun.upg file in this upgrades
folder. Note: it is possible to rename this file, e.g.
Q555_SW_version.upg, this in case there are more than
one autorun.upg files on your USB stick
4. Plug the prepared USB stick into the TV set, and select the
autorun file in the displayed browser on the screen
5. Now the main TV software will be loaded automatically,
supported by a progress bar
6. Set the correct display code via 062598-HOME-xxx,
where xxx is the 3-digit display panel code (see sticker on
the side/bottom of the cabinet).
6.6.2 When no picture is available
Due to a possible wrong display option code in the received
Service SSB (NVM), no picture can be available at start-up and
thus no download application will be visible. Here you can
proceed and finalize step by step to load the main TV software
via the UART logging on the PC (for visual feedback).
1. Start-up the TV set, equipped with the Service SSB, and
enable the UART logging on the PC (see for settings 5.8
Fault Finding and Repair Tips 5.8.6 Logging)
2. The TV set will start-up automatically in the download
application if main TV software is not loaded
3. Plug the prepared USB stick into the TV set, press cursor
Right to enter the list, and navigate to the autorun file in
the UART logging printout via the cursor keys on the
remote control. When the correct file is selected, press
OK
4. Press cursor Down and OK to start the flashing of the
main TV software. Printouts like: L: 1-100%, V: 1-100%
and P: 1-100% should be visible now in the UART logging
5. Wait until the message Operation successful! is displayed
and remove all inserted media. Restart the TV set
6. Set the correct display code via 062598-HOME-xxx,
where xxx is the 3-digit display panel code (see sticker on
the side/bottom of the cabinet).
6.6.3 Use of repaired SSBs instead of new
Repaired SSBs on stock will obviously already contain main TV
software. This implies that only a main software upgrade is
required if you use a repaired SSB for board swap instead of
a new SSB.
CTN
(Alt. BOM#)
Options Group 1 Options Group 2 Disp.
code
32PFL5405H/xx 00008 00000 15421 02176 43798 34315 00000 00000 278
32PFL5605H/xx 00008 00000 15421 08192 44009 34315 00000 00000 233
32PFL7605H/xx 02060 00000 12351 30911 43795 34315 00000 00000 275
37PFL5405H/xx 00008 00000 15421 02176 43798 34315 00000 00000 278
40PFL5605H/xx 00008 00000 15421 08192 44009 34315 00000 00000 233
40PFL7605H/xx 02060 00000 12351 30911 43795 34315 00000 00000 275
42PFL5405H/xx 00008 00000 15421 02176 43798 34315 00000 00000 278
18310_221_090318.eps
090319
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6.7 Total Overview SAM modes
Table 6-10 SAM mode overview
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Hardware Info A. SW version e.g. Q5521_0.33.0.0 Display TV & Standby SW version and CTN serial
number
B. Standby processor version e.g. STDBY_42.42.0.0
C. Production code e.g. see type plate
Operation hours Displays the accumulated total of operation hours.TV
switched on/off & every 0.5 hours is increase one
Errors Displayed the most recent errors
Reset error buffer Clears all content in the error buffer
Alignment White point Colour temperature Normal 3 different modes of colour temperature can be se-
lected
Warn
Cool
White point red LCD White Point Alignment. For values,
see Table 6-4 White tone default setting 32" until 6-7
White tone default setting 42"
White point green
White point blue
Ambilight Select module
Brightness
Select matrix
TCON alignment used when a new display code (after a SSB
exchange) is keyed-in and if you have alignment
values from production; see Table 6-8 TCON default
settings
Reset TCON alignment used when a new display code (after a SSB
exchange) is keyed-in and if you do not have
alignment values from production
Dealer options Virgin mode Off/On Select Virgin mode On/Off. TV starts up / does not
start up (once) with a language selection menu after
the mains switch is turned on for the first time (virgin
mode)
E-sticker Off/On Select E-sticker On/Off (USPs on-screen)
Auto store mode None
PDC/VPS
TXT page
PDC/VPS/TXT
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Options Digital broadcast DVB Off/On Select DVB On/Off
DVB - T installation Off/On or Country dependent Select DVB T installation On/Off or by country
DVB - T light Off/On Select DVB T light On/Off
DVB - C Off/On Select DVB C On/Off
DVB - C installation Off/On or Country dependent Select DVB C installation On/Off or by country
DVB - C light Off/On Select DVB C light On/Off
DVB - S Off/On Select DVB S On/Off
Over the air download Off/On or Country dependent Select Over the air download On/Off or by country
8 days EPG Off/On Select 8 day EPG On/Off
Digital features Ethernet Off/On Select Ethernet On/Off
Wi-Fi Off/On Select Wi-Fi On/Off
DLNA Off/On Select DLNA On/Off
On-line service On On-line service is On
Videostore SD card slot Off/On Select Videostore SD card slot On/Off
Multiview Off/On Select Multiview On/Off
Internet software update Off Internet software update is Off
Display Screen 237 / LCD Sharp D3GA23 46" Displayed the panel code & type model
LightGuide Off/On Select LightGuide On/Off
Display fans Not present/Present Select Display fans Present/Not present
Temperature sensor No sensor/On backside/In display/
On SSB
Sensor present Yes/No and in case Yes, where
Temperature LUT 0 N.A.
E-box & monitor Off/On Select E-box & monitor On/Off
Video reproduction Light sensor Off/On Select Light sensor On/Off
Light sensor type 0/1/2/3 Select Light sensor type form 0 to 3 (for difference
styling)
Super resolution Off/On Super resolution Off/On
Smart bit enhancement Off/On Smart bit enhancement Off/On
Pixel Plus type Pixel Plus HD Select type of picture improvement
Perfect Pixel HD
Pixel Precise HD
Natural motion type Perfect Natural Motion Natural motion type selection
HD Natural Motion
Ambilight None Select type of Ambilight modules use
2 sided 3/3
2 sided 4/4
2 sided 5/5
2 sided 6/6
2 sided 7/7
3 sided 5/5/5
3 sided 6/6/6
3 sided 7/7/7
3 sided 6/9/6
Ambilight sunset Off/On Ambilight sunset On/Off
Audio reproduction Acoustic system Cabinet design used for setting dynamic audio pa-
rameters
Source selection EXT1/AV1 type SCART CVBS RGB LR Select input source when connected with external
equipment

CVBS Y/C YPbPr LR
CVBS Y/C YPbPr HV LR
EXT2/AV2 type SCART CVBS RGB LR Select input source when connected with external
equipment
CVBS LR
YPbPr LR
None
EXT3/AV3 type None Select input source when connected with external
equipment
CVBS
CVBS LR
CVBS Y/C LR
YPbPr
YPbPr LR
YPbPr HV LR
SIDE I/O Off/On Select SIDE I/O On/Off
S-VIDEO (Y/C) Off/On Select S-VIDEO (Y/C) On/Off
HDMI 2 Off/On Select HDMI 2 On/Off
HDMI 3 Off/On Select HDMI 3 On/Off
HDMI side Off/On Select HDMI side On/Off
HDMI CEC Viewport 21:9 Off/On Select HDMI CEC Viewport 21:9 On/Off
HDMI CEC OneUX seamless Off/On Select HDMI CEC OneUX seamless On/Off
Miscellaneous Region Europe Select Region/country
AP-PAL-Multi
China
Australia
Latam
Russia
Tuner type Select type of Tuner used
Hotel mode Off Hotel mode is Off
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Alignments EN 46 Q552.1E LA 6.
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Option numbers Group 1 e.g. 00008.01793.15421.08192 The first line (group 1) indicates hardware options 1
to 4
Group 2 e.g. 44013.34315.00000.00000 The second line (group 2) indicates software options
5 to 8
Store Store after changing
Initialise NVM N.A.
Store Select Store in the SAM root menu after making any
changes
Operation hours display 0003 In case the display must be swapped for repair, you
can reset the Display operation hours to 0. So,
this one does keeps up the lifetime of the display it-
self (mainly to compensate the degeneration behav-
iour)
Software maintenance Software events Display Display information is for development purposes
Clear
Test reboot
Test cold reboot
Test application crash
Hardware events Display Display information is for development purposes
Clear
Test setting Digital info Centre frequency: 774605208
QAM modulation: None Display information is for development purposes
Symbol rate:
Original network ID: 0
Network ID: 0
Transport stream ID: 0
Service ID: 0
Hierarchical modulation: 0
Selected video PID: 0
Selected main audio PID: 0
Selected 2nd audio PID: 0
Install start frequency 000 Install start frequency from 0 MHz
Install end frequency 999 Install end frequency as 999 MHz
Default install frequency
Installation Digital only Select Digital only or Digital + Analogue before instal-
lation
Digital + Analogue
Development file ver-
sions
Development 1 file version Display parameters DISPT6.0.9.8 Display information is for development purposes
Acoustics parameters ACSTS
0.39.6.16
PQ - TV550 1.0.22.1
PQS- Profile set
PQF - Fixed settings
PQU - User styles
Ambilight parameters PRFAM 5.0.2.4
Development 2 file version 12NC one zip software Display information is for development purposes
Initial main software
NVM version Q55x1_0.3.1.0
Flash units software
Temp com file version none
Upload to USB All To upload several settings from the TV to an USB
stick Channel list
Personal settings
Option codes
Alignments
Identification data
History list
Download from USB All To download several settings from the USB stick to
the TV Channel list
Personal settings
Option codes
Alignments
Identification data
NVM editor Type number see type plate NVM editor; re key-in type number and production
code after SSB replacement
AG code see type plate
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Circuit Descriptions EN 47 Q552.1E LA 7.
2010-Feb-19
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7. Circuit Descriptions
Index of this chapter:
7.1 Introduction
7.2 Power Architecture
7.3 DC/DC Converters
7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception
7.5 Front-End DVB-S(2) reception
7.6 HDMI
7.7 Video and Audio Processing - PNX85500
7.8 Back-End
7.9 Ambilight
7.10 TCON
Notes:
Only new circuits (circuits that are not published recently)
are described.
Figures can deviate slightly from the actual situation, due
to different set executions.
For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts).Where necessary,
you will find a separate drawing for clarification.
7.1 Introduction
The Q552.1E LA chassis is part of the TV550 platform and
comes with the following stylings: Rembrandt (series
xxPFL54xx), van Gogh (series xxPFL56xx), and Matisse
(series xxPFL76xx). The TV550 platform is the successor of
the TV543 platform.
7.1.1 Implementation
Key components of this chassis are:
PNX85500 System-On-Chip (SOC) TV Processor
TX31XX Hybrid Tuner (DVB-T/C, analogue)
STV6110AT DVB-S tuner
SII9x87 HDMI Switch
TPA312xD2PWP Class D Power Amplifier
LAN8710 Dual Port Gigabit Ethernet media access
controller.
7.1.2 TV550 Architecture Overview
For details about the chassis block diagrams refer to
chapter 9. Block Diagrams. An overview of the TV550
architecture can be found in Figure 7-1.
Figure 7-1 Architecture of TV550 platform - TCON integrated in display
18770_244_100203.eps
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Circuit Descriptions EN 48 Q552.1E LA 7.
2010-Feb-19
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Figure 7-2 Architecture of TV550 platform - TCON integrated on SSB
18770_245_100203.eps
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Circuit Descriptions EN 49 Q552.1E LA 7.
2010-Feb-19
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7.1.3 SSB Cell Layout
Figure 7-3 SSB layout cells (top view) (non-DVBS without TCON)
Figure 7-4 SSB layout cells (top view) (DVBS without TCON)
18770_246_100203.eps
100203

VGA
C
l
a
s
s
-
D
DC/DC
1
M
9
9
1
M
9
5
1
7
3
5
1M 20
C
A
L
O
W

P
R
O
F
I
L
E
F
L
A
S
H
SPO
HD
MI
1. 3
H
D
M
I
1
.
3
USB
2.0
SD- SLOT
Scart1/YPbPr
Scart2/YPbPr
P
r
P
b
Y
1M36
DDR2
DDR2
FPGA
20,00
DDR2
DDR2
PNX85500
M1
27 x27
1.00 m m
D
D
R
E TH
IS
S P DIF
A NA
A UD
A NA
V ID
S TD B Y
GP IO
H D MI
CA
TS - IN
LVDS - OUT
U S B
R J 4 5
1
D
3
8
1G51 1G 50 1M 71 1 M 59 2DDIM
ser v
L /R
USB
2.0
T
u
n
e
r
N
O

S
P
L
I
T
T
E
R

!
!
!
9
1
8
7
OUT
0
12
3
CT RL
R L
H
D
M
I
1
.
3
H
D
M
I
1
.
3
18770_247_100203.eps
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VGA
C
l
a
s
s
-
D
DC/DC
1
M
9
9
1
M
9
5
1
7
3
5
1 M20
C
A
L
O
W

P
R
O
F
I
L
E
F
L
A
S
H
SPO
HD
MI
1.3
H
D
M
I
1
.
3
USB
2. 0
Quad LVDS
SD-SLOT
Scart 1/YPbPr
Scart 2/YPbPr
P
r
P
b
Y
1M36
DDR2
DDR2
FPGA
20,00
DDR2
DDR2
PNX85500
M 1
27 x27
1.00 m m
D
D
R
E TH
IS
S P DIF
A NA
A UD
A NA
V ID S TD B Y
GP IO
H D MI
CA
TS -IN
LVDS -OUT
U S B
R J 4 5 1
D
3
8
1 G51 1G50 1M 71 1 M59 2DDIM
ser v
L /R
USB
2. 0
T
u
n
e
r
N
O

S
P
L
I
T
T
E
R

!
!
!
9187
OUT
012
3
CT RL
R L
H
D
M
I
1
.
3
H
D
M
I
1
.
3
DVB-S DVB-S
1 M20 1M36
1 G51 1G50 1M 71 1 M59 2 DDIM
Circuit Descriptions EN 50 Q552.1E LA 7.
2010-Feb-19
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Figure 7-5 SSB layout cells (top view) (non-DVBS with TCON)
18770_248_100203.eps
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VGA
C
l
a
s
s
-
D
DC/DC
1
M
9
9
1
M
9
5
1
7
3
5
1 M20
C
A
L
O
W

P
R
O
F
I
L
E
F
L
A
S
H
SPO
HD
MI
1.3
H
D
M
I
1
.
3
USB
2. 0
Quad LVDS
SD-SLOT
Scart 1/YPbPr
Scart 2/YPbPr
P
r
P
b
Y
1M36
DDR2
DDR2
FPGA
20,00
DDR2
DDR2
PNX85500
M 1
27 x27
1.00 m m
D
D
R
E TH
IS
S P DIF
A NA
A UD
A NA
V ID
S TD B Y
GP IO
H D MI
CA
TS -IN
LVDS -OUT
U S B
R J 4 5 1
D
3
8
1 G51 1G50 1M 71 1 M59 2DDIM
ser v
L /R
USB
2. 0
T
u
n
e
r
N
O

S
P
L
I
T
T
E
R

!
!
!
9
1
8
7
OUT
0
12
3
CT RL
R L
H
D
M
I
1
.
3
H
D
M
I
1
.
3
DVB-S
1 M20 1M36 1 G51 1G50 1M 71 1 M59 2 DDIM
TCON
Circuit Descriptions EN 51 Q552.1E LA 7.
2010-Feb-19
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7.2 Power Architecture
Refer to figure Figure 7-6 for the power architecture of this
platform.
Figure 7-6 Power Architecture TV550 platform
7.2.1 Power Supply Unit
All power supplies are a black box for Service. When defective,
a new board must be ordered and the defective one must be
returned, unless the main fuse of the board is broken. Always
replace a defective fuse with one with the correct
specifications! This part is available in the regular market.
Consult the Service website for the order codes of the boards.
Important deltas with the TV543 platform are:
New power architecture for LED backlight (PSL, PSLS,
PSDL)
Boost-signal is now a PWM-signal + continuous variable.
The control signals are:
Standby
Lamp on/off
DIM (PWM) (not for PSDL)
Boost (PWM except for IPB)
Power-OK: indicates that the main converter is functioning
(feedback signal to the SSB).
In this manual, no detailed information is available because of
design protection issues.
The output voltages to the chassis are:
+3V3-STANDBY (standby-mode only)
+12V (on-mode)
+Vsnd (+24V) (audio power) (on-mode)
+24V (bolt-on power) (on-mode)
Output to the display; in case of
- IPB: High voltage to the LCD panel
- PSL and PSLS (LED-driver outputs)
- PSDL (high frequent) AC-current.
7.2.2 Diversity
The diversity in power supply units is mainly determined by the
diversity in displays. Table 7-1 Supply diversity lists the
different types of displays with its associated PSUs:
Table 7-1 Supply diversity
The following displays can be distinguished:
CCFL/EEFL backlight: power board is conventional IPB
LED backlight:
- side-view LED without scanning: PSL power board
- side-view LED with scanning: PSLS power board
- direct-view LED without 2D-dimming: PSL power board
- direct-view LED with 2D-dimming: PSDL power board.
18770_234_100127.eps
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CTN Supplier PSU
32PFL5405H/xx LGIT PLHC-P981A B
32PFL5605H/xx Delta DPS-138BP A
32PFL7605H/xx Delta DPS-199DP-1A
37PFL5405H/xx LGIT PLHD-P982A
40PFL5605H/xx Delta DPS-206CP A
40PFL7605H/xx Delta DPS-199DP A
42PFL5405H/xx LGIT PLHF-P983A
Circuit Descriptions EN 52 Q552.1E LA 7.
2010-Feb-19
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PSL stands for Power Supply with integrated LED-drivers.
PSLS stands for a Power Supply with integrated LED-drivers
with added Scanning functionality (added microcontroller).
PSDL stands for a Power Supply for Direct-view LED backlight
with 2D-dimming.
7.2.3 Connector overview
Table 7-2 Connector overview
7.3 DC/DC Converters
The on-board DC/DC converters deliver the following voltages
(depending on set execution):
+3V3-STANDBY, permanent voltage for the standby
controller, LED/IR receiver and controls; connector 1M95
pin 1
+12V, input from the power supply for TV550 common
(active mode); connector 1M95 pins 6, 7 and 8
+24V, input from the power supply for DVB-S2 (in active
mode); connector 1M09 pins 1 and 2
+1V1, core voltage supply for PNX85500; has to be started
up first and switched off last (diagram B03B)
+1V2, supply voltage for analogue blocks inside
PNX85500
+1V8, supply voltage for DDR2 (diagram B03B)
+2V5, supply voltage for analogue blocks inside
PNX85500 (see diagram B03E)
+3V3, general supply voltage (diagram B03E)
+5V, supply voltage for USB and CAM (diagram B03E)
+5V-TUN, supply voltage for tuner (diagram B03E)
+V-LNB, input voltage for LNB supply IC (item no. 7T50)
+5V-DVBS, input intermediate supply voltage for DVB-S2
(diagram B08A)
+3V3-DVBS, clean voltage for silicon tuner and DVB-S2
channel decoder
+2V5-DVBS, clean voltage for DVB-S2 channel decoder
+1V-DVBS, core voltage for DVB-S2 channel decoder.
A +12 V under-voltage detector (see diagram B03C) enables
the 12V to 3.3V and 12V to 5V DC/DC converters via the
ENABLE-3V3-5V line, and the 12V to 1.8V DC/DC converter
via the ENABLE-1V8 line. DETECT2 is the signal going to the
standby microcontroller and ENABLE-3V3n is the signal
coming from the standby microcontroller.
Diagram B03D contains the following linear stabilizers:
+2V5 stabilizer, built around item no. 7UCO
+5V-TUN stabilizer, built around items no. 7UA6 and 7UA7
+1V2 stabilizer, built around items no. 7UA3 and 7UA4.
Diagram B08A contains the DVB-S2-related DC/DC
converters and -stabilizers:
a +24V under-voltage detection circuitry is built around
item no. 7T04
the switching frequency of the 24 to 14...20V switched
mode converter is 350 kHz (item no. 7T03 and +V-LNB
lines)
the output signal on the +V-LNB line goes to the LNBH23Q
(item no. 7T50)
the LNBH23Q (item no. 7T50) sends a feedback signal via
the V0-CNTRL line
the switching frequency of the +5V-DVBS to +1-DVBS
switched mode converter is 900 kHz (item no. 7T00)
a delay line for the +2V5-DVBS and +1V-DVBS lines is
created with item no. 3T03 (R=10k) and 2T06 (C=100n)
a 3.3V to 2.5V linear stabilizer is built around item no. 7T01
a 5V to 3.3V linear stabilizer is built around item no. 7T02.
Diagram B08B contains the DVB-S2 LNB supply:
the +V-LNB signal comes from item no. 7T03
the V0-CTRL signal goes to item no. 7T03
the LNB-RF1 goes to the LNB.
Figures gives a graphical representation of the DC/DC
converters with its current consumptions:
Figure 7-7 DC/DC converters xxPFL5xxx series
Figure 7-8 DC/DC converters xxPFL6xxx series
Figure 7-9 DC/DC converters DVB-S2 devices
Connector
no. 1308 1311 1319 1316 1M95 1M99 1M09 1MP1
Descr. mains mains disp. disp. to SSB to SSB Amb. T-con
Pin CN1 CN2 CN3 CN4 CN5 CN6 CN7 CN8
1 N L 3V3std +12V 24Vb +12V
2 L L Stndby +12V 24Vb +12V
3 - - - - GND1 GND1 GND1 n.c.
4 - - - - GND1 GND1 GND1 GND1
5 - - - - GND1 BL_ON
_OFF
- GND1
6 - - - - +12V DIM - -
7 - - - - +12V Boost - -
8 - - - - +12V n.c. - -
9 - - - - +Vsnd POK - -
10 - - - - GND_
SND
- - -
11 - - - - n.c. - - -
12 - - - - - - - -
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Circuit Descriptions EN 53 Q552.1E LA 7.
2010-Feb-19
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7.4 Front-End Analogue and DVB-T, DVB-C;
ISDB-T reception
7.4.1 European/China region
The Front-End for the European/China region consist of the
following key components:
Hybrid Tuner
Switchable SAW filter 7/8 MHz (Eur.), or single SAW filter
(8 MHz) (China)
Bandpass filter
Amplifier
PNX85500 SoC TV processor with integrated DVB-T and
DVB-C channel decoder and analogue demodulator.
Below find a block diagram of the front-end application for this
region.
Figure 7-10 Front-End block diagram European/China region
7.4.2 Brazil region
The Front-End for the Brazil region consist of the following key
components:
Hybrid Tuner with integrated SAW filter and amplifier
External ISDB-T channel decoder covering the Brazilian
digital terrestrial TV standard
Bandpass filter
Amplifier
PNX85500 SoC TV with integrated analogue demodulator.
Below find a block diagram of the front-end application for this
region.
Figure 7-11 Front-End block diagram Brazil region
7.5 Front-End DVB-S(2) reception
The Front-End for the DVB-S(2) application consist of the
following key components:
Satellite Tuner; I
2
C address 0xC6 (bridged via channel
decoder)
Channel decoder; I
2
C address 0xD0
LNB switching regulator; I
2
C address 0x14
Amplifier
PNX85500 SoC TV processor with integrated DVB-T and
DVB-C channel decoder and analogue demodulator.
Below find a block diagram of the front-end application for
DVB-S(2) reception.
Figure 7-12 Front-End block diagram DVB-S(2) reception
This application supports the following protocols:
polarization selection via supply voltage (18V = horizontal,
13V = vertical)
band selection via toneburst (22 kHz): tone on = high
band, tone off = low band
satellite (LNB) selection via DiSEqC 1.0 protocol
reception of DVB-S (supporting QPSK encoded signals)
and DVB-S2 (supporting QPSK, 8PSK, 16APSK and
32APSK encoded signals), introducing LDPC low-density
parity check techniques.
7.6 HDMI
In this platform, the Silicon Image Sil9x87 HDMI multiplexer is
implemented. Refer to figure 7-13 HDMI input configuration for
the application.
Figure 7-13 HDMI input configuration
The following multiplexers can be used:
Sil9187A (does not support Instaport technology for fast
switching between input signals)
18770_235_100127.eps
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Circuit Descriptions EN 54 Q552.1E LA 7.
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Sil9287B (supports Instaport technology for fast
switching between input signals).
The hardware default I
2
C addresses are:
Sil9187A: 0xB0/0xB2 (random: software workaround)
Sil9287B: 0xB2 (fixed).
The Sil9x87 has the following specifications:
+5V detection mechanism
Stable clock detection mechanism
Integrated EDID
RT control
HPD control
Sync detection
TMDS output control
CEC control
EDID stored in Sil9x87, therefore there are no EDID pins
on the SSB.
7.7 Video and Audio Processing - PNX85500
The PNX85500 is the main audio and video processor (or
System-on-Chip) for this platform. It has the following features:
Multi-standard digital video decoder (MPEG-2, H.264,
MPEG-4)
Integrated DVB-T/DVB-C channel decoder
Integrated CI+
Integrated motion accurate picture processing (MAPP2)
High definition ME/MC
2D LED backlight dimming option
Embedded HDMI HDCP keys
Extended colour gamut and colour booster
Integrated USB2.0 host controller
Improved MPEG artefact reduction compared with
PNX8543
Security for customers own code/settings (secure flash).
The TV550 combines front-end video processing functions,
such as DVB-T channel decoding, MPEG-2/H.264 decode,
analog video decode and HDMI reception, with advanced
back-end video picture improvements. It also includes next
generation Motion Accurate Picture Processing (MAPP2). The
MAPP2 technology provides state-of-the-art motion artifact
reduction with movie judder cancellation, motion sharpness
and vivid colour management. High flat panel screen
resolutions and refresh rates are supported with formats
including 1366 768 @ 100Hz/120Hz and 1920 1080 @
100Hz/120Hz. The combination of Ethernet, CI+ and H.264
supports new TV experiences with IPTV and VOD. On top of
that, optional support is available for 2D dimming in
combination with LED backlights for optimum contrast and
power savings up to 50%.
For a functional diagram of the PNX85500, refer
to Figure 7-14.
Figure 7-14 PNX85500 functional diagram
18770_241_100201.eps
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TS out/in for
TS input
CVBS, Y/C,
LVDS for
analog CVBS
SPDIF
Low-IF
SSIF, LR
HDMI
CI/CA
MPEG
PRIMARY
LVDS
VIDEO
SECONDARY
MEMORY
VIDEO
3D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
SCALER,
AUDIO DSP
AUDIO DACS
AUDIO OUT
450 MHz
560 MHz
I
2
C PWM GPIO IR ADC UART I
2
C GPIO Flash
analog audio
I
2
S
SPDIF
SYSTEM
USB 2.0
PNX85500x
DVB-T/C
channel decoder
DVB
AV-PIP
SPI
MPEG/H.264
RECEIVER
(8051)
CONTROLLER
AND DECODE
DECODER
PCMCIA
RGB
PROCESSOR
SYSTEM
CONTROLLER
DECODER
VIDEO
24KEf CPU
MIPS32
x 8
AV-DSP
REDUCTION
AND NOISE
DE-INTERLACE
OUTPUT
VIDEO
SUB-PICTURE
ENCODER
OUTPUT
VIDEO
quad channel)
(single, dual or
flat panel display
DRAWING
ENGINE
DMA BLOCK
Motion-accurate
pixel processing
SD
Memory
Card
Ethernet
MAC
Circuit Descriptions EN 55 Q552.1E LA 7.
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7.8 Back-End
The following backlight types can be distinguished:
CCFL/EEFL backlight; applicable to the xxPFL54xx sets
LED backlight:
- side-view (edge) LED without scanning: PSL power
board; applicable to xxPFL76xx sets
- side-view (edge) LED with scanning: PSLS power board;
not applicable to this chassis
- direct-view LED with 0D-dimming: PSL power board;
applicable to xxPFL56xx sets
- direct-view LED with 2D-dimming: PSDL power board;
not applicable to this chassis.
Refer to section 7.2.2 Diversity for an in-depth explanation of
the different power boards that are used.
Figure 7-15 Backlight (xxPFL54xx, xxPFL56xx, xxPFL76xx sets)
application
7.9 Ambilight
In this chassis, only 2-sided Ambilight is implemented. Refer to
figure 7-16 Ambilight architecture.
Figure 7-16 Ambilight architecture
For an overview of the LED grouping per board, refer to figure
7-17 LED grouping per board.
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1
M
5
9
1M09
MTK
or
PNX85500
SSB
Glue
logic
1
M
8
3
1
M
8
4
AmbiLight
1
M
8
3
1
M
8
4
AmbiLight
1M09
PSU
Circuit Descriptions EN 56 Q552.1E LA 7.
2010-Feb-19
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Figure 7-17 LED grouping per board
The communication between PNX85500, Complex
Programmable Logic Device (CPLD) and the Ambilight module
uses the SPI protocol; refer to figure 7-18 Communication
protocol outside LED board. Between the CPLD and the LED
driver, as extra line is mentioned:
Non-SPI signals that are required for the LED driver
Temperature sensor line.
Figure 7-18 Communication protocol outside LED board
Refer to figure for an overview of the communication inside the
LED board.
Figure 7-19 Communication protocol inside LED board
The buffer is built around item no. 7B20 (diagram AL1A) and
regenerates the clock signals. Refer to figure 7-20 Ambilight
buffer.
Figure 7-20 Ambilight buffer
The temperature sensor is built around item no. 7B30 (diagram
AL1A) and indicates overtemperature of the board. Refer to
figure 7-21 Temperature sensor.
Figure 7-21 Temperature sensor
The EEPROM (item no. 7B07; diagram AL1A) contains
alignment information about the mounted LEDs and is
programmed during the alignment process in production. Refer
to figure 7-22 EEPROM.
Figure 7-22 EEPROM
The LED driver is built around item no. 7B26 (diagram AL1A)
and controls the LEDs. Refer to figure 7-23 LED driver.
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3

6
L
E
D
18
4

6
L
E
D
24
5

6
L
E
D
30
4
+
5
L
E
D
9
2

6
L
E
D
12
3

5
L
E
D
15
6

6
L
E
D
36
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CPLD PNX
SPI SPI + extra
1
M
5
9
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LED
Driver
EEPROM
Buffer
SPI SPI
SPI
SPI
SPI
1
M
8
3
1
M
8
4
Extra
Temp
sensor
Temp
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+3V3
8
3B30-1
220R
1
4 5
220R
3B30-4 3B01-1
100R
1 8
5
6
7B20-1
74LVC2G17
1
2
2
B
1
7
1
0
0
n
3
3
p
2
B
0
1
100R
3B01-2
2 7
1
0
0
p
2
B
0
2
+3V3
3
2
5
4
74LVC2G17
7B20-2
3
3
p
2
B
0
0
2
B
1
0
1
0
0
p
PWM-CLOCK
SPI-CLOCK-BUF
PWM-CLOCK-BUF
SPI-CLOCK
18770_215_100126.eps
100126
-
T
+3V3
1
0
n
2
B
0
9
FB40
2
B
0
8
1
0
n
1
K
5
1
%
3
6
3
B
3
9
-
2
2
7
3
B
3
9
-
3 1
%
1
K
5
1
3
4
5
2
LMV331IDCK
7B30
+3V3
1
K
5
1
%
8
1
3
B
3
9
-
1
3B34
RES 100K
1
0
K
3
0
0
4R
E
S
3
B
1
1
1
0
K
+3V3
FB41
TEMP-SENSOR
18770_216_100126.eps
100126
S
GND
Q
HOLD
W
VCC
C
D
+3V3
4
1
2
3
5
7B06
74LVC1G32GW
2
B
2
0
1
0
0
n
4
7
2
1
8
3
+3V3
M95010-WDW6
7B07
(64K)

6
5
+3V3
10K
3B02-2
2 7 1 8
3B02-1
10K
+3V3
SPI-CLOCK-BUF
SPI-DATA-IN-BUF
SPI-DATA-RETURN
SPI-CS
DATA-SWITCH
Circuit Descriptions EN 57 Q552.1E LA 7.
2010-Feb-19
back to
div. table
Figure 7-23 LED driver
The Overvoltage Protection Circuit is built around item no.
7B50, 7B51, 7C20 and 7C22 (diagram AL1B). Refer to figure
7-24 Overvoltage Protection Circuit.
Figure 7-24 Overvoltage Protection Circuit
7.10 TCON
This section describes the application with the TCON
integrated on the SSB.
For the basic application, refer to figure 7-25 TCON
architecture.
18770_217_100126.eps
100126
OUT
12
11
GSCLK
IREF
MODE
SCLK
SIN
SOUT
XERR
XHALF
XLAT 10
NC
9
8
VCC
0
1
2
3
4
5
6
7
BLANK
13
14
15
GND GND_HS
VIA
VIA
VIA
VIA
2K0
3B31
FB20
3B21 150R
+3V3
+3V3
25
32
FB35
9
10
11
14
15
1
2
23
2
7
22
5
16
17
18
19
20
21
6
7
8
31
3
0
3
3
24
26
3
12
13
28
29
4
TLC5946RHB
7B26-1
100n
2B11
3 6
150R 3B00-3
2
B
0
4
-
4
1
0
0
p
4
5
36
3
7
3
8
3
9
40
41
42
7B26-2
TLC5946RHB
34
35
3B18
1K8
1 8
150R
3B00-1
+3V3
1
8
2
B
0
4
-
1
1
0
0
p
150R
3B00-4
4 5
150R
3B00-2
2 7
2
B
0
4
-
2
1
0
0
p
2
7
3
6
2
B
0
4
-
3
1
0
0
p
10K
3B22
BLANK
SPI-DATA-IN-BUF
PWM-G1
PWM-R1
PWM-G3
PWM-R3
PWM-R2
PWM-B2
PWM-G2
DATA-SWITCH
PWM-G4
PWM-R4
PWM-B4
PWM-R5
PWM-G5
PWM-B5
LATCH
SPI-DATA-IN
SPI-DATA-OUT
PWM-CLOCK-BUF
SPI-CLOCK-BUF
PROG
PWM-B1
PWM-B3
18770_218_100126.eps
100126
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
FB32
6 5
2 1
4 3
99-235/RSBB7C-A24/2D
7005
1
8
1
0
K
3
B
0
7
-1
FB30
3
B
0
7
-3
1
0
K
3
6
4
5
FB31
1
0
K
3
B
1
3
-4
1
4 3
7002
99-235/RSBB7C-A24/2D
6 5
2
6 5
2 1
4 3
6
7004
99-235/RSBB7C-A24/2D
3B03-3
1K5
3
2
7
3
B
0
7
-2
1
0
K
+24V
1
0
0
n
2
B
0
3
2 7
1K5
3B03-2
3B36
270R
+24V
2
6
1
BC847BS(COL)
7B23-1
3B35
270R
3B37
68R
5
3
4
BC847BS(COL)
7B23-2
7B25
BC847BW
1
3
2
3
6
3
B
1
3
-3
1
0
K
6 5
2 1
4 3
7001
99-235/RSBB7C-A24/2D
4 5
1K5
3B03-4
4
5
1
0
K
3
B
0
7
-4
7003
6 5
2 1
4 3
99-235/RSBB7C-A24/2D
1 8
3B03-1
1K5
+24V
4 3
99-235/RSBB7C-A24/2D
7000
6 5
2 1
+24V
PWM-R1
PWM-G1
PWM-B1
Circuit Descriptions EN 58 Q552.1E LA 7.
2010-Feb-19
back to
div. table
Figure 7-25 TCON architecture
For the TCON block diagram, refer to figure 7-26 TCON block
diagram.
Figure 7-26 TCON block diagram
18770_238_100127.eps
100127
EEPROM
TFT LCD Panel
Mini - LVDS
Control
Signals
+3.3 V
+1.8 V
V
GH
(+28 V)
V
GL
(-6 V)
+12 V
LVDS (10 bit)
Timing
Controller
Power
Block
Gamma
Reference
Voltage
Source Drive IC
G
a
t
e

D
r
i
v
e

I
C
P
N
X
8
5
5
0
LCD Panel
TCON Main Platform
SSB
+16 V
18770_239_100127.eps
100127
LVDS
Receiver
LVDS
Receiver
Vertical & Horizontal
Timing generation
Data
Path
Block
(Line
Buffer)
Mini-LVDS
Transmitter
Mini-LVDS
Transmitter
OPC
(
O
p
t
i
m
u
m
P
o
w
e
r
C
o
n
t
r
o
l
)
(
O
v
e
r
D
r
i
v
e
C
i
r
c
u
i
t
)
(
D
y
n
a
m
i
c
C
o
n
t
r
a
s
t
C
o
n
t
r
o
l
)
ODC DCA
F
o
r
m
a
t
t
e
r
/
S
e
r
i
a
l
i
z
e
r
Spread
Spectrum
SDRAM
I
2
C
Slave
I
2
C
Master
ROM
EEPROM
16 bit
H
sync
/
V
sync
DE
SS
CLK
(Spread Spectrum Clock)
RLV P/N
Right half
data
Gate Driver
Ctrl Signals
Source Driver
Ctrl Signals
R1A~E
R1CLK
R2CLK
R2A~E
Mini-
LVDS
Output
LVDS
Input
Control
Signal
Output
Timing Controller IC
Circuit Descriptions EN 59 Q552.1E LA 7.
2010-Feb-19
back to
div. table
Notes to figure 7-26 TCON block diagram:
LVDS receiver: converts the data stream back into RGB
data and SYNC signals (Vsync, Hsync, Data Enable - DE)
ODC: Over Drive Circuit - to improve LC response
Data Path Block: the video RGB data input to data path
block is delayed to align the column driver start pulse with
the column driver data
Timing Control Function: generates control signals to
column drivers and row drivers (Source Enable - SOE,
Gate Enable - GOE, Gate Start Pulse - GSP).
For an overview of the TCON DC/DC converters, refer to figure
7-27 TCON DC/DC converters.
Figure 7-27 TCON DC/DC converters
7.10.1 TCON Programming
For LGD - TCONs, the EEPROM can be programmed via
ComPair (via I
2
C communication).
For Sharp - TCONs, the data can be flashed with a SPI
Programmer (via SPI communication). This device has to be
ordered separately.
7.10.2 TCON Alignment
The purpose of TCON alignment is to obtain equal voltages for
both positive and negative LC polarity. This is to avoid flicker
and image sticking.
The alignment value for the TCON is stored in the main
software and is automatically set to the correct value when you
enter the display code via the service menu. No manual
alignment is needed.
18770_240_100128.eps
100128
DC/DC
Controller +12V
LGD SHP Where Used
VGH +28V +35V
To Gate Drivers (Gate
High Voltage)
VGL -6V -6V
To Gate Drivers (Gate
Low Voltage)
Vcc +3V3 +3V3
Timing Controller IC
Supply Voltage
Vcc +1V8 +1V2
Timing Controller IC
Supply Voltage
Vref +16V +15V2
Gamma Reference
Voltage
Vdd +16V +15V6
Source Driver Supply
Voltage
IC Data Sheets EN 60 Q552.1E LA 8.
2010-Feb-19
back to
div. table
8. IC Data Sheets
This chapter shows the internal block diagrams and pin
configurations of ICs that are drawn as black boxes in the
electrical diagrams (with the exception of memory and logic
ICs).
8.1 Diagram USB Hub B01C, USB2513B (IC 7F25)
Figure 8-1 Internal block diagram and pin configuration
18770_301_100217.eps
100217
Block diagram
Pinning information
Note : The LED port indicators only apply to USB2513i.
To Upstream
VBUS
3.3 V
Upstream
PHY
Upstream
USB Data
Repeater
Controller
Serial
Interface
Engine
Serial
Interface
To EEPROM or
SMBus Master
SCL SDA
Port
Controller
Bus-
Power
Detect/
Vbus Pulse
PHY#1
USB Data
Downstream
OC
Sense
Switch/
LED
Drivers
USB Data
Downstream
Port
Power
3.3 V
PLL
24 MHz
Crystal
Routing & Port Re-Ordering Logic
Regulator
CRFILT
Port
Power
Regulator
PHY#x
Port #x
OC Sense
Switch Driver/
LED Drivers
TT
#x
TT
#1
...
Port #1
OC Sense
Switch Driver/
LED Drivers
OC
Sense
Switch/
LED
Drivers
...
The x indicates the number of available downstream ports: 2, 3, 4, or 7.
Ground Pad
(must be connected to VSS)
SMSC
USB2512/12A/12B
USB2512i/12Ai/12Bi
(Top View QFN-36)
2
6
V
D
D
3
3
2
5
R
E
S
E
T
_
N
2
4
H
S
_
IN
D
/ C
F
G
_
S
E
L
[1
]
2
3
S
C
L
/ S
M
B
C
L
K
/ C
F
G
_
S
E
L
[0
]
2
2
S
D
A
/ S
M
B
D
A
T
A
/ N
O
N
_
R
E
M
[1
]
2
1
N
C
2
0
N
C
1
9
V
B
U
S
_
D
E
T
2
7
N
C
18 NC
17 OCS_N[2]
16 PRTPWR[2] / BC_EN[2]*
15
OCS_N[1]
14
VDD33
13
CRFILT
12 PRTPWR[1] / BC_EN[1]*
11 TEST
10 VDD33
SUSP_IND / LOCAL_PWR / NON_REM[0] 28
VDD33 29
USBDP_UP 31
XTALOUT 32
XTALIN / CLKIN 33
RBIAS
36 VDD33
35
PLLFILT 34
USBDM_UP 30
V
D
D
3
3
1
U
S
B
D
M
_
D
N
[1
]
2
U
S
B
D
P
_
D
N
[1
]
3
U
S
B
D
M
_
D
N
[2
]
4
U
S
B
D
P
_
D
N
[2
]
5
N
C
6
N
C
7
N
C
8
N
C
9
Indicates pins on the bottom of the device.
IC Data Sheets EN 61 Q552.1E LA 8.
2010-Feb-19
back to
div. table
8.2 Diagram Temp Sensor + Headphone B01J, LM75BDP (IC 7FD1)
Figure 8-2 Pin configuration
18770_300_100217.eps
100217
Block diagram
Pinning information
LM75B
SDA
V
CC
SCL A0
OS
D N G 1 A A2
BIAS
REFERENCE
BAND GAP
TEMP SENSOR
OSCILLATOR
POWER-ON
RESET
11-BIT
SIGMA-DELTA
A-to-D
CONVERTER
POINTER
REGISTER
TIMER
COMPARATOR/
INTERRUPT
COUNTER
LOGIC CONTROL AND INTERFACE
CONFIGURATION
REGISTER
THYST
REGISTER
TOS
REGISTER
TEMPERATURE
REGISTER
LM75BDP
V A D S
CC
0 A L C S
1 A S O
2 A D N G
1
2
3
4
6
5
8
7
IC Data Sheets EN 62 Q552.1E LA 8.
2010-Feb-19
back to
div. table
8.3 Diagram PNX NandFlash - Conditional Access B02A, PNX85500 (IC7S00)
Figure 8-3 Internal block diagram and pin configuration
18770_308_100217.eps
100217
Block diagram
Pinning information
TS out/in for
TS input
CVBS, Y/C,
LVDS for
analog CVBS
SPDIF
Low-IF
SSIF, LR
HDMI
CI/CA
MPEG
PRIMARY
LVDS
VIDEO
SECONDARY
MEMORY
VIDEO
3D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
SCALER,
AUDIO DSP
AUDIO DACS
AUDIO OUT
450 MHz
500 MHz
I
2
C PWM Px_x IR ADC UART I
2
C GPIO Flash
analog audio
I
2
S
SPDIF
SYSTEM
USB 2.0
PNX8550x
DVB-T/C
channel decoder
DVB
AV-PIP
SPI
RECEIVER
(8051)
CONTROLLER
AND DECODE
DECODER
PCMCIA
RGB
PROCESSOR
SYSTEM
CONTROLLER
MULTI-
STANDARD
VIDEO
DECODER
24KEf CPU
MIPS32
x 10
AV-DSP
REDUCTION
AND NOISE
DE-INTERLACE
OUTPUT
VIDEO
SUB-PICTURE
ENCODER
OUTPUT
VIDEO
quad channel)
(single, dual or
flat panel display
DRAWING
ENGINE
Scatter/Gather
TS Demux
Motion-accurate
pixel processing
SD
Memory
Card
Ethernet
MAC
analog Y/C
Direct-IF
PNX8550xE
Transparent top view
2 4 6 8 10 12
13
14
15 17
16
19
18 20
21 23
22 24
25
26
1 3 5 7 9 11
ball A1
index area
AB
AD
AA
AC
Y
W
V
U
R
N
T
P
M
L
K
J
H
F
D
G
E
C
B
A
AF
AE
IC Data Sheets EN 63 Q552.1E LA 8.
2010-Feb-19
back to
div. table
8.4 Diagram Audio B03A, TPA3120D2PWP (IC7D10)
Figure 8-4 Internal block diagram and pin configuration
1 F
SD
PVCCL
TPA3120D2
PVCCR
VCLAMP
GAIN1
BYPASS
1 F
1 F
0.22 F
AGND
} Control
Shutdown
Control
LIN
RIN
BSR
BSL
PGNDR
PGNDL
0.22 F
22 H
22 H
0.68 F
470 F
0.68 F
1 F
470 F
GAIN0
AVCC
MUTE
ROUT
LOUT
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
PVCCL
SD
PVCCL
MUTE
LIN
RIN
BYPASS
AGND
AGND
PVCCR
VCLAMP
PVCCR
PGNDL
PGNDL
LOUT
BSL
AVCC
AVCC
GAIN0
GAIN1
BSR
ROUT
PGNDR
PGNDR
PWP (TSSOP) PACKAGE
(TOP VIEW)
I_18020_142.eps
190908
Pin Configuration
Block Diagram
IC Data Sheets EN 64 Q552.1E LA 8.
2010-Feb-19
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div. table
8.5 Diagram DC/DC B03B, TPS53126PW (IC7U03)
Figure 8-5 Internal block diagram and pin configuration
Pin Configuration
Block Diagram
18250_300_090319.eps
090319
VBST1
NC
EN1
VO1
VFB1
NC
GND
TEST1
NC
VFB2
VO2
EN2
NC
VBST2
DRVH1
LL1
DRVL1
PGND1
TRIP1
VIN
VREG5
V5FILT
TEST2
TRIP2
PGND2
DRVL2
LL2
DRVH2
28
27
26
25
24
23
22
21
20
19
18
17
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
T
P
S
5
3
1
2
4
15
IC Data Sheets EN 65 Q552.1E LA 8.
2010-Feb-19
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div. table
8.6 Diagram DC/DC B03E, ST1S10PH (IC 7UD0)
Figure 8-6 Internal block diagram and pin configuration
PowerSO-8 DFN8 (4x4)
I_18010_083.eps
130608
Block Diagram
Pin Configuration
IC Data Sheets EN 66 Q552.1E LA 8.
2010-Feb-19
back to
div. table
8.7 Diagram DC/DC B03E, LD1117DT25 (IC 7UD2)
Figure 8-7 Internal block diagram and pin configuration
Block Diagram Pin Configuration
F_15710_166.eps
230905
LD1117DT
DPAK
IC Data Sheets EN 67 Q552.1E LA 8.
2010-Feb-19
back to
div. table
8.8 Diagram Ethernet + Service B04C, LAN8710A-EZKH (IC 7E10)
Figure 8-8 Internal block diagram and pin configuration
18770_302_100217.eps
100217
Block diagram
Pinning information
10M Rx
Logic
100M Rx
Logic
DSP System:
Clock
Data Recovery
Equalizer
Analog-to-
Digital
100M PLL
Squelch &
Filters
10M PLL
Receive Section
Central
Bias
HP Auto-MDIX
Management
Control
SMI
R
M
I
I

/

M
I
I

L
o
g
i
c
TXP / TXN
TXD[0:3]
TXEN
TXER
TXCLK
RXD[0:3]
RXDV
RXER
RXCLK
CRS
COL/CRS_DV
MDC
MDIO
LED1
LED2
LED Circuitry
MODE Control
nINT
nRST RXP / RXN
10M Tx
Logic
10M
Transmitter
100M Tx
Logic
100M
Transmitter
Transmit Section
PLL
XTAL1/CLKIN
XTAL2
MODE0
MODE1
MODE2
PHY
Address
Latches
PHYAD[0:2]
Auto-
Negotiation
Interrupt
Generator
RMIISEL
MDIX
Control
Reset
Control
RBIAS
VDD2A
LED2/nINTSEL
LED1/REGOFF
XTAL2
XTAL1/CLKIN
VDDCR
RXD3/PHYAD2
RXCLK/PHYAD1
R
X
D
2
/
R
M
I
I
S
E
L
R
X
D
1
/
M
O
D
E
1
R
X
D
0
/
M
D
E
0
V
D
D
I
O
R
X
E
R
/
R
X
D
4
/
P
H
Y
A
D
0
C
R
S
M
D
I
O
C
O
L
/
C
R
S
_
D
V
/
M
O
D
E
2
TXD2
MDC
nRST
nINT/TXER/TXD4
TXD0
TXEN
TXCLK
TXD1
R
B
I
A
S
T
X
D
3
T
X
N
R
X
D
V
R
X
N
V
D
D
1
A
T
X
P
R
X
P
1
2
3
4
5
6
7
8
SMSC
LAN8710/LAN8710i
32 PIN QFN
(Top View)
91
0
1
1
1
2
1
3
1
4
1
5
22
21
20
19
18
17
2
8
2
7
2
6
2
5
1
6
24
23
3
2
3
1
3
0
2
9
VSS
IC Data Sheets EN 68 Q552.1E LA 8.
2010-Feb-19
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div. table
8.9 Diagram HDMI B04D, SII9287B (IC 7EC1)
Figure 8-9 Internal block diagram and pin configuration
18770_303_100217.eps
100217
Block diagram
Pinning information
IC Data Sheets EN 69 Q552.1E LA 8.
2010-Feb-19
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div. table
8.10 Diagram Headphone B04E, TPA6111A2DGN (IC 7EE1)
Figure 8-10 Internal block diagram and pin configuration
18770_309_100217.eps
100217
Block diagram
Pinning information
Bias
Control
8
1
7
4
V
O1
V
O2
V
DD
5
2
3
6
IN1
BYPASS
SHUTDOWN
V
DD
/2
IN2

+
1
2
3
4
8
7
6
5
V
O1
IN1
BYPASS
GND
V
DD
V
O2
IN2
SHUTDOWN
D OR DGN PACKAGE
(TOP VIEW)
IC Data Sheets EN 70 Q552.1E LA 8.
2010-Feb-19
back to
div. table
8.11 Diagram Circuit Diagrams and PWB Layouts B07A, STV6110AT (IC 7R02)
Figure 8-11 Internal block diagram and pin configuration
18770_304_100217.eps
100217
Block diagram
PLL, dividers
Amplifier
RF_IN
IP
I
2
C bus interface
IN
QP
QN
AGC
RF_OUT
SCL
XTAL_IN
SDA
DC offset compensation
XTAL_OUT
XTAL_INN
IC Data Sheets EN 71 Q552.1E LA 8.
2010-Feb-19
back to
div. table
8.12 Diagram Circuit Diagrams and PWB Layouts B08A, TPS54283PWP (IC 7T03)
Figure 8-12 Internal block diagram and pin configuration
18770_305_100217.eps
100217
Block diagram
7 FB1
+
Soft Start
1 C
COMP
+
S Q
Q R
R
+
Current
Comparator
BP
f(I
DRAIN1
) + DC(ofst)
2
1
3
Anti-Cross
Conduction
1.2 MHz
Oscilator
Divide
by 2/4
Ramp
Gen 1
Ramp
Gen 2
CLK1
CLK2
BP
CLK1
Weak
Pull-Down
MOSFET
5 EN1
6 EN2
6 A 6 A
VDD2
Internal
Control
10 SEQ
150 k
150 k
Output
Undervoltage
Detect
BP
FB1
FB2
CLK1
4 GND
8 FB2
+
Soft Start
2 C
COMP
+
S Q
Q R
R
+
Current
Comparator
BP
13
14
12
Anti-Cross
Conduction
BP
CLK2
Weak
Pull-Down
MOSFET
11 BP
9 ILIM2
150 k
150 k
BP
CLK2
4 GND
Level
Select
5.25-V
Regulator
References
BOOT1
PVDD1
SW1
BOOT2
PVDD2
SW2
f(I
DRAIN2
) + DC(ofst)
0.8 V
REF
I
MAX2
(Set to one of two limits)
f(I
DRAIN1
)
f(I
MAX1
)
Overcurrent Comp
f(I
SLOPE1
)
Level
Shift
Level
Shift
f(I
DRAIN2
)
f(I
MAX2
)
f(I
SLOPE2
)
FET
Switch
TSD
PVDD2
f(I
SLOPE1
)
f(I
SLOPE2
)
SD1
SD2
UVLO
0.8 V
REF
SD2
0.8 V
REF
SD1
UDG-07007
Overcurrent Comp
R
COMP
R
COMP
IC Data Sheets EN 72 Q552.1E LA 8.
2010-Feb-19
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div. table
8.13 Diagram Circuit Diagrams and PWB Layouts B08B, LNBH23Q (IC 7T50)
Figure 8-13 Internal block diagram and pin configuration
18770_306_100217.eps
100217
Block diagram
Pinning information
SDA SCL
LNBH23
ADDR
A-GND
I2C Diagnostics
I2C interface
DSQIN
Vup
VoRX
VoTX
LX
22KHz
Oscill.
P
W
M
C
o
n
t
r
o
lle
r
Rsense EN
VSEL
Linear Post-reg
+Modulator
+Protections
+Diagnostics
ITEST
TTX
EN
VSEL
VOUT Control
EXTM
P-GND
Preregulator
+U.V.lockout
+P.ON reset
Byp Vcc Vcc- L ISEL TTX
TEN
DSQOUT
DETIN
22KHz Tone
Amp. Diagn.
22KHz Tone
Freq. Detector
TTX
VCTRL
SDA SCL
LNBH23
ADDR
A-GND
I2C Diagnostics
I2C interface
DSQIN
Vup
VoRX
VoTX
LX
22KHz
Oscill.
22KHz
Oscill.
P
W
M
C
o
n
t
r
o
lle
r
Rsense EN
VSEL
Linear Post-reg
+Modulator
+Protections
+Diagnostics
ITEST
TTX
EN
VSEL
VOUT Control
EXTM
P-GND
Preregulator
+U.V.lockout
+P.ON reset
Byp Vcc Vcc- L Byp Vcc Vcc- L ISEL TTX
TEN
DSQOUT
DETIN
22KHz Tone
Amp. Diagn.
22KHz Tone
Freq. Detector
TTX TTX
VCTRL
1 n.c.
2 n.c.
3 n.c.
4 LX
5 P-GND
6 SDA
7 n.c.
8 n.c.
9 SCL
10 ADDR
11 DSQout
12 DSQIN
13 EXTM
14 TTX
15 BYP
16 n.c.
17 n.c.
18 Vcc-L
19 Vcc
20 A-GND
21 VoRX
22 VoTX
23 n.c.
24 n.c.
25 n.c.
26 n.c.
27 Vup
28 ISEL
29 DETIN
30 VCTRL
31 n.c.
32 n.c.
Connected with power grounds and to
the ground layer through vias
to dissipate the heat.
Epad
IC Data Sheets EN 73 Q552.1E LA 8.
2010-Feb-19
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div. table
8.14 Diagram TCON Controller B11A, TL2429MC (IC 7J01)
Figure 8-14 Internal block diagram and pin configuration
18770_310_100217.eps
100217
Block diagram
RLV0~6P/M,
ODC + OPC
TCON
mini-LVDS
TFT LCD ARRAY
Gate
Driver
1
Gate
Driver
2
Gate
Driver
n
Source
Driver 1
Source
Driver 2
Source
Driver 5
Source
Driver 8
VST(GSP)
SOE,POL
1RxA~E
2RxA~E
1RxCLK
2RxCLK
LVDS
Input
EEPROM
(LUT)
16Kbit
or 32Kbit
S
C
L
S
D
A
LLV0~6P/M
3RxA~E
4RxA~E
3RxCLK
4RxCLK
Internal
SSIC
Frame Memory
SDRAM
Gate in
panel
1
Gate in
panel
2
Gate in
panel
n
G
C
L
K
1
,

,
G
C
L
K
3
,

,
G
C
L
K
6
IC Data Sheets EN 74 Q552.1E LA 8.
2010-Feb-19
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div. table
8.15 Diagram TCON Controller B11B, TPS62110RSA (IC 7JH1)
Figure 8-15 Internal block diagram and pin configuration
18770_311_100217.eps
100217
Block diagram
Pinning information
16 15 14 13
5 6 7 8
1
2
3
4 9
GND
GND
FB
AGND
PGND
Exposed
Thermal
Pad
VIN
VIN
EN
D
N
G
P
W
S
I
B
L
A
N
I
V
W
S
G
P
C
N
Y
S
O
B
L
12
11
10
_
+
_
+
_
+
_
+
_
+
REF
REF
IAVG Comparator
P-Channel
Driver
Shoot-Through
Logic
Control
Logic
1-MHz
Oscillator
Comparator
S
R
N-Channel
V(COMP)
Sawtooth
Generator
V
I
Undervoltage
Lockout
_
+
Compensation
REF
R2
R1
VI
EN
SW
D N G P B F
Gm
Thermal
Shutdown
Vina
_
+
_
+
SKIP Comparator
_
+
_
+
PG
LBO
LBI GND
A. The internal feedback divider is disabled and the FB pin is directly connected
to the internal GM amplifier.
IC Data Sheets EN 75 Q552.1E LA 8.
2010-Feb-19
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div. table
8.16 Diagram TCON Controller B11B, MAX17113ETL (IC 7JF1)
Figure 8-16 Internal block diagram and pin configuration
18770_312_100217.eps
100217
Block diagram
Pinning information
MAX17113
THIN QFN
TOP VIEW
35
36
34
33
12
11
13
D
V
R
P
S
R
C
G
O
N
D
R
N
M
O
D
E
14
T
H
R
D
E
L
2
F
S
E
L
V
I
N
V
L
E
N
2
P
G
N
D
I
N
2
I
N
2
1 2
SWI
4 5 6 7
27 28 29 30 26 24 23 22
SWO
FB1
BST
FB2
DEL1
REF
G
N
D
2
E
N
1
3
25
37 COMP FBN
38
39
40
PGOOD
CRST
AGND
AGND
DRVN
CTL
LX1
32
15
LX2 LX1
31
16
17
18
19
20 LX2
D
L
P
F
B
P
C
P
G
N
D
O
U
T
8 9 10
21
PGND
STEP-DOWN OSC
VL
LX2
GND2
OUT
FB2
VIN
REF
AGND
DEL1
VL VL
VIN
VIN(12V)
3.3V
2A
150mV
STEP-UP
POWER-UP
SEQUENCE
HV
SWITCH
BLOCK
NEGATIVE
REG
POSITIVE
REG
IN2
LX1
PGND
FB1
COMP
FSEL
AGND
SWI
SWO
PGOOD
PGOOD
3.3V
VL
BST
VGOFF
-6V
100mA
REF
VL
AVDD
16V
1.5A
REF
DEL2
DLP
DRVN
FBN FBP
REF
VIN
CPGND
50%OSC
EN1 STEP-DOWN, NEGATIVE
ON/OFF
EN2 STEP-UP, POSITIVE
CHARGE PUMP ON/OFF
P
VGON
35V
50mA
DRN
THR
MODE
CRST
CTL GON
CONTROL
GON
AVDD
SRC
SWO
SRC
DRVP
CPGND
RESET
IC Data Sheets EN 76 Q552.1E LA 8.
2010-Feb-19
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div. table
8.17 Diagram TCON DC/DC B14B, ISL97653AIRZ (IC 7KFA)
Figure 8-17 Internal block diagram and pin configuration
18770_307_100217.eps
100217
Block diagram
Pinning information
1
40
2
3
4
5
6
7
8
9
10
30
29
28
27
26
25
24
23
22
21
39 38 37 36 35 34 33 32 31
11 12 13 14 15 16 17 18 19 20
L
D
O
-
C
T
L
L
D
O
-
F
B
P
V
I
N
1
A
G
N
D
P
R
O
T
L
X
2
L
X
1
P
G
N
D
2
P
G
N
D
1
T
E
M
P
COMP
FBB
RSET
HVS
EN
CDEL
CTL
DRN
COM
POUT
PVIN2
CB
LXL1
LXL2
PGND3
PGND4
CM2
FBL
VL
VREF
F
B
N
S
U
P
N
N
O
U
T
P
G
N
D
5
C
1
P
C
1
N
C
2
P
C
2
N
S
U
P
P
F
B
P
ISL97653A
40 LD 6X6 QFN
TOP VIEW
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-

CONTROL
LOGIC
SAWTOOTH
GENERATOR
CURRENT
AMPLIFIER
CURRENT LIMIT
COMPARATOR
CURRENT LIMIT
THRESHOLD
REFERENCE BIAS
AND
SEQUENCE CONTROLLER
VREF
GM AMPLIFIER
UVLO COMPARATOR
OSCILLATOR
0.75 VREF
REGULATOR
SUPN
0.2V
UVLO COMPARATOR
0.4V
0.75 VREF
VREF
POUT
RSENSE
BUFFER
CONTROL
LOGIC
VREF
SAWTOOTH
GENERATOR
SLOPE
COMPENSATION
GM AMPLIFIER
SUPP
CURRENT LIMIT
THRESHOLD
CURRENT
LIMIT
COMPARATOR
SUPP
C1- C1+ C2+ C2- POUT CTL COM
BUFFER
LX1
PGND1
CB
LXL1
CM2
FBL
FBP
FBN
NOUT
PVIN1,2
EN
CDEL
PVIN1,2
VL
FBB
CM1
PGND2
LX2
CURRENT AMPLIFIER
SLOPE
COMPENSATION
VREF
FREQ
HVS
LOGIC
RSET HVS PROT
LXL2
DRN
680kHz
VL
LDO
CONTROL
LOGIC2
LDO-CTL
LDO-FB
TEMP
SENSOR
TEMP
Block Diagrams EN 77 Q552.1E LA 9.
2010-Feb-19
back to
div. table
9. Block Diagrams
9-1 Wiring diagram Rembrandt 32"
MAINS
SWITCH
1
1
P
1
M
9
5
9
P
1
M
9
9
1
3
1
9
1
P
3
1
3
1
6
1
P
3
2P3
1311
2P3
1308
1
7
3
5
4
P
1
M
9
5
1
1
P
1
M
9
9
9
P
1JA2
60P
1JA1
60P
1M20
8P
M
A
IN
S
C
O
R
D
8
1
9
1
8
J
A
1
8
J
A
2
CN2 CN1
3
P
J
1
SSB
(1150)
B
MAIN POWER SUPPLY
IPB 32 PLHC-P981A B
(1005)
LCD DISPLAY
(1004)
LOUDSPEAKER
(5213)
T
O
B
A
C
K
L
IG
H
T
T
O
B
A
C
K
L
IG
H
T
K
E
Y
B
O
A
R
D

C
O
N
T
R
O
L
(
1
1
1
4
)
IR / LED BOARD
(1112)
8M99
8M20
8M95
8311
WIRING DIAGRAM 32" REMBRANDT
18770_400_100217.eps
100219
1M99 (B03C)
1. +12VD
2. +12VD
3. GND
4. GND
5. LAMP-ON
6. BACKLIGHT-PWM_BL-VS
7. BACKLIGHT-BOOST
8. BACKLIGHT-PWM-ANA-DISP
9. POWER-OK
1M95 (B03C)
1. +3V3-STANDBY
2. STANDBY
3. GND
4. GND
5. GND
6. +12V
7. +12V
8. +12V
9. +24V-AUDIO-POWER
10. GND-AUDIO
11. MAINS-OK
1735 (B03A)
1. LEFT-SPEAKER
2. GND-AUDIO
3. GND-AUDIO
4. RIGHT-SPEAKER
1M20 (B09A)
1. LIGHT-SENSOR
2. GND
3. RC
4. LED-2
5. +3V3-STANDBY
6. LED-1
7. KEYBOARD
8. +5V
1JA2 (B11C)
1. GND
|
19. VDD
20. VDD
|
24. VCC
25. VCC
|
60. GND
1JA1 (B11C)
1. GND
|
36. VCC
37. VCC
|
41. VDD
42. VDD
|
60. GND
HIGH VOLTAGE
L N
Board Level Repair
Component Level Repair
Only For Authorized Workshop
U
S
B
H
D
M
I
P
H
O
N
E
C
O
N
D
IT
IO
N
A
L
A
C
C
E
S
S

HDMI
HDMI HDMI VGA
SCART
T
U
N
E
R
J2
3P
J1
8P
EN 78 Q552.1E LA 9. Block Diagrams
2010-Feb-19
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div. table
9-2 Wiring diagram Rembrandt 37" - 42"
TWEETER
(5215)
TWEETER
(5215)
MAINS
SWITCH
1
1
P
1
M
9
5
9
P
1
M
9
9
1
3
1
9
1
P
3
1
3
1
6
1
P
3
2P3
1311
2P3
1308
1
7
3
5
4
P
1
M
9
5
1
1
P
1
M
9
9
9
P
1JA2
60P
1JA1
60P
1M20
8P
M
A
IN
S
C
O
R
D
8
1
9
1
8
J
A
1
8
J
A
2
CN2 CN1
3
P
J
1
SSB
(1150)
B
MAIN POWER SUPPLY
IPB 37 PLHD-P982A B
IPB 42 PLHF-P983A B
(1005)
LCD DISPLAY
(1004)
T
O
B
A
C
K
L
IG
H
T
T
O
B
A
C
K
L
IG
H
T
K
E
Y
B
O
A
R
D

C
O
N
T
R
O
L
(
1
1
1
4
)
IR / LED BOARD
(1112)
8M99
8M20
8M95
8311
WIRING DIAGRAM 37"- 42" REMBRANDT
18770_401_100217.eps
100219
1M99 (B03C)
1. +12VD
2. +12VD
3. GND
4. GND
5. LAMP-ON
6. BACKLIGHT-PWM_BL-VS
7. BACKLIGHT-BOOST
8. BACKLIGHT-PWM-ANA-DISP
9. POWER-OK
1M95 (B03C)
1. +3V3-STANDBY
2. STANDBY
3. GND
4. GND
5. GND
6. +12V
7. +12V
8. +12V
9. +24V-AUDIO-POWER
10. GND-AUDIO
11. MAINS-OK
1735 (B03A)
1. LEFT-SPEAKER
2. GND-AUDIO
3. GND-AUDIO
4. RIGHT-SPEAKER
1M20 (B09A)
1. LIGHT-SENSOR
2. GND
3. RC
4. LED-2
5. +3V3-STANDBY
6. LED-1
7. KEYBOARD
8. +5V
1JA2 (B11C)
1. GND
|
19. VDD
20. VDD
|
24. VCC
25. VCC
|
60. GND
1JA1 (B11C)
1. GND
|
36. VCC
37. VCC
|
41. VDD
42. VDD
|
60. GND
HIGH VOLTAGE
L N
Board Level Repair
Component Level Repair
Only For Authorized Workshop
U
S
B
H
D
M
I
T
U
N
E
R
P
H
O
N
E
C
O
N
D
IT
IO
N
A
L
A
C
C
E
S
S

HDMI
HDMI HDMI VGA
SCART
LOUDSPEAKER
(5213)
J2
3P
J1
8P
Block Diagrams EN 79 Q552.1E LA 9.
2010-Feb-19
back to
div. table
9-3 Wiring diagram Van Gogh 32" - 40"
TWEETER
(5216)
TWEETER
(5216)
MAINS
SWITCH
1
1
P
1
M
9
5
9
P
1
M
9
9
2P3
1311
2P3
1308
1
7
3
5
4
P
1
M
9
5
1
1
P
1
3
1
9
3
2
"
-6
P
1
3
1
6
3
2
"
-1
2
P
1
3
1
9
4
0
"
-1
0
P
1
3
1
6
4
0
"
-1
0
P
1
M
9
9
9
P
1KA2
80P
1KA1
80P
1M20
8P
M
A
IN
S
C
O
R
D
8
1
9
1
TO DISPLAY TO DISPLAY
3
P
J
1SSB
(1150)
B
MAIN POWER SUPPLY
32"- FSP124-3MS01 B
40"- DPS-206CP A B
(1005)
LCD DISPLAY
(1004)
K
E
Y
B
O
A
R
D

C
O
N
T
R
O
L
(
1
1
1
4
)
IR / LED BOARD
(1112)
8M99
8M95
8311
WIRING DIAGRAM 32"- 40" VAN GOGH
18770_402_100217.eps
100219
1M99 (B03C)
1. +12VD
2. +12VD
3. GND
4. GND
5. LAMP-ON
6. BACKLIGHT-PWM_BL-VS
7. BACKLIGHT-BOOST
8. BACKLIGHT-PWM-ANA-DISP
9. POWER-OK
1M95 (B03C)
1. +3V3-STANDBY
2. STANDBY
3. GND
4. GND
5. GND
6. +12V
7. +12V
8. +12V
9. +24V-AUDIO-POWER
10. GND-AUDIO
11. MAINS-OK
1735 (B03A)
1. LEFT-SPEAKER
2. GND-AUDIO
3. GND-AUDIO
4. RIGHT-SPEAKER
1M20 (B09A)
1. LIGHT-SENSOR
2. GND
3. RC
4. LED-2
5. +3V3-STANDBY
6. LED-1
7. KEYBOARD
8. +5V
1KA2 (B14E)
1. GND
|
11. VLS_15V6
12. VLS_15V6
|
33. VCC_3V3
34. VCC_3V3
|
78. VGH_25V
79. VGL_6V
80. GND
1KA1 (B14E)
1. GND
|
11. VLS_15V6
12. VLS_15V6
|
33. VCC_3V3
34. VCC_3V3
|
78. VGH_25V
79. VGL_6V
80. GND
L N
Board Level Repair
Component Level Repair
Only For Authorized Workshop
U
S
B
H
D
M
I T
U
N
E
R
P
H
O
N
E
S
P
D
IF
C
O
N
D
IT
IO
N
A
L
A
C
C
E
S
S

HDMI HDMI VGA
SCART
LOUDSPEAKER
(5213)
8M20
T
O
B
A
C
K
L
IG
H
T
8KA1
8KA2
NOT FOR 32" TV-SETS NOT FOR 32" TV-SETS
J2
3P
J1
8P
EN 80 Q552.1E LA 9. Block Diagrams
2010-Feb-19
back to
div. table
9-4 Wiring diagram Matisse 32"
J2
3P
J1
8P
MAINS CORD
3
P
J
1
1
1
P
1
M
9
5
9
P
1
M
9
9
MAIN POWER SUPPLY
DPS-199DP-1 A B
(1005)
K
E
Y
B
O
A
R
D

C
O
N
T
R
O
L
(
1
1
1
4
)
IR / LED BOARD
(1112)
WIRING DIAGRAM 32" MATISSE
18770_403_100217.eps
100219
Board Level Repair
Component Level Repair
Only For Authorized Workshop
8M59
1JA1
60P
1JA1
60P
1M20
8P
1M72
4P
1M59
23P
SSB
(1150)
B
U
S
B
T
U
N
E
R
S
P
D
IF
C
O
N
D
IT
IO
N
A
L
A
C
C
E
S
S

ETHER
NET
HDMI HDMI HDMI VGA
SCART
SCART
1M09
4P
1316
13P
1319
12P
8M99
8M95
TO BACKLIGHT
H
D
M
I
MAINS
SWITCH
1
7
3
5
4
P
1
D
3
8
3
P
1
M
9
5
1
1
P
1
M
9
9
9
P
8M09
A
M
B
I
L
I
G
H
T

M
O
D
U
L
E

1
8

L
E
D
(
1
1
7
4
)
A
L
2
5
P
1
M
8
3
A
M
B
I
L
I
G
H
T

M
O
D
U
L
E

1
8

L
E
D
(
1
1
7
4
)
A
L
1
M
8
4
2
5
P
1
M
8
3
2
5
P
8M83
8M20
TO DISPLAY TO DISPLAY LCD DISPLAY
(1004)
8M20
8JA2
8JA1
8311
SPEAKER L
(5215)
SUB-WOOFER
(5214)
SPEAKER R
(5215)
2P3
1311
2P3
1308
8191
1M99 (B03C)
1. +12VD
2. +12VD
3. GND
4. GND
5. LAMP-ON
6. BACKLIGHT-PWM_BL-VS
7. BACKLIGHT-BOOST
8. BACKLIGHT-PWM-ANA-DISP
9. POWER-OK
1M95 (B03C)
1. +3V3-STANDBY
2. STANDBY
3. GND
4. GND
5. GND
6. +12V
7. +12V
8. +12V
9. +24V-AUDIO-POWER
10. GND-AUDIO
11. MAINS-OK
1735 (B03A)
1. LEFT-SPEAKER
2. GND-AUDIO
3. GND-AUDIO
4. RIGHT-SPEAKER
1M72 (B13)
1. +24V
2. +24V
3. GND
4. GND
1D38 (B03A)
1. LEFT-SPEAKER
2. GND-AUDIO
3. RIGHT-SPEAKER
1M20 (B09A)
1. LIGHT-SENSOR
2. GND
3. RC
4. LED-2
5. +3V3-STANDBY
6. LED-1
7. KEYBOARD
8. +5V
1KA2 (B14E)
1. GND
|
11. VLS_15V6
12. VLS_15V6
|
33. VCC_3V3
34. VCC_3V3
|
78. VGH_25V
79. VGL_6V
80. GND
1KA1 (B14E)
1. GND
|
11. VLS_15V6
12. VLS_15V6
|
33. VCC_3V3
34. VCC_3V3
|
78. VGH_25V
79. VGL_6V
80. GND
1M38 (AL1A)
1. +24V
2. +24V
3. +24V
4. +24V
5. +24V
6. GND
7. GND
8. GND
9. GND
10. GND
11. TEMP-SENSOR
12. N.C.
13. N.C.
14. +3V3
15. BLANK
16. PROG
17. GND
18. LATCH
19. SPI-CS
20. +3V3
21. PWM-CLOCK
22. GND
23. SPI-DATA-RETURN
24. SPI-DATA-IN
25. SPI-CLOCK
1M48 (AL2A)
1. SPI-CLOCK-BUF
2. SPI-DATA-OUT
3. SPI-DATA-RETURN
4. GND
5. PWM-CLOCK-BUF
6. +3V3
7. SPI-CS
8. LATCH
9. GND
10. PROG
11. BLANK
12. +3V3
13. N.C.
14. N.C.
15. TEMP-SENSOR
16. GND
17. GND
18. GND
19. GND
20. GND
21. +24V
22. +24V
23. +24V
24. +24V
25. +24V
1M59 (B13)
1. AMBI-SPI-CLK-OU
2. AMBI-SPI-SDO-OUT
3. AMBI-SPI-SDI-OUT-GI
4. GND
5. AMBI-PWM-CLK_B2
6. V-AMBI
7. AMBI-SPI-CS-OUTn_R2
8. AMBI-LATCH1_G2
9. GND
10. AMBI-PROG_B1
11. AMBI-BLANK_R1
12. V-AMBI
13. AMBI-LATCH2_DIS
14. AMBI-SPI-CS-EXTLAMPSn
15. AMBI-TEMP
16. GND
17. GND
18. GND
19. GND
20. GND
21. +24V
22. +24V
23. +24V
24. +24V
25. +24V
Block Diagrams EN 81 Q552.1E LA 9.
2010-Feb-19
back to
div. table
9-5 Wiring Matisse 40"
+



-
+



-
LOADSPEAKER LEFT
(5215)
LOADSPEAKER RIGHT
(5215)
+



-
+
-
J2
3P
J1
8P
M
A
IN
S
C
O
R
D
TO DISPLAY TO DISPLAY
3
P
J
1
2P3
1311
2
P
3
1
3
0
8
1
1
P
1
M
9
5
9
P
1
M
9
9
MAIN POWER SUPPLY
DPS-199DP A B
(1005)
LCD DISPLAY
(1004)
TCON
K
E
Y
B
O
A
R
D
C
O
N
T
R
O
L
(
1
1
1
4
)
IR / LED BOARD
(1112)
WIRING DIAGRAM 40" MATISSE
18770_404_100217.eps
100219
1M99 (B03C)
1. +12VD
2. +12VD
3. GND
4. GND
5. LAMP-ON
6. BACKLIGHT-PWM_BL-VS
7. BACKLIGHT-BOOST
8. BACKLIGHT-PWM-ANA-DISP
9. POWER-OK
1M95 (B03C)
1. +3V3-STANDBY
2. STANDBY
3. GND
4. GND
5. GND
6. +12V
7. +12V
8. +12V
9. +24V-AUDIO-POWER
10. GND-AUDIO
11. MAINS-OK
1735 (B03A)
1. LEFT-SPEAKER
2. GND-AUDIO
3. GND-AUDIO
4. RIGHT-SPEAKER
1M20 (B09A)
1. LIGHT-SENSOR
2. GND
3. RC
4. LED-2
5. +3V3-STANDBY
6. LED-1
7. KEYBOARD
8. +5V
1KA2 (B14E)
1. GND
|
11. VLS_15V6
12. VLS_15V6
|
33. VCC_3V3
34. VCC_3V3
|
78. VGH_25V
79. VGL_6V
80. GND
1KA1 (B14E)
1. GND
|
11. VLS_15V6
12. VLS_15V6
|
33. VCC_3V3
34. VCC_3V3
|
78. VGH_25V
79. VGL_6V
80. GND
Board Level Repair
Component Level Repair
Only For Authorized Workshop
8G50
8M59
1G51
51P
1G50
41P
1M20
8P
1M09
4P
1M59
23P
SSB
(1150)
B
U
S
B
T
U
N
E
R
S
P
D
IF
C
O
N
D
IT
IO
N
A
L
A
C
C
E
S
S

ETHER
NET
HDMI HDMI HDMI VGA
SCART
SCART
1M09
4P
1316
12P
1319
11P
8K51
8M99
8M95
TO BACKLIGHT
H
D
M
I
MAINS
SWITCH
8311
8
1
9
1
1
7
3
5
4
P
1
M
9
5
1
1
P
1
M
9
9
9
P
8M09
A
M
B
I
L
I
G
H
T

M
O
D
U
L
E

2
4

L
E
D
(
1
1
7
4
)
A
L
2
5
P
1
M
8
3
A
M
B
I
L
I
G
H
T

M
O
D
U
L
E

2
4

L
E
D
(
1
1
7
4
)
A
L
1
M
8
4
2
5
P
1
M
8
3
2
5
P
8M83
8
7
3
5
8M20
1M38 (AL1A)
1. +24V
2. +24V
3. +24V
4. +24V
5. +24V
6. GND
7. GND
8. GND
9. GND
10. GND
11. TEMP-SENSOR
12. N.C.
13. N.C.
14. +3V3
15. BLANK
16. PROG
17. GND
18. LATCH
19. SPI-CS
20. +3V3
21. PWM-CLOCK
22. GND
23. SPI-DATA-RETURN
24. SPI-DATA-IN
25. SPI-CLOCK
1M48 (AL2A)
1. SPI-CLOCK-BUF
2. SPI-DATA-OUT
3. SPI-DATA-RETURN
4. GND
5. PWM-CLOCK-BUF
6. +3V3
7. SPI-CS
8. LATCH
9. GND
10. PROG
11. BLANK
12. +3V3
13. N.C.
14. N.C.
15. TEMP-SENSOR
16. GND
17. GND
18. GND
19. GND
20. GND
21. +24V
22. +24V
23. +24V
24. +24V
25. +24V
1M59 (B13)
1. AMBI-SPI-CLK-OU
2. AMBI-SPI-SDO-OUT
3. AMBI-SPI-SDI-OUT-GI
4. GND
5. AMBI-PWM-CLK_B2
6. V-AMBI
7. AMBI-SPI-CS-OUTn_R2
8. AMBI-LATCH1_G2
9. GND
10. AMBI-PROG_B1
11. AMBI-BLANK_R1
12. V-AMBI
13. AMBI-LATCH2_DIS
14. AMBI-SPI-CS-EXTLAMPSn
15. AMBI-TEMP
16. GND
17. GND
18. GND
19. GND
20. GND
21. +24V
22. +24V
23. +24V
24. +24V
25. +24V
1M09 (B09)
1. +24V
2. +24V
3. GND
4. GND
EN 82 Q552.1E LA 9. Block Diagrams
2010-Feb-19
back to
div. table
9-6 Block Diagram Video
B02 PNX85500 B06B VIDEO OUT - LVDS B11A TCON CONTROLLER (LGD) B11C MINI LVDS
B11B TCON DC/DC
B04A ANALOGUE EXTERNALS A
B01I VGA
B04B ANALOGUE EXTERNALS B
B01A COMMON INTERFACE
B01F HDMI & CI
B07A DVBS-FE
B05A DDR
B01C USB HUB
B01B FLASH
B14A TCON CONTROL (SHARP) B14E MINI LVDS (
B14D MPD
B14C P GAMMA &
VOM & FLASH
B01H HDMI B04D HDMI
1E04
1E08
1E03
21
7R02
STV6110AT
DVB-S
TUNER
7R01
STV0903BAC
DVB-S
CHANNEL
DECODER
7
7600
PNX85433EH/M2A
VIDEO STREAM B02A LVDS B02F
ANALOG VIDEO B02I
HDMI_DV B02C
AV3-PB
AV3-Y
AV3-PR
PB
PR
Y
EXT 1
EXT 2
EXT 3
1E01
1E02
20 21
1
7
11
15
16
20 21
1
7
11
15
16
SCART1
SCART2
19
7E04
19
7E05
1
1E05
2
3
14
13
R-VGA
G-VGA
B-VGA
H-SYNC-VGA
V-SYNC-VGA
16
10
11
515
VGA
CONNECTOR
AC12
AD15
AE15
AC15
AF13
AC18
AB18
AE16
AD16
AF16
AV1-BLK 16
7E09-1
AV2-STATUS 8
B02G
CONTROL
AV1-STATUS 8
16 AV2-BLK
7E09-2
B02G
CONTROL
B02G
B02G
CONTROL
CONTROL
63 HDMIA-RXC-
HDMIA-RX0+
HDMIA-RX0-
HDMIA-RX1+
HDMIA-RX1-
HDMIA-RX2+
HDMIA-RX2-
62
61
60
59
58
57
56
HDMIA-RXC+
U26
T25
T26
W24
U25
V26
W26
W25
V25
RX1_B_P
RX2_B_N
RX2_B_P
RREF
RX1_B_N
RX0_B_P
RXC_B_P
RXC_B_N
RX0_B_N
TXC_N
TXC_P
TX0_N
TX0_P
TXA_N
TX1_P
TX2_N
TX2_P
PNX85500
18770_405_100217.eps
100219
IP
SAT IN
VIDEO
PCMCIA
CONDITIONAL
ACCESS
2
2
2
20
+3V3
MD0
MDI
TUNER_P
TUNER_N
IF_AGC
7E06
CVBS-MON-OUT1 AF11
CVBS1_OUT
7 AV4-PB AD14 AI23
AV4-PR 15 AC14
AI33
11 AV4-Y AE14
AI13
AV2-CVBS 20 AB14
AI42
ATV_CVBS_Y3
CR
VGA_R
VSYNC_IN
VGA_G
VGA_B
PR_R_C1
Y_G1
PB_B1
AC13 15 AV1-R
AV1_R
7 AD13 AVI-B
AV1_B
11 AE13 AV1-G
AV1_G
20 AB15 AV1-CVBS
CVBS_Y1
TNR_SER1_MIVAL
TNR_SER1_SOP
TNR_SER1_MICLK
TNR_SER1_DATA
HSYNC_IN
+3V3
3S0W
7F01
74LVC245APW
BUFFER
1P00
6
8
P
51
52
18
17
+5VCA
1
5 SVHS IN
2
4
3
1ECB Y-SVHS
C-SVHS
CA-MDO(0-7) MDO(0-7)
CA-MDI(0-7)
PX1
PX2
PX3
PX4
PX1
PX2
PX3
PX4
QUAD LVDS
1920x1080
100/120HZ
1G51
+VDISP
TO DISPLAY
(TCON ON DISPLAY)
I2C
50
51
49
40
40
3
4
2
1
1G50
TO DISPLAY
(TCON ON DISPLAY)
TO TCON SSB
TO TCON SSB
TO TCON SSB
TO TCON SSB
TO DISPLAY
(TCON ON SSB)
TO DISPLAY
(TCON ON SSB)
LML
RML
N.C.
1
2
3
3
41
1JA2
59
60
48
40
27
24
25
20
19
1JA1
60
34
21
58
53
2
13
1
1
20 8 IM
32 122 XTAL
18 12 QP
19 11 QM
78 TS-DVBS-VALID
75 TS-DVBS-SOP
74 TS-DVBS-CLOCK
73 TS-DVBS-DATA
4
AD12
AE12
AF12
MEMORY B02B
V1
DDR2-VREF-CTRL3
A2
DDR2-VREF-CTRL2
VREF_2
VREF_1
CONROL B02E
FLASH B02A
7F20
NAND02GW3B2DN6F
NAND04GW3B2DN6F
NAND
FLASH
256MB
512MB
4
3
2
1
USB-DM
USB-DP
USB-DM2
5000 Serie
7000 Serie
USB-DP2
USB-DM1
USB-DP1
SIDE USB
CONNECTOR
1P08
+5V-USB1
R26
R25
12,37
+3V3 VCC
USB_DP
USB_DN
+5V-USB2
XIO_D
2
1
3
4
4
3
2
1
SIDE USB
CONNECTOR
1P07
2
1
3
4
9F26
9F25
9F21
9F20 XIO-D(00-07)
5000 Serie 256MB
7000 Serie 512MB
7J01
TL2429MC
7JC1
MAX9668ETP
TIMING
CONTROL
GMA
GMA
GAMMA
REF
SYST
7J02
M24C32
EEPROM
7JD1
MAX17119ET
LEVEL
SHIFTER
CLK GCLK
SDA-TCON
SCL-TCON
+VCC
+VDD
41
42
37
36
+VCC
+VDD
2
13
PX1
PX2
PX3
PX4
TO DISPLAY
(TCON ON SSB)
TO DISPLAY
(TCON ON SSB)
L_LV
R_LV
1KA2
59
81
48
50
13
24
25
20
19
1KA1
81
50
13
58
53
2
13
1
1
7KAA
UPD809900F
7KQA
ISL24837IRZ
TIMING
CONTROL
GMA
GMA
REF
VOLTAGE
GEN
7KQB
M25P32
FLASH
7KUE
MAX17079GTL
LEVEL
SHIFTER
CS(1U-12U) CS(1-12)
+VCC
+VDD
41
42
37
36
+VCC
+VDD
SPI
SDO
SCS
SCK
2
13
SSB 3104 313 6364* SSB 3104 313 6400*
SSB 3104 313 6402*
SSB 3104 313 6406*
O
R
Only 7000 Serie
7EC1
SII9187ACNU
SII9287BCNU
HDMI
SWITCH
VCC33
RXC
RXD
RXB
RXA
72
71
69
68
66
65
63
62
42
41
39
39
36
35
33
32
23
22
20
19
17
16
14
13
90
89
87
86
84
83
81
80
19
1
18
2
1
1P05
3
4
7
9
10
12
6
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC- HDMI SIDE
CONNECTOR
19
1
18
2
1
1P02
3
4
7
9
10
12
6
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC- HDMI 1
CONNECTOR
1
1P03
3
4
7
9
10
12
6
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
1
1P04
3
4
7
9
10
12
6
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
19
1
18
2
HDMI 2
CONNECTOR
19
1
18
2
HDMI 3
CONNECTOR
9,27,64
+3V3-HDMI
Only 7000 Serie
Only For DVBS
PNX-IF-AGC
4
5
1F75
SAW36MHZ17
2F74
2F78
2F90 3F79-1
3F79-4 5
F
7
0
1T01
TH2603
IF-OUT1
IF-OUT2
MAIN HYBRID
TUNER
2
3
4
7
6
PNX-IF-P
PNX-IF-N 11
10 1
2
7F75
UPC3221GV
AGC AMPLIFIER
IN
VCC
OUT
AGC CONTROL
1
SELECT-SAW
RF IN
5F73
7F70
B02E
CONTROL
BANDPASS
FILTER
TUN-IF-P
TUN-IF-N
1
R
1
0
1
6
M
31
30
DDR2-VREF-DDR
A1 E2 A1 E2 A1 E2 A1 E2
+1V8
SDRAM
128MB
7B01
EDE1108AGBG
SDRAM
128MB
7B02
EDE1116AEBG
EDE1108AGBG
SDRAM
128MB
7B03
EDE1108AGBG
DQ
A
SDRAM
128MB
7B00
EDE1116AGBG
EDE1108AGBG
V
R
E
F
V
D
D
L
V
R
E
F
V
D
D
L
V
R
E
F
V
D
D
L
V
R
E
F
V
D
D
L
DDR2-D(0-31)
D
(2
4
-3
1
)
D
(1
6
-2
3
)
D
(8
-1
5
)
D
(0
-7
)
DDR2-A(0-13)
5000 Serie 256MB 7000 Serie 512MB
Block Diagrams EN 83 Q552.1E LA 9.
2010-Feb-19
back to
div. table
9-7 Block Diagram Audio
B01H HDMI B04D HDMI B02D PNX85500: AUDIO
B02D CLASS-D B03A AUDIO
B04E HEADPHONE
B04B ANALOGUE EXTERNALS B
B04A ANALOGUE EXTERNALS A
B01J TEMP SENSOR + HEADPHONE
B02 PNX85500 B01A COMMON INTERFACE
B01F HDMI & CI
B07A DVBS-FE
B05A DDR
B01C USB HUB
B01B FLASH
7H00
PNX85439EH/M2
AUDIO B02D
STANDBY B03H
HDMI_DV B02c
STANDBY B02G
PNX85500
18770_406_100217.eps
100219
AD7
AE7
1735
1
2
SPEAKER L
3
4
SPEAKER R
SUBWOOFER
(OPTIONAL)
ADAC(1)
ADAC(2)
+AUDIO-L
-AUDIO-R
RESET-AUDIO AD1
AC19
ADAC(4)
AMP1
AMP2
ADAC(3)
HEADPHONE
OUT 3.5mm
AF7
AD6
7EE1
TPA6111A2DGN
HEADPHONE
AMPLIFIER
1
7 IN-1
SHUTDOWN
IN-2
2
6
5
A-PLOP B03A
B02G
B03C
7D10
TPA3123D2PWP
CLASS D
POWER
AMPLIFIER
OUT-L
PVCC_L
PVCC_R
OUT-R
5 12
10 6
22
15
IN-R
IN-L
MUTE
SD
4
2
AUDIO-MUTE-UP
A-STBY
A-STBY
B04A
STANDBY &
PROTECTION
7D03
MAIN SWITCH
DETECT
7D03
LEFT-SPEAKER
RIGHT-SPEAKER
AE6
AF6
AE10
AF10
AD10
AC10
AUDIO-OUT-L 1
7
3
1E08
4
6
5
ADAC(5)
ADAC(6)
AUDIO-IN3-L
AUDIO-IN3-R
AE9
AF9
AUDIO IN
L+R
ADAC_2
PO_7
PO_6
ADAC3
ADAC4
ADAC_1
1328
2
3
1
7EE0-1 7EE0-2
1D38
1
2
3 DETECT2
MAINS-OK
1
1E01-1
3
6
AP-SCART-OUT-L
AP-SCART-OUT-R
2
1
1E02
3
2
6
AP-SCART-OUT-L
AP-SCART-OUT-R
AUDIO-IN2-R
AUDIO-IN2-L
20 21
1
7
11
15
16
SCART1
SCART2
A-PLOP
7E01
A-PLOP
B03C
20 21
1
7
11
15
16
7S05
AUDIO-OUT-R
3EA7-4
3EA7-1
AUDIO
AUDIO-IN1-L
AUDIO-IN1-R
5D03
7EC1
SII9187ACNU
SII9287BCNU
HDMI
SWITCH
VCC33
RXC
RXD
RXB
RXA
72
71
69
68
66
65
63
62
42
41
39
39
36
35
33
32
23
22
20
19
17
16
14
13
90
89
87
86
84
83
81
80
19
1
18
2
1
1P05
3
4
7
9
10
12
6
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC- HDMI SIDE
CONNECTOR
19
1
18
2
1
1P02
3
4
7
9
10
12
6
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC- HDMI 1
CONNECTOR
1
1P03
3
4
7
9
10
12
6
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
1
1P04
3
4
7
9
10
12
6
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
19
1
18
2
HDMI 2
CONNECTOR
19
1
18
2
HDMI 3
CONNECTOR
14 ARC-eHDMI+ eHDMI+
9,27,64
+3V3-HDMI
8
+3V3
1,3
10,12
+24V-AUDIO-POWER
5D07
5D08
VDD
VO_1
VO_2
AD9
AC9
AUDIO-IN4-L
AUDIO-IN4-R
VGA (OR DVI)
AUDIO
1E09
2
3
1
AIN4_L
AIN4_R
ADAC_5
ADAC_6
AIN1_R
AIN2_L
AIN2_R
AIN3_L
AIN3_R
ADAC_5
ADAC_6
AIN1_L
21
7R02
STV6110AT
DVB-S
TUNER
7R01
STV0903BAC
DVB-S
CHANNEL
DECODER
7
VIDEO STREAM B02A
ANALOG VIDEO B02I
IP
SAT IN
PCMCIA
CONDITIONAL
ACCESS
20
+3V3
MD0
MDI
TUNER_P
TUNER_N
IF_AGC
TNR_SER1_MIVAL
TNR_SER1_SOP
TNR_SER1_MICLK
TNR_SER1_DATA
7F01
74LVC245APW
BUFFER
1P00
6
8
P
51
52
18
17
+5VCA
CA-MDO(0-7) MDO(0-7)
CA-MDI(0-7)
20 8 IM
32 122 XTAL
18 12 QP
19 11 QM
78 TS-DVBS-VALID
75 TS-DVBS-SOP
74 TS-DVBS-CLOCK
73 TS-DVBS-DATA
4
PNX-IF-AGC
4
5
1F75
SAW36MHZ17
2F74
2F78
2F90 3F79-1
3F79-4 5
F
7
0
1T01
TH2603
IF-OUT1
IF-OUT2
MAIN HYBRID
TUNER
2
3
4
7
6
AD12
AE12
AF12
PNX-IF-P
PNX-IF-N 11
10 1
2
+5V-TUN-PIN
7F75
UPC3221GV
AGC AMPLIFIER
IN
VCC
OUT
AGC CONTROL
1
SELECT-SAW
RF IN
5F73
7F70
B02E
CONTROL
BANDPASS
FILTER
MEMORY B02B
V1
DDR2-VREF-CTRL3
A2
DDR2-VREF-CTRL2
VREF_2
VREF_1
7S05
LM324P
14
8
1E07
1
AF5
AF18
DIGITAL
AUDIO
OUT
SPDIF-OUT-PNX
SEL-HDMI-ARC
SPDIF-OUT
2
1
4
5
3
8
SPDIF_OUT
P0_4
7S09
&
+3V3
A-PLOP
7D15
A-PLOP
B04E
CONROL B02E
FLASH B02A
7F20
NAND02GW3B2DN6F
NAND04GW3B2DN6F
NAND
FLASH
256MB
512MB
4
3
2
1
USB-DM
USB-DP
USB-DM2
5000 Serie
7000 Serie
USB-DP2
USB-DM1
USB-DP1
SIDE USB
CONNECTOR
1P08
+5V-USB1
R26
R25
12,37
+3V3 VCC
USB_DP
USB_DN
+5V-USB2
XIO_D
2
1
3
4
4
3
2
1
SIDE USB
CONNECTOR
1P07
2
1
3
4
9F26
9F25
9F21
9F20
XIO-D(00-07)
DDR2-VREF-DDR
A1 E2 A1 E2 A1 E2 A1 E2
+1V8
SDRAM
128MB
7B01
EDE1108AGBG
SDRAM
128MB
7B02
EDE1116AEBG
EDE1108AGBG
SDRAM
128MB
7B03
EDE1108AGBG
DQ
A
SDRAM
128MB
7B00
EDE1116AGBG
EDE1108AGBG
V
R
E
F
V
D
D
L
V
R
E
F
V
D
D
L
V
R
E
F
V
D
D
L
V
R
E
F
V
D
D
L
DDR2-D(0-31)
D
(2
4
-3
1
)
D
(1
6
-2
3
)
D
(8
-1
5
)
D
(0
-7
)
DDR2-A(0-13)
5000 Serie 256MB
7000 Serie 512MB
5000 Serie 256MB
7000 Serie 512MB
Only 7000 Serie
Only 7000 Serie
Only For DVBS
5000 Serie mux SIL9187 - non Instaport
7000 Serie mux SIL9287 - Instaport
5EC2
TUN-IF-P
TUN-IF-N
1
R
1
0
1
6
M
31
30
63 HDMIA-RXC-
HDMIA-RX0+
HDMIA-RX0-
HDMIA-RX1+
HDMIA-RX1-
HDMIA-RX2+
HDMIA-RX2-
62
61
60
59
58
57
56
HDMIA-RXC+
U26
T25
T26
W24
U25
V26
W26
W25
V25
RX1_B_P
RX2_B_N
RX2_B_P
RREF
RX1_B_N
RX0_B_P
RXC_B_P
RXC_B_N
RX0_B_N
+3V3
3S0W
EN 84 Q552.1E LA 9. Block Diagrams
2010-Feb-19
back to
div. table
9-8 Block Diagram Control & Clock Signals
B04D HDMI
B01D SD-CARD B02A PNX85500 B06C AMBILIGHT
B04C ETHERNET + SERVICE
B01A COMMON INTERFACE
B09A DVBS CONNECTOR BOARD
B11D CONNECTORS
B14F CONNECTORS
B01B FLASH
B03C DC / DC
B05A DDR
B01E PNX85500-CONTROL
B04V ETHERNET + SERVICE
B02E PNX85500: MIPS B01C USB HUB
B03C DC / DC
B02G PNX85500: STANDBY CONTROLLER
B07A DVBS-FE B01K TUNER BRAZIL
B02G PNX85500: STANDBY CONTROLLER
CONTROL + CLOCK SIGNALS
1F51
1
3
4
5
2
LEVEL SHIFTED
FOR
DEBUG USE
ONLY
7E10
LAN8710A-EZK
ETHERNET
ETHERNET
CONNECTOR
RJ45
B02A
TO AMBILIGHT
MODULE
VIDEO STREAM B02A
B02E ETHERNET
CA-A(00-14)
1M99
7
6
5
1M95
2
LED1 AD26
AE26
AA22 DETECT2
AA26
AF19
RESET-STBYn
4x HDMI
CONNECTOR
AB22 RESET-SYSTEM
AD21 ENABLE-3V3n
PNX85500
7S00
PNX85507EB
SD-CARD
CONNECTOR
AC25 LED2
1
S
0
2
5
4
M
AF17
AE17
CONTROL B02E
CONTROL B02E
STANDBY B02G
HDMI_DV B02C
AD22 AV1-BLK
AF20 STANDBY
AD19
AD23 KEYBOARD
RC
LIGHT-SENSOR
AE19 TACH0
AB19 RESET-AUDIO
AF1 SENSE+1V1
AE25 AV1-STATUS
BACKLIGHT-OUT
BACKLIGHT-BOOST
RESET-SYSTEMn AE4
B01K B02G
B03G
AC21 POWER-OK
B03B
B02G
B07A
B01E
7S20
NCP303LSN28G
2
INP
1
OUTP
+3V3-STANDBY
GND
B02E
B02H POWER
7EC1
SII9187ACNU
HDMI
SWITCH
B04A
1P00
1
68
PCMCIA
CONDITIONAL
ACCESS
UA_RX_0
UA_TX_1
P1_7
P6_4
P2_2
P2_7
P1_1
P2_6
P0_6
VDD_1V1
P2_3
XTAL_I
XTAL_O
P5_1
P5_O
P3_2
P3_3
P3_5
P3_4
CADC_2
CADC_3
RESET_IN
P1_2
W24
RREF
HDMI_RX
P1_0
PWM_1
PWM_0
7F02
7F03
7F04
7F05
7F01
TO
POWER
SUPPLY
B04A
C
O
M
M
O
N
IN
T
E
R
F
A
C
E
TO
POWER
SUPPLY
+3V3-STANDBY
+5V
B04E
B03C
SDM
SPI-PROG AF22
AB20
FF04
FF29
18770_407_100217.eps
100217
RXD-UP
TXD-UP
Y23
Y24
UART
SERVICE
CONNECTOR
AG1
AH5
RXD1-MIPS
TXD1-MIPS
LED-2
LED-1
1
2
3
4
5
6
7
8
1M20
7U43
ARX-HOTPLUG
1E06
2
3
1
AC22 AV2-BLK
B04A
AE24 AV2-STATUS
B04A
P2_0
AC20 LCD-PWR-ONn
B03H
RESET-STBYn
RESET-DVBS
AA15 SENSE+1V2
B03D VDDA_1V2
AA18 RESET-DVBS
B07A P0_1
AE18 RESET-ETHERNETn
B04C P0_3
AF18 SEL-HDMI-ARC
B02D P0_4
AE20 LAMP-ON
V23 BOOST-PWM
V23 B01E
BACKLIGHT-BOOST
9
31
BRX-HOTPLUG
CRX-HOTPLUG 41
DRX-HOTPLUG 45
35
PCEC-HDMI CEC-HDMI
12
1918
1P05-19
1P04-19
1P03-19
1P02-19
TO PIN:
1P02-13
1P03-13
1P04-13
1P05-13
FLASH B02A
7F20
NAND02GW3B2DN6F
NAND04GW3B2DN6F
NAND
FLASH
256MB
512MB
12,37
+3V3 VCC
MDI
5000 Serie 256MB
7000 Serie 512MB
1P09
W2 1 SDIO-DAT3
CC_DAT3
2 W6
SDIO-CLK
SDIO-CMD
CMD
AA2 ETH-TXCLK
RXCLK
10 U6 SDIO-CDn
SDCD
AA3 ETH-RXCLK
TXCLK
12 V6 SDIO-WP
SDWP
SDCD
SDWP
W1 5
CLK
7 W5 SDIO-DAT0
DAT_0
8 W4 SDIO-DAT1
DAT_1
9 W3 SDIO-DAT2
DAT_2
DDR-CLK_N
DDR-CLK_P
3
SPI_CLK
SPI_CSB
SPI_SDO
SPI_SDI
P6_5
7F52
M25P05-AVMN6P
FLASH
512K
8
+3V3-STANDBY VCC
6 PNX-SPI-CLK AF24
3 PNX-SPI-WPn AE22
1 PNX-SPI-CSBn AF23
5 PNX-SPI-SDO AE23
2 PNX-SPI-SDI AF25
C
O
N
T
R
O
L
+3V3-STANDBY
+12V
ENABLE -1V8
ENABLE -3V3-5V
DETECT2
XIO-D(00-07)
CA-MDI(0-7)
MDO
CA-MDO(0-7) MDO(0-7)
ETH-TXD
ETH-RXD
XIO_A
XIO_D
XIO-A(0-14)
CA-D(0-7)
MEMORY B02B
F8 E8 F8 E8 F8 E8 F8 E8
SDRAM
128MB
7B01
EDE1108AGBG
SDRAM
128MB
7B02
EDE1116AEBG
EDE1108AGBG
SDRAM
128MB
7B03
EDE1108AGBG
DQ
A
CLK_N
CLK_P
GPI0_2
RESET_SYS
PNX-SPI-CS-AMBIn W23
B06E B06D GPI0_6
PNX-SPI-CS-BLn V22
B01K B02G
B13
B02G GPI0_7
GPI0_3
SDRAM
128MB
7B00
EDE1116AGBG
EDE1108AGBG
DDR2-D(0-31)
D
(2
4
-3
1
)
D
(1
6
-2
3
)
D
(8
-1
5
)
D
(0
-7
)
DDR2-A(0-13)
GPI0_11
SELECT-SAW U23
B01F
B06C
GPI0_11
BACKLIGHT-PWM U23
B13
CLK_54_OUT
PXCLK54 AC5
B06C B13
PXCLK54
B02E
B02G
+3V3
3S0W
TO IR / LED BOARD AND
KEYBOARD CONTROL
9U41
9CH0
B03E
B03B B03D
B02G B03A
EF
7EC0
7R01
STV0903BAC
MULTI STAND
DEMODULATOR
FOR SAT DIG TV
7R02
STV6110AT
SATELLITE
TUNER
122 XTAL 32
12 QP 18
11 QM 19
7 IP 21
8 IM 20
52 SENSE+1V0-DVBS
T21 TS-DVBS-DATA 73
T22 TS-DVBS-CLOCK 74
7
20
R22
R23
TS-DVBS-SOP 75
TS-DVBS-VALID 78
62
TS-FE-DATA
TS-FE-CLOCK
TS-FE-SOP
TS-TS-VALID
9F27-1
9F28
9F27-2
9F27-4
B 0 8 A
XIO-D(00-15)
4
3
2
1
USB-DM
USB-DP
USB-DM2
5000 Serie
7000 Serie
USB-DP2
USB-DM1
USB-DP1
SIDE USB
CONNECTOR
1P08
+5V-USB1
R26
R25
USB_DP
USB_DN
+5V-USB2
2
1
3
4
1M59
2
1
3
5
8
7
10
11
14
13
15
4
3
2
1
SIDE USB
CONNECTOR
1P07
2
1
3
4
9F26
9F25
9F21
9F20
Pin8
Pin3
Pin5
Pin7Pin6
Pin4
Pin9
Pin2Pin1
7GA0
XC9572XL
CPLD
26
VIO
VCCIO
41
43
40 PNX-SPI-SDI
39 PNX-SPI-SDO
3 PNX-SPI-CS-BLn V22
2 PNX-SPI-CS-AMBIn W23
PNX-SPI-CLK
AMBI-SPI-CLK-OUT 22
AMBI-SPI-SDO-OUT 27
AMBI-SPI-SDI-OUT_G1 23
AMBI-PWM-CLK_B2 29
AMBI-SPI-CS-OUTn_R2 30
AMBI-LATCH1_G2 31
AMBI-PROG_B1 19
AMBI-BLANK_R1 20
AMBI-LATCH2_DIS 28
AMBI-SPI-CS-EXTLAMPSn 21
AMBI-TEMP 32
HDMIB-RC
Block Diagrams EN 85 Q552.1E LA 9.
2010-Feb-19
back to
div. table
9-9 Block Diagram I
2
C
IC
PNX85500: MIPS B02E
DDR B05A
FLASH B01B
ETHERNET + SERVICE B04C
PNX85500: CONTROL B01E PNX85500-CONTROL B01E
PNX85500: STANDBY
CONTROLER
B02G
HDMI B04D
HDMI B01H
TEMP SENSOR +
HEADPHONE
B01J DVBS-FE B07A DVBS-SUPPLY B08B TUNER BRAZIL B01K
HDMI & CI B01F
PNX85500: ANALOG VIDEO B02I
ETHERNET + SERVICE B04C
MINI LVDS (LGD) B11C TCON CONTROLLER (LGD) B11A P GAMMA &VCOM & FLASH (SHARP) B14C TCON CONTROL
(SHARP)
B14A
VGA B01I
VIDEO OUT - LVDS B06B
DVBS CONNECTOR BOARD B09A CONNECTORS (LGD) B11D CONNECTORS (SHARP) B14F
1F52
7S00
PNX85500
PNX85500
SDA-SSB
SCL-SSB
C25
C26
1_SDA
1_SCL
AC23
AC24
MC_SDA
MC_SCL
B25
A24
3_SDA
3_SCL
SDA-UP-MIPS
SCL-UP-MIPS
CONTROL
STANDBY
3
K
T
U
3
K
T
V
VCC_3V3
7
8
SDA-TCON
SCL-TCON
1
3
DEBUG
ONLY
18770_408_100217.eps
100219
VCOM_SDA
VCOM_SCL
RES
3F63
3F62
5 6
7F58
M24C64
EEPROM
(NVM)
3
F
6
3
3
F
5
9
TUN-P7
TUN-P6
SDA-TUNER
SCL-TUNER
7 6
1T01
TH2603
MAIN
TUNER
3S60
3S61
3F75
3F76
53 54
7EC1
SII9287B
SII9187A
HDMI
MUX
3
E
C
5
3
E
C
3
HDMI
CONNECTOR 3
HDMI
CONNECTOR 2
1P04
16
15
29
30
1P03
16
15
33
34
1P02
16
15
39
40
HDMI
CONNECTOR
SIDE
1P05
16
15
3
F
B
F
-2
3
F
B
F
-1
DIN-5V
43
44
47
48
Y25
Y26
Y23
Y24
GPIO_2
GPIO_3
DDCA-SDA
DDCA-SCL
ARX-DDC-SDA
ARX-DDC-SCL
BRX-DDC-SDA
BRX-DDC-SCL
CRX-DDC-SDA
CRX-DDC-SCL
DRX-DDC-SDA
DRX-DDC-SCL
1 2
7FD1
LM75BDP
TEMP
SENSOR
3
F
D
3
3
F
D
4
46 45
7FE0
TC90517FG
TUNER
BRAZIL
3
F
E
9
3
F
E
8
13 12
3S56
3S57
3S2F
3S2G
3S5Y
3S5Z
3
S
6
D
3
S
6
E
+3V3
3
S
6
9
3
S
6
A
+3V3
3
S
6
V
3
S
6
W
+3V3-STANDBY
3
S
8
1
3
S
8
0
+3V3
3
S
8
3
3
S
8
4
+3V3
3
S
6
F
3
S
6
G
+3V3
AD25
AD24
1E05
12
15
VGA-SDA-EDID-HDMI
VGA-SCL-EDID-HDMI
VGA-SDA-EDID
VGA-SCL-EDID
3
F
C
1
3
F
C
2
+5V-VGA
9FC2
9FC4
9FC1
9FC3
RES
3S5V-1
3S5V-3
9S15
9S14
VGA-SDA-EDID-TCON
VGA-SCL-EDID-TCON
3
E
C
1
-1
3
E
C
1
-3
AIN-5V
3
E
C
A
-1
3
E
C
A
-2
BIN-5V
3
E
C
A
-3
3
E
C
A
-4
CIN-5V
3
E
C
P
-3
3
E
C
P
-1
+5V-EDID
3
E
C
U
-2
3
E
C
U
-4
+3V3
VCC
RES
1KQB
2
1
9
J
B
6
9
J
B
7
9
J
B
6
9
J
B
712 13
7KQA
ISL24837IRZ
8-CHANNEL
PROG I2C
REF VOLT GEN
E19 E20
7KAA
UPD809900F1
CONTROL
7KQB
M25P32
2 1
7KQH
PCA9540B
2 CHANNEL
MULTIPLEXER
B24
Y5
Y6
AB4
AC1
AA3
11
10
9
8
7
A23
4_SDA
4_SCL
AE21
AF21
P3_0
P3_1
16
10
11
515
VGA
CONNECTOR
RXD1-MIPS
TXD1-MIPS
W21
W22
GPIO_2
GPIO_3
RXD2-MIPS
TXD2-MIPS
UART
SERVICE
CONNECTOR
1E06
3
2
1
3E53-3
3E53-1
3E53-4
3E53-2
1F51
2
1
B02E
B02G
MEMORY
B02B
FLASH
B02A
ANALOGUE
VIDEO
VGA_EDID_SDA
VGA_EDID_SCL
B02I
B02I
ERR
35
ERR
15
ERR
53
1M71
1
3
TO
TEMPERATURE
SENSOR
4
5
2D
DIMMING
1F53
2
3
SDA-BL
SCL-BL
LVDS
CONNECTOR
Programmable via USB
1G51
50
49
SDA-DISP
SCL-DISP
RES
3C83
3C81
3
S
6
7
3
S
6
5
3
S
6
8
3
S
6
6
+3V3
B26
A25
2_SDA
2_SCL
SDA-SET
SCL-SET
3S58
3S5W
3
S
6
B
3
S
6
C
+3V3
3
S
1
G
3
S
1
H
+3V3-STANDBY
RES
7
8
9S13
9S10
3C84
3C85
1M71
1
3
TO
TEMPERATURE
SENSOR
2D
DIMMING
1F53
2
3
RES
3J83
3J81
3J84
3J85
1M71
3
1
TO
TEMPERATURE
SENSOR
2D
DIMMING
1F53
2
3
RES
3K83
3K81
3K84
3K85
3G2W
3G2Y
uP
LEVEL SHIFTED
FOR DEBUG
USE ONLY
RXD-UP
TXD-UP
3F65
3F64
2 1
7S01
PCA9540B
2 CHAN.
MULTIPLEX.
ERR
24
ERR
34
1 20
7JC1
MAX9668ETP
10 BIT
PROG GAMMA
REF SYST
RES
RES
1J02
1
4
2
SDA-TCON
SCL-TCON
5 6
7
7J02
M24C32-WDW6
EEPROM
(4Kx8)
9JBB
9JBB
9JBA
S
D
A
-D
IS
P
S
C
L
-D
IS
P
S
D
A
-D
IS
P
S
C
L
-D
IS
P
3
J
3
8
3
J
3
7
+VDISP
3
J
0
4
SCD
SCL
WP
3
J
3
6
3
J
3
5
VCC
175 176
7J01
TL2429MC
TCON
ERR
23
ERR
42
6 9
7T50
LNBH23QT
LNB
CONTROLLER
3
T
6
1
3
T
5
1
ERR
31
98 97
7R01
STV903BAC
CHANEL DEC
DVBS
3
R
0
0
3
R
0
1
ERR
28
ERR
??
7R02
STV6110A
SATELITE
TUNER
ERR
36
7JB1
7JB3
RES
9S12
9S11
7E10
LAN8710A-EZK
ETH-RXD(0)
ETH-RXD(3)
ETH-RXCLK
ETH-RXD(1)
ETH-RXD(2)
AA1
AA4
AB1
AB2
AA2
22
23
24
25
20
ETH-TXD(0)
ETH-TXD(3)
ETH-TXCLK
ETH-TXD(1)
ETH-TXD(2)
5000 Serie 256MB
7000 Serie 512MB
RXD_0
RXD_1
RXD_2
RXD_3
RXCLK
TXD_0
TXD_1
TXD_2
TXD_3
TXCLK
XIO_D
DQ
A
ETHERNET
3
R
1
5
3
R
1
4
+3V3RF
W21
W22
SDAT
SCLT
DDC_A_SDA
DDC_A_SCL
HDMI_DV
HDMI
CONNECTOR 1
ETHERNET
CONNECTOR
RJ45
Only for sets with DVBS
RES RES
Only for SHARP display with TCON on SSB Only for LGD display with TCON on SSB
Only for LGD display with TCON on SSB Only for LGD display with TCON on SSB
SDRAM
7B01
EDE1108AGBG
SDRAM
7B02
EDE1116AEBG
EDE1108AGBG
FLASH
(4Gx16)
SDRAM
7B03
EDE1108AGBG
SDRAM
7B00
EDE1116AEBG
EDE1108AGBG
DDR2-D(0-31)
XIO-D(00-07)
D
(2
4
-3
1
)
D
(1
6
-2
3
)
D
(8
-1
5
)
D
(0
-7
)
DDR2-A(0-13)
19
1
18
2
19
1
18
2
19
1
18
2
19
1
18
2
SPI_CLK
SPI_CSB
SPI_SDO
SPI_SDI
P6_5
7F52
M25P05-AVMN6P
FLASH
512K
8
+3V3-STANDBY VCC
6 PNX-SPI-CLK AF24
3 PNX-SPI-WPn AE22
1 PNX-SPI-CSBn AF23
5 PNX-SPI-SDO AE23
2 PNX-SPI-SDI AF25
7F20
NAND02GW3B2DN6F
NAND04GW3B2DN6F
5000 Serie 256MB
7000 Serie 512MB
ERR
13
ERR
18
ERR
14
ERR
64
STANDBY
SW
MAIN
SW
MAIN NVM
SW
EDID
SW
SW
TCON
SW
SW
TCON
SW
SW
FLASH
Programmable via ComPair
Pre-programmed device
EN 86 Q552.1E LA 9. Block Diagrams
2010-Feb-19
back to
div. table
9-10 Supply Lines Overview
B01A COMMON INTERFACE
B01D SD-CARD
B01F HDMI & CI
B01K TUNER BRAZIL
B01C USB HUB
B02B PNX85500: SDRAM
B01B FLASH
B02A PNX85500: NANDFLASH
CONDITIONAL ACCESS
B02C PNX85500: DIGITAL VIDEO IN
B02E PNX85500: MIPS
B02G PNX85500: STANDBY CONTROLLER
B02H PNX85500: POWER
B01H HDMI
B01I HDMI
B01J TEMP SENSOR + HEADPHONE
B01E PNX85500: CONTROL
B01G TOSHIBA SUPPLY
B03D DC / DC
B03E DC / DC
B08A DVBS-SUPPLY
B08B DVBS-SUPPLY
B11C MINI LVDS
B11D CONNECTORS
B09A DVBS CONNECTOR BOARD
B03G FAN - CONTROL
B04A ANALOGUE EXTERNALS A
B04C ETHERNET + SERVICE
B03F TEMPSENSOR + AMBILIGHT
B06A DISPLAY INTERFACING-VDISP
B02D PNX85500: AUDIO
B03A AUDIO
B03B DC / DC
SUPPLY LINES OVERVIEW
PSU-2
B03C DC / DC
B03H VDISP - SWITCH
B04D HDMI
B04E HEADPHONE
B06B VIDEO OUT - LVDS
B06D SPI-BUFFER
B05A DDR
B11A TCON CONTROLLER (LGD)
B11B TCON DC / DC (LGD)
B14B TCON DC / DC (SHARP)
B14C P GAMMA &VCOM & FLASH (SHARP)
B14D MPD
B14E MINI LVDS
B06C .
B07A DVBS-FE
B13 AMBILIGHT CPLD
B14A TCON CONTROL (SHARP)
B14F CONNECTORS
+5V +5V
+5VCA 3F01
+T
B03e
+3V3 +3V3
B03e
B03e
B03e
+3V3-SD 3F40
+T
+3V3 +3V3
+5V-TUN-PIN
+5V-TUN +5V-TUN
B03e
+5V +5V
+5V-USB2 3F32
+T
+5V-USB1 3F25
+T
B03e
+3V3 +3V3
B03e
+1V8 +1V8
DDR2-VREF-CTRL2
DDR2-VREF-CTRL3
B03c
+3V3 +3V3
+3V3 +3V3
+5V +5V
B03e
+3V3 +3V3
B03e
B03e
B01g
B03e
B03e
+3V3 +3V3
B03e
B03b,d,e,g,
B08b,B09a,
B11d,B14f
B01e,B02e,
g,h,B03a,b,
B04d,e,B09a,
B11d,B14f
B03h,
B07a
B02d,B03a
+3V3 +3V3
B03e
+3V3 +3V3-STANDBY
B03c
+1V1 +1V1
B03b
POL POL
?
+3V3 +3V3-STANDBY
B03c
+1V1 +1V1
B03b
+1V2 +1V2
B03d
+1V8 +1V8
B03b
+2V5 +2V5
B03d
+2V5-AUDIO +2V5-AUDIO
B02d
+2V5-LVDS +2V5-LVDS
B03d
+3V3 +3V3
B03e
+3V3-STANDBY +3V3-STANDBY
B03c
POL POL
?
DIN-5V
+3V3 +3V3
+1V2-BRA-VDDC +1V2-BRA-VDDC
+1V2-BRA-DR1 +1V2-BRA-DR1
+3V3 +3V3
B03e
+3V3-STANDBY +3V3-STANDBY
B03c
+5V +5V
B03e
B03d
B03e
B03e
9F71
+3V3-BRA
+3V3 +3V3
+1V2-BRA-VDDC
+3V3 +3V3
7FA3
IN OUT
COM
+1V2-BRA-DR1 5FA4
5FE7
5FA3
+3V3
+5V +5V
+2V5-LVDS
+2V5
B03e
+2V5-AUDIO
+3V3-ARC
+3V3 +3V3
B03d
+3V3 +3V3
7S08
IN OUT
COM
+2V5-BRA
+3V3-BRA-FLT
+5V +5V
7FE3
IN OUT
COM
5FE9
5FE4
3S20
3S06
+24V-AUDIO-POWER +24V-AUDIO-POWER
+24V-AUDIO-VDD 3S0Z
3S11
B03c
B03c
+3V3-STANDBY +3V3-STANDBY
+24V-AUDIO-POWER +24V-AUDIO-POWER
+AVCC 3D09
7U03
TPS53126PW
+12V
+1V8
12
14
+1V1 5U01
23
24
+12V
12V/1V1
COVERSION
12V/1V8
COVERSION
5
U
0
2
5U00
B03c
+3V3-STANDBY +3V3-STANDBY
B03c
Dual
Synchronous
Step-Down
Controller
7U04
7U01
7U02-2
7U02-1
1
1M95
1 1
6 6
7 7
8 8
1M95
+3V3-STANDBY
3V3_ST
+12V
1M99
1 1
6 6
7 7
2 2
3 3
4 4
8 8
5 5 LAMP-ON
1M99
BACKLIGHT-BOOST
+12VD
BACKLIGHT-PWM_BL-VS
+12V
9 9 +24V-AUDIO-POWER
10 10
+12V
+12V
+VSND
GND_SND
BACKLIGHT-PWM-ANA-DISP
BL-SPI-CSn
9 9
7 10 BL-SPI-SDO
8 11
9 12 BL-SPI-CLK
POWER-OK
2 2
3 3
4 4
5 5
STANDBY
STANDBY
GND1
GND1
GND1
11 11
N.C.
1U40
T 3.0A
MAINS-OK
CUA0
+1V2
+1V8 +1V8
+12V
7UA3
B03b
+3V3-ET-ANA
+3V3 +3V3
B03e
B03e
B03e
+2V5-REF
+12V +12V
B03c
B03b
B03c
B03e
B03c
B03e
B03e
3U16
3UA0
7UC0
IN OUT
COM
3U15
7UA0
VOLT.
REG.
+5V-TUN
+5V5-TUN +5V5-TUN
7UA6
ENABLE-1V8
+3V3
+12V +12V
+1V1 +1V1
+12V +12V
+3V3 +3V3
+5V +5V
+3V3 +3V3
5UD3 5UD2
+5V
+3V3
+5V5-TUN 5UD0 5UD1
6UD0
+2V5
7UD2
IN OUT
COM
7UD0
IN OUT
COM
7UD1
IN OUT
COM
7UD3
IN OUT
COM
B03e
B02h
+3V3 +3V3
V-AMBI 1UM0
T 1.0A
5UM1
B03h
B03h
+VDISP-INT +VDISP-INT
1G00
T 3.0A
+VDISP 1G03
T 3.0A
1C86
T 2.0A
1HA0
T 1.5A
1JG1
T 3.0A
5G02
5E08
+VDISP-INT
+12VD +12VD
+3V3 +3V3
7UU2
LCD-PWR-ONn
7UU1
B03c
B03e
1P03
18
HDMI 2
CONNECTOR
BIN-5V
1P02
18
HDMI 1
CONNECTOR
+5V-EDID
+3V3-STANDBY +3V3-STANDBY
+3V3 +3V3
+3V3-HDMI
CIN-5V
1P04
18
HDMI 3
CONNECTOR
AIN-5V
5EC0
B03e
B03c
+5V-VGA +5V-VGA
+5V +5V
B01I
B03e
B02h,B03d,
B05a
DIN-5V DIN-5V
B01h
B03e
B03c
6
E
C
1
+3V3-STANDBY +3V3-STANDBY
+3V3 +3V3
B03e
B03a
+VDISP +VDISP
+3V3 +3V3
B08a
B08a
+2V5-DVBS +2V5-DVBS
+1V-DVBS +1V-DVBS
B03e
+3V3 +3V3
DDR2-VREF-DDR
+1V8 +1V8
B03b
B02h
B02h
B02h
B01f
3B20
VCORE
ML_VDD
VCC VCC
B07a
+VDISP +VDISP
B07a
VIO
+3V3 +3V3
B03e
5G01
5GA1
VINT 5GA0
+3V3RF
+3V3-DVBS +3V3-DVBS
B08a
ONLY FOR 5000 SERIES
NOT FOR 5000 SERIES
B06a,B11b,
B14b
5R01
+3V3-DEMOD 5R00
O
R
B03b
B03b
SEE B03D
SEE B03D
B02d,h
B09a
+24V
+5V-DVBS
+2V5-DVBS
+24V
+1V1 +1V1
B03e
+3V3 +3V3
+V-LNB
B03c
+12V +12V
B08a
+V-LNB +V-LNB
B08a
+3V3-DVBS +3V3-DVBS
B11b
VDD VDD
P_VDD
B11b
VCC VCC
B03e
+5V
+12V
+5V
B03c
+3V3-STANDBY +3V3-STANDBY
B03c
+12V
B03e
+3V3 +3V3
B03e
B03c
B03e
B03c
+3V3-STANDBY +3V3-STANDBY
+5V +5V
+12V +12V
+3V3 +3V3
5T03
5T04
7T03
TPS54283PWP
Dual
N-Synchr
Converter
+3V3-DVBS
7T02
IN OUT
COM
+1V-DVBS
7T00
IN OUT
COM
5T00 5T01
7T00
IN OUT
COM
5
T
0
2
VDD
VCC
7JF1
MAX17113ETL
Multiple
Output
Power
Supply
1M20
8
5
1M59
21
TO
IR/LED
PANEL 1M09
1
2
+24V
7J03
IN OUT
COM
9J02
+VDISP
+VDISP-INT +VDISP-INT
1KFA
T 3.0A
VCC_3V3
VGH_35V
VLS_15V6
VLS_15V6_B
7KFA
ISL97653AIRZ
IC
LCD
SUPPLY
+VDISP
+VDISP-INT +VDISP-INT
VCC_1V2 VCC_1V2
3JC1
3JC0
VIO
+3V3 +3V3
B03e
+24V
5HA1
VINT 5HA0
VDDQ
VCC_+3V3 VCC_3V3
B14b
5KAF
VDD33 5KAE
VCC_1V2
SSCG_AGND
+VDISP +VDISP
1M72
1
2
7KAC
VIN SW
GND
5KAG
5KAD
LVDS_AVDD
mini_AVDD 5KAC
5KAB
VDD12 5KAA
7KFE
9KFC
9KFE
VGL_-6V
7KQA
ISL248371RZ
IC
LCD
SUPPLY
VREF_15V2
VLS_15V6 VLS_15V6
VLS_15V6 VLS_15V6
VCC_3V3 VCC_3V3
VCC_3V3 VCC_3V3
+VDISP +VDISP
VREF_15V2 VREF_15V2
+VDISP +VDISP
VLS_15V6 VLS_15V6
VGL_-6V VGL_-6V
VGH_35V VGH_35V
VCC_3V3 VCC_3V3
B03c
B03e
B03c
B03e
B14b
B14b
B14b
B14b
B14b
B14b
B14c
B14b
B14b
B03h
B14a
B14b
B14b
B14b
+3V3-STANDBY +3V3-STANDBY
+5V +5V
+12V +12V
+3V3 +3V3
1M20
8
5
TO
IR/LED
PANEL
3KFP
B01,a,b,c,d,e,g,j,jk,
B02a,c,d,e,h,B03c,f,g,h,
B04a,c,d,e,B05a,
B06b,c,d,B08a,B09a,
B11d,B13,B14f
B01,a,c,e,k,
B03d,B04a,d,
B09a,B11d,
B14f
B14d
B14a,c,d
B14a,c,d
B14c,d,e
B14e
B14b
B14e
B11c
B11c
B08b
B08a
B07a,B08b
B07a
B07a
1P05
B02b,g,h,
B03e,B08a
18 HDMI SIDE
CONNECTOR
B04d
B01k
B01k
+5V-VGA
1E05
18 VGA
CONNECTOR
B04d
B01g
18770_409_100217.eps
100218
B02G
B02G
B06C
B01E
B02G
Circuit Diagrams and PWB Layouts EN 87 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10. Circuit Diagrams and PWB Layouts
10-1 AL1 820400089786 AmbiLight Common
LiteOn LED Common 1
18770_600_100212.eps
100218
LiteOn 15 LED Common
AL1A AL1A
8204 000 8978
AL 2K10 LiteOn
15 LED Common
2009-12-04 6
2009-10-28 5
2009-10-07 4
2009-08-27 3
2009-07-03 2
BLUE
GREEN
RED
-T
S
GND
Q
HOLD
W
VCC
C
D
VIA
VIA
VIA
VIA
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
OUT
12
11
GSCLK
IREF
MODE
SCLK
SIN
SOUT
XERR
XHALF
XLAT 10
NC
9
8
VCC
0
1
2
3
4
5
6
7
BLANK
13
14
15
GND GND_HS
BLUE
GREEN
RED
BLUE
GREEN
RED
2
G
1 2 3
1
4 5 6 7
3 4
F
A
H
I
B
C
9 10 11 12 13 14
E
5 6 7 9 10 11 12 13 14
D
E
F
8
H
I
A
B
C
D
8
G
3
4
5
6
7
8
9
26 27
17
18
19
2
20
21
22
23
24
25
1
10
11
12
13
14
15
16
FH12-25S-0.5SH(55)
1M83
FB12
FB15
R
E
S
3
0
0
4
1
0
K
FB06
+3V3
1
0
K
3
B
1
1
+24V
3B00-2
150R
2 7
1
0
0
p
2
B
0
4
-2
2
7
2
B
0
4
-3
3
6
4 3
+3V3
1
0
0
p
LTW-008RGB
6 5
2 1
+24V
7000
3B22
10K
FB41
+3V3
2
B
0
0
3
3
p
1K5
3B03-1 1 8
+3V3
1
8
1
0
0
p
2
B
0
4
-1
3B02-2
10K 2 7
3
B
3
9
-1
8
1
10K
3B02-1 1 8
1
%
1
K
5
FB03
2
B
1
0
FB13
1
0
0
p
1
0
0
n
2
B
1
7
41
42
TLC5946RHB
7B26-2
34
35
36
3
7
3
8
3
9
40
2
1
8
3
7B07
M95010-WDW6
6
5
4
7
3B34

(64K)
1
3
2
100K RES
4 5
BC847BW
7B25
3B00-4
150R
1K8
3B18
1
0
K
3
B
1
3
-3
3
6
3
3
p
+3V3
2 7
2
B
0
1
3B01-2
100R
2
B
0
2
1
0
0
p
5
2 1
4 3
+3V3
+24V
LTW-008RGB
7001
6
+3V3
3B03-4
1K5
4 5
FB16
FB05
FB07
FB04
3
B
0
7
-4
1
0
K
4
5
6 5
2 1
4 3
7003
LTW-008RGB
2B11
100n
100R
3B01-1 1 8
7B20-2
74LVC2G17
3
2
5
4
1 8
3B00-1
150R
7 3B03-2
1K5
2
270R
3B36
3
B
3
9
-3
3
6
1
K
5
1
%
2
7
1
%
1
K
5
2
5
6
+24V
3
B
3
9
-2
74LVC2G17
7B20-1
1
7B23-1
BC847BS(COL)
2
6
1
LMV331IDCK
1
3
4
5
2
7B30
270R
3B35
68R
3B37
7B23-2
BC847BS(COL)
5
3
4
3 6
3B00-3 150R
1
0
0
p
2
B
0
4
-4
4
5
+3V3
4
5
+3V3
FB08
3
B
1
3
-4
1
0
K
3
+3V3
FB31
LTW-008RGB
7002
6 5
2 1
4
FB35
15
1
2
23
2
7
22
25
32
19
20
21
6
7
8
9
10
11
14
26
3
12
13
28
29
4
5
16
17
18
7B26-1
TLC5946RHB
31
3
0
3
3
24
FB11
2 1
4 3
FB10
LTW-008RGB
7004
6 5
1K5
3B03-3 3 6
2
7
FB01
4 5
1
0
K
3
B
0
7
-2
3B30-4
220R
+24V
2
B
0
3
1
0
0
n
2
B
0
9
1
0
n
3B31
2K0
1
0
n
2
B
0
8
+3V3
5
4
74LVC1G32GW
7B06
1
2
3
FB40
1
8
1
0
0
n
2
B
2
0
3
B
0
7
-1
1
0
K
FB20
3B21
FB30
1 8
150R
220R
3B30-1
+3V3
3
6
1
0
K
3
B
0
7
-3
FB32
+3V3
5
2 1
4 3
+3V3
7005
LTW-008RGB
6
TEMP-SENSOR
BLANK
PROG
SPI-CS
PWM-CLOCK
SPI-DATA-RETURN
SPI-DATA-IN
SPI-CLOCK
LATCH
PWM-CLOCK
BLANK
SPI-DATA-IN-BUF
PWM-R1
PWM-G1
PWM-R1
PWM-G3
PWM-R3
PWM-R2
PWM-B2
PWM-G2
DATA-SWITCH
TEMP-SENSOR
PWM-G4
PWM-R4
PWM-B4
PWM-R5
PWM-G5
PWM-B5
SPI-CLOCK-BUF
SPI-DATA-IN-BUF
SPI-DATA-RETURN
SPI-CS
DATA-SWITCH
LATCH
SPI-DATA-IN
SPI-DATA-OUT
PWM-CLOCK-BUF
SPI-CLOCK-BUF
PROG
SPI-CLOCK-BUF
PWM-CLOCK-BUF
SPI-CLOCK
PWM-G1
PWM-B1
PWM-B1
PWM-B3
2B00 E8
2B01 F8
2B02 E9
2B03 I14
2B04-1 B7
2B04-2 B6
2B04-3 B8
1M83 C1
3B00-4 B6
3B01-1 E7
3B13-4 I3
3B18 A8
3B21 B7
3B22 B8
3B00-3 B6
7B23-1 F4
7B23-2 G4
7B25 H3
7B26-1 A8
7B26-2 C9
3B01-2 D7
3B02-1 E3
3B13-3 H3
3B30-1 D9
3B30-4 E9
2B04-4 B7
2B08 E12
2B09 E12
2B11 A9
2B17 D8
2B20 D4
3004 E12
3B00-1 A6
3B00-2 B6
7002 G8
FB16 C1
FB20 B7
FB30 G3
FB31 H3
FB32 I3
FB35 A8
FB40 D12
7003 G10
7004 G11
7B30 D13
FB01 A1
3B02-2 E5
3B03-1 H14
3B03-2 H14
3B03-4 H14
3B07-1 F3
3B07-2 G3
3B07-3 H3
3B07-4 G3
3B11 E12
FB06 B2
FB07 B1
FB08 B1
FB10 B2
FB11 B1
FB12 B2
FB13 C1
7B20-1 D8
7B20-2 E8
FB15 C1
3B31 B10
3B34 D13
3B35 G14
2B10 F9
3B37 G14
3B39-1 E13
3B39-2 D12
3B39-3 D13
7000 G5
7001 G7
3B36 G14
FB41 E13
FB03 B1
FB04 B1
FB05 B1
3B03-3 H14
7005 G13
7B06 D3
7B07 D4
B007 B001 B002
EN 88 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
LiteOn LED Common 2
18770_601_100212.eps
100212
LiteOn 15 LED Common 2
AL1B AL1B
2009-12-04 6
2009-10-28 5
2009-10-07 4
2009-08-27 3
2009-07-03 2
8204 000 8978
AL 2K10 LiteOn
15 LED Common
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
3B55-2 B3
3B55-3 A3
3B55-4 A3
7C20-2 F3
8
1 2 3
3B57-2 D3
3B57-3 C3
FC03 H3
9 10 11 12
A
B
C
7104 B6
7105 B5
F
G
3B50 B7
D
E
7200 F8
3B53-4 C7
3B55-1 C3
11 12
FC02 G3
3C12 F4
C
4
3C15-1 G4
3C15-2 G4
3C15-3 G4
3C15-4 G4
7100 B11
7101 B10
7102 B9
7103 B7
3C10 F4
7C20-1 E3
9 10
7201 F9
7202 F10
3C00-2 F3
3C00-3 F3
7B51 C3
FB71 C3
FB72 D3
FC01 F3
3C11 F4
D
E
3B53-2 C7
3B53-3 C7
H
2B50 C11
G
H
3C00-4 E3
7C22 G3
FB70 B3
3 4
3B51 B7
7
3B52 B7
3B53-1 B7
5
3C00-1 G3
7 8
7B50-1 A3
7B50-2 B3
A
B
2 1
F
3C06-1 G3
3C06-2 H3
5 6
6 5
2 1
4 3
6
LTW-008RGB
7201
1
0
K
3
B
5
5
-3
3
6
1
0
0
n
2
B
5
0
5
3
4
FC01
1 2
7C20-2
BC847BS(COL)
1 2
270R
3C10
8
3C11
270R
1
0
K
3
B
5
5
-1
1
68R
3B52
6 5
2 1
4 3
7104
LTW-008RGB
3 6
4 5
3C15-3
1K5
3C15-4
1K5
3C12
68R
BC847BW
7C22
1
3
2
3
6
+24V
+24V
3
B
5
7
-3
1
0
K
4+24V
FB70
BC847BS(COL)
7B50-2
5
3
1
0
K
3
B
5
5
-4
4
5
2
7
3
3
B
5
7
-2
1
0
K
LTW-008RGB
7105
6 5
2 1
4
FB71
6 5
2 1
4 3 3
LTW-008RGB
7100
6 5
2 1
4
1
4 3
7101
LTW-008RGB
7200
LTW-008RGB
6 5
2
1
0
K
3
C
0
6
-1
1
8
+24V
2
7
FC03
1
4 3
1
0
K
3
B
5
5
-26 5
2
6 5
2 1
4 3
7103
LTW-008RGB
8
LTW-008RGB
7202
3C15-1
1K5
1
3C15-2
1K5
2 7
FB72
6
1
+24V
+24V
BC847BS(COL)
7C20-1
2
5
2 1
4 3
LTW-008RGB
7102
6
7B50-1
BC847BS(COL)
2
6
1
1
3
2
7B51
BC847BW
3B51
270R
4 5
270R
3B50
3 6
1K5
3B53-4
7
1K5
3B53-3
1K5
3B53-2
2
1K5
3B53-1
1 8
2
7
FC02
1
0
K
3
C
0
6
-2
3
C
0
0
-3
1
0
K
3
6
3
C
0
0
-2
1
0
K
2
7
1
0
K
1
8
4
5
3
C
0
0
-1
+24V
3
C
0
0
-4
1
0
K
Green
Red
PWM-R2
PWM-G2
PWM-B2
PWM-R3
PWM-G3
PWM-B3
Blue
Circuit Diagrams and PWB Layouts EN 89 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-2 AL2 820400089773 3 LED LiteOn
3 LED LiteOn
18770_630_100212.eps
100218
3 LED LiteOn
AL2A AL2A
8204 000 8977
3104 313 63895
3 LED LiteOn
AL 2K10
2009-10-07 3
2009-08-27 2
2009-07-20 1
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
B
D
A
B
C
D
1M84 A10
2C15 B6
7203 A3
2 3
4 5 6 7 8 9 10
A
C
7204 A4
7205 A5
4 5 6 7 8 9 10 1
2 3
6
7
8
9
26 27
1
2
20
21
22
23
24
25
3
4
5
1
10
11
12
13
14
15
16
17
18
19
FH12-25S-0.5SH(55)
1M84
6 5
2 1
4 3
+24V
LTW-008RGB
7205
6 5
2 1
4 3 4 3
7204
LTW-008RGB
6 5
2 1
7203
LTW-008RGB
B003
+3V3
1
0
0
n
2
C
1
5
+3V3
TEMP-SENSOR
BLANK
PROG
LATCH
SPI-CS
PWM-CLOCK-BUF
SPI-DATA-RETURN
SPI-DATA-OUT
SPI-CLOCK-BUF
Blue
Green
Red
+24V
EN 90 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-3 AL1 820400089691 9 LED LiteOn
9 LED LiteOn
18770_610_100212.eps
100218
9 LED LiteOn
AL2A AL2A
8204 000 8969
3104 313 63812
9 LED LiteOn
AL 2K10
2009-10-07 1
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
1M84 A10
2D01 B6
7204 A4
5 1 9
5 6
B
C
D
10
B
C
A
7205 A5
7 6 4 10
4 2 1
2
7 8 9
A
D
8 3
3
7203 A3
B003
1
0
0
n
2
D
0
1
+3V3
+3V3
4
5
6
7
8
9
26 27
+24V
18
19
2
20
21
22
23
24
25
3
1
10
11
12
13
14
15
16
17
FH12-25S-0.5SH(55)
1M84
FD04
4 3
+24V
LTW-008RGB
7205
6 5
2 1
5
2 1
4 3
7204
LTW-008RGB
6 6 5
2 1
4 3
7203
LTW-008RGB
B004
TEMP-SENSOR
BLANK
PROG
LATCH
SPI-CS
PWM-CLOCK-BUF
SPI-DATA-RETURN
SPI-DATA-OUT
SPI-CLOCK-BUF
Blue
Green
Red
Circuit Diagrams and PWB Layouts EN 91 Q552.1E LA 10.
2010-Feb-19
back to
div. table
9 LED LiteOn
18770_611_100212.eps
100212
9 LED LiteOn
AL2B AL2B
2009-10-07 1
8204 000 8969
3104 313 63812
9 LED LiteOn
AL 2K10
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
E
C
7 10
D
2
A
B
5
FD03 D1
6
3D13-3 C12
8 9
FD02 C1
7304 B10
11 12 13
A
B
C
1
3D02-1 A1
D
6 7 8 11 12 13
1 2 3 4 5
3D13-2 C12
10
3D02-3 B1
3D02-4 C1
3D05-3 C1
3D13-1 C12
3D13-4 D12
7302 B7
7303 B8
7305 B11
7D01-1 A2
7D01-2 B2
7D02 C2
FD01 B1
3 4
3D02-2 B1
5
2 1
4 3
E
2D10 D13
9
3D05-4 D1
3D10 B12
3D11 B12
3D12 B12
7300 B5
7301 B6
3
7303
LTW-008RGB
6
LTW-008RGB
7302
6 5
2 1
4
6
+24V
3
D
0
2
-3
1
0
K
3
1
0
K
3
D
0
2
-2
2
7
3
+24V
6 5
2 1
4
1 2
7300
LTW-008RGB
270R
3D10
68R
3D12
1
FD01
+24V
7D01-1
BC847BS(COL)
2
6
4
5
FD02
1
0
K
3
D
0
2
-4
2
D
1
0
1
0
0
n
1K5
3D13-3 3 6
3D13-4
1K5
4 5
4
FD03
7D01-2
BC847BS(COL)
5
3
6 5
2 1
4 3 4 3
7305
LTW-008RGB LTW-008RGB
7304
6 5
2 1
5
2 1
4 3
LTW-008RGB
7301
6
BC847BW
7D02
1
3
2
3
D
0
2
-1
1
0
K
1
8
+24V
3
D
0
5
-4
1
0
K
4
5
1
0
K
3
D
0
5
-3
3
6
3D13-1 1 8
1K5
270R
3D11
1 2
3D13-2
1K5
2 7
PWM-B4
PWM-R4
PWM-G4
EN 92 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-4 AL1 820400089703 15 LED LiteOn
15 LED LiteOn
18770_620_100212.eps
100218
15 LED LiteOn
AL2A AL2A
8204 000 8970
3104 313 63823
15 LED LiteOn
AL 2K10
2009-12-07 3
2009-10-07 2
2009-07-02 1
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
4 5 6 7
D
A
5 6 7 8 9
B
C
D
1M84 A10
2D01 B6
7203 A3
7204 A4
1 2 3
7205 A5
9 10
A
B
C
8
3 4 10
FD18 C7
1 2
1
0
0
n
2
D
0
1
+3V3
+3V3
+24V
3
4
5
6
7
8
9
26 27
16
17
18
19
2
20
21
22
23
24
25
1
10
11
12
13
14
15
FH12-25S-0.5SH(55)
1M84
FD18
1
4 3
+24V
LTW-008RGB
7205
6 5
2
5
2 1
4 3
7204
LTW-008RGB
6 6 5
2 1
4 3
7203
LTW-008RGB
B004 B005 B003
TEMP-SENSOR
BLANK
PROG
LATCH
SPI-CS
PWM-CLOCK-BUF
SPI-DATA-RETURN
SPI-DATA-OUT
SPI-CLOCK-BUF
Blue
Green
Red
Circuit Diagrams and PWB Layouts EN 93 Q552.1E LA 10.
2010-Feb-19
back to
div. table
15 LED LiteOn
18770_621_100212.eps
100219
15 LED LiteOn
AL2B AL2B
2009-12-07 3
2009-10-07 2
2009-07-02 1
8204 000 8970
3104 313 63823
15 LED LiteOn
AL 2K10
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
D
E
3D13-2 C12
F
G
13 9 10 11 12
3D02-1 A1
9 10
7305 B11
7400 F5
7401 F6
12 13
A
B
C
3D10 B12
3D11 B12
3D12 B12
3D13-1 B12
7D01-2 B2
7D02 C2
1 2
H
3D18-4 G12
7300 B5
7301 B6
6 7 8
2D10 C13
2D11 H13
3D02-2 A1
3D02-3 B1
11
7402 F7
7403 F8
7404 F10
7405 F11
7D01-1 A2
FD04 F1
FD05 G1
FD06 H1
3D04-4 F2
3D05-3 C1
3D05-4 D1
E
7D03-1 E2
7D03-2 F2
7D04 G2
FD01 A1
FD02 C1
FD03 D1
4 5 3
3D16 F12
3D17 F12
3D18-1 G12
3D18-2 G12
3D18-3 G12
3D02-4 B1
3D03-3 H2
3D03-4 G2
A
B
C
D
7302 B7
1 2 7 8 3 4 5 6
3D13-3 C12
3D13-4 C12
3D15 F12
3D04-1 F2
3D04-2 G2
3D04-3 E2
7303 B8
7304 B10
F
G
H
6 5
2 1
4 3
LTW-008RGB
7300
+24V
270R
3D16
270R
3D15
3D10
270R
5
2 1
4 3
7304
LTW-008RGB
6
3
6
+24V
3
D
0
3
-3
1
0
K
+24V
FD06
3
6
FD04
FD02
3
D
0
5
-3
1
0
K
5
FD01
3
D
0
4
-4
1
0
K
4
6 5
2 1
4 3
5
3
4
7403
LTW-008RGB
2 7
BC847BS(COL)
7D01-2
1K5
3D13-2
3 6
1
0
0
n
2
D
1
0
4 5
3D13-3
1K5
5
1K5
3D13-4
3
D
0
2
-4
1
0
K
4
6 5
2 1
4 3
+24V
7400
LTW-008RGB LTW-008RGB
7404
6 5
2 1
4 3
+24V
3 6
1K5
3D18-3
1K5
3D18-1 1 8
FD05
FD03
2
7
1
0
K
3
D
0
4
-3
3
6
3
D
0
4
-2
1
0
K
5
2 1
4 3
LTW-008RGB
7402
6
3D12
68R
68R
3D17
2
7
+24V
+24V
+24V
3
4
3
D
0
2
-2
1
0
K
7D03-2
BC847BS(COL)
5
3D11
270R
3D18-2
1K5
2 7
7305
6 5
2 1
4 3
1
8
LTW-008RGB
1
4 3
1
0
K
3
D
0
4
-1
LTW-008RGB
6 5
2
7D02
BC847BW
1
3
2
7301
1
0
K
3
D
0
2
-1
1
8
1
0
K
3
D
0
3
-4
4
5
6 5
2 1
4 3
LTW-008RGB
7401
1
0
K
3
D
0
5
-4
4
5
1 8
5
3D13-1
1K5
3D18-4
1K5
4
7D04
1
3
2
2
6
1
BC847BW
6 5
2 1
4 3
BC847BS(COL)
7D01-1
LTW-008RGB
7303
6 5
2 1
4 3
7D03-1
BC847BS(COL)
2
6
1
7302
LTW-008RGB
3
6
1
0
K
3
D
0
2
-3
4 3
2
D
1
1
1
0
0
n
7405
LTW-008RGB
6 5
2 1
PWM-R4
PWM-G4
PWM-B5
PWM-B4
PWM-G5
PWM-R5
EN 94 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-5 AL1 3104313 - 63895, 63812
Layout AmbiLight LiteOn
18770_602_100216.eps
100218
AmbiLight LiteOn
1M83 1M84 2B00
2B01
2B02
2B03
2B04
2B08
2B09
2B102B11 2B17
2B202B50
2C15
30043B00 3B01
3B02
3B03
3B07
3B11 3B133B18
3B21 3B22 3B303B31
3B34
3B35
3B36
3B37
3B39
3B50
3B51
3B52
3B53 3B55
3B57
3C00
3C06 3C10
3C11
3C12 3C15 7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205
7B06
7B07 7B20 7B23
7B25
7B26
7B30
7B50
7B51
7C
20
7C
22
B
0
0
1
B
0
0
2
B
0
0
3
B
0
0
7
FB01
FB03
FB04
FB05 FB06
FB07
FB08 FB10
FB11 FB12
FB13
FB15 FB16 FB20 FB30 FB31
FB32
FB35 FB40 FB41 FB70
FB71 FB72
FC01
FC02 FC03
1M83 1M84 2B00
2B01
2B02
2B03
2B04
2B08
2B09
2B102B11 2B17
2B202B50 2D01 2D10
30043B00 3B01
3B02
3B03
3B07
3B11 3B133B18
3B21 3B22 3B303B31
3B34
3B35
3B36
3B37
3B39
3B50
3B51
3B52
3B53 3B55
3B57
3C00
3C06 3C10
3C11
3C12 3C15
3D02 3D05 3D10
3D11 3D12
3D13
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305
7B06
7B07 7B20 7B23
7B25
7
B
2
6
7B30
7B50
7B51
7C
20
7C
22
7D01 7D
02
B
0
0
1
B
0
0
2
B
0
0
3
B
0
0
4
B
0
0
7
FB01
FB03
FB04
FB05 FB06
FB07
FB08 FB10
FB11 FB12
FB13
FB15 FB16 FB20 FB30 FB31
FB32
FB35 FB40 FB41 FB70
FB71 FB72
FC01
FC02 FC03 FD01
FD02
FD03
FD04
3104 313 6381.2
3104 313 6389.5
18 LED
24 LED
Circuit Diagrams and PWB Layouts EN 95 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-6 AL1 820400090592 AmbiLight Common
Everlight LED Common 1
18770_670_100212.eps
100219
Everlight 15 LED Common
AL1A AL1A
8204 000 9059
AL 2K10 Everlight
15 LED Common
2009-11-27 2
2009-11-03 1
BLUE
GREEN
RED
BLUE
GREEN
RED
OUT
12
11
GSCLK
IREF
MODE
SCLK
SIN
SOUT
XERR
XHALF
XLAT 10
NC
9
8
VCC
0
1
2
3
4
5
6
7
BLANK
13
14
15
GND GND_HS
BLUE
GREEN
RED
BLUE
GREEN
RED
S
GND
Q
HOLD
W
VCC
C
D
VIA
VIA
VIA
VIA
BLUE
GREEN
RED
BLUE
GREEN
RED
-T
FB07 B1
FB08 B1
FB15 C1
3B37 G14
3B39-1 E13
3B34 D13
3B36 G14
7003 G10
7004 G11
7B30 D13
FB01 A1
3B02-2 E5
3B03-1 H14
3B03-4 H14
3B07-1 F3
FB41 E13
FB03 B1
FB04 B1
FB05 B1
3B03-3 H14
7005 G13
7B06 D3
FB12 B2
FB13 C1
7B20-1 D8
7B20-2 E8
7B07 D4
3B30-1 D9
3B30-4 E9
2B04-4 B7
2B08 E12
3B35 G14
2B10 F9
2B11 A9
2B17 D8
3B39-2 D12
3B39-3 D13
7000 G5
7001 G7
FB20 B7
FB30 G3
3B31 B10
FB35 A8
FB40 D12
7B23-1 F4
7B25 H3
7B26-1 A8
7B26-2 C9
3B01-2 D7
3B02-1 E3
D
E
3B03-2 H14
G
H
I
3B07-2 G3
3B07-3 H3
3B07-4 G3
3B11 E12
FB06 B2
FB10 B2
FB11 B1
3B18 A8
3B21 B7
3B22 B8
5 6
2B09 E12
8 9 10
2B20 D4
3004 E12
3B00-1 A6
3B00-2 B6
7002 G8
FB16 C1
FB31 H3
FB32 I3
7B23-2 G4
3B00-4 B6
3B01-1 E7
B
C
F
8 9 10
A
B
C
D
3B13-3 H3
3B13-4 I3
3 4 7 11 12 13 14
3B00-3 B6
H
I
1M83 C1
2B02 E9
2B00 E8
11 12 13 14
E
4 5 6 7 3
1
1 2
F
A
2
G
2B01 F8
2B03 I14
2B04-1 B7
2B04-2 B6
2B04-3 B8
FB32
6 5
2 1
4 3
+3V3
99-235/RSBB7C-A24/2D
7005
+3V3
10n
2B
09
2K0
3B31
4
+3V3
1
2
3
5
7B06
74LVC1G32GW
FB40
1
8
2B
20
100n
10K
3B
07-1
FB20
FB30
8
3B21
150R
3B30-1
220R
1
B002
+3V3
FB08
3B
07-3
10K
3
6
4
5
+3V3
FB31
10K
3B
13-4
1
4 3
+3V3
7002
99-235/RSBB7C-A24/2D
6 5
2
25
32
FB35
9
10
11
14
15
1
2
23
27
22
5
16
17
18
19
20
21
6
7
8
31
3033
24
26
3
12
13
28
29
4
TLC5946RHB
7B26-1
FB10
FB11
6 5
2 1
4 3
6
7004
99-235/RSBB7C-A24/2D
3B03-3
1K5
3
FB01
2
7
4 5
3B
07-2
10K
+24V
220R
3B30-4
100n
2B
03
100n
2B11
3B01-1
100R
1 8
2B
08
10n
2 7
1K5
3B03-2
3B36
270R
1K
5
1%
3
6
3B
39-2
2
7
3B
39-3
5
6
+24V
1%
1K
5
7B20-1
74LVC2G17
1
2
2
6
1
1
3
4
5
2
BC847BS(COL)
7B23-1
LMV331IDCK
7B30
3B35
270R
3B37
68R
5
3
4
B001
3 6
BC847BS(COL)
7B23-2
150R 3B00-3
2B
17
100n
2B
04-4
100p
4
5
36
373839
40
41
42
7B26-2
TLC5946RHB
34
35
4
7
2
1
8
3 +3V3
M95010-WDW6
7B07
(64K)

6
5
7B25
BC847BW
1
3
2
3
6
3B18
1K8
+3V3
3B
13-3
10K
33p
2B
01
100R
3B01-2 2 7
+24V
100p
2B
02
6 5
2 1
4 3
+3V3
+3V3
7001
99-235/RSBB7C-A24/2D
4 5
FB16
1K5
3B03-4
FB05
FB07
FB04
4
5
10K
3B
07-4
7003
6 5
2 1
4 3
99-235/RSBB7C-A24/2D
3
2
5
4
+3V3
1 8
74LVC2G17
7B20-2
150R
3B00-1
33p
2B
00
1 8
+3V3
1
8
3B03-1
1K5
2B
04-1
100p
10K
3B02-2
2 7
1K
5
1%
8
1
1 8
3B
39-1
FB03
3B02-1
10K
FB13
2B
10
100p
3B34
RES 100K
150R
3B00-4 4 5
5
6
7
8
9
26 27
18
19
2
20
21
22
23
24
25
3
4
1M83
FH12-25S-0.5SH(55)
1
10
11
12
13
14
15
16
17
FB12
B007
FB15
10K 3004R
E
S
FB06
+3V3
3B
11
10K
150R
3B00-2 2 7
+24V
2B
04-2
100p
2
7
3
6
4 3
+3V3
2B
04-3
100p
99-235/RSBB7C-A24/2D
7000
6 5
2 1
+24V
10K
3B22
FB41
TEMP-SENSOR
BLANK
PROG
SPI-CS
PWM-CLOCK
SPI-DATA-RETURN
SPI-DATA-IN
SPI-CLOCK
LATCH
PWM-CLOCK
BLANK
SPI-DATA-IN-BUF
PWM-R1
PWM-G1
PWM-R1
PWM-G3
PWM-R3
PWM-R2
PWM-B2
PWM-G2
DATA-SWITCH
TEMP-SENSOR
PWM-G4
PWM-R4
PWM-B4
PWM-R5
PWM-G5
PWM-B5
SPI-CLOCK-BUF
SPI-DATA-IN-BUF
SPI-DATA-RETURN
SPI-CS
DATA-SWITCH
LATCH
SPI-DATA-IN
SPI-DATA-OUT
PWM-CLOCK-BUF
SPI-CLOCK-BUF
PROG
SPI-CLOCK-BUF
PWM-CLOCK-BUF
SPI-CLOCK
PWM-G1
PWM-B1
PWM-B1
PWM-B3
EN 96 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Everlight LED Common 2
18770_671_100212.eps
100212
Everlight 15 LED Common 2
AL1B AL1B
2009-11-27 2
2009-11-03 1
8204 000 9059
AL 2K10 Everlight
15 LED Common
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
3B57-3 C3
FC03 H3
11 12
A
B
C
7104 B6
7105 B5
F
G
3B55-2 B3
3B55-3 A3
E
7200 F8
3B55-4 A3
7C20-2 F3
8
1 2
3B53-4 C7
3B55-1 C3
11 12
FC02 G3
3
3B57-2 D3
4
3C15-3 G4
3C15-4 G4
9 10
7102 B9
7103 B7
3C10 F4
7C20-1 E3
3B50 B7
D
9 10
7201 F9
7202 F10
7B51 C3
FB71 C3
FB72 D3
FC01 F3
3C11 F4
3C12 F4
C
D
E
H
2B50 C11
3C15-1 G4
3C15-2 G4
7100 B11
7101 B10
3C00-4 E3
7C22 G3
FB70 B3
3 4
3B51 B7
7
3B52 B7
3B53-1 B7
5
3C00-1 G3
3C00-2 F3
3C00-3 F3
7B50-1 A3
7B50-2 B3
A
B
3B53-2 C7
3B53-3 C7
1
F
G
H
3C06-1 G3
3C06-2 H3
5 6
6 7 8
5
3
4+24V
2
4
5
BC847BS(COL)
7B50-2
7
1
0
K
3
B
5
5
-4
3
B
5
7
-2
1
0
K
2
2 1
4 3
99-235/RSBB7C-A24/2D
7105
6 5
BC847BS(COL)
2
6
1
6 5
2 1
4 3
7B50-1
99-235/RSBB7C-A24/2D
7100
6 5
2 1
4 3
1
4 3
7101
99-235/RSBB7C-A24/2D
99-235/RSBB7C-A24/2D
6 5
2
1
0
K
3
C
0
6
-1
1
8
7200
1
4 3
+24V
99-235/RSBB7C-A24/2D
7201
6 5
2
1
0
K
3
B
5
5
-3
3
6
1
0
0
n
2
B
5
0
4
FC01
7C20-2
BC847BS(COL)
5
3
270R
3C10
1 2
270R
1 2
1
0
K
3
B
5
5
-1
1
8
3C11
3B52
68R
2 1
4 3
7104
99-235/RSBB7C-A24/2D
6 5
3
2
FB71
7B51
BC847BW
1
3B51
270R
270R
3B50
1K5
3B53-4
4 5
1K5
3B53-3
3 6
3B53-2
2 7
1 8
1K5
1K5
3B53-1
2
7
FC02
3
6
1
0
K
3
C
0
6
-2
2
7
3
C
0
0
-3
1
0
K
8
3
C
0
0
-2
1
0
K
5
3
C
0
0
-1
1
0
K
1
3
C
0
0
-4
1
0
K
4
+24V
3 6
4 5
3C15-3
1K5
3C15-4
1K5
2
3C12
68R
BC847BW
7C22
1
3
3
6
+24V
+24V
3
B
5
7
-3
1
0
K
FB72
FB70
FC03
1
0
K
3
B
5
5
-2
2
7
6 5
2 1
4 3
3
7103
99-235/RSBB7C-A24/2D
99-235/RSBB7C-A24/2D
7202
6 5
2 1
4
1 8
2 7
3C15-1
1K5
3C15-2
1K5
2
6
1
+24V
+24V
BC847BS(COL)
7C20-1
6 5
2 1
4 3
PWM-R2
PWM-G2
99-235/RSBB7C-A24/2D
7102
PWM-B2
PWM-R3
PWM-G3
PWM-B3
Blue
Green
Red
Circuit Diagrams and PWB Layouts EN 97 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-7 AL1 820400090611 3 LED Everlight
3 LED Everlight
18770_650_100212.eps
100219
3 LED Everlight
AL2A AL2A
8204 000 9061
3104 313 64201
3 LED Everlight
AL 2K10
2009-11-27 1
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
3
5 6 7 8
1 4 5 6
A
B
C
D
A
B
7203 A3
7204 A4
7205 A5
1 10
2
2 3 4 9
7 8 9 10
C
D
1M84 A10
2C15 B6
B003
+3V3
2
C
1
5
1
0
0
n
+3V3
7
8
9
26 27
+24V
20
21
22
23
24
25
3
4
5
6
10
11
12
13
14
15
16
17
18
19
2
1M84
FH12-25S-0.5SH(55)
1
5
2 1
4 3
+24V
3
7205
99-235/RSBB7C-A24/2D
6
99-235/RSBB7C-A24/2D
7204
6 5
2 1
4 4 3
99-235/RSBB7C-A24/2D
7203
6 5
2 1
TEMP-SENSOR
BLANK
PROG
LATCH
SPI-CS
PWM-CLOCK-BUF
SPI-DATA-RETURN
SPI-DATA-OUT
SPI-CLOCK-BUF
Blue
Green
Red
EN 98 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-8 AL1 820400090601 9 LED Everlight
9 LED Everlight
18770_640_100212.eps
100219
9 LED Everlight
AL2A AL2A
8204 000 9060
3104 313 64191
9 LED Everlight
AL 2K10
2009-11-03 1
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
5 1 6 7
3 8 9
A
B
C
4 8
7203 A3
2 10
4 2 1
3
B
C
D
10
1M84 A10
2D01 B6
7204 A4
D
9
5 6 7
A
7205 A5
B003
1
0
0
n
2
D
0
1
+3V3
+3V3
26 27
+24V
22
23
24
25
3
4
5
6
7
8
9
13
14
15
16
17
18
19
2
20
21
1
10
11
12
FH12-25S-0.5SH(55)
1M84
4 3
+24V
99-135/RSGBB7C-A24/2D
7205
6 5
2 1
5
2 1
4 3
7204
99-135/RSGBB7C-A24/2D
6 6 5
2 1
4 3
7203
99-135/RSGBB7C-A24/2D
B004
TEMP-SENSOR
BLANK
PROG
LATCH
SPI-CS
PWM-CLOCK-BUF
SPI-DATA-RETURN
SPI-DATA-OUT
SPI-CLOCK-BUF
Blue
Green
Red
Circuit Diagrams and PWB Layouts EN 99 Q552.1E LA 10.
2010-Feb-19
back to
div. table
9 LED Everlight
18770_641_100212.eps
100212
9 LED Everlight
AL2B AL2B
2009-11-03 1
8204 000 9060
3104 313 64191
9 LED Everlight
AL 2K10
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
3D13-2 C12
FD03 D1
FD04 D1
3D05-3 C1
3D05-4 C1
3D10 A12
3D11 B12
3D12 B12
3D13-1 B12
3D13-3 C12
3D13-4 C12
7300 B5
7301 B6
7302 B7
7303 B8
7304 B10
7305 B11
7D01-1 A2
7D01-2 B2
FD01 A1
4 5 6 7 8 9 10 12
7 8 9 10 11 12 13
1
7D02 C2
3
FD02 C1
4 5
13
A
B
C
D
11
6
A
B
C
D
2D10 C13
3D02-1 A1
3D02-2 A1
3D02-3 B1
3D02-4 B1
3
6
2
1 2 3
3
D
0
2
-3
K
0
1
K
0
1
3
D
0
2
-2
2
7
1
4 3
+24V
7300
99-135/RSGBB7C-A24/2D
6 5
2
3D10 1 2
270R
+24V
68R
3D12
2
6
1
FD01
7D01-1
BC847BS(COL)
3
D
0
2
-4
4
5
FD02
1
0
K
1K5
3D13-3 3 6
FD04
4 5
FD03
3D13-4
1K5
7D01-2
BC847BS(COL)
5
3
4
2 1
4 3
7305
99-135/RSGBB7C-A24/2D
6 5 6 5
2 1
4 3 4 3
99-135/RSGBB7C-A24/2D
7304
99-135/RSGBB7C-A24/2D
7301
6 5
2 1
1
3
2
1
8
BC847BW
7D02
3
D
0
2
-1
1
0
K
+24V
4
5
2
D
1
0
1
0
0
n
3
6
3
D
0
5
-4
1
0
K
1
0
K
3
D
0
5
-3
1K5
3D13-1 1 8
270R
3D11
1 2
2 7
1
4 3
3D13-2
1K5
99-135/RSGBB7C-A24/2D
6 5
2
6 5
2 1
4 3
7303
+24V
99-135/RSGBB7C-A24/2D
7302
PWM-B4
PWM-R4
PWM-G4
EN 100 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-9 AL1 820400090621 15 LED Everlight
15 LED Everlight
18770_660_100212.eps
100219
15 LED Everlight
AL2A AL2A
8204 000 9062
3104 313 64211
15 LED Everlight
AL 2K10
2009-11-27 1
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
A
B
C
D
A
B
C
7 6 5 4 2 1
7205 A5
9 10 8
9 8 7 6 4 3 10
3
1M84 A10
2D01 B6
7203 A3
7204 A4
FD18 C7
1 2 5
D
FD18
4 3
+24V
99-235/RSBB7C-A24/2D
7205
6 5
2 1 2 1
4 3
7204
99-235/RSBB7C-A24/2D
6 5 6 5
2 1
4 3
7203
99-235/RSBB7C-A24/2D
B004 B005 B003
1
0
0
n
2
D
0
1
+3V3
+3V3
5
6
7
8
9
26 27
+24V
18
19
2
20
21
22
23
24
25
3
4
1
10
11
12
13
14
15
16
17
1M84
TEMP-SENSOR
BLANK
PROG
LATCH
SPI-CS
PWM-CLOCK-BUF
SPI-DATA-RETURN
SPI-DATA-OUT
SPI-CLOCK-BUF
Blue
Green
Red
Circuit Diagrams and PWB Layouts EN 101 Q552.1E LA 10.
2010-Feb-19
back to
div. table
15 LED Everlight
18770_661_100212.eps
100212
15 LED Everlight
AL2B AL2B
2009-11-27 1
8204 000 9062
3104 313 64211
15 LED Everlight
AL 2K10
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
BLUE
GREEN
RED
7305 B11
7400 F5
7403 F8
7404 F10
7405 F11
7D01-1 A2
F
G
H
FD06 H1
7301 B6
3D18-4 G12
7300 B5
7401 F6
7402 F7
9 10 11
3D03-4 G2
3D04-1 F2
3D04-2 G2
3D04-3 E2
12
FD04 F1
FD05 G1
B
C
D
E
1 2 3 6 7 10 11 12 13
3D02-2 A1
3D02-3 B1
3D02-4 B1
3D03-3 H2
3D15 F12
3D04-4 F2
3D05-3 C1
13
A
3D11 B12
3D12 B12
3D13-1 B12
3D13-2 C12
7D01-2 B2
7D02 C2
7D03-1 E2
7D03-2 F2
FD02 C1
FD03 D1
4 5
1 2
8 9
2D10 C13
2D11 H13
3D02-1 A1
3D16 F12
3D18-2 G12
3D18-3 G12
3D13-3 C12
3D13-4 C12
F
G
7302 B7
7303 B8
7304 B10
3D05-4 D1
3D10 B12
H
A
B
C
3 4 5 6
7D04 G2
FD01 A1
D
E
FD02
7 8
3D17 F12
3D18-1 G12
4
5
FD01
3
3
D
0
4
-4
1
0
K
99-235/RSBB7C-A24/2D
6 5
2 1
4
5
3
4
7403
3D13-2 2 7
BC847BS(COL)
7D01-2
1K5
3 6
1
0
0
n
2
D
1
0
4 5
3D13-3
1K5
4
5
1K5
3D13-4
4 3
3
D
0
2
-4
1
0
K
7400
99-235/RSBB7C-A24/2D
6 5
2 1 3
4
+24V
+24V
7D03-2
BC847BS(COL)
5
3D11
68R
3D18-2
1K5
2 7
RES
6 5
2 1
4 3
1
8
99-235/RSBB7C-A24/2D
7305
1
4 3
1
0
K
3
D
0
4
-1
7301
99-235/RSBB7C-A24/2D
6 5
2
7D02
BC847BW
1
3
2
1
0
K
3
D
0
2
-1
1
8
1
0
K
3
D
0
3
-4
4
5
6 5
2 1
4 3
4
5
99-235/RSBB7C-A24/2D
7401
1
0
K
3
D
0
5
-4
6 5
2 1
4 3
99-235/RSBB7C-A24/2D
7300
+24V
RES
68R
3D16
68R
3D15
3D10
68R
5
2 1
4 3
7304
99-235/RSBB7C-A24/2D
6
3
6
+24V
3
D
0
3
-3
1
0
K
FD04
+24V
FD06
1
0
K
3
6
1 8
3
D
0
5
-3
3D13-1
1K5
3D18-4
1K5
4 5
7D04
1
3
2
2
6
1
BC847BW
7303
6 5
2 1
4 3
BC847BS(COL)
7D01-1
1
4 3
99-235/RSBB7C-A24/2D
7302
99-235/RSBB7C-A24/2D
6 5
2
7D03-1
BC847BS(COL)
2
6
1
1
0
K
3
D
0
2
-3
3
6
2
D
1
1
1
0
0
n
6 5
2 1
4 3
1
4 3
7405
99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D
7404
6 5
2
1K5
3D18-3 3 6
FD05 1K5
3D18-1 1 8 2
7
FD03
6
3
D
0
4
-2
1
0
K
1
0
K
3
D
0
4
-3
3
99-235/RSBB7C-A24/2D
7402
6 5
2 1
4 3
3D12
68R
68R
3D17
+24V
+24V
+24V
2
7
PWM-R4
PWM-G4
PWM-B5
3
D
0
2
-2
1
0
K
PWM-B4
PWM-G5
PWM-R5
EN 102 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-10 AL1 3104313 - 64201, 64191
Layout AmbiLight Everlight
18770_672_100216.eps
100219
AmbiLight Everlight
1M83 1M84 2B002B01
2B02
2B03
2B04
2B08
2B09
2B102B11 2B17
2B202B50
2C15
30043B00 3B01
3B02
3B03
3B07
3B11 3B133B18
3B21 3B22 3B303B31
3B34
3B35
3B36
3B37
3B39
3B50
3B51
3B52
3B53 3B55
3B57
3C00
3C06 3C10
3C11
3C12 3C15 7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205
7B06
7B07 7B20 7B23
7B25
7B26
7B30
7B50
7B51
7C
20
7C
22
B
0
0
1
B
0
0
2
B
0
0
3
B
0
0
7
FB01
FB03
FB04
FB05 FB06
FB07
FB08 FB10
FB11 FB12
FB13
FB15 FB16 FB20 FB30 FB31
FB32
FB35 FB40 FB41 FB70
FB71 FB72
FC01
FC02 FC03
1M83 1M84 2B002B01
2B02
2B03
2B04
2B08
2B09
2B102B11 2B17
2B202B50 2D01
2D10
30043B00 3B01
3B02
3B03
3B07
3B11 3B133B18
3B21 3B22 3B303B31
3B34
3B35
3B36
3B37
3B39
3B50
3B51
3B52
3B53 3B55
3B57
3C00
3C06 3C10
3C11
3C12 3C15
3D02 3D05 3D10
3D11 3D12
3D13
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305
7B06
7B07 7B20 7B23
7B25
7
B
2
6
7B30
7B50
7B51
7C
20
7C
22
7D01 7D
02
B
0
0
1
B
0
0
2
B
0
0
3
B
0
0
4
B
0
0
7
FB01
FB03
FB04
FB05 FB06
FB07
FB08 FB10
FB11 FB12
FB13
FB15 FB16 FB20 FB30 FB31
FB32
FB35 FB40 FB41 FB70
FB71 FB72
FC01
FC02 FC03
FD01 FD02
FD03
FD04
3104 313 6419.1
3104 313 6420.1
18 LED
24 LED
Circuit Diagrams and PWB Layouts EN 103 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-11 B01 820400089943 Tuner, HDMI & CI
Common Interface
18770_500_100118.eps
100218
Common Interface
B01A B01A
2009-10-22 3
8204 000 8994
TUNER, HDMI & CI
G3
1
2
3EN2
3EN1
G3
1
2
3EN2
3EN1
G3
1
2
3EN2
3EN1
G3
1
2
3EN2
3EN1
G3
1
2
3EN2
3EN1
G3
1
2
3EN2
3EN1
+T
3F04-4 C4
2F01 A2
C
10
1P00-B G10
2F00 A6
IF04 B9
3F09-1 B9
3F08-4 B9
7F02 D5
5 1
D
3F04-1 C4
4
3F09-2 B9
2 3
2F04 E6
3F05-4 C4
3F09-3 B9
3F03-2 A4
IF02 A5
3F05-1 C4
3F04-2 C4
3F04-3 C4
11
3F08-3 B9
IF08 D9
2
3F09-4 B9
3F11-1 D9
7F03 E5
2F02 B6
7F05 I5
3F07-4 A9
E
F
3F08-2 A9
IF03 A4
G
IF06 C5
B
A
H
8
3F07-3 A9
2F06 H6
3F11-4 D9
3F02 A4
3F03-1 A4
7F01 B5
H
7
B
3F12 C9
3F11-3 D9
IF07 C5
3F07-2 A9
3F07-1 A9
8
D
3F10-1 C9
3F08-1 A9
I
9
2F03 D6
3 1P00-A D10
11
15-BIT ADDRESS
3F11-2 C9
3F01 A2
2F05 G6
CONTROL
I
7F04 G5
3F10-3 C9
3F10-4 C9
3F06 A9
C
A
E
4
8-BIT DATA
6 1
TRANSPORT STREAM FROM CAM
IF05 C4
3F10-2 C9
3F05-3 C4
7F00 A5
F
G
7 6
3F05-2 C4
IF01 A4
10 9
5
3F08-2
10K
2 7
3F05-1 100R 1 8
100R 3 6
4 5
3F04-3
3F10-4
10K
100n
2F06
4 5
RES
3 6
3F08-4
10K
10K
3F08-3
10K
4 5 3F11-4
3F09-3
10K
3 6
100R 1 8 3F04-1
IF02
+3V3
+3V3
13
12
11
1
10
19
20
5
6
7
8
9
18
17
16
15
14
74LVC245A
7F01
2
3
4
1 8
3F04-4 4 5
3F11-1
10K
4 5
100R
10K
3F09-4
14
13
12
11
1
10
19
20
3
4
5
6
7
8
9
18
17
16
15
74LVC245A
7F03
2
3 6 100R 3F05-3
1 8
3F12
10K
3F03-1
100R
20
17
16
15
14
13
12
11
1
10
19
2
3
4
5
6
7
8
9
18
7F04
74LVC245A
IF07
1 8
10K
3F10-1
IF03
100n
2F04
RES
2 7
100R
3F03-2
RES
100n
2F02
+3V3
+5VCA
3F02
100R
IF06
12
11
1
10
19
20
5
6
7
8
9
18
17
16
15
14
13
7F00
74LVC245A
2
3
4
REF EMC HOLE
1X01
REF EMC HOLE
1X04
2 7 100R 3F04-2
4 5
+3V3
4 5
3F07-4
10K
100R 3F05-4
10K
3F11-3 3 6
IF05
RES
2F03
100n
IF04
16
VCC1
17
VPP1
18
WE|P
15
33
WP|IOIS16
IF01
4
D5
D6
5
D7
6
GND1
1
34
GND2
69 70
OE
9
RDY|BSY
A8
A9
11
CE1
7
D0
30
D1
31
D2
32
D3
2
D4
3
A15
20
A16
19
A2
27
A3
26
A4
25
A5
24
A6
23
A7
22
12
A0
29
A1
28
A10
8
A11
10
A12
21
A13
13
A14
14
10074595-050MLF
ROW_A
1P00-A
3F06
100K
10K
3F10-3 3 6
+3V3
2 7
+3V3
+5VCA
3F05-2 100R
+5V
+5VCA
10K
3F08-1 1 8
2F05
100n
1 8
RES
R
E
S
3F09-1
10K
16V
22u 2F
01
72
61
REG
58
RESET
51
VCC2
52
VPP2
43
VS1
57
VS2
59
WAIT
64
D8
65
D9
35
GND3
68
GND4
60
INPACK
44
IORD
45
IOWR
71
CD2
42
CE2
66
D10
37
D11
38
D12
39
D13
40
D14
41
D15
A21
53
A22
54
A23
55
A24
56
A25
63
BVD1|STSCHG
62
BVD2|SPKR
36
CD1
67
46
A17
47
A18
48
A19
49
A20
50
11
1
10
19
20
1P00-B
ROW_B
10074595-050MLF
6
7
8
9
18
17
16
15
14
13
12
74LVC245A
7F05
2
3
4
5
2 7 3F10-2
10K
IF08
3 6 3F07-3
10K
RES
+3V3
2 7
2F00
100n
3F11-2
10K
+3V3
+3V3
10K
3F07-1 1 8
2 7
10K
3F09-2
2 7
10K
3F07-2
0R4
3F01
13
12
11
1
10
19
20
5
6
7
8
9
18
17
16
15
14
7F02
74LVC245A
2
3
4
+5VCA
CA-RDY
CA-D00
CA-D01
CA-D02
CA-D03
CA-D04
CA-D05
CA-D06
CA-D07
CA-DATADIR
CA-DATAENn
MOVAL
MOSTRT
MDO0
MDO1
MDO2
MDO3
MDO4
MDO5
MDO6
MDO7
CA-WAITn
CA-INPACKn
CA-WP
CA-VS1n
CA-WEn
CA-OEn
CA-CE2n
CA-CE1n
CA-REGn
CA-MOCLK
CA-MOVAL
CA-MOSTRT
CA-MDO0
CA-MDO1
CA-MDO2
CA-MDO3
CA-MDO4
CA-MDO6
CA-MDO5
CA-MDO7
CA-RST
CA-CD1n
CA-CD2n
CA-DATAENn
CA-DATADIR
CA-ADDENn
MOCLK
XIO-D07
XIO-D06
XIO-D05
XIO-D04
XIO-D03
XIO-D02
XIO-D01
XIO-D00
CA-ADDENn
CA-WAITn
XIO-D15
XIO-D14
XIO-WEn
XIO-OEn
XIO-D08
XIO-D09
XIO-D11
XIO-D10
CA-IOWRn
CA-IORDn
CA-A03
CA-A04
CA-A05
CA-A06
CA-A07
XIO-A00
XIO-A01
XIO-A02
XIO-A03
XIO-A04
XIO-A05
XIO-A06
XIO-A07
CA-ADDENn
CA-A08
CA-A09
CA-A10
CA-A11
CA-A12
CA-A13
CA-A14
XIO-A08
XIO-A09
XIO-A10
XIO-A11
XIO-A12
XIO-A13
XIO-A14
CA-ADDENn
CA-D07
CA-D06
CA-D05
CA-D04
MOCLK
MOVAL
MOSTRT
CA-D03
MDO0
MDO1
MDO2
MDO3
MDO4
MDO5
MDO6
MDO7
CA-A00
CA-A01
CA-A02
CA-CE2n
MDO7
MDO6
MDO5
MDO4
MDO3
CA-CD1n
CA-WP
CA-D02
CA-D01
CA-D00
CA-A00
CA-A01
CA-A02
CA-A03
CA-A04
CA-A05
CA-A06
CA-A07
CA-A12
CA-MICLK
CA-MIVAL
CA-RDY
CA-WEn
CA-A14
CA-A13
CA-A08
CA-A09
CA-A11
CA-OEn
CA-A10
CA-CE1n
CA-CD2n
MDO2
MDO1
MDO0
MOSTRT
MOVAL
CA-REGn
CA-INPACKn
CA-WAITn
CA-RST
MOCLK
CA-MDI7
CA-MDI6
CA-MDI5
CA-MDI4
CA-MDI3
CA-MDI2
CA-MDI1
CA-MDI0
CA-MISTRT
CA-IOWRn
CA-IORDn
CA-VS1n
EN 104 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Flash
18770_501_100118.eps
100118
Flash
B01B B01B
2009-10-22 3
8204 000 8994
TUNER, HDMI & CI
WE
B
R
WP
VCC
VSS
IO
NC
0
1
2
3
4
5
6
7
CLE
ALE
CE
RE
3
C
3F21-1 C1 2F21 A3
IF23 D3
2
3F22-1 C2
3F22-2 C1 3F21-3 C1
4 2
3F20-1 B1
C
IF21 C3
3F21-2 C2
3F21-4 C2
A
7F20 B3
1
D
B
D
1
3F22-3 C2
4
3F20-4 C2
A
IF22 D3
B
3F23 C2
3F22-4 C2
3
2F20 A3
3F24 D2
3F19 D2
3F20-2 B2
IF21
3F20-3 B1
4 5
3F23 10K
3F20-4 100R
2
F
2
1
1
0
0
n
+3V3
2 7 100R 3F20-2
2 7
2 7
3F22-2 100R
+
3
V
3
100R 3F21-2
100R 3F21-3 3 6
3F21-1 100R 1 8
1 8 3F20-1 100R
IF23
6
3F24
2K2
100R 3F20-3 3
+3V3
+3V3
1
0
0
n
2
F
2
0
3
F
1
9
1
0
K
4 5 100R 3F22-4
11
14
8
7
1
2
3
7
1
3
3
6
18
19
39
40
45
46
47
3
48
4
5
6
10
24
25
26
27
28
2
33
34
35
38
41
42
43
44
1
15
20
21
22
23
17
9
16
29
30
31
32
3 6
4Gx16
[FLASH]

NAND04GW3B2DN6F
7F20
4 5
100R 3F22-3
8
3F21-4 100R
3F22-1 100R 1
IF22
NAND-CE1n
NAND-RDY1n
XIO-D01
XIO-D00
XIO-D03
XIO-D02
XIO-D05
XIO-D04
XIO-D07
XIO-D06
NAND-ALE
NAND-CLE
XIO-OEn
XIO-WEn
NAND-WPn
Circuit Diagrams and PWB Layouts EN 105 Q552.1E LA 10.
2010-Feb-19
back to
div. table
USB Hub
18770_502_100118.eps
100118
USB Hub
B01C B01C
2009-10-22 3
8204 000 8994
TUNER, HDMI & CI
VDD_3V3
CR PLL
FILT
OSC1
OSC3
OSC2
VIA
GND_HS
USBUP
NC
VBUS_DET
RESET
DM
XTALOUT
DP
RBIAS
TEST
+
T
+
T
B
3
2F29 A4
6
2F31 A5
IF40 C2
IF41 C2
IF42 C2
2F34 B1
2F35 B2
IF32 C1
FF33 C9
FF34 C7
IF37 C5
IF39 D2
IF45 D9
5
3F34-4 D8
7 8
A
4
FF30 E8
FF31 E9
FF32 E9
C
FF36 D7
2F30 A4
SIDE USB TOP
2F32 A5
3F32 C8
3F34-1 C8
1 2
IF31 C1
1 2
FF35 C7
IF35 B5
IF36 C5
3F26-4 B8
3F28 B2
3F30 C2
1P07 B9
1P08 D9
2F25 A2
IF43 A3
IF44 A3
9
3F26-1 A8
IF33 B2
IF34 B2
5 6 7
SIDE USB BOTTOM
FF37 D7
FF38 E9
3F31-4 D2
FF40 A8
IF30 C2
9F26 B8
2F33 A5
3F35 B1
9F20 B7
3 4
8 9
A
B
D
E
1F24 E9
1F25 B1
3F34-2 C8
3F34-3 D8
E
3F25 A8
3F26-2 A8
3F26-3 A8
3F31-2 C2
3F31-3 C2
C
D
FF39 E8
3F36 D6
7F25 B2
2F27 A2
2F28 A4
9F21 B7
9F25 B8
2F26 A2
1
u
0
2
F
2
7
2
3
3
6
3
8
3
9
4
0
4
1
33
XTALIN|CLKIN
32
2
USBDP_DN1|PRT_DIS_P1
4
USBDP_DN2|PRT_DIS_P2
7
USBDP_DN3|PRT_DIS_P3
31
27
51
0
2
9
1
5
SCL|SMBCLK|CFG_SEL0
22
SDA|SMBDATA|NON_REM1
28
SUSP_IND|LOCAL_PWR|NON_REM0
11
1
USBDM_DN1|PRT_DIS_M1
3
USBDM_DN2|PRT_DIS_M2
6
USBDM_DN3|PRT_DIS_M3
30
8
9
20
21
13
17
19
3
4
35
26
24
12
BC_EN1|PWRTPWR1
16
BC_EN2|PWRTPWR2
18
BC_EN3|PWRTPWR3
1
4
3
7
25
HS_IND|CFG_SEL1

USB HUB
USB2513B-AEZG
7F25
100K
3F34-3
3 6
FF35
FF39
IF44
4 5
IF37
100K
3F26-4
FF40
100K
3 6
1
3F26-3
100K
3F34-1
FF36
3 6
IF33
10K
3F31-3
3F26-1
100K
1
IF35
3F34-2
100K
2 7
3F36
10K
9
F
2
0
2
F
3
4
1
0
p
1
0
0
n
2
F
3
0
FF32
+5V
2
F
3
3
1
0
0
n
4 5
+5V-USB1
3F34-4
100K
0
R
4
3
F
3
2
IF36 FF34
IF32
+5V-USB2
+3V3
1
0
0
n
2
F
3
2
1P08
1
2
3
4
5 6
292303-4
IF42
FF38
FF33
+3V3
+5V-USB1
IF43
1
0
K
3
F
3
5
2 7
IF31
100K
3F26-2
3F31-2
10K
2 7
FF31
3
F
2
5
0
R
4
2
F
3
1
1
0
0
n
2 4
1 3
2
F
2
8
1
u
0
24M
1F25
IF45
+3V3
1
0
0
n
FF30
2
F
2
9
9F25
2
F
2
5
1
0
0
n
9
F
2
1
+5V-USB2
1
0
0
n
2
F
2
6
+3V3
4 5
FF37
3F31-4
10K
1
M
0
3
F
2
8
IF34
1
0
p
2
F
3
5
IF39
IF30
5 6
1
2
3
4
IF41
1P07
292303-4
12K
3F30
+5V
9F26
1
2
3
4
5
6 7
+5V
502382-0570
1F24
IF40
USB-DP1
USB-DP
USB-DM1
USB-DM
RESET-USBn
USB-OC3n
USB-OC2n
USB-OC1n
USB-DM3
USB-DP3
USB-DM2
USB-DP2
USB-DP2
USB-DM2
USB-OC1n
USB-OC2n
USB-OC3n
USB-DM1
USB-DM2
USB-DM3
USB-DP1
USB-DP2
USB-DP3 USB-DM
USB-DP
EN 106 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
SD Card
18770_503_100118.eps
100118
SD Card
B01D B01D
2009-10-22 3
8204 000 8994
TUNER, HDMI & CI
+T
4
1
C
D
1 2 3
2 3 4
A
D
A
B
47K
2 7
B
C
2 7
3F41-2
100R
3F44-1
1 8
3F44-2
100R
3F43-3
3 6
1 8
100R 3F43-1
100R
2
F
4
0
2
2
u
1
6
V
IF47
RES
IF46
10K
3F45
FF46
FF45
12
+3V3 +3V3-SD
1939115-1
1P09-2
10
11
FF50
FF47
3F42-3
47K
3 6
2 7
3F41-1
1 8
47K
3F42-2
3 6
47K
3 6
3F41-3
47K
3F44-3
100R
+3V3-SD
3F40
0R4
FF42
FF44
FF41
14
FF43
1
2
3
4
5
6
7
8
9
13
1939115-1
1P09-1
FF49
FF48
3F43-2
100R
2 7
+3V3
47K
3F42-1
1 8
47K
3F41-4
4 5
SDIO-CLK
SDIO-DAT3
SDIO-CMD
SDIO-CLK
SDIO-DAT0
SDIO-DAT1
SDIO-DAT2
SDIO-CDn
SDIO-WP
SDIO-DAT3
SDIO-CMD
SDIO-DAT0
SDIO-DAT1
SDIO-DAT2
SDIO-CDn
SDIO-WP
1P09-1 C4
3F44-3 C3
3F45 C1
1 D 2 - 2 4 F 3
4 D 2 - 9 0 P 1
3F42-3 D1
3F43-1 C3
2F40 A2
3F40 A2
3F41-1 C1
3F41-2 C1
3F41-3 C1
FF47 C3
FF48 C3
FF50 D3
IF46 D1
IF47 B1
FF41 C3
FF42 C3
FF43 C3
FF44 D3
3F41-4 C1
3F42-1 C1
3F43-3 C3
3F44-1 C3
3F44-2 C3
3F43-2 C3
FF45 A2
FF46 C4
FF49 C3
Circuit Diagrams and PWB Layouts EN 107 Q552.1E LA 10.
2010-Feb-19
back to
div. table
PNX85500 Control
18770_504_100118.eps
100118
PNX85500 Control
B01E B01E
2009-10-22 3
8204 000 8994
TUNER, HDMI & CI
D
C
S
W
HOLD
VSS
Q
VCC
SCL
ADR
0
1
2 SDA
WC
IF53 B3
IF54 C3
DEBUG / RS232 INTERFACE
SCL
FOR
FF29 C4
FF55 E3
FF56 E3
SHIFTED
UP
FF66 F4
IF50 B3
IF51 B1
IF52 B3
DEBUG
3F63 E5
3F64 F5
3F65 F5
IF55 C6
IF56 C7
IF57 C7
IF58 D2
IF59 E1
IF61 C4
IF62 C4
7F54-2 C7
7F58 D1
9CH0 C7
FF04 C4
DEBUG ONLY
SDA
USE ONLY
1F52 D8
FF57 E2
FF58 C7
FF61 D4
FF62 D7
FF63 E4
FF64 F7
FF65 F4
3F58 E1
3F59 E3
3F60 E3
3F62 D5
A
B
C
D
E
F
A
3F66 B7
3F67 B6
3F68 C7
3F69 D7
7F52 B2
7F53 B7
7F54-1 C7
D
E
F
1F51 F8
LEVEL
MAIN NVM
B
C
2F52 B1
2F53 D6
2F58 D2
3F51 B1
3F52 B3
3F53 C6
3F54 D7
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
3
F
5
4
FF66
R
E
S
1
K
0
FF57
IF50
2
F
5
2
1
0
0
n
IF55
R
E
S
5
3
4
IF56
BC847BPN(COL)
7F54-2 RES
FF62
1F51
1
2
3
4
5
6 7
1
0
K
3
F
5
8
RES
9CH0
IF51
IF57
100R 3F62
3F64
100R
FF61
+5V
+3V3-STANDBY
7
2
1
8
4
3

512K
FLASH
M25P05-AVMN6
7F52
6
5
R
E
S
3
F
6
8
4
7
K
FF58
100R
3F59
IF61
1
0
K
R
E
S
3
F
6
9
FF04
PDTA114EU
RES 7F53
IF59
+3V3
FF64
100R
3F60
1
0
K
3
F
5
1
1
2
3
4 5
1F52
+3V3
IF52
+3V3
RES
+3V3-STANDBY
100n
2F58
IF54
RES
2
6
1
FF65
BC847BPN(COL)
7F54-1
2
3
6
5
8
4
7
7F58
EEPROM

(8K8)
1
+3V3
3F53
10K
IF53
3
F
6
6
1
0
K
+3V3-STANDBY
R
E
S
R
E
S
3
F
6
7
1
0
K
2
F
5
3
1
u
0
R
E
S
+3V3-STANDBY
FF63
3F63
FF56
FF55
100R
3
F
5
2
1
0
K
IF58
FF29
3F65
100R
IF62
BOOST-PWM
BACKLIGHT-BOOST
SDM
SPI-PROG
RESET-STBYn
SPI-PROG
SDA-UP-MIPS
SCL-UP-MIPS
SCL-SSB
SDA-SSB
TXD-UP
RXD-UP
PNX-SPI-CLK
PNX-SPI-SDO
PNX-SPI-CSBn
PNX-SPI-SDI
PNX-SPI-WPn
EN 108 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
HDMI & CI
18770_505_100118.eps
100118
HDMI & CI
B01F B01F
2009-10-22 3
8204 000 8994
TUNER, HDMI & CI
AGC CONTROL
I
O2 IGND
O1
GND
B
C
D
E
1F75 B5
1T01 A1
2F59 B1
2F60 B1
1 2 3 4 5 6 7 8 9 10
1 2 3 4 5 6 7 8 9 10
A
B
C
D
E
A
2F61 B1
2F62 B10
2F63 C9
2F64 C9
2F65 B10
2F66 C10
2F70 B10
2F71 A7
2F72 A9
2F73 A9
2F74 B6
2F75 B8
2F76 B9
2F77 B9
2F78 B6
2F79 B8
2F80 B9
2F81 B1
2F82 B9
2F84 C1
2F85 C4
2F86 D1
2F88 E5
2F90 C6
2F91 D6
2F92 C7
2F93 C2
2F94 D7
3F71 C7
3F72 C7
3F75 D2
3F76 C2
3F77 C4
3F78 C7
3F79-1 B8
3F79-4 B8
3F80 C9
3F81 C9
3F82 B10
5F66 C10
5F70 D6
5F71 B9
5F72 E4
5F73 C5
5F74 B10
5F76 B10
6F72 C7
7F70 D8
7F75 A6
9F00 A6
9F01 A6
9F02 A8
9F03 A8
9F04 B3
9F05 C4
9F06 C4
9F71 E4
AF70 B3
AF71 B3
AF72 B9
AF73 B9
FF00 B2
FF01 C4
FF71 A1
FF74 B1
FF75 B2
FF76 B1
FF81 C1
FF82 C2
IF10 A5
IF11 A5
IF12 C9
IF13 C9
IF14 C9
IF15 C9
IF16 B10
IF72 C5
IF73 B6
IF74 B8
IF75 B6
9F04
IF76 B8
IF77 B6
IF78 B8
IF79 C5
IF80 B8
IF81 B6
IF82 C4
IF86 C5
IF87 C2
IF88 D2
IF89 D5
IF90 D7
2
F
7
7
2
2
p
2
2
p
2F66
R
F
_
IO
4
T
U
N
IF11
IF
_
O
U
T
1
1
0
IF
_
O
U
T
2
1
1
13
14 15
16
1
2
N
C
3
R
F
_
A
G
C
1
1T01
TX31XX
TUNER
4
M
H
Z
_
R
E
F
9 2
B
+
_
L
N
A
B
+
_
T
U
N
8 5
I2
C
_
A
D
R
6
I2
C
_
S
C
L
I2
C
_
S
D
A
7
FF81
10n
2F71
6
8
0
n
5
F
6
6
1
K
0
3F72
B
A
5
9
1
6
F
7
2
8
2
0
n
5
F
7
4
2F64
10n
IF13
IF81
IF90
3F79-1
220R
1
1
0
0
n
2
F
9
3
3F75
47R
1
0
n
2
F
9
2
220R
3F80
3
F
8
2
8
2
0
R
220R
3F81
IF86
G
N
D
2
5
INPUT1 2
INPUT2 3
OUTPUT1 7
OUTPUT2 6
VAGC 4
V
C
C
1
UPC3221GV-E1
7F75
G
N
D
1
8
RES
IF74
30R
5F72
IF73
2
F
8
1
4
n
7
R
E
S
IF79
9
F
0
6
IF75
47R
3F76
IF14
FF76 10n
2F79
+5V-TUN
FF71
4
7
n
2
F
8
5
RES
2F91
10n
2F84
15p
2
F
6
5
1
5
p
IF16
10n
2F90
IF80
220R
3F79-4
4
1
p
0
2
F
8
2
FF01
9
F
0
2
3
K
3
3
F
7
8
1
0
n
R
E
S
+5V-TUN-PIN
2
F
9
4
9
F
0
1
2F78
10n
5
F
7
0
4
7
0
n
IF89
AF70
2
F
5
9
4
u
7
R
E
S
9F71
IF82
IF15
4
u
7
2F61
AF73
1
0
0
n
2
F
6
0
4K7
3F77
9
F
0
3
1
5
p
2
F
7
2
2
F
8
0
1
5
p
9
F
0
5
FF75
10n
2F74
9
F
0
0
+5V-TUN-PIN
15p
2F86
2
F
7
3
1
p
0
FF00
IF76
+
5
V
-T
U
N
-P
IN
4
K
7
3
F
7
1
5F73
ATB2012
2 3
1 4
IF78
1
2
4
5
36M17
1F75
X7251X
3
AF72
1
0
p
2
F
6
2
5
F
7
6
3
3
0
n
IF77
2
F
7
6
2
p
2
R
E
S
IF72
IF10
2
F
8
8
2
2
u
2F63
10n
5
F
7
1
6
8
0
n
PDTC114EU
7F70
IF87
IF12
IF88
2F75
10n
1
p
0
2
F
7
0
FF74
FF82
AF71
+5V-TUN-PIN
SELECT-SAW
IF-AGC
TUN-IF-N
TUN-IF-P
PNX-IF-P
PNX-IF-N
SDA-TUNER
SCL-TUNER
TUN-IF-N
TUN-P7
IF-AGC
IF+
IF-
PNX-IF-AGC
TUN-P6
TUN-P7
TUN-P1
TUN-IF-P
TUN-P6
Circuit Diagrams and PWB Layouts EN 109 Q552.1E LA 10.
2010-Feb-19
back to
div. table
Toshiba Supply
18770_506_100118.eps
100118
Toshiba Supply
B01G B01G
2009-10-22 3
8204 000 8994
TUNER, HDMI & CI
COM
OUT IN
D
A
C
D
1
5FA3 B2
5FA4 B3
A
FFA2 C2
FFAF B2
B
2FA2 C1
7FA3 B2
1 2 3
2 3
B
C
2FA3 C2
2FA4 C3
3
0
R
5
F
A
4
5
F
A
3
3
0
R
2
F
A
4
1
0
u
1
0
0
n
2
F
A
3
FFAF
1
3 2
FFA2
7FA3
LD1117DT12
+3V3
2
F
A
2
1
0
0
n
+1V2-BRA-DR1
+1V2-BRA-VDDC
Not yet implemented
EN 110 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
HDMI
18770_507_100118.eps
100118
HDMI
B01H B01H
2009-10-22 3
8204 000 8994
TUNER, HDMI & CI
3FBF-1 C4 3FBF-2 C4 FFB6 C2
4
4
A
B
FFB3 C2
C
1
FFB4 C2
2
FFB1 C2 FFB2 C2 FFB5 C1
HDMI CONNECTOR SIDE
1
A
2 3
B
3
FFB2
C
1P05 B1
2 7
DIN-5V
3FBF-2
47K
4
7
K
3
F
B
F
-
1
1
8
DIN-5V
DIN-5V
4
5
6
7
8
9
20 21
22 23
11
12
13
14
15
16
17
18
19
2
3
1P05
1
10
FFB1
FFB5
FFB6
FFB3
FFB4
DRX0+
DRX0-
DRX-DDC-SCL
DRX-DDC-SDA
DRX2+
DRXC+
DRXC-
PCEC-HDMI
DRX-DDC-SCL
DRX-DDC-SDA
DRX-HOTPLUG
DRX2-
DRX1+
DRX1-
Circuit Diagrams and PWB Layouts EN 111 Q552.1E LA 10.
2010-Feb-19
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div. table
VGA
18770_508_100118.eps
100118
VGA
B01I B01I
2009-10-22 3
8204 000 8994
TUNER, HDMI & CI
9FC6 D6
3FC3 C6
C
FFC3 C4
FFC4 C3
FFC6 D2
FFC7 D4
FFC8 D4
6FC2 B5
6FC3 C5
6FC4 C5
3FC7 C6
6FC1 B5
6
FFC5 C4
8
CONNECTOR
FFC1 A4
9FC1 D6
6FC6 E5
6FC7 E5
6FC8 F5
3FC5 A6
E
9FC3 E6
9FC4 E6
9FC5 C6
6FC5 D5
A
C
E
A
B
2FC7 E4
D
3FC1 D3
FFC2 B4
9FC2 E6
VGA
FFC9 E4
5 7
3FC2 E3
9
3FC4 D6
2
3FC6 B6
4 5 7
2FC5 D4
1FC5 D4
F
9
B
3
D
F
2FC4 C4
8
2FC6 E4
6 1
1FC6 F4
1E05 B2
4 2
3
1FC1 B4
1FC2 B4
1FC3 C4
1FC4 C4
1
2FC8 F4
2FC1 B4
2FC2 B4
2FC3 C4
9FC5
FFC3
2
F
C
1
1
0
0
p
2
F
C
2
1
0
0
p
RES
10K
3FC1
R
E
S
1
2
V
C
D
S
4
C
1
2
G
T
A
6
F
C
3
1
F
C
6
RES
3FC2
10K
3
F
C
4
4
K
7
2
F
C
6
4
7
p
RES
9FC2
1
F
C
1
FFC4
18R
3FC6
FFC1
7
8
9
16
17
11
12
13
14
15
2
3
4
5
6
1216-00D-15S-1EF
1
10
6
F
C
7
C
D
S
4
C
1
2
G
T
A
1
2
V
1E05
FFC8
FFC6
1
2
V
C
D
S
4
C
1
2
G
T
A
6
F
C
2
R
E
S
2
F
C
5
4
7
p
1
F
C
5
6
F
C
4
R
E
S
1
2
V
C
D
S
4
C
1
2
G
T
A
1
0
0
p
2
F
C
3
1
2
V 6
F
C
5
C
D
S
4
C
1
2
G
T
A
R
E
S
FFC7
4
7
p
2
F
C
4
2
F
C
8
4
7
p
1
F
C
2
RES
9FC4
FFC2
9FC3
9FC6
1
F
C
3
3FC7
18R
1
2
V
C
D
S
4
C
1
2
G
T
A
6
F
C
6
4
K
7
3
F
C
3
4
7
p
2
F
C
7
1
2
V
C
D
S
4
C
1
2
G
T
A
6
F
C
8
1
F
C
4
FFC5
1
2
V
C
D
S
4
C
1
2
G
T
A
6
F
C
1
R
E
S
9FC1
FFC9
3FC5
18R
VGA-SCL-EDID
VGA-SDA-EDID
VGA-SDA-EDID-HDMI
VGA-SCL-EDID-HDMI
+5V-VGA
R-VGA
G-VGA
B-VGA
H-SYNC-VGA
V-SYNC-VGA
EN 112 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Temp Sensor + Headphone
18770_509_100118.eps
100118
Temp Sensor + Headphone
B01J B01J
2009-10-22 3
8204 000 8994
TUNER, HDMI & CI
C
3 4 5 7
2 3 4
2FD1 A4
2FDC D5
8 9
A
B
C
1 2
E
A
B
7FD1 B3
1328 D6
1329 C6
1FD2 D4
1FD3 D5
6FD1 B3
6FD2 D4
IFD2 B3
IFD3 B4
2FDD D5
3FD1 A3
IFD4 B3
IFD5 B4
3FDG-2 D4
3FD3 B3
6
3FD6 C4
3FD7 C4
3FDG-1 D4
1
9FD1 A4
9FD2 A4
9FD5 C5
IFD1 B4
5 6 7 8
D
E
3FD4 B2
6FD3 D5
9
FFDA D5
FFDB D5
FFDC D6
D
IFD4
3FD2 B5
1
F
D
3
IFD5
2
F
D
1
1
2
V
C
D
S
4
C
1
2
G
T
A
6
F
D
2
1
0
0
n
3
F
D
2
1
K
0 R
E
S
9
F
D
5
9
F
D
1
9
F
D
2
FFDB
FFDA
6
F
D
3
C
D
S
4
C
1
2
G
T
A
1
2
V
IFD2
RES
1
K
0
3
F
D
1
1
K
0
2
7
R
E
S
3
F
D
G
-2
1
K
0
3
F
D
6
IFD3
1
n
0
2
F
D
D
IFD1
1
F
D
2
1
8
+3V3
FFDC
1
K
0
3
F
D
G
-1
6
F
D
1
L
T
S
T
-C
1
9
0
K
G
K
T
1328
MSJ-035-29D PPO (PHT)
2
1
3
RES
A2
5
4
G
N
D
OS
3
SCL
2
SDA
1
7FD1
+
V
S
8
A0
7
6
A1
LM75BDP
2
F
D
C
1
n
0
R
E
S
3
F
D
71
K
0
3FD3
100R
5
3FD4
100R
1
2
3
4
AMP1
AMP2
502382-0370
1329
SDA-SSB
SCL-SSB
Circuit Diagrams and PWB Layouts EN 113 Q552.1E LA 10.
2010-Feb-19
back to
div. table
Tuner Brazil
18770_510_100118.eps
100118
Tuner Brazil
B01K B01K
2009-10-22 3
8204 000 8994
TUNER, HDMI & CI
OUT IN
INH BP
COM
X
XSEL
ADI_AI
ADQ_AI
AD_VREF
TSMD
TN
SLADRS
VSS
D
R
2
V
D
D
D
R
1
V
D
D VDDS
A
D
_
D
V
D
D
A
D
_
A
V
D
D
P
L
L
V
D
D
VDDC
PBVAL
RERR
RLOCK
RSEORF
SBYTE
SLOCK
SRCK
SRDT
STSFLG1
AGCCNTI
AGCCNTR
STSFLG0
SYRSTN
0
1
SCL
SDA
FIL
A
D
_
A
V
S
S
A
D
_
D
V
S
S
P
L
L
V
S
S
I
O
0
1
P
N
P
N
P
N
AD_VREF
DTCLK
DTMB
S_INFO
0
1
AGCI
CKI
SCL
SDA
BFE5 E4
7FE3 C11
9F28 E8
2FH6 E3
7FE0 D4
3FE8 F3
3FE9 F3
3FG2-1 F6
5FE4 B7
IF18 D4
IF27 E7
3FG6-3 E7
3FG6-4 D7
5FE0 A3
FF03 C12
IF17 D4
IF67 B4
IF68 B5
IF48 C12
IF49 F4
DFF1 E6
IF65 B4
IF66 B5
DFF2 F6
2FG6 D3
2FG7 E3
2FG8 E3
IF29 F4
5FE9 C11
5FG0 E11
IF64 A5
BFE4 E4
2FH8 E7
DFE6 D6
DFE7 D6
BFE1 E4
2FH7 E3
BFE3 E4
5FG2 E11
BFE2 E4
2FF1 A7
2FF2 B6
2FF3 B6
3FG2-2 F7
2FF9 C7
2FG0 C6
5FE3 B3
5FE5 B3
5FE7 C11
IF28 E7
3FG7 E7
IF69 C6
IF63 A4
2FG1 C7
2FG2 C1
2FG3 C2
2FG4 D3
2FG9 E3
9F27-1 E8
9F27-4 D8
2FH5 D6
2FE4 A6
3FE5 E7
3FE6 F3
DFE8 D6
2FE5 A6
2FE6 B3
2FE8 C3
2FF0 A6
2FF4 B6
3FG4-1 F7
DFE9 E6
3FG6-2 E7
2FF8 C6
5FE8 C7
B
D
B
2FH2 D11
9F27-2 D8
2FH4 D12
1 2
3FE7 F3
12 6
7 3
2FF5 B6
3FG4-2 F6
2FF7 C6
11 13
A
C
9 10
G
H
A
2FE3 A6
F
H
2FH3 D12
G
1FE0 C2
D
E E
F
10 11 4 5
C
8 9
6 1 2
3
4 5
7
2FF6 B7
13
9F27-2 2 7
12 8
2FE0 A3
1
8
p
9F27-4 4 5
2
F
G
3
LD3985M25
7FE3
4
2
1
3
5
IF29
3FG4-2
4K7
2
F
H
3
1
0
n
30R
5FE8
AGND
5FE3
30R
100n 2FG8
2FH5
FF03
1n5
IF63
2
F
H
2
1
u
0
IF17
BFE2
BFE4
AGND
9F28
AGND
AGND
1
0
0
n
2
F
E
3
IF68
IF65
IF64
IF67
1
0
0
n
2
F
G
0
10K 3FE6
1
0
0
n
2
F
F
3
10K
2
F
E
4
1
0
0
n
2 7
3FG2-1
2
F
F
7
3FG6-2 33R
1
0
0
n
2
F
F
1
1
u
0
2FH6 100n
18K
3FE5
DFE9
DFE7
30R
5FG2
2
F
F
2
1
0
0
n
2
F
E
0
1
u
0
2
F
F
0
1
0
0
n
BFE1
2FG4 10n
2
F
F
8
1
0
0
n
2
F
F
9
1
u
0
AGND
3FE9 100R
100R 3FE8
1 8
AGND
9F27-1
IF49
30R
5FE4
AGND
DFF1
2 4
1 3
1
0
0
n
2
F
F
5
1FE0
25M4
BFE5
BFE3
2FG7 100n
IF69
AGND
3FE7 10K
IF66
1
u
0
2
F
G
1
2
F
H
8
1
0
n
IF18
30R
5FE9
IF28
5
7
6
2
19
18
3
2
1
3
3
5
4
9
6
4
4
1
5
3
3
3
7
4
4
4
7
5
0
42
8
12
14
1
41
1
6
3
6
5
6
6
3
55
59
45
46
6
5
52
61
60
51
38
3
4
4
8
4
3
39
40
21
58
2
0
1
7
53
54
2
3
3
2
3
1
26
25
24
9
10
7
11

TC90517FG
7FE0
29
30
27
28
2
2
AGND
10K
3FG2-2
3FG6-3 33R 3 6
4 5 3FG6-4 33R
1
u
0
2
F
E
8
AGND
10n 2FG6
100n 2FH7
30R
5FE0
1
u
0
2
F
H
4
3FG7 33R
IF48
1
u
0
2
F
F
6
IF27
DFF2
DFE6
4K7
3FG4-1
30R
5FE5
AGND
1
8
p
2
F
G
2
AGND
2
F
E
6
1
u
0
30R
5FG0
100n 2FG9
30R
DFE8
5FE7
1
0
0
n
2
F
E
5
2
F
F
4
1
0
0
n
TS-DVBS-DATA
TS-DVBS-VALID
TS-FE-SOP
TS-DVBS-SOP
TS-FE-CLOCK
TS-DVBS-CLOCK
+1V2-BRA-VDDC
+1V2-BRA-DR1
+3V3-BRA-FLT +
3
V
3
-B
R
A
-F
L
T
+3V3-BRA-FLT
+3V3-BRA-FLT
RESET-SYSTEMn
IF+
+2V5-BRA +5V
+3V3 +3V3-BRA
+2V5-BRA
+3V3-BRA
+2V5-BRA
SCL-SSB
SDA-SSB
IF-
TS-FE-DATA
IF-AGC
TS-FE-VALID
Not yet implemented
EN 114 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-12 B02 820400089506 PNX85500
PNX NandFlash - Conditional Access
18770_511_100118.eps
100218
PNX NandFlash - Conditional Access
B02A B02A
2009-12-07 6
8204 000 8950
PNX85500
MDI
MCLK
MDO
TNR_SER1
VS
CD
CA
DATA
ERR
MICLK
MIVAL
SOP
0
1
2
3
4
5
6
7
1
2
1
2
VPPEN
0
1
2
3
4
5
6
7
ADD_EN
DATA_DIR
DATA_EN
I
O
MISTRT
MIVAL
MOSTRT
MOVAL
OOB_EN
RDY
RST
VCCEN
NAND
XIO_A
XIO_D
XIO
NAND
07
08
09
10
11
12
13
14
15
OE_
WE_
CLK_BURST
WP_
RDY1
RDY2
CE2_
CE1_
00
01
02
03
04
05
06
CLE
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
ALE
3 4 5 6 7
1
G
3S02-4 E3
3S01-1 E2
3S01-2 E3
3S01-3 E2
3S01-4 E3
3S02-1 E3
14
1 2 1 0 1 8
*
13 14
G
2 3 4 5 6
H
3S02-2 E2
3S02-3 E2
7 8 9 10 11 12 13
A
B
C
D
E
2 9 11
F
H
A
B
C
D
F
3S1S G7
3S03 F3
3S04-1 F3
3S04-2 F3
3S15 B6
3S1R F7
3S1T G7
3S29 H7
7S00-11 E3
7S00-5 A4
9S00 F5
9S08 C5
IS00 C5
E
IS25 C3
IS26 B6
3S1U G7
3S23 G7
3S24 G7
3S28 G7
IS26
10K
3S15
470R
3S23
RES
J23
J24
K23
K24
T21
T23
T22
R23
R22
M24
M25
M26
L21
N24
N25
L22
L23
J21
L24
L26
P22
P23
P24
P25
P26
N21
N22
N26
M21
M22
M23
J22
K21
K22
K25
K26
N23
L25
P21
7S00-11
PNX85500
VIDEO_STREAM
3S02-3
3 6
33R
33R
3S01-2 2 7
+3V3
3S1R
560R
560R
3S1S
3S1T
560R
1 8
3S04-1
33R
560R
3S1U
3S29
470R
RES
470R
3S28
9S00
1 8
33R
3S01-1
10R
2 7
3S03
4 5
33R
3S04-2
3S02-4
33R
E23
E24
E25
E26
D24
B22
C22
D25
D26
C24
D23
C23
B23
A22
E22
F24
F25
F26
H24
H25
H26
G21
G22
G23
G24
G25
G26
F22
F23
D21
C21
F21
A20
A21
J25
J26
H21
H22
H23
7S00-5
PNX85500
FLASH
B21
D22
E21
7 3S02-2
33R
2
IS00
9S08
1 8 3S02-1
33R
RES
3S24
470R
3 6
33R
3S01-3
IS25
1X06
EMC HOLE
4 5 3S01-4
33R
TS-FE-ERR
CA-CD1n
TS-FE-DATA
TS-FE-CLOCK
INPACK
TS-FE-VALID
TS-FE-SOP
TS-FE-SOP
TS-FE-VALID
TS-FE-CLOCK
TS-FE-DATA
INPACK
CA-MDI3
CA-MDI4
CA-MDI5
CA-MDI6
CA-MDI7
CA-MISTRT
CA-MIVAL
CA-MOCLK
CA-DATAENn
CA-DATADIR
CA-ADDENn
CA-RDY
CA-RST
NAND-ALE
NAND-CE1n
NAND-CLE
NAND-RDY1n
TS-FE-DATA
NAND-WPn
XIO-A07
XIO-A06
XIO-A05
XIO-A04
XIO-A03
XIO-A02
XIO-A01
XIO-A00
CA-VS1n
CA-CD2n
TS-FE-VALID
TS-FE-SOP
TS-FE-CLOCK
CA-MOVAL
CA-MOSTRT
CA-MDO7
CA-MDO6
CA-MDO5
CA-MDO4
CA-MDO3
CA-MDO2
CA-MDO1
CA-MDO0 CA-MDI0
CA-MDI1
CA-MDI2
XIO-D10
XIO-D09
XIO-D08
XIO-D07
XIO-D06
XIO-D04
XIO-D03
XIO-D02
XIO-D01
XIO-D00
XIO-A15
XIO-A13
XIO-A14
XIO-A12
XIO-A11
XIO-A10
XIO-A09
XIO-A08
CA-MOCLK
XIO-D05
CA-MICLK
XIO-WEn
XIO-OEn
XIO-D15
XIO-D14
XIO-D11
Circuit Diagrams and PWB Layouts EN 115 Q552.1E LA 10.
2010-Feb-19
back to
div. table
PNX SDRAM
18770_512_100118.eps
100118
PNX SDRAM
B02B B02B
2009-12-07 6
8204 000 8950
PNX85500
1
3
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
0
1
RASB
CASB
CKE
CSB
ODT
PCAL
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
N
P
N
P
30
31
0
1
2
2
DM
DQ
BA
A
CLK
DQS0
N
P
DQS1
N
P
DQS2
N
P
DQS3
VREF
M0
WEB
2
3S6P E10
3S6Q E10
7S00-8 B6
FS01 D3
FS02 D2
IS42 E8
2S24 E7
2S25 E7
3S06 D3
3S07 D3
3S0V F8
3S20 D2
3S22 D2
3S30 C7
3S33 C8
8 9 10 11
A
B
C
D
E
A
B
11
1 2 3 4 5 6
1 2 3 4 5 6 7 8 9
F
7
C
D
E
F
2S12 D4
2S17 E7
2S20 E7
10
2
S
1
2
1
0
0
u
2
.0
V
3
S
2
2
1
8
0
R
1
%
3
S
0
V
2
6
1
R
FS02
1
%
3S33
10R
1
%
1
8
0
R
3
S
0
7
DDR2-VREF-CTRL2
2
S
2
5
1
0
0
p
M1
M5
A2
V1
H3
B2
E2
E3
D3
D4
R1
R2
T3
T4
M4
P5
N3
V3
C3
R4
V5
B4
F1
C1
E1
F4
P2
U2
P3
F2
N1
U1
P1
T1
V4
R5
U5
T5
F3
C2
E5
C5
A4
G5
B3
F5
U3
H1
H2
G1
K3
K4
N5
N4
L5
D1
D5
R3
J4
M2
K5
K1
G4
L3
G3
L2
H5
L1
J5
MEMORY J1
J3
J2
M3
7S00-8
PNX85500
3
S
2
01
%
1
8
0
R
2
S
1
7
1
0
0
n
10R
3S30
DDR2-VREF-CTRL3
IS42
3S6Q
10K
+1V8
2
S
2
4
1
0
0
p
10K
3S6P
DDR2-VREF-CTRL2
FS01
3
S
0
6
1
8
0
R
1
%
2
S
2
0
1
0
0
n
DDR2-VREF-CTRL3
DDR2-CLK_N
DDR2-CLK_P
DDR2-ODT
DDR2-A10
DDR2-A11
DDR2-A12
DDR2-A0
DDR2-CKE
DDR2-DQS0_N
DDR2-DQS0_P
DDR2-A1
DDR2-A2
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-A9
DDR2-CKE
DDR2-CS
DDR2-CAS
DDR2-DQS3_N
DDR2-DQS3_P
DDR2-DQS2_N
DDR2-DQS2_P
DDR2-DQS1_N
DDR2-DQS1_P
DDR2-D11
DDR2-D10
DDR2-D1
DDR2-D0
DDR2-BA1
DDR2-BA0
DDR2-A14
DDR2-A13
DDR2-ODT
DDR2-WE
DDR2-RAS
DDR2-D2
DDR2-D18
DDR2-D19
DDR2-D17
DDR2-D16
DDR2-D15
DDR2-D14
DDR2-D13
DDR2-D12
DDR2-D25
DDR2-D26
DDR2-D30
DDR2-D24
DDR2-D21
DDR2-D20
DDR2-D23
DDR2-D22
DDR2-D7
DDR2-D6
DDR2-D5
DDR2-D4
DDR2-D29
DDR2-D27
DDR2-D3
DDR2-D31
DDR2-D28
DDR2-BA2
DDR2-DQM3
DDR2-DQM2
DDR2-DQM1
DDR2-DQM0
DDR2-D9
DDR2-D8
EN 116 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
PNX Digital Video In
18770_513_100118.eps
100118
PNX Digital Video In
B02C B02C
2009-12-07 6
8204 000 8950
PNX85500
RX0_A
RX1_A
P
N
RX2_A
RXC_A
P
N
DDC_A
P
N
P
N
HOT_PLUG_A
SDA
SCL
RREF
A
IS10 E7
7 11 12 13 14
14
3 4 5 6
9
D
E
F
G
H
8 9 10
10 11 12 13
IS01 E6
1 2
5 6 7 8
D
E
F
G
H
B
C
I
2S2E F5
3S0W E5
7S00-6 D6
RES
1 2 3 4
I
A
B
C
2
S
2
E
1
0
u
12K
3S0W
IS10
+3V3
V26
V25
W26
W25
Y26
Y25
T24
W24
T26
T25
U26
U25
HDMI_DV
PNX85500
7S00-6
IS01
DDCA-SCL
DDCA-SDA
HDMIA-RX0+
HDMIA-RX0-
HDMIA-RX1+
HDMIA-RX1-
HDMIA-RX2+
HDMIA-RX2-
HDMIA-RXC-
HDMIA-RXC+
Circuit Diagrams and PWB Layouts EN 117 Q552.1E LA 10.
2010-Feb-19
back to
div. table
PNX Audio
18770_514_100118.eps
100118
PNX Audio
B02D B02D
2009-12-07 6
8204 000 8950
PNX85500
OUT IN
INH BP
COM
&
&
AIN1
L
R
AIN2
L
R
AIN3
L
R
AIN4
L
R
AIN5
VR_AADC
ADAC
ADACL
P
N
ADACR
I2S_OUT
I2S_OUT_SD
SPDIF_OUT
POS
NEG
VREF_AADC
VCOM_AADC
SPDIF_IN1
4
3
2
1
2
N
P
1
3
4
5
6
WS
SCK
OSCLK
L
R
&
&
2S2K F12
2S2L D4
6 11 12
F
10
2S36 C6
13
G
H
9
3 4 5 2
2S3Q G5
2S41 C6
2S42 C6
3S0Z A11
2S2R B7
2S2S B9
2S2T B8
2S2V B3
2S2WB3
C
D
H
7 8
I
2S2G C12
2S2H D12
2S2J G12
9
3S17-3 C3
3S17-4 C3
3S18-1 G7
3S18-2 G8
2S38 E9
2S39 E9
2S3A E8
2S3B E8
2S3C E8
10 11 12 2 14
1
2S3M H9
3S51 C6
3S53-1 A6
3S53-2 B6
3S53-3 B6
3S10 D4
3S11 F5
3S12-1 B2
3S12-2 B2
3S12-3 B2
2S2Y C3
2S2Z B3
2S30 C3
E
F
G
I
A
B
C
D
E
3S16-2 B3
3S16-3 B3
3S16-4 C3
3S17-2 D3
IS06 G11
IS07 E11
3S18-3 G8
3S19 H5
3S25 H9
3S32 G12
3S34 G11
2S3D E8
2S3E E3
2S3F E2
13
8 7 6 5 4 3 1
3S3G-2 D8
3S3G-3 C8
3S3G-4 D7
2S3L H8
3S3U D8
7S05-4 B12
7S08 B8
7S09-1 G6
7S09-2 H6
3S53-4 B6
3S6L F12
3S6M H8
7S00-2 C5
7S05-1 E12
3S12-4 C2
3S13-1 C2
3S13-2 D2
2S31 C3
3S17-1 C3
3S37 F11
3S38 B13
IS0R C2
IS0V C2
IS12 B8
IS13 B9
IS19 D3
3S36-1 C12
3S36-2 B11
3S36-3 D11
2S3G E3
14
A
B
3S3F E4
3S3G-1 C7
IS1N C7
IS1S D7
IS44 H9
3S3H D7
7S05-3 C12
IS1B D4
IS1D G5
7S05-2 G12
7S09-3 H7
7S09-4 I7
9S06 E4
DBS8 E4
FS03 B12
FS08 B7
IS02 B11
IS03 C11
3S13-3 C2
2S32 D3
2S33 C3
2S34 B9
IS1E H5
IS1G G7
IS1K H9
IS1L F5
IS1A D3
3S39 C13
3S36-4 D12
2S3H E3
2S3J B11
2S3K G6
3S13-4 C2
3S14 B9
3S16-1 B3
IS0R
+2V5-AUDIO
+3V3-ARC
1
n
0
2
S
3
D
3S53-2
100R
4 5
10K
3S16-4
1
n
0
2
S
3
C
22K
3S12-2 2
7
DBS8
IS1A
100R
3S10
3 6
IS1B
1
8
3S16-3
10K
3S12-1
22K
LM324
7S05-4 12
13
14
4
11
+24V-AUDIO-VDD
IS13
2
S
3
4
1
0
0
n
4
R
7
IS03
3
S
5
1
2
S
3
A
1
n
0
IS19
1
0
0
n
2
S
3
Q
2S31
1u0
3S13-1
22K 1 8
3S53-3
3S11
100R
1R0
5
6
7
4
11
+3V3-ARC
+3V3
LM324
7S05-2
3S17-2
10K
2
7
22K
3S14
3S3U
33R
IS0V
3S6M
180R
FS08
100n
2S3K
2
S
3
G
1
0
0
n
+3V3
6
3S3G-3
33R
3
1
u
0
2
S
4
2
3S53-1
2S2V
1u0
IS1N
100R
1
0
u
2
S
3
H
+3V3
1u0
2S2W
22K
3S32
10
9
8
4
11
LM324
7S05-3
1u0
2S2Y
1
n
0
2
S
3
8
+24V-AUDIO-POWER
2S2K
47p
2S32
2 7
1u0
3S3G-2
33R
3S3H
33R
2
S
3
E
1
0
0
n
FS03
IS1E
2
2
0
R
3
S
1
8
-3
3
6
2
1
3
5
LD3985M25
7S08
4
3S0Z
8
IS1D
4R7
10K
3S17-1
1
IS06
3S36-1
10K
1 8
3S17-4 4 5
IS12
10K
IS44
2
S
2
S
1
0
u
+24V-AUDIO-VDD
R
E
S
22K
3S6L 3S37
10K
3S3F
56R
4 5
10K
3S17-3
3
6
22K
3S12-4
+3V3
6
8
R
3
S
2
5
1
0
u
2
S
3
F
2S2L
1u0
2S33
1
0
K
3
S
1
9
1u0
3 6 3S12-3
22K
8
2
S
3
J
2
2
0
n
3S16-1
10K
1
2S2Z
1u0
IS1L
47p
2S2J
2
S
2
T
47p
2S2H
1
0
0
n
10K
3S16-2
2
7
3
S
1
8
-2
2
2
0
R
2
7
+3V3-ARC
7S09-1
74LVC00APW
1
2
7
1
4
3
4 5
IS02
22K
3S13-4
2
S
4
1
1
0
0
u
4
V
11
12
13
7
1
4
74LVC00APW
7S09-4
3
2
1
4
11
LM324
7S05-1
2S36
1u0
IS1S
7
1
4
6
100n
2S3M
74LVC00APW
7S09-2
4
5
+24V-AUDIO-VDD
1
n
0
2
S
3
9
3S3G-1
33R
1 8
+3V3-ARC
3S18-1
220R
1 8 IS1G
AB9
2S2G
47p
AE1
AF2
AE3
AF3
AD2
AE5
AF5
AC8
AD8
AB8
AF10
AD10
AC10
AE9
AF9
AD9
AC9
AF8
4 D A 8 E A
AD1
AD7
AE7
AF7
AD6
AE6
AF6
AB7
AC7
AB6
AC6
AE10
5
PNX85500
7S00-2
AUDIO
3S3G-4
33R
4
3S34
10K
3S39
100R
3 6 3S36-3
10K
IS1K
+2V5
9
S
0
6
10K
3S36-2 2 7
7S09-3
74LVC00APW
9
10
7
1
4
8
6
IS07 2
S
3
B
1
n
0
3S13-3
22K
3
+3V3
+24V-AUDIO-VDD
2S30
1u0
3S38
100R
2
7
2S3L
100n
22K
3S13-2
+3V3
3S53-4
100R
4 5
2
S
2
R
1
0
u
10K
3S36-4
AUDIO-OUT-L
AUDIO-OUT-R
SPDIF-OUT-PNX
+AUDIO-L
-AUDIO-R
AUDIO-IN1-L
AUDIO-IN1-R
ADAC(2)
ADAC(3)
ADAC(1)
ADAC(4)
SPDIF-OUT
eHDMI+ SEL-HDMI-ARC
ADAC(1)
ADAC(2)
ADAC(5)
AUDIO-IN4-L
AUDIO-IN4-R
AUDIO-IN3-L
AUDIO-IN3-R
AUDIO-IN2-L
AUDIO-IN2-R
ADAC(5)
ADAC(6)
ADAC(6)
SPDIF-OUT-PNX
EN 118 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
PNX Mips
18770_515_100118.eps
100118
PNX Mips
B02E B02E
2009-12-07 6
8204 000 8950
PNX85500
USB
1
2
3
4
RREF
DP
DN
CLK_54_OUT
BL_PWM
RESET_SYS
TDI
TDO
TCK
TMS
TRSTN
SCL
SDA
SCL
SDA
SCL
SDA
SCL
SDA
ETH RXD
SDIO
DAT
ETH
TXD
TXCLK
0
1
2
3
TXEN
TXER
COL
CRS
MDC
MDIO
0
1
2
SDCD
SDWP
RXCLK
0
1
2
3
RXDV
RXER
CC_DAT3
CLK
CMD
-BUS
CTRL FIL
I 2 C INP
3S64 C1
DS52 B2
FS10 B2
FS11 B2
FS2W F9
FS2Y F9
3S65 E11
3S66 E11
3S67 E11
3S68 E11
3S69 A9
A
B
12 13
USE ONLY
3S61 B6
3S62 B1
9S13 F8
IS04 B2
IS05 A2
IS08 F8
IS09 F8
IS40 C6
7 8
FOR FACTORY
RES
3S82 B1
3S83 C1
7S01 E8
9S10 F8
9S11 F8
9S12 F8
9
H
1F10 A12
G
H
A
B
C
D
FS44 A12
FS49 A12
FS50 A12
FS51 B12
FS52 B12
FS53 B12
FS57 B12
FS64 C2
3S6H-3 B9
3S6H-4 B9
3S6J C5
3S6K B9
3S72 C6
1 2 3
IS4Z B4
IS50 G12
3S84 C1
7S00-3 A4
7S00-4 G12
3S56 A5
3S57 A6
3S58 A5
3S5W B6
3S5Y B5
10
C
D
E
F
3 4 5 6 7 8
E
F
G
FS31 F8
3S6B A9
3S6C B8
3S6D B9
3S6E B8
3S6F B9
3S6G B8
3S6H-1 B8
3S6H-2 B9
4 5 6
3S80 B1
3S81 B1
14
2S89 D8
3S00 B5
3S21 B1
3S26 C5
3S27 C6
3S40 A1
3S45 A1
3S55 C3
11 12 13 14
1 2 9 10 11
3S5Z B6
3S60 B5
3S6A A8
IS08
+3V3-STANDBY
FS51
+3V3
+3V3
10K
3S84
3S83
10K
10K
3S82 RES
+3V3
3S45
10K
3S6C 4K7
3S67
4K7
1 2
3S64
10K
3S66
4K7
1 2
AB26
AA24
AA25
R26
R25
R24
C26
A25
A24
A23
C25
B26
B25
B24
AA23
AB25
GPIO_10
U23
GPIO_11
Y23
GPIO_2
Y24
GPIO_3
W21
GPIO_4
W22
GPIO_5
W23
GPIO_6
V22
GPIO_7
AE4
PNX85500
7S00-3
CONTROL
AD5
AC5
Y21
GPIO_0
Y22
GPIO_1
V23
IS05
2S89
FS2Y
100n
IS50
1 2 3S58
100R
1 2
FS31
3S5Z
100R
3S00
33R
4K7
3S69
+3V3
3
S
5
5
5
K
6
FS2W
9S12
1 2 3S57
100R
FS44
FS64
3S6A 4K7
10K
3S6H-3 3 6
2 3S56
100R
1
3S6B
3S40
10K
4K7
10K
3S62
3
S
2
7
1
0
K
FS53
3
S
6
J
1
0
K
10K
3S80
+3V3
3S81
10K
1 2
IS40
3S61
100R
3S5Y
100R
1 2
1 2
3S65
4K7
+3V3
FS10
2K2 3S6D
V6
AB2
AA5
AB3 W2
W1
W6
W5
W4
W3
U6
AA3
Y5
Y6
AB4
AC1
AC2
Y4
AA2
AA1
AA4
AB1
PNX85500
7S00-4
ETHERNET
AC3
Y2
Y3
Y1
1 2
+3V3
3S68
4K7
1 2
+3V3
+3V3
3S60
100R
3
4
5
6
7
8
9 10
+3V3
1F10
BM08B-SRSS-TBT
1
2
FS57
IS4Z
+3V3
10K
1
0
K
3
S
2
6
3S6K
FS11
DS52
1 2
+3V3
3S5W
100R
4K7 3S6F
+3V3 IS04
IS09
3S6E 2K2
3S6G 4K7
9S13
3S21
10K 1 8
VSS
3S6H-1
10K
5 SC0
8 SC1
4 L C S 1 SD0
7 SD1 2 SDA
3
VDD
6
7S01
PCA9540B
10K
3S6H-4 4 5
3S6H-2
10K
2 7
+3V3
3S72
47R
9S11
FS49
+3V3
FS52
9S10
+3V3
FS50
BACKLIGHT-PWM
TXD2-MIPS
RXD2-MIPS
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500
EJTAG-TCK-PNX85500
BOOST-PWM
RXD1-MIPS
TXD1-MIPS
PXCLK54
USB-DM
GPIO1 GPIO1
BOOTMODE
BOOTMODE
SELECT-SAW
SELECT-SAW
PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
SCL-BL
SCL-DISP
SDA-SET
SDA-DISP
SDA-BL
RESET-SYSTEMn
EJTAG-TMS-PNX85500
EJTAG-TRSTn-PNX85500
EJTAG-TCK-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500
EJTAG-DETECTn
EJTAG-TRSTn-PNX85500
EJTAG-TMS-PNX85500
SDA-TUNER
SCL-TUNER
SCL-DISP
SCL-BL
SCL-SET SDA-DISP
SDA-BL SDA-SET
SCL-DISP
SCL-BL
SDA-DISP
SDA-BL
SCL-SET
ETH-CRS
ETH-MDC
ETH-TXER
ETH-COL
SDA-UP-MIPS
SCL-UP-MIPS
SDA-SET
SCL-SET
SDA-SSB
SCL-SSB
SDA-TUNER
SCL-TUNER
SDA-UP-MIPS
SCL-UP-MIPS
SDA-SET
SCL-SET
SDA-SSB
SCL-SSB
ETH-RXD(3)
ETH-RXDV
ETH-RXER
SDIO-DAT3
SDIO-CLK
SDIO-CMD
SDIO-DAT0
SDIO-DAT1
SDIO-DAT2
SDIO-CDn
SDIO-WP
ETH-TXCLK
ETH-TXD(0)
ETH-TXD(1)
ETH-TXD(2)
ETH-TXD(3)
ETH-TXEN
BOOST-PWM
RXD1-MIPS
TXD1-MIPS
RXD2-MIPS
TXD2-MIPS
PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
EJTAG-TCK-PNX85500
EJTAG-TDI-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TMS-PNX85500
EJTAG-TRSTn-PNX85500
USB-DP
ETH-MDIO
ETH-RXCLK
ETH-RXD(0)
ETH-RXD(1)
ETH-RXD(2)
Circuit Diagrams and PWB Layouts EN 119 Q552.1E LA 10.
2010-Feb-19
back to
div. table
PNX Video Out - LVDS
18770_516_100118.eps
100118
PNX Video Out - LVDS
B02F B02F
2009-12-07 6
8204 000 8950
PNX85500
LOUT1
A
N
P
B
CLK
N
P
C
N
P
D
N
P
E
LOUT2
N
P
A
N
P
B
N
P
CLK
N
P
C
N
P
D
N
P
E
LOUT3
A
N
P
B
CLK
N
P
C
N
P
D
N
P
E
N
P
N
P
LOUT4
A
N
P
B
CLK
N
P
C
N
P
D
N
P
E
N
P
N
P
N
P
N
P
7S00-7 C8
D
G
A
2
F
3 9 1
D
4
13
E
14
C
B
9 12 2
10
F
13
6
5 1 7
G
12 11
B
A
6 11 14
5 8 7
8
C
10
E
4
3
D19
D14
E14
E15
D15
E17
D17
D16
E16
D18
E18
E19
E7
E8
D8
E10
D10
D9
E9
D11
E11
E12
D12
B15
C17
B17
A16
B16
A18
B18
C19
B19
D7
C10
B10
A9
B9
A11
B11
C12
B12
A14
B14
C15
PNX85500
7S00-7
LVDS A7
B7
C8
B8
PX1A-
PX1D+
PX1D-
PX1CLK+
PX1CLK-
PX1C+
PX1C-
PX1B+
PX1B-
PX1A+
PX2CLK+
PX2CLK-
PX2C+
PX2C-
PX2B+
PX2B-
PX2A+
PX2A-
PX1E+
PX1E-
PX3C-
PX3B+
PX3B-
PX3A+
PX3A-
PX2E+
PX2E-
PX2D+
PX2D-
PX4A+
PX4A-
PX3E+
PX3E-
PX3D+
PX3D-
PX3CLK+
PX3CLK-
PX3C+
PX4E+
PX4E-
PX4D+
PX4D-
PX4CLK+
PX4CLK-
PX4C+
PX4C-
PX4B+
PX4B-
EN 120 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
PNX Stand-by Controller
18770_517_100118.eps
100118
PNX Stand-by Controller
B02G B02G
2009-12-07 6
8204 000 8950
PNX85500
MC
PWM
SPI
P0
P1
P2
P3
P5
P6
3
4
5
0
1
2
3
4
5
V
D
D
_
X
T
A
L
V
D
D
A
_
A
D
C
2
V
5
V
D
D
A
_
1
V
1
_
D
C
S
0
1
2
3
7
0
1
2
3
4
5
6
7
0
1
2
7
V
S
S
_
X
T
A
L
XTAL_IN
XTAL_OUT
RESET_IN
EA
ALE
PSEN
SDA
SCL
0
1
SDO
SDI
CLK
CSB
0
1
2
3
4
5
6
2 3
C
5
3S2H D7
D
E
F
G
7
1
2S13 B6
3S41 D12
3S42 C11
2S4E E2
H
A
B
3S43 C11
2S4F B9
2 3 4
3S1C C1
2S37 B5
2S4D C3
13
1
3S2F D7
3S2G D7
3S2A D2
3S2K D7
4 5 6
3S2V F11
E
F
G
H
C
D
2S11 B5
B
3S3Y D9
3S44 C11
2S4G B9
2S4K G10
3S1B C2
3S6V C11
6 7 8 9 12
3S1L E2
FS0Z G11
FS45 G9
IS20 B6
IS2U G10
3S2L D10
3S2M E10
3S2S E10
8 9 10 11
1S02 B8
2S10 B6
A
3S3T D1
IS3F C10
3S6WD12
3S46 D10
3S47 E10
3S49 E10
9S0D G9
3S1D C2
3S1E C1
3S1F C2
3S1G D2
10 11
3S1K D1
DS50 B8
5S04 B6
7S00-9 B6
3S1P D11
3S3Q C2
3S3L C2
3S3M C1
3S3N C2
3S3P C1
12 13
IS2V D7
IS2Z D7
IS3B A6
7S20 G10
3S3W E9
3S3R D2
3S3S D1
9S0E G9
9S24 B6
3S1H D1
3S1J D2
IS3D C10
IS3E C10
10p
2S4G
RES 3S47
10K
10K
3S3P
100R 3S2K
+3V3-STANDBY
3S2S
RES
10K RES
10K
3S2A
RES 3S3N
10K
2S4E
100n
10K
3S1L
10K
3S1C RES
10K
3S44
IS3B
R
E
S
9
S
0
D
3S42 10K
3S2H 100R
10K
3S3Y RES
100R 3S2G
9
S
0
E
2S4D
1n0
RES 3S3S
10K
IS3D
DS50
1
+
1
V
1
+3V3-STANDBY
3
3S2L RES
10K
5
4
M
1
+3V3-STANDBY
1
S
0
2
3S46
10K
RES
10K
3S1G
3
S
2
V
1
2
FS0Z
1
0
K
+3V3-STANDBY 3S1B
10K
AF25
AE23
A
A
1
7
A
F
2
6
A
C
1
7
A
D
1
7
AE17
AF17
AE24
AF22
AE22
AC26
AD26
AC25
AA26
AC24
AC23
AF24
AF23
AC21
AD21
AE21
AF21
AA22
AB22
AC22
AD22
AD23
AE26
AE25
AE19
AF19
AA20
AB20
AC20
AD20
AE20
AF20
AA21
AB21
AB23
AB24
AB17
AA18
AD18
AE18
AF18
AA19
AB19
AC19
AD19
7S00-9
PNX85500
STANDBY
IS2U
10K 3S3W
4K7
3S2M
RES
RES 3S1K
10K
2S4F
10p
4
NC
OUTP
1
NCP303LSN28
7S20
5
CD
3
GND
INP
2
3S6W
RES
+3V3-STANDBY
4K7
3S3T
10K
3S3M
10K
3S2F 100R
100n
2S11
IS2Z
1u0
2S37
3S1H
10K
4K7
3S49
1
0
0
n
IS2V
2
S
4
K
P
O
L
10K
3S41
IS3E
IS20
10K
3S1E RES
10K
3S1P RES
9
S
2
4
R
E
S
3S1D
27K
3S1J
100K
RES
RES
3S6V
4K7
3S3L
10K
+3V3-STANDBY
5
S
0
4
3
0
R
3S1F
10K
R
E
S
1
FS45
1
0
0
n
2
S
1
0
+3V3-STANDBY
2S13 1
u
0
IS3F
10K
3S43
RES 3S3Q
10K
LCD-PWR-ONn LCD-PWR-ONn
RESET-AVPIP
SPI-PROG
RESET-AVPIP
RES 10K
3S3R
RESET-ETHERNETn
RESET-USBn
RESET-DVBS
AUDIO-MUTE-UP
RESET-AUDIO
SEL-HDMI-ARC
RESET-ETHERNETn
RESET-USBn
RESET-DVBS
CTRL-DISP
SPI-PROG
SDA-UP-MIPS
SCL-UP-MIPS
FAN-CTRL1
FAN-CTRL2
POWER-OK
ENABLE-3V3n
AV1-STATUS
AV2-STATUS
RESET-STBYn
PNX-SPI-WPn
DETECT2
RESET-STBYn
SEL-HDMI-ARC
CTRL-DISP
AUDIO-MUTE-UP
RESET-AUDIO
TACHO
CEC-HDMI
BACKLIGHT-PWM-ANA-DISP
SDM
RXD-UP
TXD-UP
RESET-SYSTEMn
KEYBOARD
SDA-UP-MIPS
SCL-UP-MIPS
LED1
LED2
PSEN
ALE
EA
LED1
LED2
PSEN
ALE
EA
EJTAG-DETECTn
LAMP-ON
STANDBY
RC
TACHO
CEC-HDMI
BACKLIGHT-PWM-ANA-DISP
SDM
EJTAG-DETECTn
LAMP-ON
STANDBY
FAN-CTRL1
FAN-CTRL2
POWER-OK
ENABLE-3V3n
RXD-UP
TXD-UP
DETECT2
RESET-SYSTEMn
AV2-BLK
AV1-BLK
PNX-SPI-CLK
PNX-SPI-CSBn
PNX-SPI-SDI
PNX-SPI-SDO
KEYBOARD
LIGHT-SENSOR
RC
Circuit Diagrams and PWB Layouts EN 121 Q552.1E LA 10.
2010-Feb-19
back to
div. table
PNX Power
18770_518_100118.eps
100118
PNX Power
B02H B02H
2009-12-07 6
8204 000 8950
PNX85500
VDDA_2V5
HDMI_VDDA_3V3_TERM
VDDA_2V5_LVDS_BG
VDDA_2V5_USB
VDDA_2V5_VADC
VDDA_2V5_VDAC
VDDA_3V3_USB
VDD_1V1
VDD_1V8
HDMI_VDDA_1V1
HDMI_VDDA_2V5
VDD_2V5
VDD_2V5_LVDS
VDD_3V3
VDD_3V3_SBY
VDDA_1V2
V
S
S
A
_
U
S
B
V
S
S
A
_
2
V
5
_
L
V
D
S
_
B
G
V
S
S
A
_
1
V
1
_
L
V
D
S
_
P
L
L
H
D
M
I_
A
G
N
D
VDD_1V1_DDR
VDDA_2V5_DCS
VDDA_2V5_ADAC
VDDA_2V5_AADC
VDDA_1V1_LVDS_PLL
VSSA
VSS
VSS
VSS
D
E
2S28 B3
1 2 3 4 13 14
1 2 3 4 5 6 7 8 9 10
F
G
H
I
2S21 F6
2S23 B6
2S26 A6
2S27 B3
E
F
G
H
I
A
B
C
5 6 7 8 9 10 11 12
2S29 C6
2S43 B2
2S45 F11
2S46 F11
2S4M B12
2S4N C11
2S4P C11
2S4Q B3
2S4R B4
2S4S F5
2S4T H11
2S4U D11
2S4V D11
2S4WD11
11 12 13 14
A
B
C
D
2S4Z E11
2S50 E11
2S51 E9
2S52 E9
2S53 H11
2S55 G11
2S56 G11
2S57 G11
2S58 H11
2S59 I11
2S5A A11
2S5B A11
2S5C B11
2S5D B11
2S5G-1 B4
2S5G-2 B4
2S5H-2 B5
2S5H-3 B5
2S5H-4 B5
2S5J-1 C5
2S5J-2 C5
2S5J-3 C5
2S5J-4 C5
2S5K-1 C4
2S5K-2 C4
2S5K-3 C4
2S5K-4 C5
2S5M G11
2S5P F5
2S60 A6
2S61 A6
2S62 A7
2S4Y D11
2S64 A7
2S65 A7
2S66 A7
2S67 A8
2S68 A8
2S6A A11
2S6B A11
2S6C C11
2S6D B11
2S6E B11
2S6F C11
2S6G C11
2S6H H11
2S6K H11
2S6L I11
2S6M I11
2S5G-3 B4
2S5G-4 B5
2S5H-1 B5
5S81 A12
5S82 A12
5S83 D12
5S84 E12
5S85 C12
5S87 F12
5S88 G12
5S89 H12
5S90 H12
5S92 I12
5S93 B12
5S94 F5
5S95 E10
7S00-10 B6
7S00-12 C1
IS3K D10
2S63 A7
IS3L D10
IS3Q A10
IS3S A10
IS58 I10
c000 E13
c001 B5
2S6N C11
2S6P C12
2SHW I11
5S80 A12
2
7
2
S
4
Q
2
2
u
2
S
5
J-2
1
0
0
n
30R
5S88
1
0
0
n
2
S
6
3
2
7
+1V1
2
S
5
G
-2
1
0
0
n
5
2
S
5
1
1
0
0
n
1
0
0
n
2
S
5
H
-4
4
2
S
5
7
1
0
u
2
S
6
8
1
0
0
n
2
S
6
6
1
0
0
n
1
0
0
n
2
S
4
U
2
S
6
5
1
0
0
n
IS3L
+2V5
1
0
u
2
S
5
8
1
0
0
n
2
S
2
8
1
0
0
n
2
S
6
7
c000
4
7
u
2
S
2
3
1
0
0
n
2
S
6
4
2S29
1
0
0
u
2
.0
V
2
S
5
6
1
u
0
2
S
5
3
1
0
u
+2V5-AUDIO
C
1
3
R
2
0
5S81
30R
C16
C18
W20
P20
M20
K20
V7
Y8
Y19
Y18
A
1
3
A
5
A
6
B
5
B
6
N6
N7
C7
C9
C11
C14
C
6
D
6
E
6
F
6
G
6
F
7
G
7
L
7
R
6
R
7
U
7
Y7
W7
F9
G9
AB5
H20
F11
G11
F13
J7
L
6
R15
R17
U9
U11
U13
AC4
U15
U17
J6
AA6
L15
L17
N9
N11
N13
AD3
N15
N17
R9
R11
R13
F19
G19
J9
J11
J13
AE2
J15
J17
L9
L11
L13
T20
Y13
Y10
R21
AF1
G13
F15
G15
F17
G17
U21
U22
B13
AA15
Y15
AA13
Y12
AA9
AA7
Y17
D13
VDD
PNX85500
7S00-10
U
2
4
V
2
4
V20
V21
U20
2
S
4
S
1
0
uRES
R
E
S
2
S
5
B1
0
u
5S93
30R
1
2
30R
5S92
1
0
0
n
2
S
6
C
2
S
2
1
1
u
0
IS3S
+1V2
2
S
2
7
1
0
0
n
5S89
30R
+2V5-AUDIO
1
0
u
2
S
5
A
1
2
R
E
S
5S85
2
S
6
G
1
0
0
n
1
8
30R
1
0
0
n
2
S
5
K
-1
1
0
0
n
2
S
6
A
1
2
2
S
4
Z
1
0
0
n
IS3Q
2
S
4
N
1
0
0
n
1
0
0
n
2
S
4
5
2
1
0
0
n
2
S
5
P
1
+3V3
+2V5
+2V5-LVDS
R
E
S
1
0
u
2
S
5
D
5S84
+3V3
30R
4
5
2
S
5
J-4
1
0
0
n
2
S
5
5
1
0
0
n
4
5
30R
5S82
2
S
5
K
-4
1
0
0
n
1
0
0
n
2
S
5
K
-2
2
7
1
2
+1V1
2
S
6
1
1
0
0
n
2
S
6
B
1
0
0
n
1
2
2
S
4
W
1
0
0
n
1
0
0
n
2
S
6
M
+1V1
1
u
0
2
S
5
9
5S90
30R
1
u
0
2
S
4
Y
R
E
S
2
7
5S83
30R
1
2
2
S
5
H
-2
1
0
0
n
+2V5
2
S
6
K
1
0
0
n
2
S
4
P
1
0
u
1
0
0
n
2
S
5
C
2
IS3K
2
5S94
30R
1
0
0
n
2
S
6
E
1
2
S
6
2
1
0
0
n
1
0
0
n
2
S
5
H
-1
1
8
2
S
5
2
1
0
u
6
.3
V
+2V5
+1V1
1
0
0
n
2
S
6
0
1
0
0
n
1
2
A
A
1
6
A
A
8
Y
1
1
Y
1
4
Y
1
6
Y
9
2
S
6
H
T7
U4
V10
V12
V14
V16
V18
V2
A3
Y20
A8
P6
P7
T10
T12
T14
T16
T18
A26
T2
T6
M
6
M7
N2
N20
P10
P12
P14 A19
P16
P18
P4
K
2
K
6
K
7
L
2
0
L
4
M
1
0
M
1
2
A17
M
1
4
M
1
6
M
1
8
H
4
H
6
H
7
J2
0
K
1
0
K
1
2
A15
K
1
4
K
1
6
K
1
8
F20
F8
G10
G12
G
1
4
G
1
6
A12
G
1
8
G
2
G
2
0
G
8
D2
D20
E13
E20
E4
F10
A10
F12
F14
F16
F18
7S00-12
PNX85500
VSS
A1
B1
B20
C20
C4
1
0
0
n
2
S
6
L
1
2
8
5S95
30R
1
0
0
n
2
S
5
J-1
1
1
0
0
n
2
S
4
3
1
0
0
n
2
S
5
G
-1
1
8
1
0
0
n
2
S
6
F
1
2
1
2
1
0
0
n
2
S
6
N
4
7
u
2
S
2
6
2
S
6
D
1
0
0
n
1
2
+2V5-LVDS
5S87
30R
3
6
3
6
2
S
5
G
-3
1
0
0
n
1
0
0
n
2
S
5
H
-3
2
S
4
M
2
2
0
u
6
.3
V
+2V5
+3V3
2
2
u
2
S
4
R
1
0
0
n
2
S
H
W
1
0
u
2
S
5
0
1
0
0
n
2
S
5
M
30R
5S80
+3V3-STANDBY
2
S
4
V
1
0
u
IS58
1
0
u
2
S
6
P
1
0
0
n
2
S
5
K
-3
3
6
3
6
2
S
4
6
1
0
0
n
2
S
5
J-3
1
0
0
n
+1V8
5
POL
2
S
4
T
1
0
0
n
2
S
5
G
-4
1
0
0
n
4
c001
+2V5
SENSE+1V1
SENSE+1V2
EN 122 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
PNX Analog Video
18770_519_100118.eps
100118
PNX Analog Video
B02I B02I
2009-12-07 6
8204 000 8950
PNX85500
CVBS_Y7
C7
6
IN
OUT
SCL
SDA
ANALOG_VIDEO
AV1
VGA
ATV_CVBS_Y3
C3
CVBS1_OUT
CVBS2_OUT
RESREF
REF
TUNER
VGA_EDID
VSYNC
CURREF
1
2
3
4
5
IF_AGC
RF_AGC
P
N
AGND
CVBS_Y1
R
B
G
SYNCIN1
Y_G1
PR_R_C1
PB_B1
CVBS_Y2
SYNCIN2
Y_G2
PR_R_C2
PB_B2
R
G
B
HSYNC_IN
2S7N D6
2S7P D6
VGA
B
2S14 D12
F
2S16 D12
C
E
2S8G E6
F
G
H
YPBPR1
*
3S08 B11
3S09 C11
EU:
3
13 4
2S77 F12
3
3S4WF6
3S50 H6
2S7L C6
6 7 8
EU:
I
A
D
3S52 H6
2S7M C6
3S59 A6
3S5B A11
Connectivity
2S15 D12
2S18 D12
2S19 D12
13
2S85 H6
B
2S87 A6
2S8A A11
E
1 5
AP:
3S5T-3 I5
3S5T-4 I11
3S5V-1 I5
3S05 A11
IS5H E9
IS5J E9
2
2S78 G12
2S7E G6
2S7J A6
2S7K B6
5
3S4T D6
2S7H B6
IS5D E9
3S54 I6
AP:
= TCON ONLY
EU:
14
A
C
D
2S7U F6
2S84 G6
3S5T-1 I5
2S86 H6
3S5V-4 I12
IS5G E9
3S75 E12
3S76 F12
BS15 F9
BS17 F10
9S14 I3
9S15 I3
6 7
4 1 2
3S4P D6
3S4R D6
BS13 E9
3S4U F6
*
*
AP:
3S5V-2 I12
3S5V-3 I5
-
G
H
I
2 1 1 1 9
3S5L E6
3S5S E9
3S5T-2 I11
EU:
YPBPR2
SCART1
AP:
VGA
7S00-1 D8
3S4J A6
IS4WC10
8 9 10 11 12
2S22 A11
14
2S75 F11
2S76 F11
BS09 F9
BS10 F10
IS11 F13
IS5C D9
9S17 A13
3S5E B11
IS5E E9
SCART2
10
2S7Q E6
2S7R F6
YPBPR1
IS5F E9
3S4G G6
2S40 B11
3S4K C6
3S4L B6
+CVBS
IS4V B10
5
6
R
3
S
0
5
2S22
22n
BS13
IS4V
3
S
5
0
5
6
R
5
6
R
3
S
4
P
3
S
5
9
4
7
R
1
0
0
R
3
S
5
V
-2
2
7
9S14
2
2
n
2
S
1
4
IS5H
5
6
0
R
3
S
5
E
2
7
4
5
1
0
0
R
3
S
5
T
-2
1
0
0
R
3
S
5
T
-4
AF12
AE12
AC18
AF4
AE15
AE14
9S17
AB13
AB12
AA12
AA10
AB10
AB11
AF16
AD24
AD25
AF15
AF14
AD11
AD16
AB18 AD12
AD15
AD14
AC15
AC14
AC16
AB16
AD13
AE13
AC13
AE16
AF13
AC11
AA11
AF11
AE11
AB15
AB14
7S00-1
PNX85500
A
A
1
4
AC12
IS5D
IS5F
3
S
4
U
5
6
R
IS5E
22n
2S8A
3S5T-3 3 6
2S86
22n
100R
22n
2S7U
2S7K
22n
IS5C
9S15
IS11
2
2
n
2
S
1
8
3
S
4
L
5
6
R
2
2
n
2
S
1
6
5
6
R
3
S
4
G
2S84
22n
IS5G
3
S
5
B
4
7
R
22n
2S7P
100R
3 6
BS15
3S5V-3
3
S
5
L
4
7
R
2S7E
22n
2
S
7
6
1
0
n
BS10
22n
2S7J
3
S
0
9
8
K
2
IS4W
5
6
R
3
S
4
K
47K
3S75
22n
2S85
2S87
22n
5
6
R
3
S
4
W
5
6
R
3
S
4
J
3
S
4
R
5
6
R
10n
2S7Q
BS17
3S76
47K
3S5T-1 1 8
100R
2
S
4
0
4
7
p
22n
2S8G
2S78
10n
1
0
n
2
S
7
5 2S7R
22n
22n
2S7H
BS09
22n
5
6
R
3
S
4
T
2S7N
100R
3S5V-1 1 8
2
2
n
2
S
1
5
10n
2S77
IS5J
3
S
5
4
5
6
R
3
S
0
8
5
6
0
R
3S5S
10K
22n
2S7L
1
0
0
R
3
S
5
V
-4
4
5
2
2
n
2
S
1
9
2S7M
10n
5
6
R
3
S
5
2
VGA-SCL-EDID-TCON
VGA-SDA-EDID-TCON
VGA-SDA-EDID
C-SVHS
Y-SVHS
YPBPR1-SYNCIN1
AV4-Y
AV4-PR
AV4-PB
R-VGA
B-VGA
YPBPR2-SYNCIN2
CVBS-MON-OUT1
PNX-IF-AGC
PNX-IF-N
PNX-IF-P
PNX-RF-AGC
V-SYNC-VGA
H-SYNC-VGA
VGA-SCL-EDID
AV1-CVBS
AV1-G
AV3-Y
AV3-PR
AV3-PB
AV1-B
AV1-R
G-VGA
AV2-CVBS
Circuit Diagrams and PWB Layouts EN 123 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-13 B03 820400089514 CLASS D
Audio
18770_520_100118.eps
100218
Audio
B03A B03A
2009-10-22 4
8204 000 8951
CLASS D
VIA VIA
VIA
VIA
VCLAMP
MUTE
IN
BSL
SD
R
AVCC
L
BSR
GND_HS
L
PGND
AGND L R
L
OUT
R
BYPASS
1
R
0
PVCC
GAIN
7D15 B3
ID29 C5
ID30 C5
ID31 C6
7D11-2 D3
7D13-1 E1
7D13-2 E2
ID32 C6
ID33 F4
ID34 D3
3D14-4 B7
3D15-1 E2
3D15-2 E3
2D19 B6
2D20 B5
3D15-4 D5
MAINS SWITCH DETECT
ID10 C7
ID11 A4
ID19 C5
ID27 B6
ID28 B6
6 7
7D15 C3
CD10 D5
ID35 D3
ID36 E2
FD03 B1
FD05 E8
FD06 E8
FD07 F4
FD14 A5
ID37 D4
ID38 D5
ID39 E2
2D11 C8
2D12 C8
2D13 F8
2D14 E8
2D16 C4
2D17 C4
2D01 F7
2D02 F4
2D21 D8
3D16 A5
5D01 C7
5D04 C8
5D05 C8
5D07 A6
5D08 A6
6D01 E3
ID12 A5
ID13 E3
ID14 B3
ID15 B3
ID18 C5
1 2 3 4 5
2 3 9
3D04 E2
FD01 B1
FD02 F8
3D06-3 F3
3D06-4 F3
3D09 A3
3D10-1 D8
3D10-2 D8
ID05 C8
ID06 C8
ID07 C8
ID08 C8
ID09 C7
C
D
1D38 E9
1D50 E8
1D52 F8
C
D
E
2D22 B8
2D23 B4
5D02 C7
5D03 E7
2D27 D8
2D28 B2
2D29 B2
3D01-1 D3
3D01-2 D3
7D03-1 A5
7D03-2 F5
7D10-1 B6
7D10-2 E5
7D11-1 D2
2D09 C7
2D10 C7
8 9
1
A
B
3D06-1 F4
3D06-2 F4
4 5 6 7 8
3D10-3 D7
3D10-4 D7
3D14-1 B8
3D14-2 B8
3D14-3 B7
E
5
3
4
F
A
B
F
1735 E8
2D24 B4
2D26 B8
2D03 E3
2D05 A5
2D06 A5
2D07 B5
2D08 B6
3D01-4 E2
3D02 B3
3D02 C3
3D02 B4
3D02 C4
BC847BS(COL)
7D11-2
2
D
0
3
1
0
0
p
+AVCC
BZX384-C
6D01
3
D
1
4
-4
2
2
K
5
4
7
2
2
2
K
3
D
1
4
-2
GND-AUDIO
GND-AUDIO
2D16
1u0
7D13-1
BC847BS(COL)
2
6
1
+24V-AUDIO-POWER
7D13-2
BC847BS(COL)
5
3
4
220n
2D10
2
D
2
2
2
2
0
n
2
2
K
3
D
1
0
-1
8
1
5
D
0
7
2
2
0
R
ID31
31
0
1
2
6
15
2
11
17
2
5
5
22
4
2
3
2
4
1
3
1
4
1
89
1
9
2
0
21
16
7
18
7D10-1
TPA3120D2PWP
CLASS-D

AUDIO AMP
2D23
47n
2
2
0
R
5
D
0
8
5D03
220R
ID08 ID18
7 2
2
6
1
3D01-2
47K
7D11-1
BC847BS(COL)
ID30
GND-AUDIO
28
29
3
0
3
1
3
2
3
3
34
VIA
26
35
36
37
3
8
3
9
4
0
27
ID37
TPA3120D2PWP
7D10-2
FD06
1
2
3
1
0
n
2
D
1
3
61
1D38
1735446-3
BC847BS(COL)
7D03-1
2
ID27
2
D
0
8
2
2
0
n
2D11
220u 25V
4K7
3D15-1
8 1
ID32
2
D
0
6
2
2
0
n
FD14
CD10
ID29
4
5
ID11
ID13
3
D
1
5
-4
4
K
7
ID09
GND-AUDIO
2
2
K
3
D
1
0
-4
5
4
ID33
4
5
2
2
0
n
2
D
0
7
8
3
D
0
1
-4
4
7
K
4
7
K
3
D
0
1
-1
1
GND-AUDIO
ID05
1735
1735446-4
1
2
3
4
8 1
ID07
GND-AUDIO
3D06-1
100K
220R
5D04
100K
3D06-3
3 6
ID06
ID38
GND-AUDIO
10u
2D02
1
D
5
0
V
_
N
O
M
8
1
1u0
2D17
3
D
1
4
-1
2
2
K
2 7
1u0
2D28
3D15-2
4K7
5D05
220R 25V 220u
2D12
2
D
2
0
2
2
0
u
3
5
V
7
2
22u
5D01
3
D
1
0
-2
2
2
K
GND-AUDIO
3
D
0
4
2
K
2
+24V-AUDIO-POWER
GND-AUDIO
5
3
4
FD01
7D03-2
BC847BS(COL)
FD02
5D02
2
D
0
5
1
0
u
3
5
V
22u
6
3
GND-AUDIO
GND-AUDIO
3
D
1
4
-3
2
2
K
2
D
1
4
1
0
n
FD05
ID36
ID34
2
D
1
9
2
2
0
u
3
5
V
+3V3-STANDBY
ID14
ID35
ID10
3
4
GND-AUDIO
2
2
0
n
2
D
2
1
1
BC847BS(COL)
7D15-2 5
BC847BS(COL)
7D15-1 2
6
1u0
2D29
3D02-2
4K7
7 2
ID39
3
D
1
0
-3
2
2
K
6
3
22K
3D16
1
D
5
2
V
_
N
O
M
GND-AUDIO
6 3
+3V3-STANDBY
1
8
4K7
3D02-3
4
5
3
D
0
2
-1
4
K
7
4
K
7
3
D
0
2
-4
+
A
V
C
C
ID19
3D06-2
100K
7 2
2
D
2
6
2
2
0
n
ID12
3D09
4R7
1
0
n
2
D
0
1
FD03
GND-AUDIO
ID28
GND-AUDIO
+3V3-STANDBY
GND-AUDIO
FD07
47n
2D24
4 5
GND-AUDIO
GND-AUDIO
3D06-4
100K
2
D
2
7
2
2
0
n
GND-AUDIO
ID15
2D09
220n
LEFT-SPEAKER
RIGHT-SPEAKER
A-PLOP
AUDIO-MUTE-UP
+AUDIO-L
-AUDIO-R
MAINS-OK
A-STBY
DETECT2
LEFT-SPEAKER
RIGHT-SPEAKER
LEFT-SPEAKER
RIGHT-SPEAKER
EN 124 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
DC/DC
18770_521_100118.eps
100118
DC/DC
B03B B03B
2009-10-22 4
8204 000 8951
DC/DC
2
VFB
1
2
TRIP
DRVL
1
2
DRVH
1
2
SW
1
2
PGND
1
2
TEST
1
2
VREG5
V5FILT
1
2
VIN
GND
VBST
1
2
EN
1
2
VO
1
15
E
F
G
H
2U00 D2
2U01 E3
2U02 D4
8 9 10 11 12
2U04 F4
2U05 F4
2U06 F1
2U07 H3
2U08 G9
2U09 F9
1 14
11 12 13 14
2U03 E2
12V/1V1 CONVERSION
7
A
B
C
D
13
1 2 3 4 5
RES
2U19 B12
2U20 B14
2U21 C6
2U22 D8
15
A
B
C
2 3 4 5 6
3U05 E4
3U08 G2
3U09 H3
3U10 H3
12V/1V8 CONVERSION
2U10 F10
2U11 F9
2U12 F11
2U13 F12
6 7 8 9 10
3U20 F11
3U21 G13
3U22 G2
3U23-1 C9
2U23 B5
2U24 B5
2U25 B12
2U29 G14
D
E
F
G
H
5U01 E10
5U02 B13
5U03 A13
6U00 E8
IU08 D4
IU09 C6
9 F 8 1 U I 6 B 0 1 U I
7U00 F1
7U01 D8
7U02-1 B6
7U02-2 C6
7U03 E3
7U04 E8
CU00 H7
2U14 E14
2U15 C10
2U16 C10
2U17 C9
2U18 D9
IU05 D3
IU06 D3
IU21 H9
IU22 B13
IU23 C9
IU24 E3
IU25 F4
FU06 E8
IU01 F3
IU02 F3
IU03 F1
7 D 2 1 U I 3 G 4 0 U I
IU13 D7
IU14 E8
IU11 C6
3U23-2 C9
3U23-3 C9
3U23-4 C8
3U24-1 F9
3U24-2 F9
3U00 F1
3U01 F1
3U02 F2
3U03 F3
3U04 D3 IU15 C9
IU16 E5
IU17 F9
3U24-3 F9
3U24-4 F8
3U27 D5
3U28 D5
5U00 C10
IU07 D4 IU19 G10
IU20 G9
FU00 G13
FU01 E14
FU02 B9
FU03 C14
FU04 F4
FU05 B9
3U11 B6
3U14 D7
3U17 G10
3U18 G10
3U19 G9
3
R
3
3
U
0
5
FU05
22K
3U02
IU14
+1V1
4
5
GND-SIG
4
7
R
3
U
2
3
-4
2
U
0
9
1
n
0
2
U
1
2
4
7
u2
U
1
4
1
0
0
u
2
.0
V
R
E
S
1
0
u
2
U
1
9
4
7
R
3
U
2
4
-4
2
2
u
2
U
1
6
IU24
1
u
0
2
U
2
0
2U21
220p
IU03
+1V1
3
U
1
7
3
3
0
R
1
%
1
n
0
2
U
1
8
1
0
u
2
U
0
0
IU09
+1V8
IU16
IU07
IU25
GND-SIG
1
0
u
2
U
2
4
1
n
0
2
U
1
1
GND-SIG
+1V8
1
8
2U02
100n
+12V
3
U
2
3
-1
4
7
R
IU23
GND-SIG
IU19
GND-SIG
5U02
30R
IU20
GND-SIG
3
U
2
4
-3
4
7
R
1
%
GND-SIG
1
K
0 3
U
0
9
R
E
S
2
U
0
3
1
n
0
GND-SIG
FU02
FU06
IU21
1
0
0
p
2
U
0
8
3
U
2
3
-3
4
7
R
3
6
R
E
S
IU10
GND-SIG
IU05
+3V3-STANDBY
1
0
u
2
U
2
3
R
E
S
2
U
2
9
1
0
0
n
IU11
IU18
IU06
3
U
2
4
-1
4
7
R
3
U
2
0
1
0
R
BC847BW
1
3
2
R
E
S
GND-SIG
GND-SIG
7U00
FU00
IU13
GND-SIG
R
E
S
1
0
0
p
2
U
0
7
IU15
IU02
1
0
0
n
2
U
0
1
1
K
0
3
U
1
8
2u0
1
%
5U01
IU08
2
U
1
0
1
u
0
7 8
4
1 2 3
2
U
0
4
1
0
u
SI4778DY
7U01
5 6
100R 1%
2
2
u
2
U
1
3
1%
3U21
3U08
330R
1 2 3
3U22
1K0 1%
7U04
SI4778DY
5 6 7 8
4
2
7
4
7
R
3
U
2
3
-2
3U03
22K
IU01
3
U
0
4
3
R
33
U
1
4
3
R
3
4
7
R
3
U
2
4
-2
6
U
0
0
S
T
P
S
2
L
3
0
A
2
U
2
5
1
0
u
220p
2U22
+1V1
4
7
u
2
U
1
5
IU04
5
K
6
3
U
1
9
20
4
9
19
13
7
17
21
16
18
2
11
5
8
1
12
23
14
3
10
6
22
15
24
7U03
TPS53126PW
2
U
0
5
1
u
0
3
U
0
1
1
0
K
5 6
4
3
10K
7U02-2
SI4952DY
3U00
GND-SIG
CU00
1
2
2
K
3
U
1
0
SI4952DY
7U02-1
7 8
2
3u6
IU12
5U00
3U27
10R
3
R
3
3
U
1
1
+1V8
IU22
FU04 IU17
3
U
2
8
1
0
R
2
U
1
7
1
n
0
RES
FU01
5U03
30R
FU03
2U06
100n
ENABLE-1V8
SENSE+1V1
Circuit Diagrams and PWB Layouts EN 125 Q552.1E LA 10.
2010-Feb-19
back to
div. table
DC/DC
18770_522_100118.eps
100118
DC/DC
B03C B03C
2009-10-22 4
8204 000 8951
DC/DC
9U42 B4
FU07 C3
FU48 C1
FU49 C1
3U67 D2
3U68 B3
3U69 B3
3U70 B4
FU72 F4
IU56 C3
IU57 F6
IU61 E4
7U42 B5
7U43 B3
7U48-1 C6
7U48-2 E6
9U41 B5
IU48 E4
IU49 E3
IU50 F4
IU51 F3
IU52 F5
IU55 D3
FU50 C1
FU51 C1
FU52 C3
FU53 C2
FU54 C2
IU62 F4
IU63 F3
IU64 C6
FU63 E1
FU64 F1
FU65 F1
FU66 F1
FU67 F1
FU68 F1
2U68 E1
3U71 D3
3U72 F3
3U73 F3
3U74 A4
3U75 A4
FU73 E5
FU74 D1
IU40 E5
IU41 D5
IU43 B5
IU44 B5
IU45 B4
IU47 B4
3U84 D2
6U40 E3
7U40-1 F4
7U40-2 E4
7U41-1 F4
7U41-2 F5
4 5 6 7 8 9
A
B
C
D

FU55 C1
FU56 D1
FU57 D1
FU58 E1
FU59 E1
FU60 E1
FU61 E1
FU62 E1
3U63 F5
3U64 C2
3U65 D2
3U66 D2
2U42 C2
2U43 D2
2U44 D3
2U45 D3
2U46 D3
2U47 E1
2U48 F1
2U49 F1
2U50 F1
2U51 D1
2U71 D5
2U72 D1
3U41 B5
3U42 C3
3U43 C3
3U76 F2
3U80 F4
3U81 C3
3U82 C5
3U83-1 D6
3U83-2 E5
3U83-3 E5
3U83-4 C5
3U60-4 F5
3U61 E5
3U62-1 F4
3U62-2 E3
3U62-3 E4
3U62-4 E3
1 2 3
E
F
A
B
optionally 1M99 is a 9 pin connector

C
D
1M99 C1
1U40 E2
2U41 B1
1 2 3 4 5
2U52 D1
2U53 D2
2U54 F2
2U55 F3
3U44 C3
3U45 C3
3U53 B6
3U56 D3
3U59 B6
3U60-1 F5
3U60-2 F4
3U60-3 E5
6 7 8 9
E
F
1M95 E1
2
3
4
5
6
7
8
9
FU61
1-1735446-1
1
10
11
+24V-AUDIO-POWER
1M95
1
0
n
2
U
5
4
3U71
100R
3U84
RES 100R
2
U
4
3
1
0
n
IU44
2U42
1u0
IU48
BC847BS(COL)
5
3
4
+3V3-STANDBY
7U41-2
IU57
IU61
3U42
100R
FU07 FU54
R
E
S
2
U
4
8
1
0
0
p
FU56
1
K
0
3
U
7
2
2
U
5
3
1
n
0
RES
3U56
10K
BC847BW
7U42
RES 1K0
3U82
FU59 FU73
IU50
IU51
+3V3-STANDBY
3 4
IU62
BC857BS(COL)
7U48-2
5
+3V3-STANDBY
10K
3U70
2
6 1
8 1
+3V3-STANDBY
7U48-1
BC857BS(COL)
3U60-1
22K
2
U
4
9
R
E
S
1
0
0
p
1
0
n
2
U
4
6
3U66
GND-AUDIO
RES 100R
7U43
BC847BW
FU63
3
4
5
6
7
8
9
1M99
1-1735446-2
1
10
11
12
2
4
5
1
0
K
3
U
6
2
-4
R
E
S
1
0
K
3
U
7
4
8
1
FU48
1
0
0
K
3
U
8
3
-1
9U42
RES
FU50
R
E
S
2
U
5
5
1
u
0
RES
IU49
10K
3U59
+3V3
+12V
FU64
1
0
0
p
R
E
S
IU45
R
E
S
2
U
7
2
3 6
3
U
7
51
0
K
100K
3U83-3
R
E
S
FU65
1
0
K
3
U
6
9
IU40
10K
3U53
FU60
2U68
1u0
6
1
FU55
7U40-1
BC847BPN(COL)
2
2
U
4
5
1
n
0
2 7
3
U
6
8
1
0
K
3U83-2
100K
IU64
2
U
7
1
1
0
0
n
FU72
FU67
2
U
5
1
1 8
R
E
S
1
0
0
p
10K
3U62-1
2U41
100p
RES
FU52
FU49
100R
3U43
IU43
1
0
n
2
U
5
0
+3V3
IU52
IU63
+3V3-STANDBY
+12VD
100R
3U45
1
0
0
p
2
U
4
4
3U73
5
3
4
3K3
7U40-2
BC847BPN(COL)
FU68
FU53
100R RES
3U67
IU56
1
0
K
3
U
6
1
R
E
S
10K
3U81
3U44
100R
IU47
FU51
3
U
6
2
-2
1
0
K
2
7
4 5
+5V
3U83-4
100K
6
U
4
0
B
Z
X
3
8
4
-C
6
V
2
RES
3U41
10K
R
E
S
1
K
0
3
U
6
5
3U64
1K0
+3V3
BC847BS(COL) 2
6
1
2U47
10n
4
5
7U41-1
3
U
6
0
-4
2
2
K
FU58
FU62
1
0
K
3
U
6
3
R
E
S
+3V3
IU41
FU74
3U60-3
22K
3 6
3
U
6
2
-3
1
0
K
3
6
1
0
0
p
2
U
5
2
R
E
S
3U76
100R
FU57
9U41
3
U
6
0
-2
7
2
FU66
2
2
K
4
K
7
3
U
8
0
IU55
T 32V 3.0A
1U40
ENABLE-3V3-5V
BL-SPI-CSn
BL-SPI-SDO
BL-SPI-CLK
BACKLIGHT-PWM_BL-VS
BACKLIGHT-BOOST
BACKLIGHT-PWM-ANA-DISP
STANDBY
MAINS-OK
LED2
LED1
POWER-OK
ENABLE-3V3n
DETECT2
ENABLE-1V8
LAMP-ON
LED-1
LED1
LED-2
LED2
EN 126 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
DC/DC
18770_523_100118.eps
100118
DC/DC
B03D B03D
2009-10-22 4
8204 000 8951
DC/DC
COM
OUT IN
NC NC
A
REF
K
OUT IN
INH BP
COM
C
D
E
2UA1 A4
2UA2 B5
RESERVED
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6
D
9
A
E
F
A
B

2UA5 B6
2UA6 B7
2UA7 D4
2UA8 D5
2UA9 D5
2UB0 C7
2UB1 D6
2UB2 D7
2UB3 F6
2UB4 F6
2UB5 F8
2UB6 F8
2UB7 F7
2UB8 D2
F
2UA0 A5
3U15-1 C8
3U15-2 C8
2UA3 B5
2UA4 A7
3U16-1 C9
3U16-2 C9
3U16-3 D9
3U16-4 D9
3U25-1 E3
3U25-2 E3
3U25-3 E2
3U25-4 E2
3U26-1 F3
3U26-2 F3
3U26-3 F3
3U26-4 F3
3U29-1 E3
3U29-2 E3
3U29-3 E3
3U29-4 F3
3UA0 A2
3UA1 A3
3UA2 B3
7 8
3UA5 A6
3UA6 B5
B
C

3UA9 D5
3UB0 D6
3UB1 E6
3UB2 E6
3UB3 F6
3UB4 F5
3UB5 F5
3U12 C3
3U13 C3
3UB6-3 C2
3UB6-4 C2
3U15-3 D8
3U15-4 D8
RESERVED
NOT FOR 5000 SERIES
*
3UB7-3 D2
3UB7-4 C2
5UA0 E8
7U06-1 F2
7U06-2 F1
7UA0 B2
7UA1-1 A5
7UA1-2 C5
7UA2 A6
7UA3 C6
3UA3 B4
3UA4 A4
7UA6 C3
7UA7-1 C3
3UA7 B6
3UA8 B5
CUA0 B9
FUA0 A2
FUA1 A7
FUA2 D5
FUA3 D7
FUA4 B9
IU26 C3
IU29 E2
IU30 F3
3UB6-1 C2
3UB6-2 C2
IUA3 A6
IUA4 A6
3UB7-1 D3
3UB7-2 D2
IUA7 C4
IUA8 D5
IUA9 B6
7UA4 E5
7UA5 E8
IUB0 F6
IUB1 E8
7UA7-2 D2
7UC0 A8
IUB2 C2
IUB3 C3
3U15-3
3 6
IUB4 D3
IUB5 C2
IUB6 B3
IUA1 A4
IUA2 B5
IUA5 C6
IUA6 E5
470R
1 8
100R
RES 3U26-1
3UA7
1K0
3
4
IU29
IU30 RES
BC847BS(COL)
7U06-2 5 7U06-1
BC847BS(COL)
2
6
1
3U25-4
RES
4 5
RES
+3V3
100K
1
%
3
3
0
R
3
U
1
2
3
3
0
p
2
U
A
2
3UB5
100K
IUA8
IUB1
5 3
1 2
4
7UA4
TS431AILT
+5V5-TUN
IU26
FUA1
FUA3
3U16-4
100R
4 5
7UA7-2
BC847BS(COL)
5
3
4
RES
+2V5-REF
330p
2UB4
2
U
B
8
2
2
u
IUA1
2 7
+12V
IUA9
470R
3U26-2 RES
3UB0
22R
2
6
1
BC847BS(COL)
7UA7-1
2
1 3
2
U
B
0
1
u
0
LF25ABDT
7UC0
2 7
+3V3
+5V
1 8
100R
3U15-2
100R
3U15-1
PHD38N02LT
7UA3
BC817-25W
7UA6
3
U
A
4
+3V3
+2V5-LVDS
1
K
0
2
U
A
6
1
u
0
3UB1
IUA5
1K0
8
CUA0
3
U
B
7
-1
4
7
0
R
1
3UB6-1
1K0
1 8
+12V
+12V
FUA2
IUB6
3UA1
3
K
3
1
%
1
n
0
2
U
A
3
30R
5UA0
RES
470R
3 6
3U29-2
470R
2 7
3U29-3
RES
1 8
RES
3U26-3
3 6
470R
3U29-1
470R
RES
IUA4
1
u
0
2
U
A
4
3
2
1
8
4
2
7
7UA1-1
LM833
3
U
B
7
-24
7
0
R
6
2
U
B
5
1
0
0
n
RES
3U25-3
100K
3
1
0
0
K
3
U
2
5
-1
R
E
S
8
1
3
U
2
5
-2
1
0
0
K
2
7
3
U
A
6
1
K
0
R
E
S
+2V5-REF
4 5
2
U
B
2
1
u
0
470R
3UB7-4
2
2
K
3
U
A
8
3
U
A
9
+5V-TUN
+1V2
1
K
0
3U15-4
4 5
+5V
FUA0
100R
R
E
S
+5V5-TUN
1
u
0
2
U
B
1
RES
4 5
+12V
IUB5
470R
3U26-4
+3V3
1
3
5
1
u
0
2
U
B
7
LDS3985M50
7UA5
4
2
3UB6-3
1K0
3 6
IUB0
2
U
A
8
3
3
0
p
+1V8
IUA3
3
U
A
0
2
K
2
1
u
0
2
U
A
5
A
3
1
K
2
R
+2V5
7UA0
TS2431
3
U
B
3
4
K
7
+12V
2
U
A
9
1
n
0
6
+5V-TUN
3U16-3
100R
3
3U16-1
100R
1 8
4 5
+3V3
RES 3U29-4
470R
3UA2
3
K
3
1
%
IUB3
IUB2
2
U
B
6
1
u
0
3
3
0
R
3
U
1
3
5
6
7
8
4
1
%7UA1-2
LM833
2
U
A
7
1
0
0
n
22n
2UB3
+2V5-REF
+5V
100n
2UA0
4 5
IUA6
1K0
3UB6-4
3
U
A
3
4
7
K
IUB4
IUA2
FUA4
IUA7
4
7
0
R
3
U
B
7
-3
3
6
3U16-2
100R
2 7
2
U
A
1
1
0
0
n
22R
3UA5
1
3
3UB4
1K0
7UA2
PHD38N02LT
2
3UB6-2
2 7
1K0
ENABLE-1V8
4
K
7
3
U
B
2
SENSE+1V2
Circuit Diagrams and PWB Layouts EN 127 Q552.1E LA 10.
2010-Feb-19
back to
div. table
DC/DC
18770_524_100118.eps
100118
DC/DC
B03E B03E
2009-10-22 4
8204 000 8951
DC/DC
GND
VIN
HS P A
INH
SYNC
SW
VFB
A
S
W
COM
OUT IN
GND
VIN
HS P A
INH
SYNC
SW
VFB
A
S
W
COM
OUT IN
VIA
VIA
5UD0 A2
5UD1 A5
5UD2 C5
5UD3 C2
6UD0 A6
6UD1 E4
7U05-1 B7
7U05-2 D7
7UD0-1 A4
7UD0-2 B4
7UD1-1 C4
7UD1-2 D4
IU28 D8
IUD0 A2
IUD1 C2
3UD2 B6
3UD3 D5
3UD4 D5
8
1 2
()
8
A
B
C
D
3UD5 D5
NOT FOR 5000 SERIES
IUD2 D5
IUD3 A5
IUD4 C5
IUD5 E4
IUD6 B6
IUD7 A5
2UE1 D5
2UE2 D6
2UE3 D6

F
2U27 B8
2U28 D8
2UD0 A2
2UD1 A2
7UD2 E5
7UD3 F5
FUD2 C5
FUD3 A7
IU27 B8

2 3 4 5 6 7
3 4 5 6 7
2UD6 B6
2UD7 B6
2UD8 C2
2UD9 C2
2UE0 C3
C
D
E

2UD4 B5
()
2UD2 A3
2UD3 B3
2UE4 D6
2UE5 E4
2UE6 E6
2UE7 F4
2UE8 F5
2UE9 B8
3U06 B8
3U07 D8
3UD0 B5
3UD1 B5
A
B
1
FOR 5000 SERIES ONLY
E
F
1
0
0
n
2
U
2
8
R
E
S
2UD5 B5
+5V
+1V1
1
6
V
2
2
0
u
2
U
D
6
1
6
V
2
2
u
2
U
E
6
2
U
E
4
2
2
0
u
1
6
V
IUD2
1
0
0
n
2
U
E
5
IUD4
IUD1
2
U
D
4
IUD3
2
2
u
3 5
16
49
2
8
7
7UD0-1
ST1S10PH
1
n
0
2
U
D
3
+12V
R
E
S
1
0
u
2
U
D
0
1
0
u
2
U
D
9
+12V
6UD0
SS36
4
n
7
2
U
E
1
3UD3 1
0
0
K
1
%
IUD7
RES
5
3
4
BC847BS(COL)
7U05-2
3
3
K
3
U
D
1
1
%
+3V3
2
2
u
2
U
E
2
FUD2
30R
5UD3
S1D
6UD1
1
3 2
7UD2
LD1117DT25
2
U
E
7
1
0
0
n
+5V
R
E
S
2
2
u
2
U
E
9
3u6
5UD2
3
U
D
4
1
M
0
2
U
E
8
2
2
u
1
6
V
IUD5
3
U
0
7
R
E
S
120K
3UD2
1
0
K
1
%
+1V1
3
U
D
5
3
3
K
3
U
0
6
1
0
K
R
E
S
R
E
S
2
U
2
7
1
0
0
n
+2V5
1
4
1
5
2
U
D
8
1
0
u
7UD0-2
10
11
12
1
3
7UD1-2
ST1S10PH
10
11
12
1
3
1
4
1
5
ST1S10PH
+5V5-TUN
1
0
u
2
U
D
2
2
U
D
1
1
0
u
2
U
D
5
2
2
u
IUD6
2
U
E
3
2
2
u
30R
1
3 2
5UD0
+3V3
7UD3
LD1117DT33
4n7
2UD7
5UD1
3u6
IU28
2
6
1
IU27
BC847BS(COL)
7U05-1
RES
FUD3
6
2
U
E
0
1
0
u
49
2
8
7
3 5
1
1
%
ST1S10PH
7UD1-1
3
U
D
0
6
8
K
IUD0
ENABLE-3V3-5V
ENABLE-3V3-5V
EN 128 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Temp Sensor + AmbiLight
18770_525_100118.eps
100118
Temp Sensor + AmbiLight
B03F B03F
2009-10-22 4
8204 000 8951
DC/DC
5UM1 A3
E
A
4
IUM0 A4
D
B
1
C
D
1UM0 A4
FUM0 A5
2 7
B
A
5 6 2 3
E
C
5UM0 A3
1 5 6
7
3 4
FUM0
1UM0
1.0A
+3V3
63V T
+5V
RES
5UM0
30R
IUM0
30R
5UM1
V-AMBI
Circuit Diagrams and PWB Layouts EN 129 Q552.1E LA 10.
2010-Feb-19
back to
div. table
Fan Control
18770_526_100118.eps
100118
Fan-Control
B03G B03G
2009-10-22 4
8204 000 8951
DC/DC
3US7 A4
3US9 B6
7US1-1 A5
7US1-2 B5
3US4-1 A4
3US4-2 D4
3US4-3 C4
3US4-4 C5
3US5-1 B6
3US5-2 A6
3US5-3 A5
3US5-4 B5
3US6 C6
4
1 2 3 4 5 6
A
7 8 9
1
E
F
2US3 A7
3US2 A3
3US3 B3
7 6 5 3 2
IUS9 B6
IUT1 A4
IUT2 B4
8 9
A
B
C
D
IUS7 B7
IUS8 B6
7US1-3 C5
7US1-4 D5
7US2 A6
7US3 B6
9US0 D4
IUS0 D5
IUS3 A5
IUS4 B5
IUS5 C5
IUS6 A6
+3V3
+3V3
B
C
D
E
F
1
0
K
2
S
U
3
3
S
U
3
1
0
K
+12V
2
U
S
3
1
0
0
n
IUS5
+12V
1
0
K
3
U
S
4
-3
3
6
3US7
1K0
IUS3
4
5
+12V
+12V
1
3
U
S
4
-4
1
0
K
3
U
S
5
-1
1
0
K
8
IUS7
+12V
7US2
BC807-25W
6 3
2
7
10K
3US5-3
3
U
S
5
-2
1
0
K
3
U
S
9
2
2
R
3
12
R
E
S
9
U
S
0
7US1-2
LM339P 11
10
13
9
8
14
3
12
IUT2
LM339P
7US1-1
IUT1
5 4
2
7
10K
3US5-4
1
0
K
3
U
S
4
-2
3
U
S
6
4
7
R
+12V
BC807-25W
7US3
IUS9
+3V3
+12V
1
2
IUS8
LM339P
7US1-3
5
4
2
3
IUS6
+12V
7
6
1
3
1
2
7US1-4
LM339P
3
U
S
4
-1
1
8
IUS0
+12V
1
0
K
TACHO
FAN-CTRL1
FAN-CTRL2
IUS4
FAN-DRV
TACH02
TACH01
EN 130 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Vdisp Switch
18770_527_100118.eps
100118
VDisp-Switch
B03H B03H
2009-10-22 4
8204 000 8951
DC/DC / CLASS D
2
4
4 5
IUU4 C6
7UU0 B4
9UU0-4 A4
D
5 1
IUU2 C5
2UU1 C4
3UU2 D6
9UU1-1 A4
VDISP-SWITCH
3UU3-4 C7
D
9UU0-2 A4
9UU1-4 A4
9UU1-2 A4
E
3UU3-3 C6
9UU1-3 A4
2UU0 C6 3
3UU0-3 C2
3UU3-1 C4
FUU0 A5
9UU0-3 A4
3UU0-2 C4
7
3
A
B B
IUU5 C7
7UU1 B5
7UU2-1 C3
IUU1 C4
A
1
E
C
IUU0 C3
IUU3 C6
6
C
7UU3 C6
9UU0-1 A4
7
3UU3-2 C5
2
6
7UU2-2 C3
3UU0-1 C4
IUU2
IUU6 D6
3UU1 C4
2UU1
FUU0
+VDISP-INT
1u0
2
7UU3
BC847BW
RES
1
3
+3V3
2
U
U
0
1
0
0
n
47R
3UU1
5
3
4
+3V3-STANDBY
6
1
PUMD12
7UU2-2
7UU2-1
PUMD12
2
3 6
9UU1-1
RES
1 8
3UU0-3
47K
RES
9UU1-2 2 7
9UU1-3
RES
3 6
RES
9UU0-4 4 5
7
9UU0-3
RES
3 6
1
RES
9UU0-2 2
2
3
U
U
0
-
1
4
7
K
8
3UU0-2
7
8 1
IUU0
47K
5
3UU3-1
47K RES
3UU3-4
47K RES
4
47K
3UU3-3
RES
6 3
3UU3-2
RES
2 7
9UU0-1
RES
1 8
47K
+12VD
SI4835DDY
+3V3
7UU0
RES
4K7
3UU2
RES
RES
9UU1-4 4 5
IUU6
IUU1
SI3441BDV
IUU3
7UU1
IUU5 IUU4
LCD-PWR-ONn
Circuit Diagrams and PWB Layouts EN 131 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-14 B04 820400089524 Analog I/O
Analogue Externals A
18770_528_100118.eps
100218
Analogue Externals A
B04A B04A
2009-10-22 4
8204 000 8952
CLASS D
FE83 G4
FE84 G4
FE85 G5
FEA0 A7
FEA1 B7
IEC0 A7
IEC1 A6
IEC2 B7
* EU
IE54 E1
IE55 F1
IE56 E9
IE57 F9
IE59 E8
RES
RES
FE60 A12
FE61 B12
FE62 B12
FE63 D12
FE64 D12
IE60 E6
IE61 E6
IE62 H10
IE67 A8
IE68 B8
IE70 E7
IE89 D7
IE90 D7
IE91 G6
IE92 G7
IE93 H7
IE94 H6
IE96 G6
7E09-2 G10
9E01 D6
9E02 D7
9E05 F4
9E06 G4
RES
9E07 F4
FEC8 B13
IE05 D10
IE08 E5
IE13 D6
IE14 F5
IE16 F5
IE17 G5
IE18 E3
IE20 B10
IE21 C10
IE22 B2
IE23 C2
IE48 G2
IE51 G10
IE52 H2
IE53 D1
6E22 E3
6E23 D3
6E24 D11
6E26 F3
6E28 F3
* EU
AP
FE66 E12
FE67 E12
FE68 D12
FE70 A5
FE71 B4
FE72 C4
FE73 E4
FE74 E4
FE75 E4
FE76 G12
FE77 H12
FE78 H12
FE79 F13
FE80 E4
FE81 F4
FE82 F4
3EB6-4 G6
3EB9-1 H6
3EB9-2 I13
3EB9-3 I13
3EB9-4 I6
(AV1)
9E08 F4
9E09 G4
9E10 F4
9E50 D1
9E51 D2
9E52 E1
9E53 E2
9E54 F1
9E55 F2
BEC0 D10
BEC1 E10
BEC2 F10
BEC3 D2
BEC4 E2
BEC5 F2
FE55 D9
3E78 F2
3E79 F2
3E80 C10
3E82 D10
3E83 E10
RES
RES
6E29 H3
6E30 I3
6E31 I11
6E32 I3
6E34 E11
6E35 F11
6E36 G11
6E37 H11
7E01-1 A6
7E01-2 B6
7E04 H6
7E05 G6
7E06-1 E7
7E06-2 E6
7E09-1 H2
3E37-2 G13
3E37-3 H13
3E37-4 A3
3E39 H10
3E43 H2
* EU
SCART2
AP
* EU
5E73 D2
5E74 E2
5E76 F2
5E77 D10
5E78 E10
5E79 F10
5E80 E8
6E01 A3
6E02 E11
6E03 B3
6E07 C3
6E08 B11
6E09 D3
6E10 A11
6E12 C11
6E14 C11
2E99 E8
2EA4 A7
2EA5 B7
2EB1 D6
2EB3 E7
3E07-1 C3
3E84 E10
3E85 F10
3E86 F10
3EA1 D6
3EA2 D6
3EA7-1 A7
3EA7-2 H13
3EA7-3 H13
3EA7-4 B7
3EB1 E6
3EB3 E6
3EB6-1 G6
3EB6-2 H13
3EB6-3 H13
2E75 H4
2E76 I4
2E77 G12
2E78 I12
2E79 D1
AP
2E80 D2
2E81 E7
2E82 C12
3E44 G2
3E45 G7
3E48 G7
3E49 I7
3E52 H7
3E61 G11
3E62 H2
3E63-1 A11
3E63-2 I13
3E63-3 I13
3E63-4 B11
3E73 G10
3E74 D2
3E75 D2
3E76 E2
3E77 E2
2E12 F4
2E13 G11
2E14 F4
2E15 D4
2E16 D12
SCART1
3E07-2 H13
3E07-3 H13
3E07-4 B3
3E11-1 B11
3E11-2 I13
3E11-3 I13
3E11-4 C11
3E16 D11
3E17 E10
3E18 E7
3E19 E7
3E24 C7
3E25 C13
3E31 E3
3E32 E3
3E37-1 C3
G
H
I
A
B
1E24 I11
1E25 I4
1E26 G11
1E27 H11
1E31 B4
2E83 F1
2E84 F2
2E85 F1
2E86 F2
2E87 A4
2E88 B4
2E89 D9
2E90 C4
2E91 D4
2E92 D10
2E93 E10
2E94 E9
2E95 F10
2E96 F9
2E97 E8
2E98 E8
4 5 6 7 8
2E17 E12
2E18 E4
2E19 F12
2E24 G2
2E29 A10
2E30 B10
2E31 C10
2E32 C10
2E33 E12
2E41 H12
2E44 I4
2E50 A12
2E51 B12
2E70 C12
2E73 H7
2E74 F7
1E01-2 H5
1E02 C13
1E12 D4
1E18 F4
1E19 F4
1E22 H4
1E23 I4
RES
1E45 A11
1E46 B11
1E47 C11
1E48 C11
1E49 D11
1E52 F11
1E53 C4
1E54 D4
1E55 E4
1E56 E11
1E57 E11
1EP2 F13
2E01 A3
2E04 D3
2E06 B3
2E10 C3
C
D
E
F
(AV2)
9 10 11 12 13
A
B
C
D
E
F
G
H
I
1E00 A4
1E01-1 D5
1 2 3 4 5 6 7 8 9 10 11 12 13
1 2 3
R
E
S
6E
01
C
D
S
4C
12G
TA
12V
4
5
2 7
3E
B
9-4
470R
1K0
3E07-2
IEC1
3E
25
10K
2
6
1
PUMH7
7E01-1
p001
p001
2E
88
2E
90
6E
30
C
D
S
4C
12G
TA
12V
R
E
S
IE54
1u8
5E76
C
D
S
4C
12G
TA
12V
R
E
S
3E84
18R 6E
22
1u0 16V
2EA5
3E78 18R
150p
2E
93
1R
0
+3V3
FEC8
3E
A
2
5E73
1u8
100p
2E
91
3E
73
4K
7
9E09
2E
01
100p
6E
08
C
D
S
4C
12G
TA
12V
R
E
S
330R
3E
B
3
1
2
IE94
IEC0
2E
14
100p
1E
19
IE68
1K0 4 5
3E11-4
1E
12
1
2
IE90
18K
3E
19
FE74
1E
24
23
18R
3E79
MRC-021V-29 PC
MT
1E01-2
22
9E55
3EB6-1
470R
1 8
6E
24
C
D
S
4C
12G
TA
12V
R
E
S
2E
30
100p
IE05
IE48
BEC3
18R
3E75
2E
75
100p
IE13
R
E
S
7
FE78
3EA7-2
470R 2
3E31
12K
R
E
S
6E
07
C
D
S
4C
12G
TA
12V
2E
84
150p
470R
3EB9-1 1 8
IE53 150p
2E
92
3E85 18R
75R
3E
43
1K0
3E07-1
1 8
3E63-4
4 5
100R
1E
56
18R 3E76
IE22
FE81
FE63
8
9
FE68
18
19
2
20
21
3
4
5
6
7
1
10
11
12
13
14
15
16
17
1E02
MTJ-505H-01 NI LF
7
8
9
FE64
1
10
11
12
2
3
4
5
6
IEC2
1EP2
FE73
5E78
1u8
100p
2E
15
150p
2E
85
IE93
RES
IE89
68R
3E49
1E
45
2E
24
100n
BEC0
BC847BPN(COL)
7E06-2
5
3
4
3E
32
4K
7
3E07-3
1K0 3 6
FE83
5
3
4
PUMH7
7E09-2
1X02
REF EMC HOLE
IE60
1E
31
FE76
1E
55
R
E
S
6E
23
C
D
S
4C
12G
TA
12V
R
E
S
C
D
S
4C
12G
TA
12V
6E
10
2E
41
100p
150p
2E
96
2E
29
100p
150p
2E
89
3E77
18R
1E
57
9E10
3
4
1E
22
PUMH7
7E01-2
5
R
E
S
6E
28
C
D
S
4C
12G
TA
12V
2E
19
100p
IE23
9E06
R
E
S
FE72
1
2
6E
37
C
D
S
4C
12G
TA
12V
3E
18
39K
3E80 18R
+3V3
470R
3EA7-3
3 6
3E82
100p
2E
06
18R
6E
31
C
D
S
4C
12G
TA
12V
R
E
S
18R
FE55
3E86
9E
01
2E
95
150p
1E
49
2E
18
100p
12V
C
D
S
4C
12G
TA
6E
12
R
E
S
IE18
IE55
1E
48
IE59
7E04
BC847BW
1u8
5E79
10u
1E
53
5E80
150p
2E
86
2E
32
12V
C
D
S
4C
12G
TA
6E
26
R
E
S
100p
2E
31
100p
9E52
2E
17
100p
5
68R
3E45
3E07-4
1K0 4
1E
27
FE80
1E
54
1E
18
2E
74
100n
3E11-1
1 8 1K0
150p
2E
79
FE84
5p6
3E48
68R
RES
2E99
9E51
2E
83
150p
R
E
S
1 2
6E
36
C
D
S
4C
12G
TA
12V
9E50
3EB1
820R
100p
2E
50 470R
3EA7-1
1 8
+5V
100p
2E
70
IE21
2E
04
100p
+5V
IE52
FE71
BEC4
2E
97
39p
7E05
BC847BW
BEC2
FE61
FE75
FE70
IE51
IE62
150p
IE92
6
2E
94
3E37-3
100R 3
3E
17
4K
7
3E
44
4K
7
C
D
S
4C
12G
TA
6E
29
12V
R
E
S
R
E
S
FE60
100p
2E
77
9E05
FE79
FE67
150p
2E
80
2 7
2E73 100n
470R
3EB6-2
100R
3E37-1
1 8
FE85
9E
02
2EA4
1u0 16V
1E
26
2 7
100R
3E63-2
100R
3E37-2
2 7
9E08
IE91
+3V3
9E07
2E
98
18p
2E
16
100p
1E
52
2E
78
100p
FE77
R
E
S
1E
47
IE20
BEC5
2E
13
BEC1
16V
100n
IE14
IE08
+5V
18R
2K2
3E24
3E74
6
7
8
9
FE66
16
17
18
19
2
20
21
3
4
5
MRC-021V-29 PC
1E01-1
1
10
11
12
13
14
15
FEA0
IE57
18R 3E83
FE62
3E11-3
3 6
3E52
68R
1K0
1E
25
1u0
2E
B
3 IE61
2E81
2u2
R
E
S
FE82
27R
3E62
6E
35
C
D
S
4C
12G
TA
12V
3EA7-4
470R 4 5
4
5
3E16 12K
6
470R
3E
B
6-4
3E63-3
100R
3
2 7
3E11-2
1K0
6E
34
C
D
S
4C
12G
TA
12V
R
E
S
6E
14
C
D
S
4C
12G
TA
12V
R
E
S
1E
46
12V
R
E
S
IE96
3 6
C
D
S
4C
12G
TA
6E
32
3EB9-3
470R
9E54
2E
82
100p
R
E
S
3E39
27R
12V
C
D
S
4C
12G
TA
6E
03
2E
87
100p
PUMH7
7E09-1 2
6
1
IE67
2E
44
100p
IE17
IE16
1E
00
2E
51
100p
3E
A
1
1K
0
IE56
75R
3E
61
6
1
5E77
1u8
7E06-1
BC847BPN(COL)
2
100p
2E
10
100p
2E
33
1E
23
9E53
100p
2E
12
3EB6-3
470R
3 6
6E
02
C
D
S
4C
12G
TA
12V
R
E
S
3E63-1
100R
1 8
R
E
S
100p
2E
76
5E74
1u8
3EB9-2 2 7
IE70
470R
12V
C
D
S
4C
12G
TA
6E
09
R
E
S
100n
2E
B
1
FEA1
3E37-4
100R 4 5
RESET-AVPIP
CVBS-MON-OUT1
CVBS-OUT-SC1
A-PLOP
YPBPR2-SYNCIN2
AV2-BLK
AV4-Y
AV4-PR
AV4-PB
AV1-G
YPBPR1-SYNCIN1
YPBPR1-PB
YPBPR1-PR
AP-SCART-OUT-R
AUDIO-OUT-R
AP-SCART-OUT-L
AUDIO-OUT-L
AV1-B
AUDIO-IN1-L
AP-SCART-OUT-L
AUDIO-IN1-R
AP-SCART-OUT-R
AV1-R
AV2-CVBS
CVBS-OUT-SC1
AV1-STATUS
AUDIO-IN2-R
AP-SCART-OUT-L
AUDIO-IN2-L
AV1-CVBS
AV1-BLK
AV2-STATUS
AP-SCART-OUT-R
EN 132 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Analogue Externals B
18770_529_100118.eps
100118
Analogue Externals B
B04B B04B
2009-10-22 4
8204 000 8952
ANALOG I/O
SVHS IN
4 5 6 7
EU
1 2 3 4
C
D
E
F
9 10 11 12
G
H
I
1E03 B3
C
D
E
F
1E08-3 D3
1E09 F3
1E28 B4
1E29 D4
AP
1E43 B4
1E44 B10
1E75 H5
1E76 I5
B
5 6 7 8
1E04 C3
1E07 A12
1E08-1 B3
1E08-2 E3
2E27 B4
2E35 F6
2E36 F4
2E37 G4
1E37 F4
1E38 G4
1E39 C4
1E42 E4
EU
YPBPR AUDIO
2E68 C4
2E71 E5
3E21 F5
3E87 B6
3E88 B6
3E89 B6
1 2 3
6E06 D5
6E15 H5
6E16 I5
6E19 F5
8 9 10 11 12 13 14
VGA ( OR DVI ) AUDIO
YPBPR
13 14
A
B
6E51 B4
6E52 C4
9E04 B5
G
H
I
A
BE21 H6
BE22 I4
2E72 D5
3E14 H6
3E15 H6
3E20 G5
FE42 C4
FE43 D4
FE44 H5
FE45 H5
FE51 B4
FE54 B4
FE59 B10
IE09 F6
1ECB I4
2E20 H4
2E21 I4
2E22 B9
IE71 B6
IE72 B7
IE73 B7
IE74 B6
IE75 B7
IE76 C6
IE77 C7
2E38 G6
2E39 D4
2E40 E4
2E67 B4
FE01 F4
FE02 F5
FE03 G5
FE41 B12
3E90 C6
3E96 E5
3E97 D5
5E06 B9
FE46 I4
FE48 C4
FE49 E4
FE50 D4
6E20 G5
6E38 E5
6E40 B5
6E46 B11
IE10 G6
IE15 B9
IE29 E6
IE31 D6
EU
SPDIF out
9E29 B5
9E57 B5
9E58 C5
BE20 H6
2
E
3
7
1
n
0
1
E
2
9
IE74
6
E
3
8
C
D
S
4
C
1
2
G
T
A
1
2
V
R
E
S
FE43
1
0
0
p
2
E
3
9
C
D
S
4
C
1
2
G
T
A
6
E
4
6
R
E
S
FE02
1
2
V
3E88
27R
IE31
18R
3E87
FE48
1
0
0
p
2
E
3
5
3E90
18R
IE75
FE42
2
E
7
2
1
0
0
p
FE59
1
E
2
8
YKB11-0946V 2
1
1E07
CON_JACK
2
3
4
7 5 6
FE51
1ECB
MDC-066H-A LF
1
FE03
1K0
3E96
FE41
IE29
IE77
1E08-2
WHITE
YKC21-5598
3
4
9E57
YKC21-5598
1
2 1E08-1
YELLOW
3E89
18R
1
2
V
R
E
S
C
D
S
4
C
1
2
G
T
A
6
E
4
0
9E58
1
2
V
R
E
S
IE72
FE50
6
E
5
1
C
D
S
4
C
1
2
G
T
A
1
0
0
p
IE09
2
E
6
8
1
0
0
p
2
E
7
1
5E06
30R
1E08-3
RED
YKC21-5598
5
6
IE71
1
2
V
R
E
S
C
D
S
4
C
1
2
G
T
A
6
E
0
6
1
0
0
p
2
E
2
7
1K0
3E21
1
0
p
2
E
2
2
1
E
3
9
2
E
3
8
1
0
0
p
1
2
1
E
4
4
MTJ-032-21B-41 NI FE
1E03
1
E
4
3
1K0
3E97
IE15
1
E
4
2
2
E
4
0
1
0
0
p
BE22
FE54
BE21
BE20
IE73
4
5
7
8
V
_
N
O
M
1
E
3
8
1E09
MSJ-035-10A B AG PPO
1
2
3
FE44
1
2
V
C
D
S
4
C
1
2
G
T
A
6
E
2
0
9E29
1
E
7
5
IE10
FE01
IE76
R
E
S
1
2
V
C
D
S
4
C
1
2
G
T
A
6
E
1
6
1
E
7
6
1
0
0
p
2
E
6
7
9E04
FE49
3E20
1K0
6
E
1
9
C
D
S
4
C
1
2
G
T
A
1
2
V
1
E
3
7
V
_
N
O
M
6
E
5
2
C
D
S
4
C
1
2
G
T
A
1
2
V
FE45
R
E
S
1
n
0
2
E
3
6
FE46
18R
3E14
2
E
2
0
1
0
0
p
6
E
1
5
C
D
S
4
C
1
2
G
T
A
1
2
V
R
E
S
2
3E15
27R
1E04
MTJ-032-21B-41 NI FE
1
1
0
0
p
2
E
2
1
YPBPR1-PR
YPBPR1-PB
YPBPR1-SYNCIN1
C-SVHS
Y-SVHS
SPDIF-OUT
AV3-PR
AV3-Y
AV2-CVBS
AV3-PB
AUDIO-IN4-L
AUDIO-IN4-R
AUDIO-IN3-R
AUDIO-IN3-L
Circuit Diagrams and PWB Layouts EN 133 Q552.1E LA 10.
2010-Feb-19
back to
div. table
Ethernet + Service
18770_530_100118.eps
100118
Ethernet + Service
B04C B04C
2009-10-22 4
8204 000 8952
ANALOG I/O
VDD
CLKIN
XTAL
RXD<0:3>
MODE
CRS_DV
MODE2
INT
TXER
TXD
RX
P
N
TX
RXD4
0
RXCLK
PHYAD
1
INTSEL
LED
P
N
TXCLK
RXDV
1
RXER
REGOFF
2
CRS
RBIAS
CR 1A 2A IO
TXEN
0
1
2
3
4
MDC
MDIO
VSS
1
2
RST
0
1
RMIISEL
PHYAD2
COL
VIA
3E66 (RES)
MODE(0) = 1
BE02 G6
PHYADD(2) = 0
FE28 G6
IE33 B3
IE38 B4
IE49 A10
IE50 A9
IE63 C6
IE64 C6
FE58 A11
IE06 B4
FE29 G6
FE30 G6
INTERRUPT FUNCTION
FE33 I5
FE34 H6
FE56 A11
FE57 A11
6E47 G2
6E48 G3
7E10-1 B4
IE07 A3
IE26 C2
IE32 B3
PHYADD(1) = 1 3E65 (RES)
INTERRUPT FUNCTION
Resistor
MII mode selected
IE39 D5
BE01 G6
7E10-2 E4
9E42 D5
9E43 C3
BE00 G6
3E65 D6
3E66 B2
BE03 H6
FE27 G6
3E69 C2
PHYADD(1) = 0
Internal 1.2V reg. disabled
3E70 C1
3E95-1 F3
3E95-2 F3
FE31 H6
FE32 I5
3E98 F5
5E08 A3
6E43 A9
6E44 A10
3E30 B3
3E33 B2
6E49 G4
6E50 G5
3E40 D5
ENABLED ON
3E70 (RES)
3E64 (RES)
RMII mode selected
3E53-2 A9
3E53-3 A10
3E53-4 A9
3E64 C6
D
E
3E67 B2
3E68 D6
H
MODE(2) = 0
CONFIGURATION RESISTOR SETTINGS
Internal 1.2V reg. enabled
3E71 C3
3E72 D6
2E62 A3
2E63 A3
3E95-3 F4
3E95-4 F4
3E22-2 F3
3E22-3 F2
3E22-4 F2
3E26 F5
13 14
3E34 D6
3E35 D6
C
UART
POP
3E69 (RES)
PHYADD(0) = 1
E
F
3E51 E1
3E53-1 A10
I
A
B
C
13 14
F
G
3
PHYADD(2) = 1
MODE(2) = 1
2E60 H5
5 6
2E66 A3
3E22-1 F2
9 10 11 12
2E55 B3
2E56 H2
A
B
3E67 (RES)
MODE(1) = 0
3E72
MODE(1) = 1
SERVICE
1 2
D
10 11
G
H
nINT/TXER/TXD4 SIGNAL
1 2
5 6 7 8 9
DISABLED ON
MODE(0) = 0
PHYADD(0) = 0
1N00 G7
4
EMPTY
nINT/TXER/TXD4 SIGNAL
3E71 (RES)
2E57 H2
2E58 H3
7 8
I
1E06 A13
1E70 B3
1E85 A11
1E86 A11
2E48 B5
2E49 B5
2E52 B3
2E53 B4
2E54 B3
3 4
2E59 H4
ETHERNET CONNECTOR
CONNECTOR
12
3E68 (RES)
1
0
0
n
2
E
5
2
N
U
P
1
3
0
1
M
L
36
E
4
8
3
E
6
6
1
0
K
R
E
S
5E08
30R
R
E
S
9E43
2
E
4
8
1
0
u
+3V3
IE07
1
0
0
R
3
6
IE63
3
E
2
2
-3
1
5
p
2
E
5
6
IE32
1
E
8
6
R
E
S
2 7
1
8
47R
3E53-2
1
0
0
R
3
E
9
5
-1
+3V3
RES
10K 3E64
3E53-3
47R
3 6
1
0
0
R
4
5
3
E
9
5
-4
BE03
IE39
3E53-4
47R
4 5
3
E
2
2
-1
1
8
+3V3-ET-ANA
1
0
0
R
3E70
10K
+3V3
RES
FE31
+3V3-ET-ANA
N
U
P
1
3
0
1
M
L
36
E
4
9
+3V3
R
E
S
3
E
9
5
-2
1
0
0
R
2
7
FE58
FE57
+3V3
2
E
6
6
1
0
0
n
1
0
0
n
2
E
4
9
IE38
2
2
n
2
E
6
0
IE64
9E42
+3V3
R
E
S
2
E
5
7
1
5
p
FE34
2
7
R
E
S
6
E
5
0
N
U
P
1
3
0
1
M
L
3
4
5
3
E
2
2
-2
1
0
0
R
3
E
2
2
-4
1
0
0
R
1
5
p
2
E
5
8
R
E
S
IE49
3
E
2
6
2
2
R
BE02
+3V3
1
0
0
n
2
E
6
3
FE28
10K 3E68
BE01
RES
6
E
4
3
B
Z
X
3
8
4
-C
5
V
1
2
E
5
4
1
0
p
1
0
K
3
E
6
7
R
E
S
2
E
6
2
1
0
u
4
n
7
2
E
5
3
FE56
3E51 1K5
FE30
2
1
3
IE26
YKB21-5157V
1E06
10K 3E35 +3V3
RES
+3V3-ET-ANA
FE33
IE33
3E34 10K
FE32
3E72 10K
1
E
8
5
3
E
9
8
2
2
R
3
E
3
3
1
0
K
10K
1 61
2
3
3
5
4
RES
3E65
20
22
23
24
25
21
28
29
2
7
19
7
11
10
9
8
26
13
30
31
15
14
18
3
2
17
16
32
LAN8710A-EZK
7E10-1
R
E
S
FE27
2
E
5
9
1
5
p
25M
1E70
NX3225GA
R
E
S
6
E
4
7
N
U
P
1
3
0
1
M
L
3
B
Z
X
3
8
4
-C
5
V
1
6
E
4
4
1 8
IE06
47R
3E53-1
IE50
3
E
4
0
1
2
K
11
%
RES
10K 3E69
10K 3E71
3
6
RES
7
8
1
0
0
R
3
E
9
5
-3
1N00
1551151-1
1
2
3
4
5
6
37
3E30
1M0
7E10-2
LAN8710A-EZK
34
35
36
2
E
5
5
1
0
p
BE00
FE29
ETH-RXN
ETH-RXCLK
ETH-RXER
ETH-RXDV
ETH-TXP
ETH-TXN
ETH-RXP
RXD1-MIPS
TXD1-MIPS
ETH-CRS
ETH-TXCLK
ETH-REGOFF
ETH-INTSEL
ETH-RXD(2)
ETH-RXD(3)
ETH-RXD(0)
ETH-RXD(1)
ETH-TXD(2)
ETH-TXEN
ETH-TXN
ETH-TXP
ETH-INTSEL
ETH-REGOFF
ETH-TXD(3)
ETH-COL
ETH-TXER
ETH-MDC
ETH-MDIO
RESET-ETHERNETn
ETH-RXN
ETH-RXP
ETH-TXD(0)
ETH-TXD(1)
EN 134 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
HDMI
18770_531_100118.eps
100118
HDMI
B04D B04D
2009-10-22 4
8204 000 8952
HDMI
CEC_A
(CBUS) HPD2
R2PWR5V
DSDA2
DSCL2
DSCL3
DSDA3
R3PWR5V
(CBUS) HPD3
(CBUS) HPD0
R0PWR5V
DSDA0
DSCL0
N
P
DSCL1
DSDA1
R1PWR5V
(CBUS) HPD1
VCC33
S
B
V
C
C
3
3
M
IC
O
M
_
V
C
C
3
3
EPAD
R3XC
N
P
R3X0
N
P
R3X1
N
P
R3X2
TX2
N
P
TX1
N
P
TX0
N
P
TXC
VIA
R4PWR5V
DSCL4
DSDA4
CEC_D
N
P
TPWR_CI2CA
RSVDL
CSDA
CSCL
INT
N
P
R0X1
N
P
R0X2
N
P
R1XC
N
P
R1X0
N
P
R1X1
N
P
R1X2
N
P
R2XC
N
P
R2X0
N
P
R2X1
N
P
R2X2
N
P
R0XC
N
P
R0X0
C
D
2EC0 A9
FEC0 A9
FEC1 B2
3ECA-2 D4
3ECA-3 F4
FEC4 B2
E
3ECE H3
3ECF I3
F
7 8
3ECG I3
3ECH A10
D
FECC D2
3ECU-2 I8
3ECU-4 I8
5EC3 A11
6EC1 H3
2ECU I3
2ECV A9
IE42 B8
IE43 D8
5EC0 A8
5EC2 F7
A
B
11 12
FECY E10
FECZ I3
2EC1 A8
IE12 D10
FECJ F2
IE44 E8
IE45 F8
13 14 4 5 6 7
2EC2 A10
2ECQ F8
FEC2 B2
FEC3 A10
3ECA-4 F4
3ECD G3
A
3EC1-1 B4
5 6
FEC6 B2
FEC7 A10
9EC3 E11
FECB A10
IE66 I7
3ECJ D10
3ECK D11
G
H
1
C
3ECN-3 E8
3ECN-4 F8
B
3ECP-3 B10
I
3
3ECN-2 D8
2ECP E8
FECW H9
IE11 I3
FECE D2
E
F
HDMI CONNECTOR 2
2EC3 B10
2EC6 B9
2EC7 B9
2EC8 B9
3EC1-3 B4
3EC3 E10
3ECA-1 D4
3E23 F4
FEC5 B2
FECA F3
7E02 G3
7EC0 G3
G
H
I
3ECP-1 B10
13
2
3ECN-1 B8
FECP F2
FECR E10
3ECL E11
FECK F2
FECD D2
8 9 10
3EC5 E10
HDMI CONNECTOR 1
2ECW B10
IE65 I7
IEC5 G3
HDMI CONNECTOR 3
SII9187A = 0xB2
FECM F2
2 3 4 14
1
3ECF
9
3ECM-4 B8
12
FECG D2
FECL F2
IEC4 G3
IEC6 G4
2ECC G8
2ECM B8
2ECN D8
I2C Address 1P04 A2
NON-INSTAPORT
INSTAPORT
9187A
9287B
9EC2 C11
9EC0 G4
4X 3K3
4X 100K
7EC1 B9
100K
3K3
7EC1 3ECN
10 11
3ECM-1 F8
3ECM-2 E8
3ECM-3 D8
1P02 E2
1P03 C2
FECF D2
FECN F2
IEC7 H3
3ECF
100K
1
0
p
2
E
C
C
CIN-5V
FECP
FEC4
2
2
K
3
E
C
E
FEC3
10R
3ECM-3 3 6
+5V-EDID
IE45
+3V3-HDMI
IE43
9EC2
RES
10K
3ECU-4 4 5
2
E
C
2
1
u
0
FEC1
IEC4
2 7 3ECM-2
10R
IE44
2ECN 1u0
10R
3ECM-1 1 8
FECK
8
1
FECD
3
E
C
1
-1
4
7
K
CIN-5V
FECN
IEC5
RES
4K7
3ECK
3EC5 100R
100K 3ECN-4
4 5
MICOM-VCC33
+3V3-STANDBY
2ECU
1u0
9EC3
RES
FECC
RES 3ECJ
4K7
2
2
0
u
2
E
C
1
R
E
S
1
6
V
BC847BW
7E02
RES
FECF
3
E
C
H
1
0
K
21
22 23
18
19
2
3
4
5
6
7
8
9
20
1
10
11
12
13
14
15
16
17
1P02
3EC3 100R
FECZ
IE66
30R
5EC0
22K
RES
3E23
8
9
20 21
22 23
3
E
C
G
4
R
7
16
17
18
19
2
3
4
5
6
7
1P03
1
10
11
12
13
14
15
+3V3
VGA-SCL-EDID-HDMI
3 6
3ECN-3 100K
FEC7
2 7
1
0
0
n
2
E
C
7
100K 3ECN-2
AIN-5V
BIN-5V
MICOM-VCC33
+3V3-STANDBY
+3V3
+5V-VGA
FECM
2
E
C
V
1
0
u
+5V-EDID
5EC2
30R
1u0 2ECP
FECB
3ECP-1 1
0
K
1
8
IE11
3ECD
100R
FECR
2
E
C
6
FEC6
1
0
0
n
1
0
K
3ECP-3
3
6
RES
VGA-SDA-EDID-HDMI
3ECL
4K7
2ECQ 1u0
BIN-5V
3
6
4
7
K
3
E
C
1
-3
FECW
+3V3
3
6
FECL
4
7
K
3
E
C
A
-3
FECY
FECG
BAT54
6EC1
RES
5EC3
30R
89
75
76
77
78
79
80
81
82
62
92
7
6
4
74
83
84
85
86
87
88
28
3
8
55
61
60
59
58
57
56
63
21
22
23
24
25
26
19
20
49
10
2
42
13
14
15
16
17
18
11
12
46
65
66
36
3
4
5
6
7
8
1
47
7
3
52
3
7
32
67
68
69
70
71
72
53
30
34
40
44
48
29
33
39
43
7EC1
31
35
41
45
50
51
54
SII9287B
2ECM
CIN-5V
FECJ
1u0
AIN-5V
2
E
C
3
1
0
0
n
IE12
IE65
9EC0
DIN-5V
FECA
FEC2
FECE
AIN-5V
7EC0
BC847BW
4 5
8
3ECM-4
10R
3
E
C
A
-1
4
7
K
1
IEC7
FEC5
1
0
0
n
2
E
C
8
IEC6
+3V3
5
6
7
8
9
20 21
22 23
12
13
14
15
16
17
18
19
2
3
4
1P04
1
10
11
4
7
K
3
E
C
A
-2
7
2
1
0
u
2
E
C
W
AIN-5V
R
E
S
3ECU-2
10K
2 7
CIN-5V
5
4
BIN-5V
FEC0
3
E
C
A
-4
4
7
K
1
0
0
n
2
E
C
0
BIN-5V
1 8
+5V
3ECN-1 100K IE42
DDCA-SCL
eHDMI+
ARC-eHDMI+
DDCA-SDA
BRX-DDC-SDA
ARX-DDC-SDA
CRX-HOTPLUG
DRX-HOTPLUG
CRX-DDC-SDA
BRX-DDC-SCL
SDA-SSB
CEC-HDMI
PCEC-HDMI
CRX-DDC-SCL
CRX-DDC-SDA
ARX-DDC-SCL
ARX-DDC-SDA
ARX-HOTPLUG
BRX-HOTPLUG
DRX-DDC-SCL
DRX-DDC-SDA
SCL-SSB
HDMIA-RX2-
HDMIA-RXC+
HDMIA-RX0+
HDMIA-RX1+
HDMIA-RX2+
BRX-DDC-SCL
BRX-DDC-SDA
DRX1-
DRX2+
DRX2-
DRXC+
DRXC-
HDMIA-RXC-
HDMIA-RX0-
HDMIA-RX1-
CRX0-
CRX1+
CRX1-
CRX2+
CRX2-
CRXC+
CRXC-
DRX0+
DRX0-
DRX1+
BRX0+
BRX0-
BRX1+
BRX1-
BRX2+
BRX2-
BRXC+
BRXC-
CRX0+
ARX0+
ARX0-
ARX1+
ARX1-
ARX2+
ARX2-
ARXC+
ARXC-
ARX1+
ARX1-
ARX0+
ARX0-
ARX-DDC-SCL
CRX-DDC-SCL
PCEC-HDMI CEC-HDMI
ARX2+
ARXC+
ARXC-
PCEC-HDMI
ARX-DDC-SCL
ARX-DDC-SDA
ARX-HOTPLUG
ARX2-
BRX2+
BRXC+
BRXC-
PCEC-HDMI
BRX-DDC-SCL
BRX-DDC-SDA
BRX-HOTPLUG
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
CRX2+
CRXC+
CRXC-
PCEC-HDMI
ARC-eHDMI+
CRX-DDC-SCL
CRX-DDC-SDA
CRX-HOTPLUG
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
Circuit Diagrams and PWB Layouts EN 135 Q552.1E LA 10.
2010-Feb-19
back to
div. table
Headphone
18770_532_100119.eps
100119
Headphone
B04E B04E
2009-10-22 4
8204 000 8952
AUDIO
VIA
GND_HS
VO
IN-
VDD
1
SHUTDOWN
BYPASS
2
GND
2
1
2EE0 C5
2EE1 D5
2EE4 E3
2EE5 D5
7 8
2 3 6 7
B
C
F F
A
2EE2 E4
2EE3 E2
D
E
2EE6 E6
2EE7 E6
3EE0-4 E3
3EE1-1 C5
1 2 3 4 5 6 9
1 4 5
3EE2-1 D7
3EE2-2 E7
7EE0-1 B5
7EE0-2 B6
8 9
A
7EE1 D4
D
E
FE35 E7
FE36 E7
B
C
FEE0 B4
IEE0 E2
IEE1 E2
IEE2 E2
IEE3 E3
IEE4 E3
3EE0-1 E3
3EE0-3 F3
IEE5 F3
IEE6 E4
3EE1-2 D8
3EE1-3 D8
IEE7 E6
IEE8 E6
2EE0
3EE1-4 D5
3EE2-3 E7
3EE2-4 E7
2EE5
47p
3 6
47p
10K
3EE0-3
FEE0
2
E
E
1
1
0
0
n
1 8
4 5
3EE2-1
33R
3EE2-4
33R
IEE3
IEE4
6
5
8
10
11
1
7
TPA6111A2DGN
7EE1
AMPLIFIER

3
49
2
IEE1
IEE6
1 8
IEE7
IEE5
3EE1-1
22K
4 5
22K
3EE1-4
IEE2
5 4
IEE8
1
3EE0-4
10K
3EE0-1
10K
8
2EE3
1u0
1u0
2EE4
4
+3V3
PUMD12
7EE0-2 5
3
4V 100u
2EE7
2
2
K
3
E
E
1
-2
2
7
4V 100u
2EE6
6
1
PUMD12
7EE0-1 2
1u0
2EE2
+3V3-STANDBY
IEE0 FE36
3 6
FE35
2 7
3EE2-3
33R
3EE2-2
33R
3
6
3
E
E
1
-3
2
2
K
AMP1
AMP2
ADAC(4)
ADAC(3)
A-PLOP
RESET-AUDIO
A-PLOP
A-STBY
EN 136 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-15 B05 820400089832 DDR
DDR
18770_533_100119.eps
100218
DDR
B05A B05A
2009-10-30 2
8204 000 8983
DDR 2
1
VSS
VDDQ
14
V
S
S
D
L
VREF
V
D
D
L
CK
12
11
LDM
UDM
15
13
7
8
9
10
3
4
5
6
VSSQ
BA
A
LDQS
UDQS
NC
DQ
CKE
WE
ODT
RAS
2
CS
CAS
0
0
1
2
VDD
12
11
10
9
8
7
6
5
4
3 0
1
2
1
VSS
VDDQ
14
V
S
S
D
L
VREF
V
D
D
L
CK
12
11
LDM
UDM
15
13
7
8
9
10
3
4
5
6
VSSQ
BA
A
LDQS
UDQS
NC
DQ
CKE
WE
ODT
RAS
2
CS
CAS
0
0
1
2
VDD
12
11
10
9
8
7
6
5
4
3 0
1
2
3B27 E6
3B28 E12
3B29 E7
3B30 E13
3B31 E6
3B42 E3
2B48 F6
2B49 F12
2B50 F6
2B51 F12
2B52 F3
3B43 F2
3B44 F9
3B45 F3
3B46 F9
3B47 F2
3B48 F9
3B57 F6
3B14 D13
3B15 E6
3B16 E12
3B17 E7
3B49 F3
3B50 F9
3B51 H2
3B23 E6
3B24 E12
3B25 E7
3B26 E13
B
C
D
E
F
3B32 E12
3B33 E7
3B34 E13
3B35 E6
3B20 E12
3B21 E7
3B41 E12
2B35 C9
2B36 C9
2B37 C9
2B38 C9
10 11
2B53 F10
2B54 F3
2B55 F10
3B10 D13
3B52 I2
3B53 D7
3B54 F3
3B55 E13
3B56 F7
5 6
3B18 E13
3B19 E6
9 10
3B22 E13
12 13 14
A
G
H
I
A
3B36 E12
3B37 E7
3B38 E13
3B39 E6
3B40 E9
2B34 C9
12 13 14
1
3B11 D6
3B12 D12
3B13 D7
7 8 11
2B13 C11
2B14 C2
2B15 C2
2B16 C2
2B17 C2
6
B
C
D
AT T-POINT
7B02 D10
FB00 I2
1 2
2 3 4
F
G
5
E
H
I
2B18 C3
2B19 C3
2B20 C3
2B21 C3
7 8 9
2B10 C5
2B11 C11
2B12 C5
2B31 C8
2B32 C8
2B33 C8
3B58 F12
7B00 D4
3 4
RES RES 3B40
220R 220R
3B42
2B49
100n
2B
17
100n
3B10
33R
DDR2-VREF-DDR
33R
3B12
2B48
100n
DDR2-VREF-DDR
1%
180R
3B
51
100n
2B
36
2B
35
100n
100n
2B
34
3B18
33R 3B20
+1V8
33R
+1V8
3B45
33R
2B
12
1u0
2B
10
R
E
S
47u
33R
3B34
3B32
33R
33R
3B30
3B28
33R
33R
3B26
3B24
33R
33R
3B22
FB00
100n
2B
33
2B
32
100n
2B
31
100n
3B58
33R
3B55
33R 3B57
33R
3B56
33R
DDR2-VREF-DDR
3B
52
180R
1%
D
2
D
8
E
7
F
2
F
8
H
2
K3
J3
N
1
P
9J7
A
7
H
8
B
2
B
8
C
9
E
9
G
1
G
3
G
7
J2
A
3
E
3
M
9
R
1
J1A
9
G
9
C
1
C
3
C
7
K9
K7
B3
B7
A8
A
1
E
1
J9
F7
E8
A2
E2
R3
R7
R8
H3
H1
H9
F1
F9
C8
C2
F3
G2
D7
D3
D1
D9
B1
B9
H7
L2
L3
L1
L7
J8
K2
K8
L8
G8
M7
N2
N8
N3
N7
P2
P8
P3

SDRAM
M8
M3
M2
P7
R2
7B00
EDE1116AGBG-1J-F
3B53
33R
33R
3B16
3B14
33R
100R
3B54
B
8
D
2
D
8
E
7
F
2
F
8
H
2
K3
J2
A
3
E
3J3
N
1
P
9J7
A
7
H
8
B
2
J1A
9
G
9
C
1
C
3
C
7
C
9
E
9
G
1
G
3
G
7
K9
K7
B3
B7
A8
A
1
E
1
J9M
9
R
1
C8
C2
F3
F7
E8
A2
E2
R3
R7
R8
D3
D1
D9
B1
B9
H7
H3
H1
H9
F1
F9
L3
L1
L7
J8
K2
K8
L8
G8
G2
D7
P7
R2
M7
N2
N8
N3
N7
P2
P8
P3
L2
SDRAM

EDE1116AGBG-1J-F
7B02
M8
M3
M2
100n
2B
38
2B
37
100n
33R
3B46
3B44
33R
R
E
S
1u0
2B
13
2B
11
47u
100p
2B51
100p
2B50
+1V8
33R
3B37 33R
3B35
3B33
33R
33R
3B31
3B29
33R
33R
3B27
3B25
33R
3B47
33R
3B39
33R
33R
3B17 33R
3B15
2B
21
100n
100n
2B
20
2B
19
100n
100n
2B
18
33R
3B13
3B11
33R
2B55
2p2
2p2
2B53
2p2
2B54
2B52
2p2
2B
16
100n
100n
2B
15
2B
14
100n
33R
3B43
33R
3B49 3B50
33R
33R
3B48
3B41
33R
3B38
33R
3B36
33R
33R
3B23
3B21
33R
3B19
33R
DDR2-CS
DDR2-CKE
DDR2-CAS
DDR2-BA1
DDR2-BA0
DDR2-BA2 DDR2-BA2
DDR2-A14 DDR2-A14
DDR2-DQM0
DDR2-DQM3
DDR2-DQM2
DDR2-WE
DDR2-RAS
DDR2-ODT
DDR2-A13
DDR2-DQS3_P
DDR2-DQS3_N
DDR2-WE
DDR2-CLK_N
DDR2-CLK_P
DDR2-DQM1
DDR2-DQS2_P
DDR2-DQS2_N
DDR2-A13
DDR2-ODT
DDR2-RAS
DDR2-D22
DDR2-D23
DDR2-D24
DDR2-D25
DDR2-D18
DDR2-D19
DDR2-D20
DDR2-D21
DDR2-D28
DDR2-D29
DDR2-D30
DDR2-D31
DDR2-D16
DDR2-D17
DDR2-D26
DDR2-D27
DDR2-A9
DDR2-BA0
DDR2-BA1
DDR2-CAS
DDR2-CLK_P
DDR2-CKE
DDR2-CLK_N
DDR2-CS
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-DQS1_N
DDR2-A0
DDR2-A1
DDR2-A10
DDR2-A11
DDR2-A12
DDR2-A2
DDR2-D8
DDR2-D9
DDR2-DQS0_P
DDR2-DQS0_N
DDR2-DQS1_P
DDR2-D3
DDR2-D2
DDR2-D4
DDR2-D5
DDR2-D6
DDR2-D7
DDR2-D1
DDR2-D10
DDR2-D11
DDR2-D12
DDR2-D13
DDR2-D14
DDR2-D15
DDR2-A0
DDR2-A1
DDR2-A10
DDR2-A11
DDR2-A12
DDR2-A2
DDR2-A3
DDR2-A4
DDR2-A5
DDR2-A6
DDR2-A7
DDR2-A8
DDR2-A9
DDR2-CLK_P
DDR2-CLK_N
DDR2-D0
Circuit Diagrams and PWB Layouts EN 137 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-16 B05 820400089535 DDR
DDR
18770_534_100119.eps
100218
DDR
B05A B05A
2009-12-07 5
8204 000 8953
DDR 4
4
5
6
7
2
0
VSSDL VSS
1
2
3
CS
RAS
NU|RDQS
CKE
DQS
ODT
1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
NC
VDDQ
DQ
A
CK
VSSQ
BA
CAS
WE
0
DM|RDQS
VREF VDDL VDD
4
5
6
7
2
0
VSSDL VSS
1
2
3
CS
RAS
NU|RDQS
CKE
DQS
ODT
1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
NC
VDDQ
DQ
A
CK
VSSQ
BA
CAS
WE
0
DM|RDQS
VREF VDDL VDD
4
5
6
7
2
0
VSSDL VSS
1
2
3
CS
RAS
NU|RDQS
CKE
DQS
ODT
1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
NC
VDDQ
DQ
A
CK
VSSQ
BA
CAS
WE
0
DM|RDQS
VREF VDDL VDD
4
5
6
7
2
0
VSSDL VSS
1
2
3
CS
RAS
NU|RDQS
CKE
DQS
ODT
1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
NC
VDDQ
DQ
A
CK
VSSQ
BA
CAS
WE
0
DM|RDQS
VREF VDDL VDD
3B03 D9
3B04-1 C12
3B04-2 B13
3B18 H13
3B19 H12
3B20 H1
3B21 I1
3B08-1 G7
3B08-2 G6
3B08-3 G7
3B25 I3
3B26 I9
3B27 C1
3B28 C1
AT T-POINT
7B03 B10
3B11-2 G13
3B11-3 G12
3B11-4 G13
2B47 H12
3B00-1 C6
3B00-2 B7
3B12 C7
3B13 C6
3B14 C13
3B15 C12
3B05-2 C13
3B16 H7
3B17 H7
3B07-1 G6
3B07-2 G7
3B07-3 G7
3B07-4 G6
2B36 A6
2B37 A11
2B38 F6
3B08-4 G6
3B09 H9
3B10-1 G12
3B10-2 G13
3B22 B1
3B23 D3
3B24 D9
7B00 G4
7B01 G10
7B02 B4
2B46 H6
2B17 A11
2B18 F2
2B19 F3
3B00-3 B7
3B00-4 C6
3B01 C3
3B02-1 C7
3B04-3 B12
3B04-4 C12
3B05-1 C13
2B28 F8
3B05-3 B12
3B05-4 C13
3B06 H3
2B32 F9
2B33 F9
2B34 F10
2B35 F11
B
C
D
2B39 F11
2B40 A2
2B41 B8
2B42 F2
FB00 H1
3B10-4 G12
3B11-1 G12
2B13 B9
2B14 B9
2B15 B9
2B16 B10
3
2B20 F3
2B21 F3
2B22 F3
2B23 F3
3B02-3 C7
3B02-4 B6
2B27 F8
2B29 F9
2B30 F9
2B31 F9
11 12 13
A
6 7 8
E
F
G
H
3B10-3 G12
2B44 C6
2B45 C12
2B12 B9
4 5 6 7
3B02-2 B6
2B25 F4
2B26 F6
C
8
D
2B04 A3
2B05 A3
2B06 A4
2B10 B8
I
2B00 A2
2B01 A3
2B02 A3
2B03 A3
2B11 B9
9 10 11 12
2B43 F8
A
B
1 2 3 4 5
I
1
13
2
2B24 F4
9 10
E
F
G
H
2B07 A4
2B08 A6
2B09 B8
DDR2-VREF-DDR
3B22
240R
2 7 3B02-2
33R
3B17
33R
33R
3B19
3B11-3 3 6
B
8
D
2
D
8
F3
33R
C
7
C
9
E
2
A
3
E
3J1
K
9
E
7
A
7
B
2
A2
F9
F7
A
1
E
9
L1H
9
E
1
A
9
C
1
C
3
C2
D7
D3
D1
D9
B1
B9
B7
A8
L3
L7
K3
G2
G3
G1
G7
E8
F2
F8
G8
B3
C8
H2
K7
L2
L8
H7
J2
J8
J3
J7
K2
K8
EDE1108AGBG-1J-F
7B02
SDRAM

H8
H3
J1
K
9
E
7
A
7
B
2
B
8
D
2
D
8
F3
H
9
E
1
A
9
C
1
C
3
C
7
C
9
E
2
A
3
E
3
B1
B9
B7
A8
L3
L7
A2
F9
F7
A
1
E
9
L1
F2
F8
G8
B3
C8
C2
D7
D3
D1
D9
J8
J3
J7
K2
K8
K3
G2
G3
G1
G7
E8

H8
H3
H2
K7
L2
L8
H7
J2
D
2
D
8
F3
EDE1108AGBG-1J-F
7B03
SDRAM
C
7
C
9
E
2
A
3
E
3J1
K
9
E
7
A
7
B
2
B
8
F9
F7
A
1
E
9
L1H
9
E
1
A
9
C
1
C
3
C2
D7
D3
D1
D9
B1
B9
B7
A8
L3
L7
A2
G2
G3
G1
G7
E8
F2
F8
G8
B3
C8
K7
L2
L8
H7
J2
J8
J3
J7
K2
K8
K3
EDE1108AGBG-1J-F
7B00
SDRAM

H8
H3
H2
2p2
2B47 RES
2B46
2p2
RES
100n
2B
24
100n
2B
30
33R
3B24
3B26
33R
33R
3B25
33R
3B23
2B
11
100n 2B
04
100n
RES 2B45
2p2
RES 2p2
2B44
RES
+1V8
+1V8
3B09
240R
D
2
D
8
F3
C
7
C
9
E
2
A
3
E
3J1
K
9
E
7
A
7
B
2
B
8
A2
F9
F7
A
1
E
9
L1H
9
E
1
A
9
C
1
C
3
D7
D3
D1
D9
B1
B9
B7
A8
L3
L7
G2
G3
G1
G7
E8
F2
F8
G8
B3
C8
C2
K7
L2
L8
H7
J2
J8
J3
J7
K2
K8
K3
SDRAM
7B01

H8
H3
H2
3B16
EDE1108AGBG-1J-F
33R
+1V8
4 5
33R
3B02-4
100n
1 8
2B
22
3B02-1
33R
240R
+1V8
RES 3B01
2B
17
100n
33R
1 8 3B00-1
100n
2B
29
3B07-2
33R
2 7
3B13
33R
2B
18
100n
100n
2B
08
33R
3 6
2B
31
100n
3B00-3
4 5
100n
2B
15
33R
3B11-4
3B
21
180R
1%
2B
26
100n
2B
06
100n
100p
2B
37
100n
2B
02
1 8
33R
3B04-1
100n
2B
28
33R
3B00-4 4 5
100n
2B
07
2B
01
100n
2B
12
100n
2B
43
47u 47u
2B
42
100n
1 8
2B
09
3 6
33R
3B05-1
33R
3B04-3
3B08-3 3 6
33R
3B12
33R
3B07-4
33R
4 5
8 3B10-1
33R
1
1%
180R
3B
20
2B
14
100n
100n
2B
13
2 7 3B05-2 33R
2B
21
100n
3 6
DDR2-VREF-DDR
3B05-3
33R
3B18
33R
2B
05
100n
2B
25
100n
2B
40
47u
47u
2B
41
2B
33
1 8
100n
3B11-1 33R
2B
36
100p
2 7
2B
35
3B00-2
33R
100n
RES
240R
3B06
2B
39
100p 100p
2B
38
3 6 3B07-3
33R
3B08-1 1 8
3B10-4 4 5
33R
33R
240R
3B03
4 5
RES
3B04-4
33R
3B07-1 1 8
2B
32
33R
100n
2 7
3 6
3B11-2
33R
4 5
33R 3B10-3
3B08-4
33R
100n
2B
10
2 7 3B10-2
33R
100n
2B
34
33R
3B14
2B
23
5
100n
3B05-4
33R
4
DDR2-VREF-DDR
100n
DDR2-VREF-DDR
2B
27
3B08-2 2 7
2B
16
100n
33R
100n
2B
03
3 6
33R
3B02-3
3B15
33R
100n
2B
00
DDR2-VREF-DDR
2B
20
100n
+1V8
3B04-2 2 7
33R
2B
19
100n
FB00
3B28
240R
DDR2-CLK_N
DDR2-CLK_N
DDR2-CLK_P
DDR2-CLK_P
240R
3B27
DDR2-ODT
DDR2-A14
DDR2-DQM0
DDR2-ODT
DDR2-DQM1
DDR2-ODT
DDR2-BA2
DDR2-BA1
DDR2-BA0
DDR2-CLK_P
DDR2-A12
DDR2-A11
DDR2-A10
DDR2-A9
DDR2-A8
DDR2-A7
DDR2-A6
DDR2-A5
DDR2-A4
DDR2-A3
DDR2-A2
DDR2-A1
DDR2-A0
DDR2-DQM2
DDR2-ODT
DDR2-DQM3
DDR2-CS
DDR2-CKE
DDR2-CAS
DDR2-A14
DDR2-CLK_N
DDR2-A13
DDR2-A13
DDR2-A12
DDR2-A11
DDR2-A10
DDR2-A1
DDR2-A0
DDR2-WE
DDR2-RAS
DDR2-BA2
DDR2-BA1
DDR2-BA0
DDR2-A9
DDR2-A8
DDR2-A7
DDR2-A6
DDR2-A5
DDR2-A4
DDR2-A3
DDR2-A2
DDR2-CS
DDR2-CLK_N
DDR2-CKE
DDR2-CLK_P
DDR2-CAS
DDR2-CAS
DDR2-BA2
DDR2-BA1
DDR2-BA0
DDR2-A9
DDR2-A8
DDR2-A7
DDR2-A6
DDR2-A5
DDR2-A4
DDR2-A3
DDR2-A2
DDR2-A14
DDR2-A13
DDR2-A12
DDR2-A11
DDR2-A10
DDR2-A1
DDR2-A0
DDR2-WE
DDR2-RAS
DDR2-A1
DDR2-A0
DDR2-WE
DDR2-RAS
DDR2-CS
DDR2-CLK_N
DDR2-CKE
DDR2-CLK_P
DDR2-A5
DDR2-A4
DDR2-A3
DDR2-A2
DDR2-A14
DDR2-A13
DDR2-A12
DDR2-A11
DDR2-A10
DDR2-CAS
DDR2-BA2
DDR2-BA1
DDR2-BA0
DDR2-A9
DDR2-A8
DDR2-A7
DDR2-A6
DDR2-WE
DDR2-RAS
DDR2-CS
DDR2-CLK_N
DDR2-CKE
DDR2-CLK_P
DDR2-D27
DDR2-D26
DDR2-D10
DDR2-D11
DDR2-D19
DDR2-D18
DDR2-CLK_N
DDR2-CLK_P
DDR2-DQS2_P
DDR2-DQS2_N
DDR2-D24
DDR2-D25
DDR2-D28
DDR2-D29
DDR2-D30
DDR2-D31
DDR2-DQS3_P
DDR2-DQS3_N
DDR2-DQS1_P
DDR2-DQS1_N
DDR2-D16
DDR2-D17
DDR2-D20
DDR2-D21
DDR2-D22
DDR2-D23
DDR2-DQS0_P
DDR2-DQS0_N
DDR2-D8
DDR2-D9
DDR2-D12
DDR2-D13
DDR2-D14
DDR2-D15
DDR2-D0
DDR2-D1
DDR2-D3
DDR2-D2
DDR2-D4
DDR2-D5
DDR2-D6
DDR2-D7
EN 138 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-17 B06 820400089962 LVDS DVBS
Display Interfacing - VDisp
18770_535_100119.eps
100218
Display Interfacing - VDisp
B06A B06A
2009-10-22 2
8204 000 8996
LVDS DVBS
3
5G01 C3
2
B
A
IG11 C5
3G28 C5
6G00 C6
FG0H C5
4
2G43 C4
E
6 5
1G00 C4
C
3
D
2 1
7
F
4 6
B
5
1
F
E
8
D
FG0H
C
1G03 B4
5G02 C3
7 8
2G44 C3
A
30R
5G02
5G01
30R
1
0
0
n
2
G
4
3
6G00
+VDISP
LTST-C190KGKT 2K2
3G28
+VDISP-INT
2
2
u
2
G
4
4
R
E
S
32V 3.0A
1G00
T
1G03
3.0A 32V
IG11
T
Circuit Diagrams and PWB Layouts EN 139 Q552.1E LA 10.
2010-Feb-19
back to
div. table
Video Out - LVDS
18770_536_100119.eps
100119
Video Out - LVDS
B06B B06B
2009-10-22 2
8204 000 8996
LVDS DVBS
E
F
B
D
TO DISPLAY
FG27 E9
2G75 C10
2 3
2G94 D4
2G96 D4
FG23 E9
TO DISPLAY
6 4 5
G
H H
A
3G36 D8
C
9G0G G11
FG2F D9
FG2G C9
FG2H C9
FG2J D5
FG1H E4
FG1J E4
FG1K E4
FG28 E9
1 2 3
2G76 C10
2G77 C10
1G50 G5
FG32 D5
FG34 C11
2G92 C4
2G93 C4
FG17 F4
2G95 D4
FG20 D9
FG21 D9
9G0K-1 C4
9G0K-2 C4
FG22 E9
FG1U F9
FG1V F9
FG1W F9
FG24 E9
FG25 E9
7 8 9
2G29 E11
3G34 B9
3G35 C9
FG1R F9
3G37 D9
FG29 E9
FG1E E4
FG1F E4
FG1G E4
FG1N E4
FG1P F4
FG1Q F4
FG1L E4
FG2K D9
FG30 D5
FG31 D5
13
1
FG15 F4
FG16 F4
FG2P F11
FG2R D11
FG14 F4
FG1Y D9
FG1Z D9
FG26 E9
FG18 F4
2G24 C10
2G25 C11
2G26 C11
2G27 C11
2G28 E11
F
G
FG1C D4
FG1D D4
2G98 D4
2G99 D4
FG19 F4
FG2A E9
FG2B E9
FG2C E9
FG2D F9
FG2E D9
3G2Z D8
3G30 D9
3G31 D8
FG1S F9
FG1T F9
FG2L D10
FG2M D10
4 5
FG33 D5
8 9 10 11 12
2G79 C10
2G7A C10
FG2N G11
9G0K-3 C4
9G0K-4 C4
FG04 D8
FG11 E4
FG12 F4
FG13 F4
FG1A F4
FG1B F4
2G97 D4
12 13
3G2W C8
3G2Y C8
10 11
1G51 G11
1X05 G1
A
B
C
D
E
3G32 C8
3G33 C9
6 7
RES
2G78 C10
FG1M E4
9G0G RES
FG2M
FG2A
FG1R
3
G
3
4
1
0
K
FG1U
FG2N
FG2B
FG34
2G99
3G32
RES
100R
FG1H
10p
2G97 10p
1
0
p
2
G
7
6
FG2C
FG2J
10p 2G94
2
G
2
6
1
0
p
FG1J
FG2P
FG1M
FG1G
FG2D
1X05
EMC HOLE
10p 2G92
+VDISP
FG1D
FG27
3G2Y
100R
FG2R
FG1K
3G37
100R
+3V3
100R
3G36
FG32
FG30
FG04
2
7
FG2H
9
G
0
K
-2
10p 2G98
3G2Z
100R
FG2E
FG1N
1
0
0
p
2
G
7
8
R
E
S
FG22
FG1T
FG21
2G93 10p
5
FG1Q
9
G
0
K
-4
4
FG1P
FG12
FG2L
FG1B
1
0
K
3
G
3
5
FG11
FG33
FG31
100R
3G2W
100R
3G30
RES
FG1Z
FG28
2
G
7
5
1
0
p
1
0
0
p
2
G
7
A
R
E
S
2
G
7
9
1
0
0
p
R
E
S
FG2K
1
0
p
2
G
2
7
10p
9
G
0
K
-1
1
8
2G95
FG18
FG17
FG15
FG14
51
43
44 45
46 47
48 49
50
38
39
4
40
41
5
6
7
8
9
42
28
29
3
30
31
32
33
34
35
36
37
19
2
20
21
22
23
24
25
26
27
1
10
11
12
13
14
15
16
17
18
FI-RE41S-HF
1G50
FG1Y
2
G
2
5
1
0
p
FG1L
9
52
61
53
54 55
56 57
58 59
60
45
46
47
48
49
5
50
51
6
7
8
36
37
38
39
4
40
41
42
43
44
27
28
29
3
30
31
32
33
34
35
17
18
19
2
20
21
22
23
24
25
26
1
10
11
12
13
14
15
16
FI-RE51S-HF
1G51
+VDISP
1
0
K
3
G
3
3
FG23
FG25
FG29
FG1S
FG26
FG24
FG1A
FG2F
FG16
2G29 10p
FG1V
10p 2G28
2
G
2
4
1
0
p
FG1F
10p 2G96
R
E
S
2
G
7
7
1
0
0
p
FG1E
FG1C
FG1W
FG19
FG2G
FG20
9
G
0
K
-3
3
6
FG13
RES
3G31
PX1C+
PX1CLK-
PX1CLK+
PX1D-
PX1D+
BACKLIGHT-BOOST
BACKLIGHT-PWM-ANA-DISP
100R
PX1E+
PX2A-
PX2A+
PX1A-
PX1A+
PX1B-
PX1B+
PX1C-
PX4D-
PX4E-
PX4E+
PX1E-
PX4CLK+
PX4C-
PX4C+
PX4B-
PX4B+
PX4A-
PX4A+
PX4D+
PX3D+
PX3CLK-
PX3CLK+
PX3C-
PX3C+
PX3A-
PX3A+
PX4CLK-
CTRL-DISP
CTRL-DISP
PX3B-
PX3B+
PX3E+
PX3E-
PX3D-
PX2C+
PX2C-
SCL-DISP
SDA-DISP
BACKLIGHT-PWM_BL-VS
CTRL-DISP
PX2CLK-
PX2CLK+
PX2D-
PX2D+
PX2E-
PX2E+
PX2B-
PX2B+
EN 140 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
AmbiLight CPLD
18770_537_100119.eps
100119
AmbiLight CPLD
B06C B06C
2009-10-22 2
8204 000 8996
LVDS DVBS
TMS
TDO
TDI
TCK
GND
VCCINT VCCIO
D
6 7 8 9
2G12 E3
2G13 E8
2G14 E8
2G15 E8
2G16 E8
2G17 E9
2G18 E9
2G19 E9
2GA0 A3
2GA1 A3
2GA2 A3
2GA3 B3
2G10 E3
2G11 E3
H
A
B
C
2GA4 F3
2GA5 B3
3G10-1 D7
3G10-2 D7
3G10-3 D7
3G10-4 D7
3G11-1 D4
3G11-2 D3
3G11-3 D7
3G12 D7
3G13 D7
1 2 3 4 5 9 10 11
4 5
3GA2-1 F3
3GA2-2 F3
3GA2-3 F3
3GA2-4 F3
3GA5-1 B13
3GA5-2 B13
3GA5-3 B13
3GA5-4 B13
3GA6-1 E14
3GA6-2 E14
DEBUG
11 12 13
E
F
G
H
1G35 F2
1G36 F2
1G37 B14
F
G
5GA1 A2
6GA0 F13
6GA1 F13
6GA2 F14
6GA3 F14
7GA0 C5
7GA1-1 D14
7GA1-2 D14
7GA2-1 E13
7GA2-2 E13
3G14 D4
3G15 E2
6 7 8 12 13 14 15
1 2 3
FGA1 A3
FGA2 F3
FGA3 F4
FGA4 F4
FGA5 F4
3GA6-3 E13
3GA6-4 E13
10 14 15
A
B
C
D
E
IGA2 C12
IGA3 C12 9GA0 H5
9GA1 C7
3GA1 D7
FGA6 F4
IGA0 C12
5GA0 A2
DEBUG ONLY
ONLY
FGA0 A5
IGA1 C12
2
6
1
4 5
BC847BS(COL)
7GA1-1
100R
3GA5-4
1
0
K
3
G
1
5
+3V3
3
6
2
7
3
G
A
6
-3
3
3
0
R
3
3
0
R
3
G
A
6
-2
VIO VINT
3
G
A
6
-1
3
3
0
R
1
8
3G10-3 100R
3 6
1
0
p
2
G
1
9
R
E
S
R
E
S
8
2
G
1
8
1
0
p
3G10-1 100R
1
IGA3
1
2
G
1
0
1
0
p
R
E
S
3G11-1 100R
8 100R 3G11-2
7 2
3G11-3 100R
3 6
100R 3G10-2
2 7
IGA2
+3V3
IGA1
6
G
A
1
L
T
S
T
-C
1
9
0
K
G
K
T
1
0
p
2
G
1
7
R
E
S
R
E
S
1
0
p
2
G
1
5
2
G
1
6
1
0
p
R
E
S
R
E
S
2
G
1
4
1
0
p
100R 3G14
3G10-4
4 5
3 6
100R
100R 3GA2-3
+3V3
5GA0
30R
3GA5-3
100R
3 6
1
u
0
2
G
A
0
7GA1-2
BC847BS(COL)
5
3
4
2
3
4
5
6
1G36
SD51022
1
1 8 3GA5-1
100R
2
G
A
5
1
0
0
n
1
2
3
4
5
6
7 8
1G35
FGA5
VINT
L
T
S
T
-C
1
9
0
K
G
K
T
6
G
A
0
3
3
0
R
3
G
A
6
-4
4
5
SD51022
1G37
1
2
3
4
5
6
+3V3
+3V3
1
0
0
n
2
G
A
4
1 8
R
E
S
+3V3
100R 3GA2-1
100R
3GA5-2 2 7
IGA0
9GA1
47R
3GA1
RES
+3V3
RES
1
0
0
n
+3V3
2
G
A
1
R
E
S
1
0
p
2
G
1
3
1
0
p
R
E
S
1
0
p
2
G
1
1
2
G
1
2
R
E
S
3G13 100R
3G12 10R
1
0
0
n
2
G
A
2
FGA0
FGA3
+3V3
IXO4_28
11
9
24
10
1
5
3
5
2
6
VIO
IXO3_8
19
IXO4_19
20
IXO4_20
21
IXO4_21
22
IXO4_22
23
IXO4_23
27
IXO4_27
28
IXO3_12
13
IXO3_13
14
IXO3_14
16
IXO3_16
18
IXO3_18
5
IXO3_5
6
IXO3_6
7
IXO3_7
8
31
IXO2_31
32
IXO2_32
33
IXO2_33|GSR
34
IXO2_34|GTS2
36
IXO2_36|GTS1
37
IXO2_37
38
IXO2_38
12
IXO1_39
40
IXO1_40
41
IXO1_41
42
IXO1_42
43
IXO1_43|GCK1
44
IXO1_44|GCK2
29
IXO2_29
30
IXO2_30
7GA0
XC9572XL-10VQG44C0100
4
1
7
2
5
1
IXO1_1|GCK3
2
IXO1_2
3
IXO1_3
39

FGA6
5GA1
30R
4 5
2
G
A
3
1
u
0
3GA2-4 100R
3GA2-2 100R 2 7
L
T
S
T
-C
1
9
0
K
G
K
T
6
G
A
3
L
T
S
T
-C
1
9
0
K
G
K
T
6
G
A
2
FGA4
FGA2
FGA1
5
3
4
2
6
1
BC847BS(COL)
7GA2-2
7GA2-1
BC847BS(COL)
9GA0
CPLED2
CPLED3
GCK2
CPLED1
AMBI-PWM-CLK_B2
AMBI-SPI-CS-OUTn_R2
AMBI-LATCH1_G2 AMBI-SPI-CLK-OUT
AMBI-SPI-SDI-OUT_G1
AMBI-BLANK_R1
AMBI-SPI-CS-EXTLAMPSn
AMBI-PROG_B1
AMBI-SPI-SDO-OUT
AMBI-LATCH2_DIS
AMBI-SPI-CS-OUTn_R2-R
GTS1
GCK3
GSR
PXCLK54
BACKLIGHT-PWM
BACKLIGHT-PWM_BL-VS
GTS2
GTS1
GCK3
GSR
GTS2
GTS1
CPLED3
CPLED2
BL-SPI-SDO
BL-SPI-SDI
BL-SPI-CSn
BL-SPI-CLK
PNX-SPI-CSBn
CPLED1
AMBI-SPI-CLK-OUT-R
AMBI-SPI-SDI-OUT_G1-R
AMBI-SPI-SDO-OUT-R
S V - L B _ M W P - T H G I L K C A B M W P - T H G I L K C A B
GCK3
PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
PNX-SPI-SDO
PNX-SPI-SDI
PNX-SPI-CLK
GCK2
AMBI-TEMP
GSR
GTS2
Circuit Diagrams and PWB Layouts EN 141 Q552.1E LA 10.
2010-Feb-19
back to
div. table
SPI-Buffer
18770_538_100119.eps
100119
SPI-Buffer
B06D B06D
2009-10-22 2
8204 000 8996
LVDS DVBS
G3
1
2
3EN2
3EN1
3 4
C
D
7GE0 B3
7GE1 A4
C

Buffer
2GE0 A2
3GE0-1 B4
3GE0-3 B4
3GE1-3 B4
IGE0 B3
IGE1 D2
1 2 3 4
A
B
Direct
5 6

9GE3 D3
1
5 6
3GE1-4 B3
3GE2 A4
3GE3 B4
3GE4 B3
9GE0-3 D3
9GE1 C3
9GE2 D3
D
A

9GE0-1 C3
9GE0-2 C3
B
2
9GE3
9GE0-3 6 3
IGE0
1 8
47R
3GE0-1 47R
3GE0-3
3 6
1
0
K
3
G
E
2
7GE1
PDTC114EU
9GE0-4

5 4
9GE1
9GE0-2 7 2
IGE1
3GE1-4
RES
5 4
47R
RES
6 3
3GE4
47R
47R
3GE1-3
1
0
0
n
2
G
E
0
+3V3
+3V3

9GE2
12
11
1
1
0
19
2
0
5
6
7
8
9
18
17
16
15
14
13
74LVC245A
2
3
4
7GE0
47R
3GE3
RES
BL-SPI-SDI
PNX-SPI-CLK BL-SPI-CLK
BL-SPI-SDO
PNX-SPI-CS-BLn BL-SPI-CSn
PNX-SPI-SDI
PNX-SPI-SDI
PNX-SPI-CS-AMBIn AMBI-SPI-CS-OUTn_R2-R
BL-SPI-CLK
AMBI-SPI-CLK-OUT-R
PNX-SPI-CLK
PNX-SPI-SDO
AMBI-SPI-SDI-OUT_G1-R
BL-SPI-SDO
AMBI-SPI-SDO-OUT-R
BL-SPI-SDI
PNX-SPI-SDO
PNX-SPI-CSBn
EN 142 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-18 B06 820400089572 LVDS Non DVBS
Display Interfacing - VDisp
18770_565_100125.eps
100218
Display Interfacing - VDisp
B06A B06A
2009-10-22 2
8204 000 8957
LVDS Non DVBS
8
5
1G00 C4
6
6
4
2G43 C4
D
2G44 C3
1
5
C
3
D
5G01 C3
2
F
B
IG11 C5
7
A
3G28 C5
6G00 C6
FG0H C5
E
2 1 3
A
1G03 B4
5G02 C3
7
C
8
B
4
F
E
FG0H
RES
5G02
30R
RES
30R
5G01
2
G
4
3
1
0
0
n
LTST-C190KGKT
+VDISP
6G00 3G28
2K2
R
E
S
2
G
4
4
2
2
u
T
+VDISP-INT
IG11
RES
1G00
3.0A32V
T 32V 3.0A
1G03
Circuit Diagrams and PWB Layouts EN 143 Q552.1E LA 10.
2010-Feb-19
back to
div. table
Video Out - LVDS
18770_566_100125.eps
100125
Video Out - LVDS
B06B B06B
2009-10-22 2
8204 000 8957
LVDS Non DVBS
FG25 E9
FG26 E9
FG18 F4
FG19 F4
FG29 E9
FG2A E9
FG2B E9
FG2C E9
FG2D F9
FG2E D9
FG1E E4
FG1F E4
FG1G E4
FG2G C9
FG1A F4
FG2P F11
FG2R D11
FG1U F9
FG2K D9
FG2L D10
FG2M D10
FG2N G11
3G33 C9
FG1P F4
FG1Q F4
FG1R F9
3G37 D9
9G0G G11
FG1S F9
FG1T F9
TO DISPLAY
FG1V F9
FG28 E9
9G0K-1 C4
9G0K-2 C4
9G0K-3 C4
FG1W F9
FG1Y D9
FG12 F4
FG13 F4
FG14 F4
FG23 E9
FG24 E9
2G7A C10
FG15 F4
FG16 F4
FG17 F4
2G95 D4
2G96 D4
FG1B F4
FG1C D4
FG1D D4
2G98 D4
FG1L E4
FG1M E4
FG1N E4
FG2H C9
FG2J D5
3G31 D8
3G32 C8
G
3G34 B9
3G35 C9
3G36 D8
C
D
FG2F D9
FG27 E9
FG1Z D9
FG20 D9
FG21 D9
FG22 E9
2G78 C10
2G79 C10
1
2G92 C4
2G93 C4
2G94 D4
TO DISPLAY
8
2G97 D4
12
2G99 D4
3G2W C8
FG1H E4
FG1J E4
FG1K E4
E
F
2G75 C10
H
A
B
2 6
9G0K-4 C4
FG04 D8
FG11 E4
12 13
2 3 4 5 6 7 9 10 11
1G51 G11
13
A
3G2Y C8
3G2Z D8
3G30 D9
2G28 E11
2G29 E11
2G25 C11
2G26 C11
2G27 C11
5 4 3 1 7 8
RES
2G76 C10
2G77 C10
FG30 D5
FG31 D5
1G50 G5
E
F
G
H
1X05 G1
2G24 C10
B
C
D
FG32 D5
FG33 D5
FG34 C11
9 10 11
FG22
R
E
S
2
G
7
8
1
0
0
p
FG1E
RES
10p 2G93
FG30
FG2M
FG04
FG28
FG2P
FG1H
3G2W
100R
RES
3G30
100R
100R
3G31
RES
FG1A
RES
RES
2G98 10p
10p 2G97
FG1J
FG2D
FG1M
45
46 47
48 49
50
FG1G
41
5
6
7
8
9
42
51
43
44
30
31
32
33
34
35
36
37
38
39
4
40
21
22
23
24
25
26
27
28
29
3
11
12
13
14
15
16
17
18
19
2
20
1G50
FI-RE41S-HF
1
10
FG21
RES 9G0G
EMC HOLE
1X05
FG1N
FG1S
FG24
FG26
FG2K
FG1F
RES
2G96 10p FG2F
FG16
1
0
p
2
G
7
5
RES
2G92 10p
FG2A
FG1R
R
E
S
1
0
K
3
G
3
4
FG2H
FG1Z
RES
3G32
RES
100R
2G99 10p
FG31
FG20
3
6
FG13
9
G
0
K
-3
1
0
K
FG1B
R
E
S
3
G
3
5
FG23
FG1Y
FG2C
2
G
7
6
1
0
p
FG2J
FG1T
R
E
S
1
0
p
2
G
2
6
FG29
FG25
2G28 10p
R
E
S
1
0
p
2
G
2
4
R
E
S
10p 2G95
2
G
2
7
1
0
p
2
G
7
7
R
E
S
RES
1
8
1
0
0
p
9
G
0
K
-1
+VDISP
2
G
7
A
1
0
0
p
R
E
S
FG27
FG1D
100R
3G2Y
FG1K
9
G
0
K
-2
2
7
FG1U
FG32
FG1W
FG2G
FG19
FG2L
3G36
100R
+3V3
RES
FG33
R
E
S
1
0
p
2
G
2
5
3G2Z RES
FG2E
100R
FG34
2G94 10p
RES
10p 2G29
FG1V
FG17
FG14
FG15
FG18
FG1C
FG1Q
R
E
S
1
0
0
p
2
G
7
9
FG2B
FG2N
4
5
9
G
0
K
-4
FG1P
FG12
59
60
FG1L
8
9
52
61
53
54 55
56 57
58
45
46
47
48
49
5
50
51
6
7
34
35
36
37
38
39
4
40
41
42
43
44
25
26
27
28
29
3
30
31
32
33
15
16
17
18
19
2
20
21
22
23
24
1G51
FI-RE51S-HF
1
10
11
12
13
14
3
G
3
3
1
0
K
+VDISP
R
E
S
FG2R RES
100R
3G37
FG11
PX1CLK-
PX1CLK+
PX1D-
PX1D+
BACKLIGHT-BOOST
BACKLIGHT-PWM-ANA-DISP
PX2A-
PX2A+
PX1A-
PX1A+
PX1B-
PX1B+
PX1C-
PX1C+
PX4D-
PX4E-
PX4E+
PX1E-
PX1E+
PX4CLK+
PX4C-
PX4C+
PX4B-
PX4B+
PX4A-
PX4A+
PX4D+
PX3D+
PX3CLK-
PX3CLK+
PX3C-
PX3C+
PX3A-
PX3A+
PX4CLK-
CTRL-DISP
CTRL-DISP
PX3B-
PX3B+
PX3E+
PX3E-
PX3D-
PX2C+
PX2C-
SCL-DISP
SDA-DISP
BACKLIGHT-PWM_BL-VS
CTRL-DISP
PX2CLK-
PX2CLK+
PX2D-
PX2D+
PX2E-
PX2E+
PX2B-
PX2B+
EN 144 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
AmbiLight CPLD
18770_567_100125.eps
100125
AmbiLight CPLD
B06C B06C
2009-10-22 2
8204 000 8957
LVDS Non DVBS
TMS
TDO
TDI
TCK
GND
VCCINT VCCIO
A
B
C
D
E
F
G
2G13 F7
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
A
H
1G35 G2
1G36 G2
1G37 B13
2G10 F3
2G11 F3
2G12 F3
B
C
D
E
F
G
H
2G14 F8
2G15 F8
2G16 F8
2G17 F8
2G18 F9
2G19 F9
2GA0 B3
2GA1 B4
2GA2 B4
2GA3 B3
2GA4 G3
2GA5 B3
3G10-1 E6
3G10-2 E7
DEBUG ONLY
3G10-3 E6
3G10-4 E7
3G11-1 E6
3G11-2 E3
3G11-4 E4
3G12 E6
3G13 E7
3G14 E4
3G15 E2
3GA1 E6
3GA2-1 G3
DEBUG ONLY
3GA2-2 G3
3GA2-3 G3
3GA2-4 G3
3GA5-1 B12
3GA5-2 B12
3GA5-3 B12
3GA5-4 B12
3GA6-1 F13
3GA6-2 F13
3GA6-3 F12
3GA6-4 F12
5GA0 A3
5GA1 B2
6GA0 F12
6GA1 F12
6GA2 F13
6GA3 F13
7GA0 D5
7GA1-1 D13
7GA1-2 D13
7GA2-1 E12
7GA2-2 E12
9GA0 H5
9GA1 D7
FGA0 A5
FGA1 B4
FGA2 G3
FGA3 G5
FGA4 G4
FGA5 G5
FGA6 G4
IGA0 C11
IGA1 C11
IGA2 C11
IGA3 C11
100R
3GA5-1 1 8
1
2
3
4
5
6
6
1G37
SD51022
3GA2-3 100R 3
IGA0
7GA1-2 5
3
4
5
3
4
VINT
BC847BS(COL)
1
7GA2-2
BC847BS(COL)
BC847BS(COL)
7GA2-1 2
6
3
3
0
R
3
G
A
6
-1
1
8
4
5
VINT
3
G
A
6
-4
3
3
0
R
VIO
+3V3
3GA1
47R
9GA1
1
0
p
2
G
1
9
R
E
S
2
G
1
81
0
p
1
0
p
2
G
1
7
R
E
S
R
E
S
3G10-2 100R
2 7
1 8
100R
4 5
100R 3G10-1
8 1 3G10-4
2 7
3G11-1 100R
100R 3G11-2
R
E
S
2
G
1
41
0
p
1
0
p
2
G
1
0
R
E
S
10R 3G12
3G13
3 6
100R
100R 3G10-3
L
T
S
T
-C
1
9
0
K
G
K
T
6
G
A
3
+3V3
3
G
1
5
1
0
K
2
G
A
2
1
0
0
n
FGA3
FGA0
1
0
0
n
R
E
S
2
G
A
4
2
G
1
31
0
p
30R
5GA0
R
E
S
1
u
0
+3V3
2
G
A
0
1
0
0
n
2
G
A
1
FGA2
3G11-4 100R
4 5
FGA4
4
5
6
7 8
1G35
1
2
3
FGA5
FGA6
30R
5GA1
R
E
S
R
E
S
2
G
1
61
0
p
4 5
1
0
p
2
G
1
5
100R 3GA2-4
1
0
p
2
G
1
2
R
E
S
R
E
S
2
G
1
11
0
p
3G14 100R
+3V3
6
G
A
0
L
T
S
T
-C
1
9
0
K
G
K
T
L
T
S
T
-C
1
9
0
K
G
K
T
6
G
A
2
3GA5-2
100R
2 7
3 6
3
5
2
6
100R
3GA5-3
21
IXO4_22
22
IXO4_23
23
IXO4_27
27
IXO4_28
28
11
9
24
10
1
5
16
IXO3_18
18
IXO3_5
5
IXO3_6
6
IXO3_7
7
IXO3_8
8
IXO4_19
19
IXO4_20
20
IXO4_21
33
IXO2_34|GTS2
34
IXO2_36|GTS1
36
IXO2_37
37
IXO2_38
38
IXO3_12 12
IXO3_13
13
IXO3_14
14
IXO3_16
41
IXO1_42
42
IXO1_43|GCK1
43
IXO1_44|GCK2
44
IXO2_29
29
IXO2_30
30
IXO2_31
31
IXO2_32
32
IXO2_33|GSR
4
1
7
2
5
IXO1_1|GCK3
1
IXO1_2
2
IXO1_3
3
IXO1_39
39
IXO1_40
40
IXO1_41
XC9572XL-10VQG44C0100
7GA0

9GA0
FGA1
100R 3GA2-2 2 7
7GA1-1
BC847BS(COL)
2
6
1
1
2
3
4
5
6
SD51022
1G36
3GA2-1 100R 1 8
+3V3
1
0
0
n
2
G
A
5
6
IGA3
3
3
0
R
3
G
A
6
-3
3
3
G
A
6
-2
3
3
0
R
2
7
+3V3
1
u
0
2
G
A
3
VIO +3V3
IGA1
IGA2
+3V3
L
T
S
T
-C
1
9
0
K
G
K
T
6
G
A
1
4 5
+3V3
3GA5-4
100R
CPLED1
AMBI-PWM-CLK_B2
AMBI-SPI-CS-OUTn_R2-R
AMBI-SPI-CS-OUTn_R2
AMBI-LATCH1_G2
AMBI-BLANK_R1
AMBI-SPI-CS-EXTLAMPSn
AMBI-SPI-CLK-OUT
AMBI-SPI-SDI-OUT_G1
AMBI-SPI-SDO-OUT
AMBI-LATCH2_DIS
AMBI-PROG_B1
AMBI-TEMP
GTS2
GTS1
GCK3
GSR
PXCLK54
BACKLIGHT-PWM
BACKLIGHT-PWM_BL-VS
CPLED2
CPLED3
GCK2
GTS2
GTS1
GCK3
GSR
PNX-SPI-CSBn
CPLED1
AMBI-SPI-CLK-OUT-R
AMBI-SPI-SDI-OUT_G1-R
AMBI-SPI-SDO-OUT-R
S V - L B _ M W P - T H G I L K C A B M W P - T H G I L K C A B
GCK3
PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
PNX-SPI-SDO
PNX-SPI-SDI
PNX-SPI-CLK
GCK2
GSR
GTS2
GTS1
CPLED3
CPLED2
BL-SPI-SDO
BL-SPI-SDI
BL-SPI-CSn
BL-SPI-CLK
Circuit Diagrams and PWB Layouts EN 145 Q552.1E LA 10.
2010-Feb-19
back to
div. table
SPI-Buffer
18770_568_100125.eps
100125
SPI-Buffer
B06D B06D
2009-10-22 2
8204 000 8957
LVDS Non DVBS
G3
1
2
3EN2
3EN1
3GE3 B4
3GE4 B3
7GE0 B3
*
Buffer
IGE0 B3
IGE1 D2
B
2GE0 A2
3GE0-1 B4
3GE0-3 B4
3GE1-3 B4
3GE1-4 B3
3GE2 A4
9GE0-1 C3
9GE0-2 C3
9GE0-3 D3
9GE1 C3
9GE2 D3
3 4
7GE1 A4
C
D
A
*
Direct
5 6
1 2 3 4 5 6
C
D
**
5 4
A
B
*
9GE3 D3
1 2
*
9GE0-4
9GE2
9GE3
9GE0-3 6 3
IGE0
1 8
3 6
47R
3GE0-1 47R
3GE0-3
1
0
K
3
G
E
2
7GE1
PDTC114EU
15
14
13
12
11
1
1
0
19
2
0
2
3
4
5
6
7
8
9
18
17
16
7GE0
74LVC245A
47R
3GE3
RES
9GE1
9GE0-2 7 2
IGE1
47R
3GE1-4
RES
5 4
47R
RES
6 3
3GE4
+3V3
47R
3GE1-3
1
0
0
n
2
G
E
0
+3V3
BL-SPI-SDI
PNX-SPI-CLK BL-SPI-CLK
BL-SPI-SDO
PNX-SPI-CS-BLn BL-SPI-CSn
PNX-SPI-SDI
PNX-SPI-SDI
PNX-SPI-CS-AMBIn AMBI-SPI-CS-OUTn_R2-R
BL-SPI-CLK
AMBI-SPI-CLK-OUT-R
PNX-SPI-CLK
PNX-SPI-SDO
AMBI-SPI-SDI-OUT_G1-R
BL-SPI-SDO
AMBI-SPI-SDO-OUT-R
BL-SPI-SDI
PNX-SPI-SDO
PNX-SPI-CSBn
EN 146 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-19 B07 820400089602 DVBS FE
DVBS-FE
18770_539_100119.eps
100218
DVBS-FE
B07A B07A
2009-10-22 2
8204 000 8960
DVBS-FE
6
5
4
3
DISEQCOUT1
TRST
VS
FSKRX_IN
FSKRX_OUT
13
12
11
10
9
XTALI
XTALO
DIRCLK
CLKI
CLKI2
CLKOUT27
P
3
4
5
N
0
1
2
ERROR
DPN
STROUT
CLKOUT
7
6
P
Q1
RESETB
I1
TMS
0
1
CS
NC
GPIO
2
1
SCLT
SDAT
1
TDO
TDI
TCK
AGCRF1
D
1
0
COMP
STDBY
SCL
SDA
8
7
DISEQCIN1
N
VIA
VDDA2V5
VDDA1V0
GNDA
GND_HS
VDD1V0
VDD3V3
VCO
XTAL_OUT
VIA
IP
NC
RF_OUT
QN
QP
IN
RF LNA LT MIX DIG BB SYN HS
GND
VCO LNA LT MIX DIG BB SYN
VSS
XTAL_IN
XTAL_CMD
SCL
SDA
AGC
AS
RF_IN
NC
3R09 F7
3R10 E9
3R11 D9
3R12 E7
3R13 D9
3R14 G3
3R15 G3
5R00 D1
5R01 H1
5R02 H3
NC
NC
NC
FR00 A12
FR01 H3
FR02 D9
FR03 D9
FR04 D9
FR05 D9
FR06 D9
FR07 E9
IR00 D2
IR01 H2
IR02 D9
IR03 C10
IR04 C10
IR05 D12
IR06 E7
IR07 G3
IR08 G4
NC
I2C-ADDRESS : C6
NC
NC
6R00 I3
7R01-1 A10
7R01-2 A5
7R02 F5
9R00 D9
9R02 G5
NC
NC
2R61 F7
2R62 H4
3R00 C9
3R01 C9
3R02 A12
3R03 B12
3R04 B12
3R05 B12
NC
NC
NC
NC
NC
NC
3R06 B12
3R07 D12
3R08-1 G8
3R08-2 G8
3R08-3 G8
3R08-4 G8
NC
2R49 D4
2R50 D4
2R51 D5
2R52 D5
2R53 B12
2R54 G7
2R55 G7
2R56 G8
NC
NC
NC
I2C-ADDRESS : D0
2R34 F6
2R35 F6
2R37 F4
2R38 G4
2R39 G4
2R40 F7
2R41 G7
2R43 H4
NC
NC
NC
2R45 I3
2R46 D3
2R47 D3
2R48 D4
2R17 D3
2R18 E3
2R19 E4
2R20 C12
2R21 C9
2R22 C9
2R23 C9
2R24 E4
NC
NC
2R25 E4
2R26 E4
2R27 H1
2R28 H2
2R29 I3
2R31 F6
2R32 F6
2R33 F6
E
F
G
H
I
A
B
C
9 10 11 12 13
1
NC
2R08 C3
2R09 C4
2R10 B4
2R11 B4
2R12 B4
2R13 B5
2R14 C4
2R15 C4
2R16 D2
4 5 6 7 8 9 10 11
2R02 B4
2R03 B4
2R04 B3
2R05 B3
2R06 B4
2R07 C3
NC
NC
NC
NC
NC
12 13
A
B
C
D
1 2 3 4 5 6 7 8
NC
D
E
F
NC
2 3
G
H
I
1R00 H5
1R01 H3
1R10 G4
2R00 B3
2R01 B3
+1V-DVBS NC
NC
NC
NC
NC
2R
32
1n0
IR02
1n0
2R
31
10n
2R
50
2R
16
22u
2R
54
10p
10n
2R
08
47R 3R05
2R
11
10n
10n
2R
05
9R02
2R
35
RES
1n0
100n
2R
19
100R 3R01
3R
10
1K
0
FR07
100n
2R
47
100p
2R
45
2R38
10p
47p 2R23 RES
3R08-2 100R
2 7
47R
1n0 2R21 RES
3R04
+3V3-DVBS
5R00
30R
10p
2R
55
10n
2R
52
FR03
FR06
6R
00
S
M
15T
1n0
2R
29
47p RES
30R
5R01
2R22
1234
1R00
310430133871
10p
2R37
2R
24
100n
3R11
10K
+3V3-DVBS
122
124
27n
5R
02
98
18
58
75
26
23
24
29
27
52
87
89
90
91
94
8
7
62
97
19
95
108
109
111
115
116
119
120
83
84
86
49
47
46
44
43
37
35
11
12
82
20
78
79
126
107
101
34
32
30
55
50
63
64
65
67
68
70
71
73
59
128
16
104
103
74
100
40
41
60
56
1 8

MAIN
STV0903BAC
7R01-1
100R 3R08-1
100n
2R
07
100n
2R
09
+1V-DVBS
5432
1
1R01
2R
26
100n
+3V3RF
2R
20
6p8
2R
01
100n
2R
25
10n
2R
28
10n
2R
56
10p
2R
15
100n
+3V3-DVBS
163
164
165
133
134
135
136
137
138
+1V-DVBS
154
155
156
157
158
132
159
160
161
162
145
146
147
148
131
149
150
151
152
153
114
118
123
127
130
139
140
141
142
143
144
54
76
80
92
96
106
2
3
5
9
13
112
22
25
28
31
33
36
39
21
38
72
17
77
81
85
88
93
99
102
105
110
15
42
45
48
51
53
57
61
66
69
1
4
6
10
14
113
117
121
125
129
7R01-2
STV0903BAC
POWER_VIA

100n
2R
17
FR04
+3V3RF
2R43
27p
3 6
100R 3R08-3
IR01
120K
3R07
1K0
FR05
3R09
100n
2R
00
22u
2R
27
2R
39
10p
+3V3-DEMOD
2R
34
1n0
1K0
3R02
30
31
32
34
35
36
37
38
39
40
41
42
1
4
7
12
13
22 14 8 2 1 1 8 6 27
29 25 26
19
18
23
24
20
21
5
2
16
17 3 3 5 1 3 9 10

SATELLITE
TUNER
STV6110AT
7R02
100n
2R
02
RES
9R00
2R
61
10u
3R12
4R7
100n
2R
49
10K
3R
13
3R00 100R
3R06 47R
+2V5-DVBS
IR04
FR00
10n
2R
13
+3V3-DEMOD
0p56
2R
62
2R
18
100n
IR03
2R
03
10n
1n0
2R
33
2R
12
100n
IR05
2R
51
10n
47n
2R53
FR02
47R
3
3R03
16M
2
4 1
1R
10
2R
48
100n
100n
2R
06
IR00
2R
46
100n
2R
14
10n
+1V-DVBS
2R40
100p
3R08-4 100R
4 5
FR01
100n
2R
10
2R
04
100n
10p
2R
41
IR08
+3V3RF +3V3RF
IR07
10K
3R
15
3R
14
10K
IR06
XTAL
SCL-SSB
F22-DISECQ-TX
SDAT
TS-DVBS-CLOCK
RESET-DVBS
IM
IP
QM
QP
SCLT
SDAT
AGC
XTAL
LNB-RF1
SDA-SSB
DISECQ-DET
AGC
TS-DVBS-VALID
TS-DVBS-SOP
TS-DVBS-DATA
SENSE+1V0-DVBS
SCLT
IP
IM
QP
QM
DISECQ-RX
Circuit Diagrams and PWB Layouts EN 147 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-20 B08 820400089624 DVBS Supply
DVBS-Supply
18770_540_100119.eps
100218
DVBS Supply
B08A B08A
2009-10-22 4
8204 000 8962
DVBS-SUPPLY
PVDD1 PVDD2
EN1
SW1
BOOT1
SW2
FB2
EN2
BOOT2
FB1
ILIM2
SEQ
BP
GND GND_HS
VIA2
VIA
COM
OUT IN
OUT IN
INH BP
COM
GND
VIN
HS P A
INH
SYNC
SW
VFB
A
S
W
IT24 B9
IT25 F5
IT29 G8
IT30 I10
IT10 E7
IT11 F8
IT14 H7
IT15 I4
IT18 A7
IT19 C7
IT20 B5
IT21 G3
IT22 H3
IT23 H3
FT00 E3
FT04 H9
IT26 F7
IT27 G5
FT07 C9
FT08 D9
IT32 F7
IT02 B8
IT03 C5
IT04 E5
IT05 E4
IT06 F4
IT07 F4
IT08 G5
IT09 F7
5T01 A7
5T02 C5
IT12 G8
IT13 G7
6T00 C4
6T01 C4
IT16 I5
IT17 G4
6T04 F8
6T05 H3
7T00-1 A6
7T00-2 B6
7T01 C6
7T02 D6
7T03 E6
7T04-1 G4
7T04-2 H4
3T15 H7
3T16 H8
FT05 I5
FT06 A9
3T19 I5
3T20 I4
IT00 A5
IT01 A7
3T24 H10
3T25 I10
3T26 I10
3T28 I10
3T29 G7
3T31 G2
5T00 A4
3T01 B7
3T02 B8
5T03 E4
5T04 F8
3T05 E4
3T06 G4
6T02 C4
6T03 E4
3T09 I5
3T10 E8
3T11 F8
3T12 H8
3T13 H7
3T14 H3
2T24 F9
2T25 F4
3T17 H3
3T18 I4
2T28 H8
2T29 H9
3T21 B8
3T23 G8
2T32 I3
2T33 I3
2T34 I5
2T35 G5
2T36 B8
2T37 F9
2T38 F10
2T39 C7
2T40 H8
2T41 G9
2T42 I10
2T43 I10
3T00 B8
10 11
3T03 B4
3T04 E4
A
B
3T07 G3
3T08 G3
2T16 E6
2T17 E7
2T18 E3
2T19 E3
2T20 E7
2T21 F4
2T22 F10
2T23 F9
2T08 C7
2T09 C6
2T26 F8
2T27 G8
2T12 D7
2T13 E5
2T30 H7
2T31 I4
1 2 3 4 5 6 7 8 9 10 11 12 13
1 2 3 4 5 6 7 8 9
2T10 B8
2T11 D5
12 13
2T14 E5
2T15 E6
C
D
E
F
G
H
I
A
B
C
D
E
F
G
H
I
2T00 A4
2T01 A4
2T02 A5
2T03 B5
2T04 B7
2T05 B8
2T06 B5
2T07 C5
220n
2T
16
2T
19
22u
2T18
220u
16V
FT00
10u
IT18
2T
24
2T
39
1u0
RES
2T
38
4u7
IT04
21
22
23
24
3T
29
1K
0
14
10
2 1 3
16
25
26
17
18
19
20
13
11
6 5
8 7
415
9
1

TPS54283PWP
7T03
2
FT04
10u
2T
23
33u
5T04
2T
12
22u
16V
IT16
+24V
22u
2T
04
2T
01
+V-LNB
22u
35V
100u 2T
14
IT17
3T14
2T
17
100u
35V
2K2
10
11
12
13
14
15 ST1S10PH
7T00-2
RES 6T01
6 1 3 S A B 6 1 3 S A B
6T02
IT02
RES
IT10
47n
2T13
R
E
S
3K
3
3T
13
2T
37
RES
+3V3
4u7
3T24
15K
RES 2T31
22n
3T23
33K
RES
2T
43
100n
RES
10u
2T35
2T42
10n
2T41
1n0
IT13
2T
40
220p
30R
5T02
3T
06
100K
5
3
4
IT15
22u
2T
32
BC847BS(COL)
7T04-2
47K
R
E
S
1n0
3T
16
2T
03
R
E
S
+5V-DVBS
R
E
S
2T
3022n
1X09
22R
REF EMC HOLE
3T
05
3T21
1K0 1%
R
E
S
25V
100u
2T
22
IT11
2T
26
1n0
+5V-DVBS
IT26
22R
3T
11
1
3 2
7T02
LD1117DT33
22u
2T
05
100n
2T
07
FT06
IT20
IT09
IT12
+3V3-DVBS
1n0
2T
25
5T01
3u6
IT24
+2V5-DVBS
IT25
IT00
IT29
IT30
RES
3T28
100K
3T26
10K RES
3T25
330K
2T
00
+V-LNB
22u
IT22
10K
3T
08
R
E
S
4u7
2T
29
IT06
FT05
10K
3T07
3T
31
10K
IT32
5% 3K
3
3T
15
+24V
RES
3T
18
3K
3
5%
IT14
2T20
47n
IT01
1K
0
3T
17
5T00
30R
1
IT21
7T04-1 2
6
IT19
BC847BS(COL)
3R3
3T10
2T36
4n7
22n 2T
34
8
7
3 5
1 6
R
E
S
7T00-1
ST1S10PH
4 9
2
+5V-DVBS
+1V-DVBS
1%
3K
3 3T
02
3T00 RES
2T
27
1n0
+3V3-DVBS
1% 1K0
5%
47K
3T12
RES
2
1
3
5
10K
3T03
+2V5-DVBS
7T01
LD3985M25
4
IT05
2T
33
22u
+24V
R
E
S
R
E
S
6T
04
S
S
24
3T
01
22K
5T03
33u
2T
09
10n
1u0
2T
08
22u
2T
02
18K
3T20
5%
1n0
2T
21
S
S
24
6T
03
3R3
3T04
IT23
IT08
R
E
S
3T
09
3K
3
2T
15
220n
FT08
IT07
100n
2T
06
BAS316
6T00
BZX384-C
RES
2T
11
100n
13V
6T05
FT07
IT27
IT03
R
E
S
33K
3T
19
+5V-DVBS
4n7
2T10 RES
22n
2T28
SENSE+1V0-DVBS
V0-CTRL
RES
SENSE+1V0-DVBS
EN 148 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
DVBS-Supply
18770_541_100119.eps
100119
DVBS-Supply
B08B B08B
2009-10-22 4
8204 000 8962
DVBS-SUPPLY
VIA
VIA
VIA
VIA

LX
NC
ISEL
VORX
VOTX
DSQOUT
V
C
C
_
L
V
C
C
BYP
SCL
SDA
ADDR
DETIN
DSQIN
EXTM
TTX
VCTRL
VUP
A
_
G
N
D
P
_
G
N
D
G
N
D
_
H
S
5T52 C7
6T50 C7
6T51 D7
6T52 D1
6T53 D2
6T54 E6
6T55 D1
7T50-1 C5
7T50-2 E5
7T51 E7
IT50 A5
IT51 C7
IT52 C8
IT53 C6
IT54 C7
IT55 C9
IT56 D1
IT57 D3
2T62 D9
3T22 B7
3T27 E7
3T50 B5
3T51 C4
3T52 C6
3T53 C7
3T54 D7
3T55 C4
3T56 D4
3T57 D6
3T58 C8
IT58 D5
IT59 E8
IT60 C6
IT61 D4
IT62 D5
IT63 D5
5T50 B6
5T51 D2
3T62 C7
2T53 C7
2T54 C4
2T55 D1
2T56 D1
2T57 D2
2T58 D2
9T50 D4
IT64 D7
IT65 D4
IT66 D6
IT67 C8
IT68 E6
IT69 E7
9T51 D4
9T52 F6
IT28 B6
2T61 E6
D
E
F
2T50 B4
2T51 B5
2T52 B5
1 2 3 4 5 6
3T59 D8
3T60 C4
3T61 C4
8 9
1 2 3 4 5
2T59 E4
2T60 C8
C
B
C
D
E
F
A
B
7
6 7 8 9
A
22K
3T52
IT50
RES 9T52
2
2
0
n
2
T
5
2
6
T
5
2
S
T
P
S
2
L
3
0
A
RES
2
2
0
R
3
T
2
2
IT59
+V-LNB
IT67
4
7
0
n
2
T
5
8
IT57
1
0
0
R
3
T
5
0
6
T
5
0
B
A
T
5
4
C
O
L
IT56
R
E
S
3
T
5
41
5
0
R
2
T
6
11
n
0
+12V
R
E
S
10K
3T56
+3V3-DVBS
IT66
1
0
0
n
2
T
5
1
IT51
3T61
100R
IT54
3
T
2
72
2
R
IT62
R
E
S
IT60
2
2
u
5
T
5
0
RES
14
1
9
1
8
30
21
22
27
3
7
8
16
17
23
24
5
9
6
13
3
3
28
4
1
25
26
31
32
2
LNBH23Q
7T50-1
10
2
0
15
29
1 1 2 1
S
T
P
S
2
L
3
0
A
3
7
3
8
39
40
4
1
4
2
6
T
5
1
LNBH23Q
7T50-2
34
35
36
2
T
5
5
1
0
0
u
3
5
V
IT58
+3V3-DVBS
IT64
10K
3T55
6
T
5
3
R
S
1
D
RES
R
E
S
3
T
5
9
2
K
2
2
T
5
9
5T52
220u
4
7
0
n
RES 3T57
10K
10n
2T54 RES
IT63
IT61
IT69
IT68
IT52
3T62
1R0
2T60
10u
15R
3T53
2
T
5
3
2
2
0
n
RES
9T50
IT53
9T51
R
E
S
2
T
6
2
1
0
n
RES
BAS316
6T54
IT65
IT28
BC817-25W
IT55
RES
7T51
100R
3T51
3T58
RES
RES
2K2
3
5
V
1
0
0
u 2
T
5
7
30R
5T51
3T60
10K
RES
+12V
4
7
0
n
+12V
2
T
5
6
R
S
1
D
6
T
5
5
2
T
5
0
1
0
0
u
3
5
V
RES
V0-CTRL
LNB-RF1
DISECQ-DET LNB-RF1
DISECQ-RX
SCL-SSB
SDA-SSB
DISECQ-DET
F22-DISECQ-TX
Circuit Diagrams and PWB Layouts EN 149 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-21 B09 820400089822 DVBS Con.
DVBS Connector Board
18770_542_100119.eps
100218
DVBS Connector Board
B09A B09A
2009-10-22 2
8204 000 8982
DVBS CONNECTOR BOARD
FC77 B5
FC78 B4
FC79 B4
FC80 B5
FC81 B5
FC82 B5
FC83 B4
FC87 A7
FC88 B9
FC89 B9
LED PANEL
TO
FC58 E8
FC59 F7
FC99 F5
IC73 B7
IC74 B7
IC75 B7
IC78 F4
FC74 A4
FC75 A5
FC76 B4
3C88-2 E7
3C88-4 F7
3C90 D3
3C91 D4
3C92 E4
FC90 B9
FC91 B9
FC92 B9
FC93 B9
FC94 B9
FC95 C7
FC96 E4
FC97 E4
FC98 E5
FC55 D8
FC56 E8
FC57 E8
2C91 F7
2C92 F7
2C93 A6
3C70 B2
3C71 E7
3C74 A7
3C75 A7
3C76 A7
FC60 E8
FC61 E8
FC62 E3
FC63 E3
FC64 E8
FC70 A5
FC71 A4
FC72 A5
FC73 A4
3C86 D7
3C87 F7
3C88-1 D7
2C76 A7
2C77 A7
2C78 B7
3C93 F3
5C53 F3
5C54 F4
9C50 E7
FC50 C7
FC51 C7
FC52 D8
FC53 D8
FC54 D8
2C88 D7
2C89 D7
2C90 E7
TEMPERATURE
3
3C77 B7
3C78 B7
3C79 C7
3C80 E4
3C81 E4
3C82 E4
3C83 E4
3C84 C7
3C85 C7
4 5 6
*
HOTEL TV
7 8 9
A
B
C
D
E
F
A
B
C
D
E
2C79 B7
2C80 B7
2C81 B9
2C82 C7
2C83 E4
2C84 E4
2C85 F5
2C86 C7
2C87 D7
1 2
F
1C85 F4
1C86 B4
1F53 D9
1M09 D5
1M20 B9
1M59 A5
1M71 E5
2C70 B2
4 5 6 7 8 9
1 2 3
SENSOR
FC72
100p
2C82
FC58
FC95
2C76
100p
RES 30R
5C54
2
C
8
7
1
0
p
100p
2C80
FC73
FC77
FC94
100R
3C82
FC74
3C77
100R
2
C
8
5
1
u
0
1
0
p
2
C
8
6
3C86
100R
1
0
0
p
2
C
9
0
FC53
FC96
IC78
3C70 100R
1
0
0
K
3
C
7
4
2C79
100p
1
.0
A
1
C
8
5
T
6
3
V
100R
RES
1
0
0
p
3C81
2
C
8
41735446-4
1M71
1
2
3
4
FC71
IC75
2
C
8
3
1
0
0
p
100p
2C77
10R
3C79
FC60
FC51
FC76
1
0
0
p
2
C
9
1
FC61
3C78
FC99
8
9
100R 21
22
23
24
25
3
4
5
6
7
11
12
13
14
15
16
17
18
19
2
20
FH12-25S-0.5SH(55)
1M59
1
10
FC75
3C80
+24V
FC89
+5V
100R
9
C
5
0
FC90
9
15 16
11
12
13
14
2
3
4
5
6
7
8
1F53
502386-1470
1
10
100R
3C76
V-AMBI
+3V3
2C78
100p
*
RES
100R
3C92
3C90
10K
+3V3 *
RES 6
FC63
1M09
502382-0470
1
2
3
4
5
+3V3-STANDBY
100R
3C85
FC55
+3V3
3C71
100R
FC59
RES 47n
2C93
4 5
V-AMBI
100R
3C88-4
3C75
100R
FC81
IC73
3C84
100R
FC92
FC80
FC82
FC79 FC91
IC74
+12V
FC64
100R
3C88-1
8 1
FC87
+3V3 *
RES
10K
3C93
FC98
FC57
FC93
RES
5C53
30R
2
C
7
0
1
0
0
n
FC50
FC70
FC54
FC62
2
C
8
1
FC56
1
0
0
n
1
0
0
p
2
C
8
9
FC88
FC83
T 63V 2.0A
1C86
FC97
FC78
2
C
9
2
1
n
0
2 7
RES
3C88-2
100R
3C83
100R
1
0
0
p
2
C
8
8
+24V
100R
3C87
3C91
100R
*
RES
1
2
3
4
5
6
7
8
1M20
AMBI-LATCH1_G2
AMBI-SPI-CS-OUTn_R2
BACKLIGHT-PWM-ANA-DISP
FAN-CTRL1
FAN-CTRL2
FC52
BL-SPI-SDI
BACKLIGHT-PWM_BL-VS
BL-SPI-CSn
FAN-DRV
AMBI-SPI-CS-EXTLAMPSn
AMBI-LATCH2_DIS
AMBI-BLANK_R1
AMBI-PROG_B1
SDA-BL
SCL-BL
BL-SPI-CLK
BL-SPI-SDO
LED-1
KEYBOARD
SCL-BL
TACH02
TACH01
SDA-BL
RC
LIGHT-SENSOR
LED-2
AMBI-SPI-CLK-OUT
AMBI-SPI-SDO-OUT
AMBI-SPI-SDI-OUT_G1
AMBI-PWM-CLK_B2
AMBI-TEMP
EN 150 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-22 B09 820400089812 Non DVBS Con.
Non DVBS Connector Board
18770_569_100125.eps
100218
Non DVBS Connector Board
B09A B09A
2009-10-22 2
8204 000 8981
Non DVBS
CONNECTOR BOARD
FT71 A4
FT72 A5
FT73 A4
FT74 A4
FT75 A5
FT76 B4
FT77 B5
FT78 B4
FT79 B4
TO
HOTEL TV
FT92 B9
FT93 B9
FT94 B9
FT95 C7
SENSOR
FT57 E8
FT96 E4
FT97 E4
FT98 E5
FT99 F5
IT73 A7
IT74 B7
IT75 B7
IT78 F4
3T88-2 E7
3T88-4 F7
3T90 D3
3T91 D4
3T92 E4
3T93 E3
5T53 F3
5T54 F3
9T50 E7
FT80 B5
FT81 B5
FT82 B5
FT87 A7
FT88 B9
FT89 B9
FT90 B9
FT91 B9
*
LED PANEL
2T92 F7
3T70 B2
3T71 E7
3T74 A6
3T75 A7
3T76 A7
3T77 B7
3T78 B7
3T79 C7
FT58 E8
FT59 F7
FT60 E8
FT61 E8
FT64 E7
FT68 D3
FT69 E3
FT70 A5
3T88-1 D7
1M71 E5
1T85 F4
1T86 B4
2T70 B3
2T76 A7
2T77 A7
2T78 B7
2T79 B7
2T80 B7
FC83 B4
FT50 C7
FT51 C7
FT52 D8
FT53 D8
FT54 D8
FT55 D8
FT56 E8
2T89 D7
2T90 E7
2T91 F7
1M20 B9
3T80 D4
3T81 E4
3T82 E4
3T83 E4
3T84 C7
3T85 C7
3T86 D7
3T87 F7
TEMPERATURE
1M59 A5
9
1 2 3 4 5 6 7 8
2T81 B9
2T82 C7
2T83 E4
2T84 E4
2T85 F5
2T86 C7
2T87 D7
2T88 D7
9
A
B
C
D
E
F
A
B
C
D
E
F
1F53 D9
1M09 C5
FT71
1 2 3 4 5 6 7 8
FT97
3T86
100R
100R
3T82
FC83
2
T
8
3
1
0
0
p
T 63V 2.0A
1T86
FT59
4 5
100R
3T88-4
FT94
FT77
2
T
8
9
1
0
p
2T76
100p
FT56
2
T
8
7
1
0
p
2
T
7
0
1
0
0
n
1
0
p
2
T
9
0
FT80
+3V3
*
RES
10K
3T93
+3V3
FT90
FT78
100p
2T77
3T92
FT76
*
RES
100R
*
RES
100R
3T91 10K
3T90
6
7
8
*
RES
1
2
3
4
5
FT51
1M20
FT64
FT81
+3V3
100p
2T80
3T88-1
8 1
100R
RES
FT53
30R
5T54
FT87
FT72
FT98
+5V
FT57
FT54
2
T
8
1
FT68
FT91
1
0
0
n
100R
3T76
100R
3T87
2T79
100p
FT61
FT74
3T88-2
100R
2 7
FT92
3T84
100R
FT96
T
6
3
V
1
.0
A
1
T
8
5
3T75
100R
16
FT75
13
14
2
3
4
5
6
7
8
9
15
1F53
502386-1470
1
10
11
12
V-AMBI
FT52
1
0
p
2
T
9
1
FT99
+3V3
2
T
8
5
1
u
0
FT89
1
0
0
p
FT60 2
T
8
4
9
T
5
0
100R
3T71
FT95
3T70
100R
FT70
1
0
p
2
T
8
8
FT79
+24V
IT75
FT88
+12V
2
T
9
2
1
0
p
IT74
10R
3T79
100R
RES 3T83
100R
RES
FT55
3T81
100p
2T82
IT73
FT50
502382-0470
1
2
3
4
5 6
1M09
5
6
7
8
9
FT93
19
2
20
21
22
23
24
25
3
4
1
10
11
12
13
14
15
16
17
18
FH12-25S-0.5SH(55)
1M59
IT78
FT58
REF EMC HOLE
1X03
1
0
0
K
3
T
7
4
3T77
100R
FT73
100R
3T78
1
0
p
2
T
8
6
1735446-4
1M71
1
2
3
4
RES
5T53
30R
FT82
100R
3T85
V-AMBI
FT69
3T80
+24V
100R
2T78
100p
FAN-CTRL1
FAN-CTRL2
FAN-DRV
+3V3-STANDBY
BL-SPI-SDO
BL-SPI-SDI
BACKLIGHT-PWM_BL-VS
BL-SPI-CSn
AMBI-SPI-CS-OUTn_R2
AMBI-LATCH2_DIS
AMBI-SPI-CS-EXTLAMPSn
BACKLIGHT-PWM-ANA-DISP
SDA-BL
SCL-BL
BL-SPI-CLK
LED-2
LED-1
KEYBOARD
SCL-BL
TACH02
TACH01
SDA-BL
AMBI-TEMP
RC
LIGHT-SENSOR
AMBI-SPI-CLK-OUT
AMBI-SPI-SDO-OUT
AMBI-SPI-SDI-OUT_G1
AMBI-PWM-CLK_B2
AMBI-LATCH1_G2
AMBI-PROG_B1
AMBI-BLANK_R1
Circuit Diagrams and PWB Layouts EN 151 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-23 B11 820400090693 TCON LGD
TCON Controller
18770_547_100119.eps
100218
TCON Controller
B11A B11A
2009-11-12 3
2009-10-26 2
8204 000 9069
TCON LGD
COM
OUT IN
DPM
VST|GSP
GCLK1|GSP_R
GCLK2
GCLK3
GCLK4
GCLK5
GCLK6
FLK1
POL
SOE
R_MLVDS
PWM_TOUT|WPWM
PWM_TIN
LEDON
SCAN_BLK|REFMODE
SCAN_BLK2
H_CONV
VDD_EVEN|GOE
OPT_N
VDD_ODD|GSC
OPC_EN
REVERSE
GIP_EN
ODC_BYPASS
EEP_SIZE
SCL
SDA
I2C_EN
WP
XIN
XOUT
RESET
DISM
BIT_SEL
TESTA
TESTB
SCL
ADR
0
1
2 SDA
WC VIA VIA
RC1
RD1
RE1
RCLK1
M
P
M
P
M
P
M
P
M
P
RA2
RB2
RC2
RD2
RE2
RCLK2
M
P
M
P
M
P
M
P
M
P
M
P
RA3
RB3
RC3
RD3
RE3
RCLK3
RA1
RB1
M
P
M
P
M
P
M
P
M
P
RA4
RB4
RC4
RD4
RE4
RCLK4
+
-
LLV0
+
-
LLV1
+
-
LLV2
+
-
LLV3
+
-
M
P
-
LLV5
+
-
LLV6
+
-
RLV0
+
-
RLV1
+
-
RLV2
+
-
RLV3
+
-
RLV4
+
-
RLV5
+
-
RLV6
P
M
P
M
M
P
P
M
P
M
P
M
P
M
LLV4
+
CVDD
LGND
SDGND
MLVSS
PLLGND
SDVDD
3V3
1V8
LVDD
MLVDD
IOVDD
GND_HS
CGND
IOGND
PLLVDD
FJ13 B9
FJ15 B9
FJ16 B9
FJ17 C9
FJ18 C9
FJ19 C9
FJ20 C9
FJ21 C9
FJ35 E9
FJ36 E9
9J01 C1
FJ37 E9
FJ01 A9
FJ02 A9
FJ03 A9
FJ04 A9
FJ05 A9
FJ06 A9
FJ07 A9
FJ38 E9
FJ39 E9
FJ40 E9
FJ41 E9
FJ42 E9
FJ43 E9
FJ44 F9
FJ49 C1
FJ4A H5
FJ47 F9
FJ48 F9
3J30 F8
FJ14 B9
NC
LDO BLOCK
NC
ASIC OPTION
3J36 H7
3J37 H6
3J38 H6
3J39 G9
3J40 G9
FJ22 C9
FJ23 C9
FJ24 C9
FJ25 C9
FJ26 D9
FJ27 D9
FJ28 D9
FJ29 D9
FJ30 D9
FJ33 D9
FJ34 D9
3J10 A8
9J02 C1
NC
9J03 E4
9J04 G6
3J12 B8
3J13 B8
3J14 B8
3J15 C8
3J16 C8
FJ08 A9
FJ09 B9
FJ0A D3
FJ0B D3
FJ0C E3
FJ0D E3
FJ0E E3
FJ0F E3
FJ0G E3
FJ45 F9
FJ46 F9
FJ11 B9
FJ12 B9
2J20 C1
3J35 H6
2J22 C2
2J23 C2
2J24 C3
2J25 H4
2J26 H3
3J41 G9
3J42 G9
3J43 H9
3J44 H9
3J45 H9
3J46 H9
3J47 H5
7J01-1 C4
7J01-2 A10
FJ31 D9
FJ32 D9
7J02 G5
7J03 G3
2J14 B2
3J11 B8
E2PROM
FROM PNX8550
3J17 C8
3J18 C8
3J19 C8
3J20 D8
3J21 D8
3J22 D8
3J23 D8
3J24 E8
3J25 E8
FJ0H G4
FJ10 B9
3J28 E8
3J29 F8
A
2J21 C2
2J05 A1
2J06 A1
2J28 G5
2J31 H6
2J32 H7
2J33 C3
2J34 D3
3J01 C4
3J02 E6
3J03 D6
3J04 G7
7J01-3 C1
7J01-4 G1
3J08 A8
3J09 A8
13
2J15 B2
3J26 E8
3J27 E8
2J18 B3
2J19 B3
1J02 G8
B
2J01 A1
1 2 6 7 8 9 10 11 12
2J07 B1
2J08 B1
2J09 B1
2J0A A2
2J0B B3
2J0C B3
2J0D B4
2J0E A2
2J0F E6
3J06 G7
3J07 A8
2J12 B1
2J13 B2
12
A
NC
B
C
D
2J16 B2
2J17 B3
G
H
E
1J99 A13
F
2J02 A1
2J03 A1
2J04 A1
3 4 5
9
13
1 2 3 4 5 6 7 8
2J10 B1
2J11 B1
10 11
C
D
E
F
G
H
1J01 C3
R
E
S
2
J0
E
1
0
0
n
VCORE
FJ22
FJ21
1
8
K
3
J0
6
FJ17
FJ06
3J45
1K0
RES
1K0
3J44 RES
FJ0H
FJ14
FJ15
FJ0B
FJ0C
FJ0E
FJ0F
FJ0G
1
0
0
n
2
J2
1
FJ10
1
M
0
3
J0
1
FJ01
1
J0
11
0
M
100R 1% 3J25
FJ0D
FJ40
3J21 100R
1% 100R
1%
3J23
3J24
VCORE
100R 1%
VCC
FJ07
1% 3J17 100R
R
E
S
FJ34
1
0
0
n
2
J0
C
2
J3
1
1
5
p
R
E
S
1
0
0
n
2
J0
A
R
E
S
ML_VDD
1% 3J19 100R
3
J3
5
4
K
7
100R
3J38
1K0
3J43
FJ48
FJ47
2
J0
D
1
0
0
n
R
E
S
2
J1
9
1
u
0
1
u
0
2
J1
8
2
J2
2
1
0
0
n
FJ08
VCC
FJ33
1% 100R 3J07
VCORE
FJ0A
2
J1
0
1
0
0
n
1K0
3J39 RES
1% 3J29 100R
100R
3J37
4
K
7
3
J3
6
FJ32
1
0
u
2
J2
6
1K0
RES 3J42
1K0
3J41
R
E
S
2
J0
F
1
5
p
1
%
3
3
K
3
J0
2
VCC
+VDISP
3J40
1K0
RES
3J14 100R 1%
15p
2J33
2
J2
5
1
0
u
100R 1% 3J27
1
0
0
n
VCC
VCC
2
J2
0
3J16
3J15 100R 1%
1% 100R
1% 100R 3J18
FJ03
FJ02
95
96
97
98
99
86
87
88
89
9
90
91
92
93
94
76
77
78
79
8
80
81
82
83
84
85
67
68
69
7
70
71
72
73
74
75
56
57
58
59
6
60
61
62
63
64
65
66
47
48
49
5
50
51
52
53
54
55
38
39
4
40
41
42
43
44
45
46
27
28
29
3
30
31
32
33
34
35
36
37
19
2
20
21
22
23
24
25
26
10
100
11
12
13
14
15
16
17
18
DF18C-100DP-0.5V (51)
1J99
1
1% 15K
3J03
1
5
p
2
J3
2
R
E
S
FJ31
FJ29
FJ30
FJ38
LD1117ADT18
7J03
1
3 2
FJ37
9J02
FJ46
1% 100R 3J26
VCC
ML_VDD
134
176
175
138
130
131
68
67
66
164
133
150
171
141
137
153
154
60
165 89
163
155
65
73
74
75
76
81
82
132
142 149
162
TCON
172
166
64
87
7J01-1
TL2429MC
FJ04
1
2
3
6
5
8
4
7
M24C32-WDW6
7J02
EEPROM

(4Kx8)
FJ42
FJ39
FJ41
1
0
0
n
2
J1
3
2
J0
5
1
0
0
n
FJ45
FJ43
FJ44
2
J0
1
1
0
0
n
1
u
0
2
J2
3
2
J2
4
1
u
0
FJ05
VCC
1% 100R 3J20
9J01 RES
ML_VDD
VCORE
FJ09
1% 100R 3J22
4
7
K
3
J0
4
2
J2
8
1
0
0
n
1
u
0
2
J0
4
1% 100R 3J30
1
0
0
n
2
J0
7
182
183
184
185
186
205
206
180
207
208
209
210
211
212
213
181
195
196
7 9 1 9 7 1
198
199
200
201
202
203
204
178
187
188
189
190
191
192
193
194
7J01-4
TL2429MC
VIA36
1
u
0
2
J1
7
9J03 RES
2
J0
6
1
u
0
FJ27
2
J0
2
1
u
0
R
E
S
2
J0
B
1
0
0
n
FJ13 1% 100R 3J13
1% 100R 3J10
2
J1
6
1
u
0
2
J1
5
1
u
0
1
u
0
2
J1
4
2J34
15p
FJ24
FJ25
FJ23
1
0
0
n
2
J0
3
3J11 100R 1%
3J08 100R 1%
FJ36
1
0
0
n
2
J0
9
2
J0
8
1
0
0
n
1% 100R 3J12 FJ11
FJ20
2
J1
2
1
0
0
n
1
0
0
n
2
J1
1
FJ35
123
121
120
119
118
116
115
114
113
111
110
13
14
27
28
41
42
55
56
127
126
124
51
52
11
12
25
26
39
40
53
54
22
35
36
49
50
9
10
23
24
37
38
5
6
19
20
33
34
47
48
7
8
21
93
92
3
4
17
18
31
32
45
46
107
105
104
103
102
100
99
98
97
95
94
7J01-2
TL2429MC
LVDS
108
1% 100R 3J28
9J04
3J09 100R 1%
FJ49
+VDISP
FJ28
148
156
160
167
173
144
147
152
161
168
174
62
88
135
143
109
117
125
90
96
106
112
122
84 83
136
169
15
29
43
57
16
30
44
58
91
101
63
72
80
140
157
170
71
79
139
151
146
159
2
59
69
77
85
128
145
158
177
1
61
70
78
86
129
VCC
7J01-3
TL2429MC
POWER
FJ26
1
2
3
4
5
6 7
1J02
BM05B-SRSS-TBT
FJ19
FJ18
1K0
3J46 RES
FJ16
FJ12
FJ4A
1
0
0
R
3
J4
7
PX1B-
PX1B+
WP
WP
SCL-TCON
SCL-TCON
SDA-TCON
PX1D-
PX1D+
PX1E-
PX1E+
PX1A-
PX1C-
PX1C+
PX1A+
PX2E+
PX2A-
PX2A+
PX2B-
PX2B+
PX2C-
PX2C+
PX1CLK-
PX1CLK+
PX3A-
PX3A+
PX3B-
PX3B+
PX3C-
PX3C+
PX2CLK-
PX2CLK+
PX2D-
PX2D+
PX2E-
PX3D-
PX3D+
PX3E-
PX3E+
PX4CLK-
PX4CLK+
PX4D-
PX4D+
PX4A-
PX4A+
PX4B-
PX4B+
PX4C-
PX4C+
PX3CLK-
PX3CLK+
SDA-TCON
SCL-TCON
SDA-TCON
GIP_EN
EEP_SIZE
I2C_EN
ODC_BYPASS
REVERSE
DISM
OPC_EN
BIT_SEL
I2C_EN
PX4E-
PX4E+
PX4CLK+
PX4D-
PX4D+
PX4E-
PX4E+
PX3E+
PX3D+
PX3CLK+
PX3C+
PX3B+
PX3A+
EEP_SIZE
PX3E-
PX3E+
PX4A-
PX4A+
PX4B-
PX4B+
PX4C-
PX4C+
PX4CLK-
PX3B-
PX3B+
PX3C-
PX3C+
PX3CLK-
PX3CLK+
PX3D-
PX3D+
PX4C-
PX4C+
PX4CLK-
PX4CLK+
PX4D-
PX4D+
PX4E-
PX4E+
PX3A-
PX3A+
PX3B-
PX3C-
PX3CLK-
PX3D-
PX3E-
PX4A-
PX4A+
PX4B-
PX4B+
PX2D+
PX2E-
PX2E+
PX3A-
PX1E-
PX1E+
PX2A-
PX2A+
PX2B-
PX2B+
PX2C-
PX2C+
PX2CLK-
PX2CLK+
PX2D-
PX1A-
PX1A+
PX1B-
PX1B+
PX1C-
PX1C+
PX1CLK-
PX1CLK+
PX1D-
PX1D+
RMLV1P
RMLV0N
RMLV0P
RMLV4P
RMLV3N
RMLV3P
RMCLKN
RMCLKP
RMLV2N
RMLV2P
RMLV1N
LMLV3N
LMLV4P
LMLV4N
LMLV5P
LMLV5N
RMLV5N
RMLV5P
RMLV4N
LMLV0N
LMLV1P
LMLV1N
LMLV2P
LMLV2N
LMCLKP
LMCLKN
LMLV3P
PX1C-
PX1D-
PX1E-
PX2A-
PX2B-
PX2CLK-
PX2C-
PX2D-
PX2E-
LMLV0P
PX1A-
PX1B-
PX1CLK-
GCLK6
GIP_EN
H_CONV
ODC_BYPASS
OPC_EN
OPT_N
POL_A
RESET
REVERSE
SOE_A
GVDD_EVEN
GVDD_ODD
GVST
WP
PX2CLK+
PX2C+
PX2D+
PX2E+
BIT_SEL
DISM
DPM
FLK
GCLK1
GCLK2
GCLK3
GCLK4
GCLK5
PX1A+
PX1B+
PX1CLK+
PX1C+
PX1D+
PX1E+
PX2A+
PX2B+
EN 152 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
TCON DC/DC
18770_548_100119.eps
100119
TCON DC/DC
B11B B11B
2009-11-12 3
2009-10-26 2
8204 000 9069
TCON LGD
1
2
3
4
5
6
7
8
9
VSENSE
A Y
GON
FLK
1
2
3
4
5
6
7
8
9
YDCHG
1
2
3
VIA
1
2
GOFF
RE
VIA
GND VGL_HS
GND
PG
LBO
SYNC
VINA
VIA
GND_HS AGND PGND
SW
FB
VIN
EN
LBI
-T
2JD2 G4
2JE1 C12
2JE6 C13
2JE7 C14
2JE8 C14
6 7 8
42 INCH 37 INCH
13 14 1 2 3 4
I
1JG1 A2
1JG2 B2
2JD0 F2
2JD1 F4
FOR DEBUG ONLY
POWER BLOCK
2JE2 C13
2JE3 C13
2JE4 C13
2JE5 C13
27K 3JEP
1 2 3 4 5 6
2JE9 C14
2JD3 F6
2JD4 H3
12 13
2JE0 C12
18K
14
A
5
C
D
E
F
G
H
I
A
9 10 11 12
G
H
NC
RES 3JH5 RES 330K
150K 196K
33K K 8 6 C E J 3
82K
2JEA C14
2JEB C14
2JEE C12
7 8 9 10 11
2JEL B12
2JEM B11
51K
56K
3JEL 270K
3JH4 180K 390K
ITEM NO 32 INCH
143K 3JE0
3JH6 47K
B B
C
D
E
F
2JEU C9
2JEWC7
137K 150K
3JED 174K
2JF0 B10
2JF1 B10
68K
2JF3 B9
2JF4 B9
2JF5 B9
2JF6 B9
2JF7 B9
2JF8 B8
2JF9 B8
2JFA B8
2JEF C12
2JEG D13
2JEH D11
2JEJ B12
2JEK B12
2JFG E12
2JFH F12
3JH7
140K 150K
180K
LEVEL SHIFTER BLOCK
2JFL E8
2JFM F8
56K
2JFP C12
2JFR C12
2JFT C8
2JG1 B1
2JG2 B3
2JH0 C2
2JH1 C2
2JH2 C3
2JEN B11
2JEP B11
2JEQ B10
2JER B10
2JET D9
2JH8 C2
3JD0 F2
HVDD BLOCK
DISPLAY INTERFACING - VDISP
2JEY B9
2JEZ D9
2JF2 B9
3JD1 F2
3JD2 E4
3JD3 E5
3JD4 H6
3JD5 E5
3JD6 E5
2JFB B8
2JFC B8
2JFD B8
2JFE E13
2JFF E13
3JE1 C13
3JE2 C13
2JFJ E9
2JFK E9
3JE8 C7
3JE9 C7
2JFN F13
3JEB E14
3JEC E13
3JED E13
3JEE E13
3JEF D9
3JEG F13
3JEH F12
3JEJ D9
2JH3 C1
2JH4 C4
2JH5 C4
2JH6 C4
2JH7 C4
3JET C11
3JEU E7
75K 75K
3JEWE8
3JH0 C3
3JH1 D1
3JH2 D1
3JH3 D1
3JH4 C3
3JH5 C3
3JH6 D3
3JH7 D3
3JD7 E5
3JD8 G4
3JD9 H4
3JDA H4
3JE0 C13
5JF1 B9
5JG1 A2
6JD1 F6
6JE1 B13
FJE3 F7
3JE3 C13
3JE4 C14
3JE5 B11
3JE6 D13
3JE7 B8
6JE2 D13
6JF0 A12
3JEA B8
6JF2 E12
6JF3 F12
6JF4 E9
6JG1 B4
7JD1 F5
7JF1 B10
7JH1 C2
9JD0 F2
3JEK E9
3JEL E8
3JEN E8
3JEP F8
3JER C9
NC
9JD6 H2
9JD7 H2
9JDE I2
9JE3 E8
9JE4 E13
9JE5 E9
9JE6 C9
9JE7 E8
9JDC H2
9JDD I2
3JG1 B3
FJE2 E14
9JD8 H2
9JD9 H2
9JDA H2
9JDB H2
3JH8 E14
3JH9 E13
3JHA D1
3JHB D1
5JF0 A11
5JH1 C3
6JD0 F4
+VDISP
FJD1 E6
FJD2 H6
FJE1 C14
FJG1 B3
FJG2 B8
FJG3 C13
FJH1 D4
cJD1 D3
9JD2 G2
9JD3 G2
6JF1 B9
5JG2 B2
9JD1 G2
9JD4 G2
9JD5 G2
9JD9
2
JH
4
2
2
p
2
JF
5
1
0
u
2
JF
4
1
0
u
1
0
u
2
JH
5
+VDISP-INT
13
14
15
16
17
18
19
20
21
22
30
31
32
33
34
35
36
37
38
28
2
1
25
26
27
2
3
11
10
12
24
2
9
9
8
7
6
5
4
3
7JD1
MAX17119
R
E
S
1
0
u
2
JE
9
2
JE
4
1
u
0
5
JH
1
6
u
8
R
E
S
1
0
0
n
FJE2
2
JD
0
FJH1
FJE1
9JD2 RES
10R
9JDA
3JD0
RES
1%
8
R
E
S
2
JD
4
1
0
u
1
6
14
15
5
18
19
20
21
23
4
10
1
1
1
2
1
7
7
6
13
1

STEP-DOWN
CONVERTER
TPS62110RSA
7JH1
9
1
%
1
0
0
R
BZX384-C9V1
6JD1 RES
3
JD
8
1
u
0
2
JD
3
+VDISP
R
E
S
2
JG
1
2
2
u
2
JD
1
1
u
0
RES
6JD0
BZX384-C9V1
RES 9JD5
1u0
RES 9JD4
2JFP
9JD3
6JE1
7
K
5
3
JH
3
BAV99 COL
9
JE
4
1
0
u
2
JF
B
R
E
S
1
%
3
K
0
3
JD
9
2K2
3JG1
3
6
0
R
R
E
S
3
JE
J
1
%
VDD
2
JF
3
1
0
u
1u0
2JH8 RES
2JFJ
100n
9JE5
3
JD
3
1
0
R
1
%
3
JD
2
1
%
1
0
R
2
JD
2
1
u
0
9JD0
FJG2
RES 9JD1
1
%
FJE3
5
K
1
3
JE
A
1R0
RES 3JEK
FJD2
100n
2JEZ
FJD1
B340A
6JF0
2
JE
R
1
0
u
2
JE
1
22u
5JF0
1
0
u
R
E
S
2
7
K
3
JE
P
1
%
1
%
1
5
0
K 3
JE
L
3
6
0
R
3
JE
F
1
%
9
K
1
3
JE
B
R
E
S
1
0
u
2
JE
6
3
JE
W
1
K
0
1
%
VDD
3
JH
B
9
K
1
1
%
1
u
0
2
JF
F
VCC
3
JE
G
1
0
0
R
1
%
1
0
u
2
JF
A
1
0
u
2
JF
6
3
JD
7
1
%
3
JD
6
1
0
R
1
0
R
R
E
S
1
%
3
6
0
R
3
JD
5
1
%
1% 10R
3JD4
6JF4
BAV99 COL
1
0
u
2
JE
K
10K 3JET
9JE7
FJG3
RES 2JFT 100n
2JEY
100n
3
JD
A
1
0
K
1
%
1
0
u
R
E
S
1
0
u
2
JF
C
R
E
S
2
JE
N
6
JF
3
R
E
S
B
A
V
9
9
C
O
L
B
A
V
9
9
C
O
L
24
VIN
VL
28
6
JF
2
SRC
SWI
34
35
SWO
1
THR
42
VIA1
43
VIA2
44
VIA3
45
VIA4
19
LX2_1
20
LX2_2
7
MODE
21
OUT
3
0
P
G
N
D
1
3
1
P
G
N
D
2
38
PGOOD
15
REF
4
25
FSEL
3
GND2
G
N
D
_
H
S
4
1
5
GON
2
2
IN
2
_
1
2
3
IN
2
_
2
3
2
L
X
1
_
1
3
3
L
X
1
_
2
12
DRVN
2
DRVP
26
EN1
29
EN2
36
FB1
17
FB2
1
4
F
B
N
9
F
B
P
37
COMP
1
0
C
P
G
N
D
39
CRST
11
CTL
16
DEL1
27
DEL2
8
DLP
6
DRN
7JF1
MAX17113ETL
13
AGND1
40
AGND2
18
BST
9JE6
2JFR
1
%
3
K
6
3
JE
N
100n
1
0
u
2
2
0
n
2
JF
L
3
JE
6
2
JF
M
1
0
K
1n5 2JEE RES
1
0
u
R
E
S
2
JE
B
2
JG
2
1
0
0
n
T 32V 3.0A
1JG1
RES
T 32V 3.0A
1JG2
3
JH
A
4
7
K
1
%
3JEU
100R
3
JH
8
9
K
1
2
JE
J
VDD
1
0
u
FJG1
6JG1 2
JE
L
1
u
0
LTST-C190KGKT
2
JE
2
1
0
0
n
R
E
S
R
E
S
1
u
0
2
JE
3
1
0
u
2
JF
D
R
E
S
2
JE
G
1
u
0
2JEH 150p
470n
2JFG
2JFH
470n
RES
9JE3
+VDISP
1
0
u
2
JH
1
2
JH
0
1
0
u
1
0
R
3
JH
0
1
%
1
%
1
8
0
K
3
JH
4
5JG2
30R
RES
30R
5JG1 RES
9JD7
9JD6
9JDC
3
JE
01
%
1
5
0
K
VDD
2JEU
1
0
u
R
E
S
1u0
2
JF
1
2
JF
2
R
E
S
1
0
u
2
JF
0
R
E
S
1
0
u
RES 1R0 3JER
1
%
6
8
K
3
JE
C
2
0
K
3
JH
2
3
JH
5
R
E
S
1
5
0
K
1
%
BAV99 COL
6JE2
4
u
7
2
JF
E
+VDISP
9JDB
2
JE
5
1
0
u
9JD8
R
E
S
3
JH
9
1
0
K
cJD
1
2
JF
N
1
0
0
R
3
JE
H
1
%
1
u
0
9JDE
+VDISP
9JDD
1
%
1
0
K
3
JE
E
1
5
0
K
3
JE
D
1
%
2JEF 1n5
7
5
K
3
JH
7
1
%
1
0
u
2
JH
6
1
0
0
n
2
JF
8
R
E
S
1
5
0
p
2
JF
7
2JH3
1
%
5
6
K
3
JH
6
RES
1u0
47K 1%
3JH1
2
JH
2
1
u
0
2
JE
A
1
0
u
R
E
S
VCC
6
JF
1
B
3
4
0
A
100n
2JET
2R2
3JE5
VCC
2JEM
1n0
VDD
3
JE
4
1
%
9
K
1
4
K
7
3
JD
1
1
%
VCC
2
JF
9
1
%
1
0
u
1
%
R
E
S
3
JE
9
1
K
0
1
K
0
3
JE
8
2
JE
W
1
0
0
n
1
%
1
0
R
3
JE
7
1u0 2JFK
2
JE
8
1
0
u
2
JE
7
1
0
u
1
%
1
5
K
3
JE
3
7
5
K
3
JE
2
1
%
1
0
u
R
E
S
2
JE
0
+VDISP
+VDISP
2
JE
P
2
JE
Q
1
0
u
R
E
S
1
0
u
2
JH
7
1
u
0
5JF1
VCC
22u
3
JE
1
1
5
0
K
R
E
S
1
%
DI_SCHG
EN2
EN2
EN2
VGH
VDD_ODD
VDD_EVEN
VST
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
GVDD_ODD_1
GVDD_EVEN_1
GVST_1
GCLK1_1
GCLK2_1
GCLK3_1
GCLK4_1
GCLK5_1
GCLK6_1
FLK_IN
VDD_FB
VGL
VGH
DPM
VGL
HVDD_FB
H_VDD
DPM
VL
EN1
REF
VGL_FB VGH_FB
VGH_FB
REF
VGL_FB
RESET
VGL_1
FLK_IN FLK
VGL
VGH
VGL
DI_SCHG
GVST_1
GVDD_ODD GVDD_ODD_1
GVDD_EVEN
GCLK6
GCLK5
GCLK4
GCLK3
GCLK2
GCLK1
GVST
VGH
VGL
GVDD_EVEN_1
GCLK6_1
GCLK5_1
GCLK4_1
GCLK3_1
GCLK2_1
GCLK1_1
VGI_P
VGI_N
Circuit Diagrams and PWB Layouts EN 153 Q552.1E LA 10.
2010-Feb-19
back to
div. table
Mini LVDS
18770_549_100119.eps
100119
Mini LVDS
B11C B11C
2009-11-12 3
2009-10-26 2
8204 000 9069
TCON LGD
AGND GND
NC
GMA
AVDD
1
2
3
4
5
6
7
8
VCOM
VCOM_FB
AVDD
DVDD
SDA
SCL
A0
HS
VIA
AMP
AMP
FJC8 G3
FJC9 E6
FJCA E6
FJBL B3
FJBM D4
FJBN D4
FJBP D4
FJCJ B8
FJCK E11
FJCL E11
FJC4 E4
FJC5 E4
FJC6 E4
FJAZ E1
FJB1 E1
FJB2 E1
FJB3 E1
PGMA BLOCK
FJBD F1
FJBE F1
FJBF F1
FJCB F6
FJCC G6
FJCE H6
FJCG E7
FJA7 C2
FJA8 C2
FJA9 C2
FJAA C2
FJBR D4
FJBT D4
FJBU D4
FJBW D4
FJBY D4
FJBZ D4
FJC0 D4
FJC1 D4
FJC2 E4
I2C SWITCH (VGA VCOM)
FJAM D1
FJAN E1
FJAP E1
FJAR E1
FJC3 E4
9JA2 H2
9JB3 F6
9JB5 F6
9JB6 E8
FJB4 E1
FJB5 E1
FJB6 F1
FJB7 F1
FJB8 F1
FJB9 F1
FJBA F1
FJBB F1
FJBC F1
FJA2 B2
FJBG F1
FJBH F1
FJBJ F1
FJBK G1
2JAB H2
2JC0 B6
2JC1 C7
2JC2 C8
FJAB C2
FJAC C2
FJAD C2
FJAE C2
FJAF C2
FJAG D2
FJAH D1
FJAJ D1
FJAK D1
FJAL D1
3JC4 C9
3JC5 C6
3JC6 C6
FJAT E1
FJAU E1
FJAW E1
FJAY E1
10 11 12
A
9JB7 E8
9JBA E10
9JBB E10
9JBF C11
9JC0 D9
9JC1 D9
9JC2 D9
FJA0 B1
FJA1 B2
2JA4 B3
2JA5 B3
2JA6 B4
FJA3 C2
FJA4 C2
FJA5 C2
FJA6 C2
6 7 8 9
2JC3 C8
2JC4 C6
2JC5 C6
3JA1 G2
3JB1 F6
3JC0 B7
3JC1 B7
3JC2 D8
3JC3 D8
7JB1 G6
7JB3 H6
7JC1 C6
9JA1 H2
C
D
E
F
B
C
D
E
F
G
H
A
B
I2C SWITCH (SSB-NVM)
1
2JA7 B4
2JA8 D2
2JA9 E4
2JAA G2
10 11 12
1 2 3 4 5 6 7 8 9
G
H
1JA1 G1
1JA2 G3
1JB1 E5
2JA0 B1
2JA1 B1
2JA2 B1
2JA3 B2
GPIO
2 3 4 5
FJB5
VDD
RES
10u 2JA8
9JBA
FJBP
VDD
1
0
u
2
J
C
1
FJBN
FJCL
FJCK
FJBJ
FJA6
FJA7
3JC2
150R 1%
R
E
S
FJBW
2
J
C
4
1
5
p
1
0
u
2
J
A
0
VCC
FJC6
FJBT
FJA1
FJBR
FJBG
P_VDD
1
0
0
n
2
J
C
0
60
7
8
9
61 62
50
51
52
53
54
55
56
57
58
59
6
41
42
43
44
45
46
47
48
49
5
32
33
34
35
36
37
38
39
4
40
22
23
24
25
26
27
28
29
3
30
31
12
13
14
15
16
17
18
19
2
20
21
196119-60041
1
10
11
1JA2
RES 9JBB
FJBF
FJAU
VCC
2
J
C
3
1
0
0
n
1
0
0
n
2
J
C
2
FJC3
FJBB
FJBK
FJB9
FJB8
FJAE
9JC1 FJAG
FJAK
2
J
A
5
1
0
0
n
2
J
A
4
1
0
u
FJA4
FJCE
FJA0
2
J
A
3
1
0
0
n
9JA2
FJBM
FJAL
FJAM
1
5
p
2
J
C
5
R
E
S
9
J
B
5
R
E
S
28
29
30
20
1
5
6
22
23
24
25
26
27
11
12
13
14
15
18
19
2
1
9
17
2
4
81
6
7 3
10
7JC1
MAX9668ETP
58
59
6
60
7
8
9
61 62
49
5
50
51
52
53
54
55
56
57
38
39
4
40
41
42
43
44
45
46
47
48
29
3
30
31
32
33
34
35
36
37
19
2
20
21
22
23
24
25
26
27
28
1
10
11
12
13
14
15
16
17
18
196119-60041
1JA1
1
5
p
2
J
A
A
1
0
0
n
2
J
A
7
FJAF
VCC
FJAC
1
0
n
2
J
A
2
FJA2
FJCJ
FJAY
FJAZ
3JC3 RES
1% 1K0
1
0
0
n
2
J
A
1
VCC
3
J
C
5
FJAP
1
0
K
FJAJ
FJAH
FJAD
FJBZ
FJBE
2
J
A
6
1
0
n
FJA5
VCC VDD
FJA8
BSH111
7JB3
FJB2
RES
FJAR
3
J
C
0
2
0
R
1% 1K0
3JC4
FJB4
3
J
C
6
1
0
K
9JA1
3JA1
10R
FJB3
FJBY
7 8
1
2
3
4
5
6
1JB1
502382-0670
9JC2
FJCC
FJAB
FJAA
FJA9
FJBL
RES 9JBF
FJAT
1
5
p
2
J
A
B
FJBD
FJBC
VCC
FJB6
FJBA
FJB1
FJA3
VCC
FJB7
9JC0
FJC4
FJBH
FJCB
FJAN
FJCA
FJBU
3
J
C
1
2
0
R
7JB1
BSH111
FJCG
RES
FJC2
FJC1
FJC9
FJAW
1
0
K
3
J
B
1
2JA9 10u
9JB6
RES 9JB3
9JB7 FJC5
FJC0
FJC8
SDA-DISP SDA-TCON
WP
BYPASS_MODE CTRL-DISP
VCOM_SDA
VCOM_SCL
VGA-SDA-EDID-TCON VCOM_SDA
VCOM_SCL
SDA-DISP VCOM_SDA
SCL-DISP SCL-TCON
RMLV0P
VCOM_SCL SCL-DISP
VGA-SCL-EDID-TCON
VST
VGL_1
BYPASS_MODE
RMLV3P
RMCLKN
RMCLKP
RMLV2N
RMLV2P
RMLV1N
RMLV1P
RMLV0N
LMLV1P
LMLV0N
LMLV0P
RMLV5N
RMLV5P
RMLV4N
RMLV4P
RMLV3N
LMLV4P
LMLV3N
LMLV3P
LMCLKN
LMCLKP
LMLV2N
LMLV2P
LMLV1N
H_VDD
POL_A POL-TCON
SOE_A SOE
H_CONV H_CONV_1
LMLV5N
LMLV5P
LMLV4N
Z_OUT
CLK1
CLK2
SOE
POL-TCON
GVST_1
H_CONV_1
OPT_N
GMA18
GMA16
CLK3
GMA15
GMA13
GMA12
GMA10
GMA9
GMA7
GMA6
GMA4
GMA3
GMA1
CLK4
CLK5
CLK6
VGI_N
GMA15
GMA16
GMA18
OPT_N
H_CONV_1
GVST_1
POL-TCON
SOE
VGI_P
VDD_ODD
VDD_EVEN
VGL_1
VST
VCOMRFB
VCOMR
GMA1
GMA3
GMA4
GMA6
GMA7
GMA9
GMA10
GMA12
GMA13
VCOM_FBO
Z_OUT
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
VGI_N
VGI_P
VDD_ODD
VDD_EVEN
VCOMLFB
VCOML
H_VDD
GMA3
GMA4
GMA6
GMA7
GMA12
GMA13
GMA15
GMA16
VCOM_SCL
VCOM_SDA
VCOM
VCOM_FBO
VCOMLFB
VCOMRFB VCOMR
VCOML
VCOM
EN 154 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Connectors
18770_550_100119.eps
100119
Connectors
B11D B11D
2009-11-12 3
2009-10-26 2
8204 000 9069
TCON LGD
2J77 B7
2J78 B7
2J81 B8
2J82 C7
D
2D DIMMING
ROUND SCREWHOLE 4.5mm
E
F
A
B
C
D
E
F
1F53 D8
1J85 D2
1M20 B8
1M71 C1
1P12 B3
1X03 E8
1X05 E8
1X08 E9
2J76 A7
3J79 C6
2J79 B8
2J80 C7
2J83 D1
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
A
B
C
FJ57 D8
TEMPERATURE
2J84 D1
2J85 D1
2J86 D7
2J87 D7
2J88 D7
2J89 E7
2J90 E7
2J91 F7
2J92 F7
2J93 C3
2J94 C4
2J95 B6
3J74 A6
3J75 A6
3J76 A6
3J77 B6
3J78 B6
FJ99 D1
OVAL SCREWHOLE
SENSOR
3J80 C2
3J81 C2
3J82 D2
3J83 D2
3J84 C6
3J85 D6
3J86 D6
3J87 F6
3J88-1 E6
3J88-2 E6
3J88-4 E6
3J89 B4
5J53 E3
5J54 D3
FJ50 B3
FJ51 B8
FJ52 D8
FJ53 D8
FJ54 D8
FJ55 D8
FJ56 D8
FJYJ A1
Dummy testlands for common jig
FJ58 D8
FJ5A B1
FJ5B B1
FJ5C B1
FJ5D B1
FJ5F C1
FJ60 E8
FJ88 B8
FJ89 B8
FJ90 B8
FJ91 B8
FJ92 B8
FJ93 B8
FJ94 B8
FJ96 D1
FJ97 D1
FJ98 D1
FJZB A1
FJZC A1
FJZF B1
FJZG B1
FJZK B1
FJZL A1
LIGHT STRIP
FJY1 B1
FJY2 A2
FJY3 A2
FJY4 A2
FJY5 A2
FJY6 B2
FJY7 B3
FJY8 B3
FJY9 B2
FJYA A1
FJYB A1
FJYC B1
FJYD B1
FJYE B1
FJYF B1
FJYG B1
FJYH B1
FJZR B1
FJZT B1
FJYK A1
FJYL A1
FJYM A1
FJYN B1
FJYP B1
FJYQ B1
FJYR A3
FJYT A3
FJYU A3
FJYV B1
FJYW A3
FJYZ B1
FJZ1 B3
FJZ2 B3
FJZA A1
FJZU B1
FJZD A1
FJZE B1
FJZV B1
FJZW B1
FJZH B1
FJZJ B1
FJZY A1
FJZZ A1
FJZM A1
FJZN A1
FJZP A1
FJZQ B1
ROUND SCREWHOLE 4mm
LED PANEL
2
J
8
5
1
u
0
FJZD
FJ54
FJZC
100R
3J85
30R
5J54
RES
1
0
0
p
2
J
8
9
+12V
2
J
7
8
1
0
0
p
1
0
0
p
2
J
9
1
FJ91
3J82 100R
+3V3
3J75
100R
FJYF
FJZY
FJ53
FJZV
FJZT
FJZU
FJZR
FJ5A
FJ5B
FJY6
FJ50
FJY4
FJY5
FJY2
FJY3
FJYZ
2
J
9
0
1
0
0
p
1 8
100R
3J87
3J88-1
100R
FJZ2
FJ93
1
2
3
4
2041145-4
1M71
1
0
0
p
2
J
7
7
FJZJ
FJZE
FJZF
FJ52
+3V3
3J86
100R
2
J
9
4
1
0
0
p
FJ60
FJ5D
FJ98
FJ96
FJ92
3J83 RES
+5V
100R
2
J
8
8
1
0
0
p
FJYD
FJYE
FJYC
FJYG
FJYA
FJYB
1
0
p
2
J
8
7
4
5
6
7
8
9
15 16
FJ5F
1
10
11
12
13
14
2
3
1F53
502386-1470
100R
3J78
2
J
8
6
1
0
p
FJY1
FJ88
1
0
0
p
2
J
8
0
FJYW
5
FJYV
3J88-4
100R
4
100R
3J88-2
2 7
3J81 100R RES
EMC HOLE
1X05
FJ94
2
J
8
4
1
0
0
p
2
J
8
2
1
0
0
p
T 63V 1.0A
1J85
2
J
9
5
4
7
n
FJZZ
R
E
S
FJ56
FJ5C
FJZH
+5V
2
J
9
2
1
n
0
FJ89
EMC HOLE
1X08
FJ57
FJYU
FJZ1
+3V3-STANDBY
FJYT
1
0
0
K
3
J
7
4
FJ90
10R
3J79
FJYH
FJZP
FJZN
FJZL
FJZM
FJZK
1
2
3
4
5
6
7
8
2041145-8
1M20
3J77
100R
FJ55
REF EMC HOLE
1X03
100R 3J80
FJ97
1
0
0
n
2
J
8
1
FJ51
FJYR
4
5 6
FJYQ
1P12
1
2
3
5J53
30R
RES
502382-0470
FJ99
FJYL
FJYJ
FJYK
FJZQ
1
0
0
p
FJY8
2
J
7
6
FJY7
100R
3J76
2
J
7
9
FJZG
1
0
0
p
2
J
9
3
1
0
0
n
100R
100R
3J89
3J84
FJZA
FJZB
1
0
0
p
2
J
8
3
FJY9 FJYP
FJYM
FJYN
FJZW
FJ58
TACH02
TACH01
LED-1
BL-SPI-SDO
RC
LIGHT-SENSOR
LED-2
LED-1
KEYBOARD
SDA-BL
SCL-BL
BL-SPI-CLK
BL-SPI-SDI
BL-SPI-CSn
BACKLIGHT-PWM_BL-VS
SCL-BL
SDA-BL
FAN-DRV
Circuit Diagrams and PWB Layouts EN 155 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-24 B11 820400090704 TCON LGD
TCON Controller
18770_543_100119.eps
100218
TCON Controller
B11A B11A
2009-11-12 3
2009-10-26 2
8204 000 9070
TCON LGD
CVDD
LGND
SDGND
MLVSS
PLLGND
SDVDD
3V3
1V8
LVDD
MLVDD
IOVDD
GND_HS
CGND
IOGND
PLLVDD
RC1
RD1
RE1
RCLK1
M
P
M
P
M
P
M
P
M
P
RA2
RB2
RC2
RD2
RE2
RCLK2
M
P
M
P
M
P
M
P
M
P
M
P
RA3
RB3
RC3
RD3
RE3
RCLK3
RA1
RB1
M
P
M
P
M
P
M
P
M
P
RA4
RB4
RC4
RD4
RE4
RCLK4
+
-
LLV0
+
-
LLV1
+
-
LLV2
+
-
LLV3
+
-
M
P
-
LLV5
+
-
LLV6
+
-
RLV0
+
-
RLV1
+
-
RLV2
+
-
RLV3
+
-
RLV4
+
-
RLV5
+
-
RLV6
P
M
P
M
M
P
P
M
P
M
P
M
P
M
LLV4
+
VIA VIA
SCL
ADR
0
1
2 SDA
WC
DPM
VST|GSP
GCLK1|GSP_R
GCLK2
GCLK3
GCLK4
GCLK5
GCLK6
FLK1
POL
SOE
R_MLVDS
PWM_TOUT|WPWM
PWM_TIN
LEDON
SCAN_BLK|REFMODE
SCAN_BLK2
H_CONV
VDD_EVEN|GOE
OPT_N
VDD_ODD|GSC
OPC_EN
REVERSE
GIP_EN
ODC_BYPASS
EEP_SIZE
SCL
SDA
I2C_EN
WP
XIN
XOUT
RESET
DISM
BIT_SEL
TESTA
TESTB
COM
OUT IN
11
C
D
E
F
G
H
1J01 C3
H
E
1J99 A13
F
2J02 A1
2J03 A1
2J04 A1
3 4 5
9
13
1 2 3 4 5 6 7 8
2J10 B1
2J11 B1
10
2J13 B2
12
A
NC
B
C
D
2J16 B2
2J17 B3
G
2J19 B3
1J02 G8
B
2J01 A1
1 2 6 7 8 9 10 11 12
2J07 B1
2J08 B1
2J09 B1
2J0A A2
2J0B B3
2J0C B3
2J0D B4
2J0E A2
2J0F E6
3J06 G7
3J07 A8
2J12 B1
3J09 A8
13
2J15 B2
3J26 E8
3J27 E8
2J18 B3
3J29 F8
A
2J21 C2
2J05 A1
2J06 A1
2J28 G5
2J31 H6
2J32 H7
2J33 C3
2J34 D3
3J01 C4
3J02 E6
3J03 D6
3J04 G7
7J01-3 C1
7J01-4 G1
3J08 A8
7J03 G3
2J14 B2
3J11 B8
E2PROM
FROM PNX8550
3J17 C8
3J18 C8
3J19 C8
3J20 D8
3J21 D8
3J22 D8
3J23 D8
3J24 E8
3J25 E8
FJ0H G4
FJ10 B9
3J28 E8
FJ12 B9
2J20 C1
3J35 H6
2J22 C2
2J23 C2
2J24 C3
2J25 H4
2J26 H3
3J41 G9
3J42 G9
3J43 H9
3J44 H9
3J45 H9
3J46 H9
3J47 H5
7J01-1 C4
7J01-2 A10
FJ31 D9
FJ32 D9
7J02 G5
FJ34 D9
3J10 A8
9J02 C1
NC
9J03 E4
9J04 G6
3J12 B8
3J13 B8
3J14 B8
3J15 C8
3J16 C8
FJ08 A9
FJ09 B9
FJ0A D3
FJ0B D3
FJ0C E3
FJ0D E3
FJ0E E3
FJ0F E3
FJ0G E3
FJ45 F9
FJ46 F9
FJ11 B9
FJ48 F9
3J30 F8
FJ14 B9
NC
LDO BLOCK
NC
ASIC OPTION
3J36 H7
3J37 H6
3J38 H6
3J39 G9
3J40 G9
FJ22 C9
FJ23 C9
FJ24 C9
FJ25 C9
FJ26 D9
FJ27 D9
FJ28 D9
FJ29 D9
FJ30 D9
FJ33 D9
FJ36 E9
9J01 C1
FJ37 E9
FJ01 A9
FJ02 A9
FJ03 A9
FJ04 A9
FJ05 A9
FJ06 A9
FJ07 A9
FJ38 E9
FJ39 E9
FJ40 E9
FJ41 E9
FJ42 E9
FJ43 E9
FJ44 F9
FJ49 C1
FJ4A H5
FJ47 F9
FJ13 B9
FJ15 B9
FJ16 B9
FJ17 C9
FJ18 C9
FJ19 C9
FJ20 C9
FJ21 C9
FJ35 E9
1J02
1
2
3
4
5
6 7
BM05B-SRSS-TBT
FJ19
FJ18
RES 3J46
1K0
FJ16
FJ12
FJ4A
3
J4
7
1
0
0
R
+VDISP
FJ49
FJ28
168
174
62
88
135
143
148
156
160
167
173
106
112
122
84 83
136
144
147
152
161
16
30
44
58
91
101
109
117
125
90
96
157
170
71
79
139
151
169
15
29
43
57
77
85
128
145
158
177
63
72
80
140
1
61
70
78
86
129
146
159
2
59
69
POWER
TL2429MC
7J01-3
VCC
FJ26
1
0
0
n
2
J1
2
2
J1
1
1
0
0
n
FJ35
118
116
115
114
113
111
110
42
55
56
127
126
124
123
121
120
119
25
26
39
40
53
54
13
14
27
28
41
50
9
10
23
24
37
38
51
52
11
12
34
47
48
7
8
21
22
35
36
49
17
18
31
32
45
46
5
6
19
20
33
102
100
99
98
97
95
94
93
92
3
4
LVDS
TL2429MC
7J01-2
108
107
105
104
103
3J28 100R
9J04
1%
1% 100R 3J09
FJ36
2
J0
9
1
0
0
n
1
0
0
n
2
J0
8
3J12 100R 1% FJ11
FJ20
15p
2J34
FJ25
FJ24
FJ23
2
J0
3
1
0
0
n
1% 100R 3J11
1% 100R 3J08
9J03 RES
1
u
0
2
J0
6
1
u
0
2
J0
2
1
0
0
n
2
J0
B
R
E
S
FJ27
100R 1% FJ13
1%
3J13
3J10 100R
1
u
0
2
J1
6
1
u
0
2
J1
5
2
J1
4
1
u
0
3J22 100R 1%
3
J0
4
4
7
K
1
0
0
n
2
J2
8
3J30 100R 1%
2
J0
4
1
u
0
213
181
182
183
184
185
186
2
J0
7
1
0
0
n
203
204
205
206
180
207
208
209
210
211
212 194
195
196
7 9 1 9 7 1
198
199
200
201
202
TL2429MC
7J01-4
178
187
188
189
190
191
192
193
VIA36
2
J1
7
1
u
0
FJ05
100R 1%
9J01
3J20
RES
VCORE
ML_VDD
FJ09
FJ45
FJ43
FJ44
1
0
0
n
2
J0
1
1
u
0
2
J2
4
VCC
2
J2
3
1
u
0
FJ04
5
8
4
7 (4K8)

EEPROM
7J02
M24C32-WDW6
1
2
3
6
FJ42
FJ41
FJ39
1
0
0
n
2
J0
5
2
J1
3
1
0
0
n
FJ46
3J26 100R 1%
VCC
ML_VDD
164
133
134
89
163
155
176
175
138
130
131
68
67
66
142 149
162
150
171
141
137
153
154
60
165
64
87
65
73
74
75
76
81
82
132
TCON
TL2429MC
7J01-1
172
166
3J03
15K 1%
FJ31
R
E
S
2
J3
2
1
5
p
FJ30
FJ29
FJ38
2
FJ37
7J03
LD1117ADT18
1
3
9J02
97
98
99
87
88
89
9
90
91
92
93
94
95
96
77
78
79
8
80
81
82
83
84
85
86
68
69
7
70
71
72
73
74
75
76
58
59
6
60
61
62
63
64
65
66
67
48
49
5
50
51
52
53
54
55
56
57
39
4
40
41
42
43
44
45
46
47
29
3
30
31
32
33
34
35
36
37
38
2
20
21
22
23
24
25
26
27
28
10
100
11
12
13
14
15
16
17
18
19
1J99
DF18C-100DP-0.5V (51)
1
VCC
1
0
0
n
2
J2
0
VCC
3J16 100R 1%
100R 1%
1% 100R 3J15
3J18
FJ02
FJ03
1
0
u
2
J2
5
1% 100R 3J27
FJ32
2
J2
6
1
0
u3J42
3J41
1K0
RES
1K0
1
5
p
2
J0
F
3
J0
2
3
3
K
1
%
R
E
S
VCC
+VDISP
RES
1K0
3J40
1% 100R 3J14
2J33
15p
3J29 1% 100R
3J37
100R
3
J3
6
4
K
7
VCORE
FJ0A
1
0
0
n
2
J1
0
3J39
1K0
RES
FJ47
1
0
0
n
2
J0
D
R
E
S
1
u
0
2
J1
9
2
J1
8
1
u
0
2
J2
2
1
0
0
n
FJ08
3J07 100R 1%
VCC
FJ33
ML_VDD
1% 100R 3J19
4
K
7
3
J3
5
3J38
100R
1K0
3J43
FJ48
1%
3J24
100R 3J21
100R 1%
3J23 1% 100R
VCORE
VCC
FJ07
100R 3J17
FJ34
1%
R
E
S
2
J0
C
1
0
0
n
R
E
S
1
5
p
2
J3
1
R
E
S
2
J0
A
1
0
0
n
FJ0B
FJ0E
FJ0C
FJ0G
FJ0F
2
J2
1
1
0
0
n
FJ10
3
J0
1
1
M
0
FJ01
1
0
M
1
J0
1
3J25 1% 100R
FJ0D
FJ40
VCORE
FJ22
FJ21
3
J0
6
1
8
K
FJ17
FJ06
1K0
3J45
3J44
1K0
RES
FJ0H
RES
FJ15
FJ14
1
0
0
n
2
J0
E
R
E
S
PX1A+
PX1B-
PX1B+
WP
WP
SCL-TCON
SCL-TCON
SDA-TCON
PX1D-
PX1D+
PX1E-
PX1E+
PX1A-
PX1C-
PX1C+
PX2E+
PX2A-
PX2A+
PX2B-
PX2B+
PX2C-
PX2C+
PX1CLK-
PX1CLK+
PX3A-
PX3A+
PX3B-
PX3B+
PX3C-
PX3C+
PX2CLK-
PX2CLK+
PX2D-
PX2D+
PX2E-
PX3D-
PX3D+
PX3E-
PX3E+
PX4E+
PX4CLK-
PX4CLK+
PX4D-
PX4D+
PX4A-
PX4A+
PX4B-
PX4B+
PX4C-
PX4C+
PX3CLK-
PX3CLK+
SDA-TCON
SCL-TCON
SDA-TCON
GIP_EN
EEP_SIZE
I2C_EN
ODC_BYPASS
REVERSE
DISM
OPC_EN
BIT_SEL
I2C_EN
PX4E-
PX4D-
PX4D+
PX4E-
PX4E+
PX3E+
PX3D+
PX3CLK+
PX3C+
PX3B+
PX3A+
EEP_SIZE
PX3E-
PX3E+
PX4A-
PX4A+
PX4B-
PX4B+
PX4C-
PX4C+
PX4CLK-
PX4CLK+
PX3A+
PX3B-
PX3B+
PX3C-
PX3C+
PX3CLK-
PX3CLK+
PX3D-
PX3D+
PX4C-
PX4C+
PX4CLK-
PX4CLK+
PX4D-
PX4D+
PX4E-
PX4E+
PX3A-
PX3B-
PX3C-
PX3CLK-
PX3D-
PX3E-
PX4A-
PX4A+
PX4B-
PX4B+
PX2D+
PX2E-
PX2E+
PX3A-
PX1D+
PX1E-
PX1E+
PX2A-
PX2A+
PX2B-
PX2B+
PX2C-
PX2C+
PX2CLK-
PX2CLK+
PX2D-
PX1A-
PX1A+
PX1B-
PX1B+
PX1C-
PX1C+
PX1CLK-
PX1CLK+
PX1D-
RMLV1P
RMLV0N
RMLV0P
RMLV4P
RMLV3N
RMLV3P
RMCLKN
RMCLKP
RMLV2N
RMLV2P
RMLV1N
LMLV3N
LMLV4P
LMLV4N
LMLV5P
LMLV5N
RMLV5N
RMLV5P
RMLV4N
LMLV0N
LMLV1P
LMLV1N
LMLV2P
LMLV2N
LMCLKP
LMCLKN
LMLV3P
PX1D-
PX1E-
PX2A-
PX2B-
PX2CLK-
PX2C-
PX2D-
PX2E-
LMLV0P
PX1A-
PX1B-
PX1CLK-
PX1C-
GCLK6
GIP_EN
H_CONV
ODC_BYPASS
OPC_EN
OPT_N
POL_A
RESET
REVERSE
SOE_A
GVDD_EVEN
GVDD_ODD
GVST
WP
PX2CLK+
PX2C+
PX2D+
PX2E+
BIT_SEL
DISM
DPM
FLK
GCLK1
GCLK2
GCLK3
GCLK4
GCLK5
PX1A+
PX1B+
PX1CLK+
PX1C+
PX1D+
PX1E+
PX2A+
PX2B+
EN 156 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
TCON DC/DC
18770_544_100119.eps
100119
TCON DC/DC
B11B B11B
2009-12-09 4
2009-11-12 3
2009-10-26 2 8204 000 9070
TCON LGD
-T
GND
PG
LBO
SYNC
VINA
VIA
GND_HS AGND PGND
SW
FB
VIN
EN
LBI
1
2
3
4
5
6
7
8
9
VSENSE
A Y
GON
FLK
1
2
3
4
5
6
7
8
9
YDCHG
1
2
3
VIA
1
2
GOFF
RE
VIA
GND VGL_HS
9JD4 G2
9JD5 G2
3JH8 E14
3JH9 E13
3JHA D1
3JHB D1
5JF0 A11
5JH1 C3
6JD0 F4
FJD1 E6
FJD2 H6
FJE1 C14
FJG1 B3
FJG2 B8
FJG3 C13
FJH1 D4
cJD1 D3
9JD2 G2
9JD3 G2
6JF1 B9
5JG2 B2
9JD1 G2
3JEK E9
3JEL E8
3JEN E8
3JEP F8
3JER C9
NC
9JD6 H2
9JD7 H2
9JDE I2
9JE3 E8
9JE4 E13
9JE5 E9
9JE6 C9
9JE7 E8
9JDC H2
9JDD I2
3JG1 B3
FJE2 E14
9JD8 H2
9JD9 H2
9JDA H2
9JDB H2
3JD7 E5
3JD8 G4
3JD9 H4
3JDA H4
3JE0 C13
5JF1 B9
5JG1 A2
6JD1 F6
6JE1 B13
FJE3 F7
3JE3 C13
3JE4 C14
3JE5 B11
3JE6 D13
3JE7 B8
6JE2 D13
6JF0 A12
3JEA B8
6JF2 E12
6JF3 F12
6JF4 E9
6JG1 B4
7JD1 F5
7JF1 B10
7JH1 C2
9JD0 F2
2JH3 C1
2JH4 C4
2JH5 C4
2JH6 C4
2JH7 C4
3JET C11
3JEU E7
75K 75K
3JEWE8
3JH0 C3
3JH1 D1
3JH2 D1
3JH3 D1
3JH4 C3
3JH5 C3
3JH6 D3
3JH7 D3
2JFB B8
2JFC B8
2JFD B8
2JFE E13
2JFF E13
3JE1 C13
3JE2 C13
2JFJ E9
2JFK E9
3JE8 C7
3JE9 C7
2JFN F13
3JEB E14
3JEC E13
3JED E13
3JEE E13
3JEF D9
3JEG F13
3JEH F12
3JEJ D9
2JEN B11
2JEP B11
2JEQ B10
2JER B10
2JET D9
2JH8 C2
3JD0 F2
HVDD BLOCK
DISPLAY INTERFACING - VDISP
2JEY B9
2JEZ D9
2JF2 B9
3JD1 F2
3JD2 E4
3JD3 E5
3JD4 H6
3JD5 E5
3JD6 E5
2JEF C12
2JEG D13
2JEH D11
2JEJ B12
2JEK B12
2JFG E12
2JFH F12
3JH7
140K 150K
180K
LEVEL SHIFTER BLOCK
2JFL E8
2JFM F8
56K
2JFP C12
2JFR C12
2JFT C8
2JG1 B1
2JG2 B3
2JH0 C2
2JH1 C2
2JH2 C3
B
C
D
E
F
2JEU C9
2JEWC7
137K 150K
3JED 174K
2JF0 B10
2JF1 B10
68K
2JF3 B9
2JF4 B9
2JF5 B9
2JF6 B9
2JF7 B9
2JF8 B8
2JF9 B8
2JFA B8
7 8 9 10 11
2JEL B12
2JEM B11
51K
56K
3JEL 270K
3JH4 180K 390K
ITEM NO 32 INCH
143K 3JE0
3JH6 47K
B
9 10 11 12
G
H
NC
RES 3JH5 RES 330K
150K 196K
33K K 8 6 C E J 3
82K
2JEA C14
2JEB C14
2JEE C12
2JE9 C14
2JD3 F6
2JD4 H3
12 13
2JE0 C12
18K
14
A
5
C
D
E
F
G
H
I
A
4
I
1JG1 A2
1JG2 B2
2JD0 F2
2JD1 F4
FOR DEBUG ONLY
POWER BLOCK
2JE2 C13
2JE3 C13
2JE4 C13
2JE5 C13
27K 3JEP
1 2 3 4 5 6
2JD2 G4
2JE1 C12
2JE6 C13
2JE7 C14
2JE8 C14
6 7 8
42 INCH 37 INCH
13 14 1 2 3
1
0
u
2
JE
Q
+VDISP
1
0
u
R
E
S
2
JE
P
1
u
0
2
JH
7
22u
VCC
1
%
R
E
S
5JF1
1
5
0
K
3
JE
1
1
0
u
3
JE
9
R
E
S
2
JF
9
1
%
1
K
0
1
%
3
JE
8
1
K
0
1
0
0
n
2
JE
W
3
JE
7
1
0
R
1
%
2JFK 1u0
1
0
u
2
JE
8
1
0
u
2
JE
7
1
5
K
7
5
K
1
%
3
JE
3
1
0
u
1
%
3
JE
2
2
JE
0
R
E
S
+VDISP
2JET
100n
3JE5
2R2 1n0
2JEM
VDD
VCC
9
K
1
1
%
3
JE
4
3
JD
1
4
K
7
1
%
VCC 2
JH
6
1
0
u
R
E
S
2
JF
8
1
0
0
n
1
5
0
p
2
JF
7
3
JH
6
5
6
K
1
%
2JH3
1u0
3JH1
1% 47K
1
u
0
2
JH
2
RES
VCC
R
E
S
1
0
u
2
JE
A
B
3
4
0
A
6
JF
1
cJD
1
1
0
0
R
1
u
0
1
%
3
JE
H
9JDE
2
JF
N
9JDD
+VDISP
1
%
3
JE
E
1
0
K
1
%
3
JE
D
1
5
0
K
1n5 2JEF
1
%
3
JH
7
7
5
K
3
JH
2
2
0
K
1
%
1
5
0
K
R
E
S
3
JH
5
BAV99 COL
6JE2
2
JF
E
4
u
7
9JDB
1
0
u
2
JE
5
+VDISP
9JD8
1
0
K
3
JH
9
R
E
S
1
5
0
K
1
%
3
JE
0
VDD
1u0
2
JF
2
2JEU
R
E
S
R
E
S
1
0
u
2
JF
0
2
JF
1
1
0
u
1
0
u
R
E
S
3JER 1R0 RES
3
JE
C
6
8
K
1
%
150p 2JEH
1
u
0
2
JE
G
RES 2JFG
470n
470n
2JFH
+VDISP
9JE3
2
JH
1
1
0
u
1
0
u
2
JH
0
1
%
3
JH
0
1
0
R
3
JH
4
1
8
0
K
1
%
5JG2
30R
RES
30R
RES 5JG1
9JD7
9JDC
9JD6
VDD
2
JE
J
1
0
u
LTST-C190KGKT
FJG1
6JG1
1
u
0
2
JE
L
1
0
0
n
2
JE
2
2
JE
3
1
u
0
R
E
S
R
E
S
1
0
u
R
E
S
2
JF
D
VIA2
43
VIA3
44
VIA4
45
VIN
24
28
VL
3
1
PGOOD
38
REF
15
SRC
4
34
SWI
SWO
35
THR
1
VIA1
42
2
3
L
X
1
_
1
3
2
L
X
1
_
2
3
3
LX2_1
19
LX2_2
20
MODE
7
OUT
21
P
G
N
D
1
3
0
P
G
N
D
2
17
F
B
N
1
4
F
B
P
9
FSEL
25
GND2
3
4
1
G
N
D
_
H
S
GON
5
IN
2
_
1
2
2
IN
2
_
2
DEL2
27
DLP
8
DRN
6
DRVN
12
DRVP
2
EN1
26
EN2
29
FB1
36
FB2
AGND1
13
AGND2
40
BST
18
COMP
37
C
P
G
N
D
1
0
CRST
39
CTL
11
DEL1
16
MAX17113ETL
7JF1
9JE6
2JFR 100n
3
JE
N
3
K
6
1
%
1
0
u
2
JF
L
2
2
0
n
2
JF
M
RES 2JEE 1n5
3
JE
6
1
0
K
2
JE
B
R
E
S
1
0
u
1
0
0
n
2
JG
2
1JG1
3.0A 32V T
1JG2
3.0A 32V T
RES
1
%
4
7
K
3
JH
A
100R
3JEU
9
K
1
3
JH
8
2
JF
A
1
0
u
2
JF
6
1
0
u
3
JD
7
1
0
R
1
%
1
%
R
E
S
1
0
R
3
JD
6
3JD4
10R
3
JD
5
3
6
0
R
1
%
1%
BAV99 COL
6JF4
2
JE
K
1
0
u
3JET 10K
9JE7
FJG3
100n 2JFT RES
100n
2JEY
1
%
1
0
K 3
JD
A
R
E
S
1
0
u
2
JE
N
R
E
S
2
JF
C
1
0
u
6
JF
3
B
A
V
9
9
C
O
L
B
A
V
9
9
C
O
L
R
E
S
6
JF
2
1
0
u
2
JE
R
2
JE
1
R
E
S
1
0
u
22u
5JF0
3
JE
P
2
7
K
1
%
1
%
3
JE
L
1
5
0
K
1
%
3
JE
F
3
6
0
R
3
JE
B
9
K
1
R
E
S
1
0
u
2
JE
6
1
%
1
K
0
3
JE
W
VDD
1
%
9
K
1
3
JH
B
2
JF
F
1
u
0
VCC
1
0
0
R
3
JE
G
1
%
3
JD
9
3
K
0
1
%
3JG1
2K2
1
%
3
JE
J
R
E
S
3
6
0
R
1
0
u
2
JF
3
VDD
RES 2JH8
1u0
9JE5
100n
2JFJ
1
%
1
0
R
3
JD
3
3
JD
2
1
0
R
1
%
1
u
0
2
JD
2
FJG2
9JD0
FJE3
9JD1 RES
3
JE
A
5
K
1
1
%
100n
3JEK RES
1R0
2JEZ
FJD1
FJD2
B340A
6JF0
1
0
u
2
JD
4
R
E
S
5
18
19
20
21
238
1
2
1
7
7
6
13
1
1
6
14
15
TPS62110RSA
CONVERTER
STEP-DOWN

9
4
10
1
1
3
JD
8
7JH1
BZX384-C9V1
1
0
0
R
1
%
1
u
0
2
JD
3
RES 6JD1
+VDISP
2
2
u
2
JG
1
R
E
S
1
u
0
2
JD
1
BZX384-C9V1
6JD0
RES
2JFP
9JD5 RES
1u0
9JD3
9JD4 RES
6JE1
BAV99 COL
3
JH
3
7
K
5
9
JE
4
2
JF
B
1
0
u
R
E
S
2
2
p
2
JH
4
1
0
u
2
JF
5
1
0
u
2
JF
4
1
0
u
+VDISP-INT
2
JH
5
13
14
15
16
17
18
19
20
21
22
30
31
32
33
34
35
36
37
38
28
2
1
25
26
27
2
3
11
10
12
24
2
9
MAX17119
7JD1
9
8
7
6
5
4
3
R
E
S
2
JE
9
1
0
u
1
u
0
2
JE
4
6
u
8
5
JH
1
R
E
S
2
JD
0
FJE1
FJE2
1
0
0
n
RES 9JD2
FJH1
9JDA
10R 1%
RES
3JD0
+VDISP
9JD9
DI_SCHG
EN2
EN2
EN2
VGH
VDD_ODD
VDD_EVEN
VST
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
GVDD_ODD_1
GVDD_EVEN_1
GVST_1
GCLK1_1
GCLK2_1
GCLK3_1
GCLK4_1
GCLK5_1
GCLK6_1
FLK_IN
VDD_FB
VGL
VGH
DPM
VGL
HVDD_FB
H_VDD
DPM
VL
EN1
REF
VGL_FB VGH_FB
VGH_FB
REF
VGL_FB
RESET
VGL_1
FLK_IN FLK
VGL
VGH
VGL
DI_SCHG
GVST_1
GVDD_ODD GVDD_ODD_1
GVDD_EVEN
GCLK6
GCLK5
GCLK4
GCLK3
GCLK2
GCLK1
GVST
VGH
VGL
GVDD_EVEN_1
GCLK6_1
GCLK5_1
GCLK4_1
GCLK3_1
GCLK2_1
GCLK1_1
VGI_P
VGI_N
Circuit Diagrams and PWB Layouts EN 157 Q552.1E LA 10.
2010-Feb-19
back to
div. table
Mini LVDS
18770_545_100119.eps
100119
Mini LVDS
B11C B11C
2009-12-09 4
2009-11-12 3
2009-10-26 2 8204 000 9070
TCON LGD
AGND GND
NC
GMA
AVDD
1
2
3
4
5
6
7
8
VCOM
VCOM_FB
AVDD
DVDD
SDA
SCL
A0
HS
VIA
AMP
AMP
GPIO
2 3 4 5
7 8 9
G
H
1JA1 G1
1JA2 G3
1JB1 E5
2JA0 B1
2JA1 B1
2JA2 B1
2JA3 B2
I2C SWITCH (SSB-NVM)
1
2JA7 B4
2JA8 D2
2JA9 E4
2JAA G2
10 11 12
1 2 3 4 5 6
7JB1 G6
7JB3 H6
7JC1 C6
9JA1 H2
C
D
E
F
B
C
D
E
F
G
H
A
B
2JA4 B3
2JA5 B3
2JA6 B4
FJA3 C2
FJA4 C2
FJA5 C2
FJA6 C2
6 7 8 9
2JC3 C8
2JC4 C6
2JC5 C6
3JA1 G2
3JB1 F6
3JC0 B7
3JC1 B7
3JC2 D8
3JC3 D8
FJAL D1
3JC4 C9
3JC5 C6
3JC6 C6
FJAT E1
FJAU E1
FJAW E1
FJAY E1
10 11 12
A
9JB7 E8
9JBA E10
9JBB E10
9JBF C11
9JC0 D9
9JC1 D9
9JC2 D9
FJA0 B1
FJA1 B2
FJA2 B2
FJBG F1
FJBH F1
FJBJ F1
FJBK G1
2JAB H2
2JC0 B6
2JC1 C7
2JC2 C8
FJAB C2
FJAC C2
FJAD C2
FJAE C2
FJAF C2
FJAG D2
FJAH D1
FJAJ D1
FJAK D1
I2C SWITCH (VGA VCOM)
FJAM D1
FJAN E1
FJAP E1
FJAR E1
FJC3 E4
9JA2 H2
9JB3 F6
9JB5 F6
9JB6 E8
FJB4 E1
FJB5 E1
FJB6 F1
FJB7 F1
FJB8 F1
FJB9 F1
FJBA F1
FJBB F1
FJBC F1
FJBD F1
FJBE F1
FJBF F1
FJCB F6
FJCC G6
FJCE H6
FJCG E7
FJA7 C2
FJA8 C2
FJA9 C2
FJAA C2
FJBR D4
FJBT D4
FJBU D4
FJBW D4
FJBY D4
FJBZ D4
FJC0 D4
FJC1 D4
FJC2 E4
FJC4 E4
FJC5 E4
FJC6 E4
FJAZ E1
FJB1 E1
FJB2 E1
FJB3 E1
PGMA BLOCK
FJC8 G3
FJC9 E6
FJCA E6
FJBL B3
FJBM D4
FJBN D4
FJBP D4
FJCJ B8
FJCK E11
FJCL E11
RES 9JB3
9JB7
FJC8
FJC5
FJC0
2
0
R
3
J
C
1
7JB1
RES
FJCG
BSH111
FJC2
FJC1
FJC9
FJAW
3
J
B
1
1
0
K
10u 2JA9
9JB6
FJB7
9JC0
FJC4
FJBH
FJCA
FJCB
FJAN
FJBU
FJBC
FJBD
VCC
FJBA
FJB6
FJA3
FJB1
VCC
FJBL
9JBF RES
FJAT
2
J
A
B
1
5
p
FJB3
FJBY
7 8
502382-0670
1JB1
1
2
3
4
5
6
9JC2
FJCC
FJAB
FJA9
FJAA
FJB2
7JB3
BSH111
RES
FJAR
2
0
R
3
J
C
0
1K0 1%
3JC4
FJB4
1
0
K
3
J
C
6
9JA1
10R
3JA1
FJBE
1
0
n
2
J
A
6
FJA5
VCC VDD
FJA8
2
J
A
1
1
0
0
n
FJAP
VCC
3
J
C
5
1
0
K
FJAJ
FJAH
FJAD
61 62
FJBZ
55
56
57
58
59
6
60
7
8
9
45
46
47
48
49
5
50
51
52
53
54
36
37
38
39
4
40
41
42
43
44
26
27
28
29
3
30
31
32
33
34
35
17
18
19
2
20
21
22
23
24
25
1
10
11
12
13
14
15
16
1JA1
196119-60041
2
J
A
A
1
5
p
FJAF
2
J
A
7
1
0
0
n
VCC
FJAC
2
J
A
2
1
0
n
FJA2
FJAZ
FJCJ
FJAY
3JC3
1K0 1%
RES
1
0
0
n
2
J
A
3
9JA2
FJBM
FJAM
FJAL
R
E
S
2
J
C
5
1
5
p
9
J
B
5
R
E
S
24
25
26
27
28
29
30
19
2
1
9
17
20
1
5
6
22
23
1
6
7 3
10
11
12
13
14
15
18
MAX9668ETP
7JC1
2
4
8
FJAK
FJAG
1
0
0
n
2
J
A
5
1
0
u
2
J
A
4
FJCE
FJA4
FJA0
FJB8
FJB9
9JC1
FJAE
FJAU
VCC
1
0
0
n
2
J
C
3
1
0
0
n
FJC3
2
J
C
2
FJBB
FJBK
FJBG
P_VDD
2
J
C
0
1
0
0
n
60
7
8
9
61 62
51
52
53
54
55
56
57
58
59
6
40
41
42
43
44
45
46
47
48
49
5
50
31
32
33
34
35
36
37
38
39
4
21
22
23
24
25
26
27
28
29
3
30
11
12
13
14
15
16
17
18
19
2
20
196119-60041
1JA2
1
10
9JBB RES
FJBF
FJA7
FJA6
1% 150R
3JC2
FJBW
R
E
S
1
5
p
2
J
C
4
2
J
A
0
1
0
u
VCC
FJA1
FJC6
FJBT
FJBR
FJBN
FJCL
FJCK
FJBJ
VDD
9JBA
2JA8 10u
RES
FJBP
VDD
2
J
C
1
1
0
u
FJB5
SDA-DISP SDA-TCON
WP
BYPASS_MODE CTRL-DISP
VCOM_SDA
VCOM_SCL
VGA-SDA-EDID-TCON VCOM_SDA
VCOM_SCL
SDA-DISP VCOM_SDA
SCL-DISP SCL-TCON
RMLV0P
VCOM_SCL SCL-DISP
VGA-SCL-EDID-TCON
VST
VGL_1
BYPASS_MODE
RMLV3P
RMCLKN
RMCLKP
RMLV2N
RMLV2P
RMLV1N
RMLV1P
RMLV0N
LMLV1P
LMLV0N
LMLV0P
RMLV5N
RMLV5P
RMLV4N
RMLV4P
RMLV3N
LMLV4P
LMLV3N
LMLV3P
LMCLKN
LMCLKP
LMLV2N
LMLV2P
LMLV1N
H_VDD
POL_A POL-TCON
SOE_A SOE
H_CONV H_CONV_1
LMLV5N
LMLV5P
LMLV4N
Z_OUT
CLK1
CLK2
SOE
POL-TCON
GVST_1
H_CONV_1
OPT_N
GMA18
GMA16
CLK3
GMA15
GMA13
GMA12
GMA10
GMA9
GMA7
GMA6
GMA4
GMA3
GMA1
CLK4
CLK5
CLK6
VGI_N
GMA15
GMA16
GMA18
OPT_N
H_CONV_1
GVST_1
POL-TCON
SOE
VGI_P
VDD_ODD
VDD_EVEN
VGL_1
VST
VCOMRFB
VCOMR
GMA1
GMA3
GMA4
GMA6
GMA7
GMA9
GMA10
GMA12
GMA13
VCOM_FBO
Z_OUT
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
VGI_N
VGI_P
VDD_ODD
VDD_EVEN
VCOMLFB
VCOML
H_VDD
GMA3
GMA4
GMA6
GMA7
GMA12
GMA13
GMA15
GMA16
VCOM_SCL
VCOM_SDA
VCOM
VCOM_FBO
VCOMLFB
VCOMRFB VCOMR
VCOML
VCOM
EN 158 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Connectors
18770_546_100119.eps
100119
Connectors
B11D B11D
2009-12-09 4
2009-11-12 3
2009-10-26 2 8204 000 9070
TCON LGD
FJZ2 B3
FJZA A1
FJZU B1
FJZD A1
FJZE B1
FJZV B1
FJZW B1
FJZH B1
FJZJ B1
FJZY A1
FJZZ A1
FJZM A1
FJZN A1
FJZP A1
FJZQ B1
ROUND SCREWHOLE 4mm
LED PANEL
FJYG B1
FJYH B1
FJZR B1
FJZT B1
FJYK A1
FJYL A1
FJYM A1
FJYN B1
FJYP B1
FJYQ B1
FJYR A3
FJYT A3
FJYU A3
FJYV B1
FJYW A3
FJYZ B1
FJZ1 B3
FJ97 D1
FJ98 D1
FJZB A1
FJZC A1
FJZF B1
FJZG B1
FJZK B1
FJZL A1
LIGHT STRIP
FJY1 B1
FJY2 A2
FJY3 A2
FJY4 A2
FJY5 A2
FJY6 B2
FJY7 B3
FJY8 B3
FJY9 B2
FJYA A1
FJYB A1
FJYC B1
FJYD B1
FJYE B1
FJYF B1
FJ55 D8
FJ56 D8
FJYJ A1
Dummy testlands for common jig
FJ58 D8
FJ5A B1
FJ5B B1
FJ5C B1
FJ5D B1
FJ5F C1
FJ60 E8
FJ88 B8
FJ89 B8
FJ90 B8
FJ91 B8
FJ92 B8
FJ93 B8
FJ94 B8
FJ96 D1
3J77 B6
3J78 B6
FJ99 D1
OVAL SCREWHOLE
SENSOR
3J80 C2
3J81 C2
3J82 D2
3J83 D2
3J84 C6
3J85 D6
3J86 D6
3J87 F6
3J88-1 E6
3J88-2 E6
3J88-4 E6
3J89 B4
5J53 E3
5J54 D3
FJ50 B3
FJ51 B8
FJ52 D8
FJ53 D8
FJ54 D8
B
C
FJ57 D8
TEMPERATURE
2J84 D1
2J85 D1
2J86 D7
2J87 D7
2J88 D7
2J89 E7
2J90 E7
2J91 F7
2J92 F7
2J93 C3
2J94 C4
2J95 B6
3J74 A6
3J75 A6
3J76 A6
1X08 E9
2J76 A7
3J79 C6
2J79 B8
2J80 C7
2J83 D1
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
A
2J82 C7
D
2D DIMMING
ROUND SCREWHOLE 4.5mm
E
F
A
B
C
D
E
F
1F53 D8
1J85 D2
1M20 B8
1M71 C1
1P12 B3
1X03 E8
1X05 E8
FJY8
2J77 B7
2J78 B7
2J81 B8
FJY7
3J76
100R
FJZG
2
J
9
3
2
J
7
9
1
0
0
p
1
0
0
n
3J89
100R
100R
3J84
FJZB
FJZA
2
J
8
3
1
0
0
p
FJY9
FJYN
FJYP
FJYM
FJ58
FJZW FJZK
FJZL
1
2
3
4
5
6
7
8
1M20
2041145-8
100R
3J77
FJ55
1X03
REF EMC HOLE
3J80 100R
FJ97
2
J
8
1
1
0
0
n
FJ51
FJYR
5 6
FJYQ
1P12
502382-0470
1
2
3
4
30R
5J53
FJ99
RES
FJYK
FJYL
FJYJ
FJZQ
1
0
0
p
2
J
7
6
FJ56
FJZH
+5V
FJ5C
1
n
0
2
J
9
2
FJ89
1X08
EMC HOLE
FJZ1
FJ57
FJYT
FJYU
+3V3-STANDBY
3
J
7
4
1
0
0
K
3J79
10R
FJ90 FJYH
FJZN
FJZP
FJZM
2
J
8
7
1
0
p
9
15 16
FJ5F
12
13
14
2
3
4
5
6
7
8
502386-1470
1F53
1
10
11
3J78
100R
1
0
p
2
J
8
6
FJY1
FJ88
2
J
8
0
1
0
0
p
FJYV
FJYW
4 5
100R
2 7
100R
3J88-4
3J88-2
RES 100R 3J81
1X05
EMC HOLE
FJ94
1
0
0
p
2
J
8
4
1
0
0
p
2
J
8
2
1J85
1.0A 63V T
R
E
S
4
7
n
2
J
9
5
FJZZ
1
0
0
p
2
J
9
4
FJ5D
FJ98
FJ60
FJ96
100R
FJ92
+5V
RES 3J83
1
0
0
p
2
J
8
8
FJYE
FJYD
FJYC
FJYG
FJYB
FJ5B
FJYA
FJ5A
FJ50
FJY6
FJY5
FJY3
FJY4
FJY2
FJYZ
1
0
0
p
2
J
9
0
3J87
100R
1 8
100R
3J88-1
FJZ2
FJ93
1M71
2041145-4
1
2
3
4
FJZJ
2
J
7
7
1
0
0
p FJZF
FJ52
FJZE
+3V3
100R
3J86
3J85
100R
RES
5J54
30R
+12V
2
J
8
9
1
0
0
p
1
0
0
p
2
J
7
8
2
J
9
1
1
0
0
p
FJ91
100R 3J82
3J75
+3V3
FJZY
100R
FJYF
FJ53
FJZV
FJZU
FJZR
FJZT
1
u
0
2
J
8
5
FJ54
FJZC
FJZD
TACH02
TACH01
LED-1
BL-SPI-SDO
RC
LIGHT-SENSOR
LED-2
LED-1
KEYBOARD
SDA-BL
SCL-BL
BL-SPI-CLK
BL-SPI-SDI
BL-SPI-CSn
BACKLIGHT-PWM_BL-VS
SCL-BL
SDA-BL
FAN-DRV
Circuit Diagrams and PWB Layouts EN 159 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-25 B13 820400090732 TCON AL CPLD
AmbiLight CPLD
18770_552_100121.eps
100218
AmbiLight CPLD
B13A B13A
2009-12-08 2
2009-10-23 1
8204 000 9073
TCON AL CPLD
TMS
TDO
TDI
TCK
GND
VCCINT VCCIO
G3
1
2
3EN2
3EN1
10 11 12 13 14
5 6 7
C
D
13 14
A
B
C
E
F
G
H H
A
B
1H35 F2
1HA0 E11
1M59 F11
1M72 E11
1X07 F13
2H10 E2
2H11 E2
1 2 3 4 5 6 7 8 9
2HA4 F2
2HA5 B2
2HA6 G12
2HA7 G9
2HA8 G10
1 2 3 4
3H10-3 D5
3H10-4 D5
3H11-1 D5
*
AMBILIGHT CONNECTOR
8 9 10 11 12
3H13 D6
3H14 D2
3H15 E2
3H70 G10
3HA0 C3
D
E
F
G
3HA2-4 F2
3HE0-1 C13
3HE0-2 C11
2H12 E2
2H13 E6
2H14 E6
2H15 E7
2H16 E7
2H17 E7
2H18 E7
2H19 E7
2H70 G10
2HA0 B2
2HA1 B2
2HA2 B3
2HA3 B2
3HE0-4 B11
3HE1-1 C12
3HE1-2 C13
3HE1-3 C13
3HE1-4 C12
2HA9 H11
2HE0 B10
3H10-1 D5
3H10-2 D5
5HA1 B2
7HA0 C4
7HE0 B11
BUFFER
*
**
3H11-2 D5
3H11-3 D3
3H11-4 D3
3H12 D6
*
3HA1 D5
3HA2-1 F2
3HA2-2 F2
3HA2-3 F2
9HE0-1 D10
9HE0-2 C10
9HE0-3 C10
DEBUG ONLY
AMBILIGHT CPLD
3HE0-3 C13
9HE2 D10
9HE3 D10
FH70 F11
FH71 F11
FH72 F11
3HE2 B11
3HE3 C12
3HE4 C12
5HA0 A2
FH77 G11
FH78 G11
FH79 G11
FH80 G11
FH81 G11
FH82 H11
7HE1 B12
9HA0 C6
9HA1 C5
FHA4 E4
FHA5 E4
FHA6 E4
9HE0-4 D10
9HE1 D10
IHA2 D4
IHA3 C4
IHA4 C4
IHA5 D4
IHA6 D4
FH73 F11
FH74 G11
FH75 G11
FH76 G11
IHA7 D4
IHE0 B11
IHE1 D10
*
* FOR TV550 ONLY
* FOR TV550 ONLY
ROUND SCREWHOLE 4mm
SPI BUFFER
FHA0 A3
FHA1 B3
FHA2 F2
FHA3 E4
DIRECT
IHA0 C6
IHA1 D4
1
0
0
n
2
H
A
4
R
E
S
VIO
FHA1
2
2
n
2
H
A
6
FH74
1HA0
1.5A 63V T
27
IXO4_28
28
11
9
24
10
1
5
3
5
2
6
7
IXO3_8
8
IXO4_19
19
IXO4_20
20
IXO4_21
21
IXO4_22
22
IXO4_23
23
IXO4_27
38
IXO3_12 12
IXO3_13
13
IXO3_14
14
IXO3_16 16
IXO3_18
18
IXO3_5
5
IXO3_6
6
IXO3_7
IXO2_30
30
IXO2_31
31
IXO2_32
32
IXO2_33|GSR
33
IXO2_34|GTS2
34
IXO2_36|GTS1
36
IXO2_37
37
IXO2_38
3
IXO1_39
39
IXO1_40
40
IXO1_41
41
IXO1_42
42
IXO1_43|GCK1
43
IXO1_44|GCK2
44
IXO2_29
29
4
1
7
2
5
IXO1_1|GCK3
1
IXO1_2
2
IXO1_3
1 8
XC9572XL-10VQG44C
7HA0

7 2
3H11-1 100R
3H10-3 3 6
100R 3H11-2
2 7
100R
3H10-2 100R
R
E
S
1
0
p
2
H
1
4
FH76
+3V3
5
FH75
3HE0-4 47R 4
+3V3
+3V3
1
0
K
3
H
1
5
100R 3HA2-2 2 7
VIO
2
H
1
9
1
0
p
R
E
S
1
0
p
2
H
1
8
R
E
S
3HE1-4 RES 4 5
2 7
47R
47R 3HE1-2
4 5
V-AMBI
6
100R 3HA2-4
3HA2-3 100R 3
FH78
IHE1
FH73
FH82
2HA9 2
2
n
IHA5
+24V
R
E
S
1
0
p
2
H
1
0
100R 3H14
8
3H12 10R
3HA2-1 100R 1
26 27
22
23
24
25
3
4
5
6
7
8
9
12
13
14
15
16
17
18
19
2
20
21
FH12-25S-0.5SH(55)
1M59
1
10
11
IHA1
FH80
FHA0
IHA7
1 8
9HE0-2 2 7
9HE0-1
9HE0-3 3 6
R
E
S
2
H
1
5
1
0
p
FHA3
2
H
A
8
4
7
0
p
R
E
S
4
7
0
p
2
H
A
7
R
E
S
9HE3
+3V3
FH70
9HA1
FH71
FH72
IHE0
PDTC114EU
7HE1
1
2
3
4
VINT
2041145-4
1M72
1
0
0
n
2
H
A
2
1
0
p
2
H
1
2
R
E
S
R
E
S
2
H
1
1
1
0
p
1
0
0
n
2
H
E
0
9HA0
4 5
FH79
3H10-4 100R
+3V3
FH81
1
0
0
n
2
H
A
1
FHA4
11
1
1
0
19
2
0
6
7
8
9
18
17
16
15
14
13
12
2
3
4
5
7HE0
74LVC245A
1
2
3
4
5
6
7 8
1H35
BM06B-SRSS-TBT
+24V
2
H
1
7
1
0
p
R
E
S
1
0
p
2
H
1
6
R
E
S
VINT
FH77
3HE4 47R
FHA5
RES
47R 3HA1
RES 1 8 47R 3HE1-1
3 6
IHA6
4 5
3H11-3 100R
100R 3H11-4
1 8
+3V3
6
100R 3H10-1
47R 3HE1-3 3
1
0
0
n
2
H
A
5
47R 3HA0
2
H
1
3
1
0
p
R
E
S
IHA4
IHA3
2 7 3HE0-2 47R
3
H
E
2
1
0
K
V-AMBI
EMC HOLE
1X07
3HE3 47R
1
0
0
n
2
H
7
0
RES
100R 3H70
FHA2
3 6
FHA6
3HE0-3 47R
3HE0-1 47R 1 8
IHA0
IHA2
3H13 100R
5HA1
30R
9HE2
9HE1
5HA0
30R
1
u
0
2
H
A
0
1
u
0
2
H
A
3
9HE0-4 4 5
AMBI-LATCH2_DIS
AMBI-PROG_B1
AMBI-BLANK_R1
AMBI-SPI-CS-EXTLAMPSn
AMBI-SPI-SDO-OUT
AMBI-SPI-SDO-OUT-R
BACKLIGHT-PWM_BL-VS
AMBI-SPI-SDI-OUT_G1-R
AMBI-SPI-CLK-OUT-R
AMBI-TEMP
AMBI-SPI-CS-OUTn_R2
AMBI-SPI-SDI-OUT_G1
AMBI-SPI-CLK-OUT
AMBI-SPI-SDI-OUT_G1
AMBI-SPI-CS-OUTn_R2
AMBI-LATCH1_G2
AMBI-BLANK_R1
AMBI-SPI-SDO-OUT-R
AMBI-SPI-CS-OUTn_R2-R
AMBI-PWM-CLK_B2
PNX-SPI-SDI
PNX-SPI-SDO
AMBI-PROG_B1
BL-SPI-SDO
BL-SPI-CLK
AMBI-SPI-CLK-OUT-R
PNX-SPI-CLK BL-SPI-CLK
BL-SPI-SDO
BL-SPI-SDI PNX-SPI-SDI
PNX-SPI-CS-BLn BL-SPI-CSn
PNX-SPI-CS-AMBIn AMBI-SPI-CS-OUTn_R2-R
BACKLIGHT-PWM
BACKLIGHT-PWM BACKLIGHT-PWM_BL-VS
PNX-SPI-CLK
PNX-SPI-SDO
AMBI-SPI-SDI-OUT_G1-R
BL-SPI-SDI
PNX-SPI-CSBn
GSR
GTS2
GTS1
CPLED3
CPLED2
BL-SPI-SDO
BL-SPI-SDI
BL-SPI-CSn
BL-SPI-CLK
PNX-SPI-CSBn
CPLED1
PXCLK54
GCK3
PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
PNX-SPI-SDO
PNX-SPI-SDI
PNX-SPI-CLK
GCK2
AMBI-SPI-CLK-OUT
AMBI-LATCH2_DIS
AMBI-SPI-CS-EXTLAMPSn
AMBI-TEMP
AMBI-SPI-SDO-OUT
AMBI-PWM-CLK_B2
AMBI-LATCH1_G2
EN 160 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
10-26 B13 820400090742 TCON AL CPLD
AmbiLight CPLD
18770_551_100121.eps
100218
AmbiLight CPLD
B13A B13A
2009-12-09 2
2009-10-23 1
8204 000 9074
TCON AL CPLD
G3
1
2
3EN2
3EN1
TMS
TDO
TDI
TCK
GND
VCCINT VCCIO
SPI BUFFER
FHA1 B3
FHA2 F2
FHA3 E4
DIRECT
IHA0 C6
IHA1 D4
IHA2 D4
9HE0-4 D10
9HE1 D10
9HE2 D10
9HE3 D10
IHA3 C4
IHA4 C4
IHA5 D4
IHA6 D4
FH74 G11
FH75 G11
FH76 G11
IHA7 D4
IHE0 B11
IHE1 D10
*
* FOR TV550 ONLY
* FOR TV550 ONLY
ROUND SCREWHOLE 4mm
*
FH80 G11
FH81 G11
FH82 H11
FHA0 A3
7HE1 B12
9HA0 C6
9HA1 C5
FHA4 E4
FHA5 E4
FHA6 E4
3HE0-3 C13
3HE0-4 B11
3HE1-1 C12
FH70 F11
FH71 F11
FH72 F11
FH73 F11
3HE3 C12
3HE4 C12
5HA0 A2
FH77 G11
FH78 G11
FH79 G11
3H11-3 D3
3H11-4 D3
3H12 D6
3H13 D6
3H14 D2
3HA2-1 F2
3HA2-2 F2
3HA2-3 F2
9HE0-1 D10
9HE0-2 C10
9HE0-3 C10
DEBUG ONLY
AMBILIGHT CPLD
2HA1 B2
2HA2 B3
2HA3 B2
2HA4 F2
2HA5 B2
3HE1-2 C13
3HE1-3 C13
3HE1-4 C12
3HE2 B11
2HE0 B10
3H10-1 D5
3H10-2 D5
5HA1 B2
7HA0 C4
7HE0 B11
BUFFER
*
**
3H11-2 D5
10 11 12 13 14
3H15 E2
3H70 G10
3HA0 C3
3HA1 D5
E
F
G
3HA2-4 F2
3HE0-1 C13
3HE0-2 C11
2H12 E2
2H13 E6
2H14 E6
2H15 E7
2H16 E7
2H17 E7
2H18 E7
2H19 E7
2H70 G10
2HA0 B2
7 8 9 10 11
2HA6 G12
2HA7 G9
2HA8 G10
2HA9 H11
2 3 4
3H10-3 D5
3H10-4 D5
3H11-1 D5
*
AMBILIGHT CONNECTOR
8 9
C
D
E
A
B
C
D
F
G
H H
A
B
1H35 F2
1HA0 E11
1M59 F11
1M72 E11
1X07 F13
2H10 E2
2H11 E2
1 2 3 4 5 6 12 13 14
1 5 6 7
V-AMBI
1X07
EMC HOLE
47R 3HE3 RES
1
0
0
n
100R 3H70
2
H
7
0
FHA6
FHA2
3 6
8
47R 3HE0-3
47R 3HE0-1 1
IHA0
IHA2
3H13 100R
30R
5HA1
9HE2
9HE1
30R
5HA0
2
H
A
0
1
u
0
5
2
H
A
3
1
u
0
9HE0-4 4
2
H
A
5
1
0
0
n
47R 3HA0
1
0
p
2
H
1
3
R
E
S
IHA4
IHA3
2 7 47R 3HE0-2
+24V
1
0
K
3
H
E
2
R
E
S
1
0
p
2
H
1
7
R
E
S
FH77
2
H
1
6
1
0
p
VINT
3HE4 R 7 4 S E R
3HA1
FHA5
47R
47R 1 8
3 6
IHA6
RES3HE1-1
5
100R 3H11-3
3H11-4 100R 4
1 8
+3V3
3H10-1 100R
3HE1-3 47R 3 6
R
E
S
2
H
1
2
1
0
p
1
0
p
2
H
1
1
1
0
0
n
R
E
S
2
H
E
0
9HA0
100R 3H10-4 4 5
FH79
FH81
+3V3
FHA4
19
2
0
2
H
A
1
1
0
0
n
18
17
16
15
14
13
12
11
1
1
0
74LVC245A
7HE0
2
3
4
5
6
7
8
9
4
5
6
7 8
BM06B-SRSS-TBT
1H35
1
2
3
8
2 7
9HE0-1 1
3 6
9HE0-2
9HE0-3
R
E
S
1
0
p
2
H
1
5
4
7
0
p
2
H
A
8
FHA3
R
E
S
+3V3
R
E
S
2
H
A
7
4
7
0
p
9HE3
9HA1
FH71
FH70
IHE0
FH72
7HE1
PDTC114EU
3
4
VINT
1M72
2041145-4
1
2
2
H
A
2
1
0
0
n
+24V
2
H
1
0
1
0
p
R
E
S
3H14 100R
10R 3H12
100R 3HA2-1 1 8
3
4
5
6
7
8
9
26 27
17
18
19
2
20
21
22
23
24
25
1
10
11
12
13
14
15
16
1M59
FH12-25S-0.5SH(55)
FH80
IHA1
IHA7
FHA0
R
E
S
1
0
p
2
H
1
9
R
E
S
2
H
1
8
1
0
p
3HE1-4 47R 4 5
2 7
RES
3HE1-2 47R
5
V-AMBI
3HA2-4 100R 4
100R 3HA2-3 3 6
FH78
FH73
IHE1
IHA5
FH82
2
2
n
2HA9
T 63V 1.5A
1HA0
IXO4_28
11
9
24
10
1
5
3
5
2
6
IXO3_8
19
IXO4_19
20
IXO4_20
21
IXO4_21
22
IXO4_22
23
IXO4_23
27
IXO4_27
28
IXO3_12
13
IXO3_13
14
IXO3_14
16 IXO3_16
18
IXO3_18
5
IXO3_5
6
IXO3_6
7
IXO3_7
8
31
IXO2_31
32
IXO2_32
33
IXO2_33|GSR
34
IXO2_34|GTS2
36
IXO2_36|GTS1
37
IXO2_37
38
IXO2_38
12
IXO1_39
40
IXO1_40
41
IXO1_41
42
IXO1_42
43
IXO1_43|GCK1
44
IXO1_44|GCK2
29
IXO2_29
30
IXO2_30
7HA0
XC9572XL-10VQG44C
4
1
7
2
5
1
IXO1_1|GCK3
2
IXO1_2
3
IXO1_3
39
1 8

7 2
100R 3H11-1
3 6
3H11-2 100R
7
3H10-3 100R
100R 3H10-2 2
2
H
1
4
1
0
p
R
E
S
+3V3
FH75
FH76
47R 3HE0-4 4 5
+3V3
+3V3
VIO
3
H
1
5
1
0
K
2 7 3HA2-2 100R
FHA1
R
E
S
2
H
A
4
1
0
0
n
VIO
2
H
A
6
2
2
n
FH74
AMBI-LATCH2_DIS
AMBI-PROG_B1
AMBI-BLANK_R1
AMBI-SPI-CS-EXTLAMPSn
AMBI-SPI-SDO-OUT
AMBI-SPI-SDO-OUT-R
BACKLIGHT-PWM_BL-VS
AMBI-SPI-SDI-OUT_G1-R
AMBI-SPI-CLK-OUT-R
AMBI-TEMP
AMBI-SPI-CS-OUTn_R2
AMBI-SPI-SDI-OUT_G1
AMBI-SPI-CLK-OUT
AMBI-SPI-SDI-OUT_G1
AMBI-SPI-CS-OUTn_R2
AMBI-LATCH1_G2
AMBI-BLANK_R1
AMBI-SPI-SDO-OUT-R
AMBI-SPI-CS-OUTn_R2-R
AMBI-PWM-CLK_B2
PNX-SPI-SDI
PNX-SPI-SDO
AMBI-PROG_B1
BL-SPI-SDO
BL-SPI-CLK
AMBI-SPI-CLK-OUT-R
PNX-SPI-CLK BL-SPI-CLK
BL-SPI-SDO
BL-SPI-SDI PNX-SPI-SDI
PNX-SPI-CS-BLn BL-SPI-CSn
PNX-SPI-CS-AMBIn AMBI-SPI-CS-OUTn_R2-R
BACKLIGHT-PWM
BACKLIGHT-PWM BACKLIGHT-PWM_BL-VS
PNX-SPI-CLK
PNX-SPI-SDO
AMBI-SPI-SDI-OUT_G1-R
BL-SPI-SDI
PNX-SPI-CSBn
GSR
GTS2
GTS1
CPLED3
CPLED2
BL-SPI-SDO
BL-SPI-SDI
BL-SPI-CSn
BL-SPI-CLK
PNX-SPI-CSBn
CPLED1
PXCLK54
GCK3
PNX-SPI-CS-AMBIn
PNX-SPI-CS-BLn
PNX-SPI-SDO
PNX-SPI-SDI
PNX-SPI-CLK
GCK2
AMBI-SPI-CLK-OUT
AMBI-LATCH2_DIS
AMBI-SPI-CS-EXTLAMPSn
AMBI-TEMP
AMBI-SPI-SDO-OUT
AMBI-PWM-CLK_B2
AMBI-LATCH1_G2
Circuit Diagrams and PWB Layouts EN 161 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-27 B14 820400090714 TCON SHARP
TCON Control
18770_559_100121.eps
100218
TCON Control
B14A B14A
2009-12-11 4
2009-11-12 3
2009-10-26 2 8204 000 9071
TCON SHARP
7
8
9
10
11
12
VS
V8
DATA
CLK
LATCH
IN
OUT
GAM_LUT
OS_LUT
SCL
SDA
SDI
SDO
SCS
SCK
SDI
SDO
SCS
SCK
VPOL
READY
SSCLK
H_TOTAL
EXCLK
DBG
SLAVE
BIT
OUT
DAC
CS
GCK
R
L GCE
1
2 GPS
R
L LS
GSLOP
R
L
3
2
1
G_LBR_INV
G_LBR
FS
REV
4
5
6
MINI_AGND12
SSCG_AGND
GND
LVDS_AGND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DGND
DGND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MINI_AGND34
MILVC_N3
MILVC_P4
MILVC_N4
MILVC_P5
MILVC_N5
MILVC_P6
MILVC_N6
MILVC_P7
MILVC_N7
MILVCLKC_P
MILVCLKC_N
MILVD_P0
MILVD_N0
MILVD_P1
MILVD_N1
MILVD_P2
MILVD_N2
MILVD_P3
MILVD_N3
MILVD_P4
MILVD_N4
MILVD_P5
MILVD_N5
MILVD_P6
MILVD_N6
MILVD_P7
MILVD_N7
MILVCLKD_P
MILVCLKD_N
MILVA_N5
MILVA_P6
MILVA_N6
MILVA_P7
MILVA_N7
MILVCLKA_P
MILVCLKA_N
MILVB_P0
MILVB_N0
MILVB_P1
MILVB_N1
MILVB_P2
MILVB_N2
MILVB_P3
MILVB_N3
MILVB_P4
MILVB_N4
MILVB_P5
MILVB_N5
MILVB_P6
MILVB_N6
MILVB_P7
MILVB_N7
MILVCLKB_P
MILVCLKB_N
MILVC_P0
MILVC_N0
MILVC_P1
MILVC_N1
MILVC_P2
MILVC_N2
MILVC_P3
MILVA_P0
MILVA_N0
MILVA_P1
MILVA_N1
MILVA_P2
MILVA_N2
MILVA_P3
MILVA_N3
MILVA_P4
MILVA_N4
MILVA_P5
RC4_P
RC4_N
RD4_P
RD4_N
RE4_P
RE4_N
RCLK4_P
RCLK4_N
TEN
DMA
TMC1
TMC2
TRST
TEST_L_0
TEST_L_1
TEST_L_2
TEST_C
SS_OUT
ROM_ACC
RESET
SELLVDS
HSCAN
VSCAN
TEMP_0
TEMP_1
TEMP_2
MODE_0
MODE_1
MODE_2
RE1_P
RE1_N
RCLK1_P
RCLK1_N
RA2_P
RA2_N
RB2_P
RB2_N
RC2_P
RC2_N
RD2_P
RD2_N
RE2_P
RE2_N
RCLK2_P
RCLK2_N
RA3_P
RA3_N
RB3_P
RB3_N
RC3_P
RC3_N
RD3_P
RD3_N
RE3_P
RE3_N
RCLK3_P
RCLK3_N
RA4_P
RA4_N
RB4_P
RB4_N
RA1_P
RA1_N
RB1_P
RB1_N
RC1_P
RC1_N
RD1_P
RD1_N
GND VIA GND_HS
SW COMP
EN
VIN
SS FB
BS
MINI_AVDD34
MINI_AVDD12
VDD12
SSCG_AVDD
DVCC
DVCC
VDD12
LVDS_AVDD
DVCC
VDD12
VDD12
VDD12
VDD12
VDDQ
VDDQ
VDD33
VDD33
VDD33
VDDQ
VDDQ
FKCM E6
FKCN E6
FKBWF7
FKBY G7
FKBL F7
FKBM F7
FKBN F7
FKBP F7
FKBQ F7
FKCE G7
FKCF G7
FKAM C7
FKAN C7
FKAP C7
FKAQ C7
FKAR C7
FKAT D7
FKAU D7
FKAV D7
FKBZ G7
FKCA G7
FKCB G7
FKCC G7
FKCD G7
FKBC E7
FKBD E7
FKBE E7
FKBF E7
FKBG E7
FKCG G7
FKCH G7
FKCJ H7
FKCK H7
FKCL E6
3KBY I3
3KBZ E8
3KCA E2
3KCB G2
5KAA A3
5KAB B3
5KAC B3
5KAD C3
5KAE A6
5KAF B6
5KAG I4
5KAH B5
5KAJ C5
5KAK C5
7KAA-1 E5
7KAA-2 C11
FKAA A3
FKAB B3
FKAC B3
FKAD C3
FKAE A7
FKBR F7
FKBT F7
FKBU F7
FKBV F7
FKAL C7
3KBC G8
3KBD G8
3KBE G8
3KBF G8
3KBG G9
3KBH H10
3KBJ-1 J9
3KBJ-2 J10
FKAWD7
FKAY D7
FKAZ D7
FKBA D7
FKBB E7
3KBL E12
3KBM E12
3KBN F12
3KBP G12
3KBQ G12
FKBH E7
FKBJ E7
FKBK F7
3KBWJ5
3KAF E5
3KAG C8
3KAH C8
3KAJ C8
3KAK C8
3KAL C8
3KAM C9
3KAN D8
7KAA-3 A16
7KAA-4 E16
7KAB I8
7KAC I3
9KAA H10
3KAQ D8
3KAR D8
3KAT D8
3KAU D9
3KAV E8
FKAF B7
FKAH J9
FKAJ J9
FKAK C7
3KBB G8
2KCL I3
2KCM B12
2KCN A8
2KCP A9
2KCQ A9
2KCR A10
2KCT A14
2KCV A14
3KBJ-3 J10
3KBJ-4 J10
3KBK D12
2KCZ B13
2KDA B13
2KDB B13
2KDC F2
2KDD F2
3KBR H12
3KBT I12
3KBU I2
3KBV I5
3KAE F3
2KBR B11
2KBT B11
2KBU B12
2KBV B12
2KBW B12
2KBY A12
2KBZ A12
2KCA A13
3KAP D8
2KCB A13
2KCC A13
2KCD A13
2KCE I8
3KAW E8
3KAY E8
3KAZ E8
3KBA E9
2KCK I5
2KAT A7
2KAU A8
2KAV A8
2KAWA8
2KAY A8
2KAZ A9
2KBA A9
2KBB A10
2KCW B12
2KCY B13
2KBF A11
2KBG A11
2KBH A11
2KBJ A11
2KBK B10
3KAA E3
3KAB E3
3KAC E3
3KAD E3
2KBQ B11
K
L
A
B
C
D
E
F
2KCF I3
2KCG I5
2KCH J3
2KCJ I4
2KAR B7
7 8 9 10 11 12 13 14
2KBC A10
2KBD A10
2KBE A11
A
B
C
D
E
2KBL B10
2KBM B10
2KBN B11
2KBP B11
J
1 2 3 4 5 6 7 8 14 15 16 17
1
2KAP A7
2KAQ B7
6
NC
G
H
I
J
K
L
15 16 17
2KAB A2
2KAC A3
2KAD A3
2KAE B3
2KAF B3
F
G
H
I
2KAJ C3
2KAK C3
2KAL A6
2KAM A6
2KAN A7
FKCP E6
FKCQ F6
FKCR F6
FKCT F6
FKCU F6
FKCV F6
FKCWF6
FKCY F6
FKCZ F6
FKDA F7
FKDB B2
FKDC C7
FKDD I5
FKDE D7
cKAA J4
9 10 11 12 13
1KAA E2
2KAA A2
2 3 4 5
2KBA
100n
2KAG C3
2KAH C3
3KBB
100R
6.3V
47u 2KC
G
VDD12
3KBM
FKDD
100R
3KBN
100R
1n0
2KAR
SSCG_AVDD
FKAE
10u
2KAG
VDD33
VCC_1V2
5KAF
30R
3KBD
100R
RES
3KAF
2K2
R13
R14
R15
E14
E13
E10
E9
V9
V13
H9
E18
E15
E12
AB8
E11
E8
J8
K8
P8
R8
R9
V8
V15
AB1
V18
T18
R18
N18
M18
J18
H18
D15
D12
AA1
D11
D8
D5
E5
H5
J5
T5
V5
W15
W18
Y1
W19
V19
T19
R19
N19
M19
D19
D18
T4
W1
V4
W4
W5
W8
W9
W10
W13
W14
M20
D1
C17
C12
C11
C6
D4
H4
J4
M4
R4
G21
C1
F21
E21
B17
B12
B11
B6
Y8
Y15
W20
B1
A22
A17
A12
A11
A6
AA8
AA15
W21
M21
M11
M12
L12
AA22
Y22
W22
M22
G22
D22
C22
B22
P14
J13
L10
AB22
M10
N10
N11
N12
K13
L11
J14
A1
AB15
P15
H15
H14
J9
K9
P9
P13
K4
N4
K5
N5
K15
J15
H13
K14
7KAA-4
UPD809900F1-S11-KNB-A
GND
FKCR
FKCQ
2KBR
1u0
1u0
2KBP
1u0
2KBK
P2
V1
J22
H20
H21
H19
E20
E19
E1
H3
T3
T1
R1
P3
R3
R2
V2
V3
J2
J3
J1
H1
G1
H2
J21
J20
F22
E22
U1
U2
U3
T2
K1
K2
K3
N2
N3
M1
M2
M3
L1
L2
L3
G20
F20
G19
F19
N1
CONTROL
7KAA-1
UPD809900F1-S11-KNB-A
VDDQ
3KBT
100R
1n0
2KAD
FKDB
FKDC
FKCJ
100n
2KAU
FKAT
FKAV
100n
LVDS_AVDD
2KBC
FKAA
2KCJ
10n
1n0
2KAK
FKAD
30R
5KAA
2KAZ
10n
VDDQ
2KBN
100n
100n
2KBL
3KAP
100R
100R
3KAG
FKCA
FKBY
10u
2KAL
FKBB
60R
5KAC
1n0
2KAH
FKAZ
FKCN
VDD12
2KBT
100n
100n
2KBQ
FKBV
FKBT
FKCC
E2
E3
E4
F3
F4
G2
L22
B2
P1
H22
J19
F2
K21
K20
K19
G4
F1
C8
C7
C3
C2
A18
B18
A13
B13
A7
B7
A2
B14
A14
B8
A8
B3
A3
C19
C18
C14
C13
C4
A20
B20
A15
B15
A9
B9
A4
B4
B19
A19
B10
A10
B5
A5
C21
C20
C16
C15
C10
C9
C5
P22
N20
N21
L21
L20
L19
B21
A21
B16
A16
U22
T21
T20
P21
P20
N22
V22
U20
U21
T22
R20
AB16
Y17
AA17
AB18
Y19
AB20
Y21
AA21
V21
V20
AA19
R22
R21
AA16
Y16
AB17
AA18
Y18
AA20
Y20
AB21
AB11
Y12
AB13
Y14
AA14
AB5
AA5
AB12
AA12
AB19
AA9
Y9
AB10
AA11
Y11
AA13
Y13
AB14
AB9
Y10
AA10
Y6
AB7
AB2
Y3
AA3
AB4
Y5
AB6
Y7
AA7
7KAA-2
UPD809900F1-S11-KNB-A
INTERFACE
G3
K22
AA2
Y2
AB3
AA4
Y4
AA6
FKAB
SGND2
3KBA
100R
FKCF
cKAA
SGND2
2KBB
10n
VDD33
100R
FKBZ
3KAN
3KBY
100K
3KBR
2KAC
100R
10u
2KAA
10u
FKCL
FKAP
100n
2KBE
3KAU
100R
100R
3KAT
10u
2KAN
FKCB
100n
2KBJ
2KBG
100n
10n
2KBH
8
3KBJ-1
10K
1
3KAZ
100R
FKCE
FKCG
FKCD
3KAM
100R
FKCV
FKCU
2K2
3KBH
R
ES
FKAU
FKAW
FKAM
FKDA
mini_AVDD
3n3
2KC
H
10K 3KAD
10K
3KAE
3KAV
100R
100R
3KBC
VDD33
FKAN
100R
3KBK
+VDISP
6
7
5
4 9
8
3
10 11
2 MP2301ENE-LF
7KAC
1
60R
5KAB
100n
2KC
B 30R
5KAE
3KAK
100R
10u
2KAJ
2KAQ
10u
VDD12
VDD33
100n
2KC
D
2KC
C
10n
2KBF
10n
FKCK
FKAK
FKDE
VDD12
mini_AVDD
VDD33
FKBU
FKBW
60R
2KAF
5KAD
1n0
1n0
2KAM
FKCT
FKAQ
FKCW
FKAR
2KBU
1u0
FKBJ
10K 3KAC 100R
3KBZ
4
5
3KAW
100R
10K
3KBJ-4
100n
2KC
T
100n
2KD
A
VDD33
2KC
Z
100n
100n
2KC
W
2KC
Y
100n
2KC
R
100n
2KC
Q
100n
100n
2KC
P
R
ES
3KC
B
100R
2KAB
VDD12
VCC_3V3
1n0
1K0
3KAB
3KBQ
100R
10n
2KBD
R
ES
100n
2KD
C
2KD
D
100n
100R
3KC
A
R
ES
R
ES
60R
5KAK
5KAJ
60R
60R
5KAH
4u7
2KC
F
10K
3KBJ-3
3
6
24M 1KAA
2
1
3
3KAY
100R
LVDS_AVDD
FKBE
mini_AVDD
SSCG_AVDD
FKBD
100n
2KC
V
2KD
B
100n
1u0
2KBW
VCC_3V3
2KAE
3
SCL 2
SDA 1
10u
+VS
8
A0 7
A1 6
A2 5
G
N
D
4
OS
7KAB
LM75BDP
LVDS_AVDD
FKCZ
FKCY
FKAH
100R
FKAJ
3KAH
SGND2
3KBG
100R
FKCH
FKBF
2KBM
1u0
4n7
2KCL
100R
100R
3KBE
3KBP
E16
E7
D21
D3
W3
D20
W7
W11
W12
U19
P19
D16
D7
V7
V11
V12
V16
U18
W2
P18
W6
W17
D17
D6
F5
G5
V6
V17
D2
W16
N15
H11
H10
U4
K18
G18
F18
E17
E6
L18
U5
M8
K10
N13
M13
L13
K12
K11
N8
R10
R11
R12
L9
M9
N9
P10
P11
P12
N14
J12
J11
J10
H12
M14
L14
D14
D13
D10
D9
V10
V14
H8
L8
L4
P5
L5
P4
M5
R5
M15
L15
7KAA-3
UPD809900F1-S11-KNB-A
POWER
100R
3KBL
2KCE
100n
3KAL
100R
10n
2KC
A
2KAP
1n0
100R
3KBF
100n
2KC
M
2KBV
100n
FKBN
3KBV
7K5
FKAF
SSCG_AVDD
10n
2KAT
2KAV
10n
10n
2KC
N
3KBU
1K8 0.5%
100R
3KAQ
3KAR
FKBQ
100R
FKBR
FKBH
FKBG
SGND2
3KBW
15K
9KAA
FKBL
VCC_3V3
100n
2KAY
2KAW
100n
FKAC
VCC_1V2
1M
0
3KAA
FKCP
2KBZ
100n
FKCM
VDDQ
100R
3KAJ
FKBP
2KBY
10n
10K
2
7
FKBM
3KBJ-2
FKBK
22u
2KC
K
R
ES
5KAG
4u5
FKBA
FKBC
FKAY
LVDS_AGND
MINI_AGND
FKAL
LVDS_AGND
MINI_AGND
SSCG_AGND
LVDS_AGND
MINI_AGND
SSCG_AGND
SDI
SSCG_AGND
GCK_R
GCK_L
R_L
U_D
BIT_SDO
CS12
CS11
CS10
CS9
CS8
CS7
CS6
CS5
CS4
CS3
CS2
CS1
GSLOP
G_LBR_INV
G_LBR
GSP2
GSP1
GOE_R
GOE_L
MODE2
SCK
SCS
SDO
SDI
BIT_SCK
BIT_SDI
SDA-TCON
SCL-TCON
BIT_SCS PX3C+
PX3C-
PX3D+
PX3D-
PX3E+
PX3E-
OS_ON-OFF
100Hz_120Hz
PX4A-
PX4A+
PX3CLK-
PX3CLK+
PX3A+
PX3A-
PX3B+
PX3B-
PX4D-
PX4D+
PX4C-
PX4C+
PX4B-
PX4B+
PX1A+
PX1A-
PX4CLK-
PX4CLK+
PX4E-
PX4E+
PX1E-
PX1E+
PX1D-
PX1D+
PX1C-
PX1C+
PX1B-
PX1B+
PX2D-
PX2D+
PX2C-
PX2C+
PX2B-
PX2B+
PX2A-
PX2A+
SELLVDS
RESET
EN
PX1CLK-
PX1CLK+
PX2CLK-
PX2CLK+
PX2E-
PX2E+
R_LVB4-
R_LVB5+
R_LVB5-
R_LVCKB+
R_LVCKB-
R_LVB0-
R_LVB1+
R_LVB1-
R_LVB2+
R_LVB2-
R_LVB3+
R_LVB3-
R_LVB4+
R_LVA3-
R_LVA4+
R_LVA4-
R_LVA5+
R_LVA5-
R_LVCKA+
R_LVCKA-
R_LVB0+
L_LVCKB-
R_LVA0+
R_LVA0-
R_LVA1+
R_LVA1-
R_LVA2+
R_LVA2-
R_LVA3+
L_LVB2-
L_LVB3+
L_LVB3-
L_LVB4+
L_LVB4-
L_LVB5+
L_LVB5-
L_LVCKB+
L_LVA5-
L_LVCKA+
L_LVCKA-
L_LVB0+
L_LVB0-
L_LVB1+
L_LVB1-
L_LVB2+
L_LVA1-
L_LVA2+
L_LVA2-
L_LVA3+
L_LVA3-
L_LVA4+
L_LVA4-
L_LVA5+
FS
LS_L
LS_R
L_LVA0+
REV
L_LVA0-
L_LVA1+
LVDS_AGND
EN 162 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
TCON DC/DC
18770_560 _100121.eps
100121
TCON DC/DC
B14B B14B
2009-12-11 4
2009-11-12 3
2009-10-26 2 8204 000 9071
TCON SHARP
DRN
COM
VREF
FBN
NOUT
CB
1
2
FBL
LDO-CTL
LDO-FB
TEMP
FBP
C1
P
N C2
LX
LXL
PGND
PVIN SUPP
SU
PN
AG
N
D
G
N
D
_H
S
COMP
HVS
EN
PROT
P
N
CTL
CDEL
VL
CM2
1
2
FBB
RSET
POUT
VIA VIA
VIA
VIA
9KFB-4 B10
9KFC-1 A12
9KFE-2 I13
9KFE-3 I13
9KFE-4 I13
9KFF L5
FKFE C5
FKFG H5
DISPLAY INTERFACING - VDISP
FKFH I5
FKFJ L5
7KFB J13
7KFC J13
7KFD B12
7KFE B10
FKFK E16
cKFA F8
9KFB-3 A10
9KFC-2 A12
9KFC-3 A12
9KFC-4 B12
9KFD F7
9KFE-1 I13
3KGB K5
3KGC L5
3KGD F7
3KGE D7
FKFA J14
FKFB E15
FKFC B4
5KFB B2
5KFC B2
5KFD E14
FKFD B14
6KFA B11
6KFB F14
6KFC E16
6KFD J13
6KFE B4
6KFF I6
7KFA-1 D8
7KFA-2 G8
3KFH D12
3KFJ E11
3KFK E9
3KFL E9
7KFF F9
9KFB-1 A10
9KFB-2 A10
3KFQ F16
3KFR B4
3KFT J13
3KFU J14
3KFV J13
3KFWI12
3KFY I9
3KFZ I9
3KGA K6
2KGWE15
2KGY B2
2KGZ B3
2KHG B11
3KGF E6
3KGG I12
5KFA B10
2KHP B7
2KHQ B7
2KHR B7
2KHWJ12
3KFA B9
3KFB C9
3KFC C11
3KFD C11
3KFE B12
3KFF C12
3KFG D10
2KGC F8
2KGD E7
2KGE E7
2KGF E7
3KFM F14
3KFN F14
3KFP E15
2KGK C8
2KGL C9
2KGM E13
2KGN F14
2KGP F14
2KGQ F15
2KGR F15
2KGT F16
2KGU F15
2KGV F9
17
A
B
C
2KHH L5
2KHK B13
2KHN B6
G
H
I
2KFL B13
2KHT B7
2KHU B8
2KFR E11
2KFT E11
2KFU F10
2KFV F10
2KFWF10
2KFZ J12
2KGA I10
2KGB I10
1 2 3 4
2KGG E7
2KGH E7
2KGJ D7
8 9 10 11 12 13 14 15 16
D
E
F
G
D
E
F
2KFG B12
2KFH B13
2KFK B13
2 3 4 5
2KFM C12
2KFN C12
2KFP E10
2KFQ E11
2KFB B9
2KFC B9
2KFD B10
2KFE B11
6 7 8 9 10 11 12 13
5 6 7
FOR DEBUG ONLY
14 15 16 17
J
K
L
A
B
C
H
I
J
K
L
1KFA B3
1KFB B3
2KFA B9
1
2KFZ
100n
R
ES
2KGD 220n
3KGA
VLS_15V6_B
R
ES
75K
2KH
T
10u
2KH
N
100n
R
ES
+VD
ISP
750K
3KFZ
2KFM
1n0
R
ES
PM
EG
1030EJ
6KFD
3 6
2KH
U
47u
16V
VGH_35V
9KFE-3
0.5%
13K
3KG
D
2KH
K
R
ES
R
ES
10u
31
9
10
2KGG 100n
335614
21
36
381
28
1241
27
40
39
34
35
3
4
13
32
25
7
22
30
24
23
26
29
8
11
20
ISL97653AIRZ

37
16
15
18
17
2
7KFA-1
20K
3KFM
R
ES
2KFU
2u2
2KG
U
22u
16V
VCC_3V3
R
ES
240K 3KFP
4 5
10K
3KFB
9KFB-4 RES
2K2
3KFW
R
ES
2K2
3KFQ
SGND1
2KG
Q
22u
VGL_-6V
2K2
3KFR 6KFE
LTST-C190KGKT
FKFE
FKFC
FKFB
2KH
G
10u
2KFQ 220n
R
ES
4
2
39K
3KFE
RB550EA
6KFC
1
3
5
R
ES
2KH
P
10u
3KFH
2K2
RES
RES
T 32V 3.0A
1KFB
VCC_1V2
5KFC
VLS_15V6
SGND1
30R
RES
3K6
3KFV
10K
R
ES
FKFK
VGH_35V
3KFU
+VDISP
9KFB-3 RES 3 6
SGND1
RES 2 7
100n
9KFB-2
R
ES
2KH
H
2KG
C
2u21
2
3
VLS_15V6_B
RES
KTA1718D
7KFF
SGND1
2KGE 4u7
2KG
T22u
16V
SS34
6KFA
RES 2K2 3KFK
SGND1
2KFP 100n RES
2u2
SGND1
10u
2KH
R
R
ES
2KFL
R
ES
VCC_3V3
R
ES
10u
2KH
Q
R
ES
100K
3KFF
16K
3KG
C
9KFE-2 2 7
9KFD
5KFD
4u5
2 7
cKFA
9KFC-2
2KGW 100p
27K
3KFY
SGND1
SGND1
10K
3KGE
16V
R
ES
2KFW
22u 2u2
2KFV
R
ESR
ES
2KG
P
1n0
3KG
B
75K
2KFK
10u
R
ES
9KFE-4 4 5
4 5
7KFB
1
2 3
9KFC-4
RES
2SB1767
VCC_3V3
2KGH 100n
2KG
R
2u2
1
3
5
4
2
R
ES
RB550EA
6KFF
1 8
FKFJ
9KFE-1
3KG
G
R
ES
0.5%
13K
3KFL 2K2 RES
2KFN
+VDISP
R
ES
1n0
39K
3KFC
SS24
6KFB
6
7
8
4
1
2
3
2KFE
10u
7KFE
FDS9435A
5 30R
9KFB-1 RES 1 8
+VDISP-INT
RES5KFB
VLS_15V6
2KFR 820p
2
+VDISP
2N7002
7KFC
3
1
FKFA
RES
2KFB
10u
2KFA
2u2
1n0
2KG
N
R
ES
2KFH
47u
25V
2KH
W
4u7
2KG
L
4u7
9KFC-1 1 8
VLS_15V6
2KFG
10n
R
ES
0.5%
13K
2KGJ
4n7
R
ES
3KFT
RES
3KGF
2K2
6u8
5KFA
SGND1
2KGF 4n7 2KGM
1u0
12K
3KFN
SGND1
SGND1
56 57
43
44
45
46474849
50
ISL97653AIRZ
7KFA-2
VIA
42
51
52
53
54 55
2KG
Z
100n
2KFT 220n
FKFH
FKFD
1
2
3
FKFG
5
6
7
8
4
RES 7KFD
FDS9435A
2KG
V
10n
SGND1
R
ES
2KG
Y
22u
3K3
3KFD
2KG
A
100n
R
ES
R
ES
2K2
3KFA
2KFC
100n
1KFA
T 32V 3.0A
2K2
3KFG
39K 3KFJ
RES
VG
L_-6V
SGND1
2KG
K
2u2
2KG
B
100p
9KFC-3 3 6
9KFF
2KFD
2u2
VGL_FB
VGH_FB
VLS_FB
GSLOP
RESET
GSLOP
Circuit Diagrams and PWB Layouts EN 163 Q552.1E LA 10.
2010-Feb-19
back to
div. table
P Gamma & VCom & Flash
18770_561 _100121.eps
100121
P Gamma & VCom & Flash
B14C B14C
2009-12-11 4
2009-11-12 3
2009-10-26 2 8204 000 9071
TCON SHARP
SI
SO
CS
HOLD
WP
SCK
INPCOM|DVR_OUT
REFIN_INN
REFIN
SET
SCL
SDA
SET_COMP
V_THERM
BANKSEL
GND_HS
VIA
GND
OUT10
OUT11
OUT12
OUTCOM
INNCOM
AVDD
OUT1
OUT2
OUT3
OUT4
OUT5
INN5
OUT6
INN6
OUT7
INN7
OUT8
INN8
OUT9
VSD
-BUS
CTRL FIL
I 2 C INP
cKQB F5
NC
DEBUG ONLY
*
*
*
*
32 INCH
FKQP J9
FKQQ F4
FKQR D3
FKQT D3
FKQU F14
40/46/52 INCH
3KQA
3KQC
3KQE 3K9
FKMF C10
FKMG D10
100K
6K2
10K
39K
2K7
FKQB E14
FKQC F14
FKQD F14
FKQE F14
FKQF G13
NC
FKYE F10
FKYF F10
FKYG E12
FKYH D12
I2C SWITCH (VGA VCOM)
ASIC OPTIONS
FKQM C15
9KQH G12
9KQJ G12
9KQK H12
FKLY G2
FKLZ C10
FKQWD3
FKYA E10
FKYB E10
FKYC E10
FKYD E10
3KYJ G14
3KYK C13
FKMH D10
FKMJ D10
FKMK E10
FKML E10
FKQA E14
7KQA B4
7KQB J8
7KQC H4
7KQD G4
7KQH D13
FKQG B15
FKQH B15
FKQJ B15
FKQK B15
FKQL B15
VCOM BUFFER
3KTN K9
3KTP D3
3KTQ E3
9KQF F9
9KQG-1 F4
9KQG-2 F4
9KQG-3 F4
9KQG-4 F4
3KTY C12
3KTZ C12
3KYA B12
3KYB B13
3KYC B13
FKMA C10
FKMB C10
FKMC C10
FKMD C10
FKME C10
3KRH G5
3KRJ G4
3KRK G4
3KRL-1 E8
3KRL-2 E8
3KYM G2
3KYN H2
3KYP G6
3KYQ G6
6KQA H6
3KRM-4 G7
3KTD I6
3KTE I7
3KTF I9
3KTG K9
9KQA C9
9KQB C9
9KQC D9
9KQD E9
9KQE E9
3KQG B5
3KQH-1 C8
3KQH-2 C8
3KTR G8
3KTT K10
3KTU B11
3KTV B11
3KTWB12
3KQM C9
3KQN C9
3KQP C9
3KQQ C9
3KQR D9
3KYD B14
3KYE C13
3KYF C14
3KYG C14
3KYH G14
3KRF F9
3KRG G4
2KQT G7
2KQU G8
2KQWG8
2KQY G4
2KQZ G3
3KRL-3 E7
3KRL-4 E7
3KRM-1 G8
3KRM-2 G8
3KRM-3 G7
2KRM C13
2KRN C14
2KRQ D13
2KRT G5
3KQA B2
3KTH K7
3KTJ K7
3KTK I9
3KTL I10
3KTM K9
NC
11 12 13 14 15
3KQH-3 C7
3KQH-4 C7
3KQJ C9
3KQK C9
3KQL C9
D
E
F
G
H
3KQT D9
3KQU D9
3KQWE9
3KQY E9
3KQZ E9
3KRA E9
3KRB E9
3KRC E9
3KRD F9
3KRE F9
2KQQ E8
2KQR G7
2 3 4 5 6
2KRA G4
2KRB G5
2KRH I8
2KRJ C12
2KRL C13
12 13 14 15 16
3KQB B3
3KQC B2
3KQD C3
3KQE C2
3KQF D3
9 10
B
C
D
E
16 17
A
B
C
K
L
1KQA E15
1KQB G15
2HRK C12
I
J
K
L
A
2KQF B5
2KQG D7
2KQH D7
2KQJ D8
2KQK D8
2KQM E7
2KQN E7
2KQP E8
1 7 8 9 10 11
NC
F
17
1 2 3 4
G
H
I
J
2KQA B2
NC
5 6 7 8
2KQB B2
2KQC B3
2KQD B4
2KQE B4
2KQ
B
1u0
FKQH
FKQG
FKQM
2K2
3KTU
2K0
3KYG
VCC_3V3
100n
100n
2KQ
G
2KQ
H
RES 100R 3KQZ
3KQY RES
10R
1
8
100R
2KQ
K
100n
3KQ
H
-1
2KQ
A
1u0
R
ES
2K0
3KYD
2K2
CYK3
EYK3
2K0
R
ES
VREF_15V2
3KYQ
10K
R
ES
R
ES
10K
3KYP
2KR
T
100n
R
ES
3KQK RES
3KQL 100R
100R
RES
RES
100R 3KQJ
FKQE
3KTD
2K2
R
ES
2K2
3KQ
U
3K3
3KQF
0.5%
VLS_15V6
3KYN
R
ES
VREF_15V2
R
ES
10K
3KYM
10K
2KR
H
4u7
3KTY
2K2
RES 3KQT 100R
FKQK
R
ES
1n0
2H
R
K
2K2
FKQJ
2KQ
Z
22u
16V
3KYF
0.5%
10K
3KQ
E
7
0.5%
2K2
3KQ
G
9KQ
G
-2
2
M
SS1P4
6KQ
A
2K2
3KTK
R
ES
100R 3KRF RES
2KQ
J
3KQ
H
-4
4
5
100n
3KQ
H
-3
10R
3
6
10R
2
7
10R
3KQ
H
-2
4
5
3KYA
2K2
3KR
M
-4
10R
100n
2KQ
W
9KQE
3KRC 100R
100R 3KRB RES
RES
100n
2KQ
M
0.5%
100K
3KQ
A
VLS_15V6
9KQC
RES
VLS_15V6
100R 3KQR
0.5%
22K
3KQ
B
6K2
3KQ
C
1
8
0.5%
10R
3KR
M
-1
RES 100R 3KQN
RES 3KQM 100R
9KQA
7KQC
PBSS5330X
PBSS4540X
7KQD
RES 3KQW 100R
9KQD
3KTV
2K2
FKQU
2KQ
F
10u
3KYK
2K2
3KRE 100R RES
2K2
3KTR
VCC_3V3
3KTQ
10K
10K
3KTP
R
ES
100n
2KQ
E
VLS_15V6
2KQ
D
100n
2KQ
Y
10u
2KR
B
68p
VCC_3V3
2KQ
C
100n
6
5
2
8
3
FKQP
7KQB
AT25DF321-SU
1
4
7
(32K)

FLASH
100n
2KQ
T
18K
3KQ
D
3KRD 100R
0.5%
2KQ
R
100n
RES
R
ES
2KR
J
1n0
9KQ
G
-3
3
6
3KQQ RES
3KQP 100R
100R
9KQK RES
RES
VCC_3V3
3KYH
10K
R
ES
10K
3KYJ
R
ES
VCC_3V3
R
ES
2K0
3KTW
3KR
G
0R
51
0.5% 750R
3KRJ
0.5%
1K0
3KR
H
FKLZ
FKMH
FKMB
FKQF
1KQB
RES
1
2
3
4
5 6
502382-0470
FKQT
2K2
3KTN
R
ES
+VDISP
9KQF
2K2
3KTE
R
ES
VCC_3V3
R
ES
3KTL
2K2
2K2
3KTH
R
ES
3KRA 100R RES
3KR
L-1
10R
1
8
R
ES
2KR
A
100n
2
7
3
6
10R
3KR
L-2
4
5
3KR
L-3
10R
10R
3KR
L-4
29
31
2KQ
Q
100n
28
30
34
35
36
37
38
39
40
41
10
16
18
19
25
32
1
13
12
17
26
27
2
22
23
24
3
4
7
8
521
14
62033
9
11
15
VREF_15V2
7KQA
ISL24837IRZ-T13
2K0
3KYB
3KR
M
-2
10R
2
7
R
ES
R
ES
9KQ
G
-4
4
5
2KR
N
1n0
3
6
RES
10R
3KR
M
-3
9KQH
FKQC
FKQD
9
10 11
FKQA
FKQB
RES
1
2
3
4
5
6
7
8
502382-0970
1KQA
1
8
FKMA
3KR
K
0R
51
9KQ
G
-1
FKMF
FKMD
FKME
FKMG
FKQR
cKQ
B
3KTJ
2K2
R
ES
2KQ
N
100n
100n
2KQ
P
3KTF
4K7
3KTG
2K2
FKYG
FKYH
R
ES
FKQQ
2KQ
U
100n
FKYF
2K2
3KTM
8
SCL 4 0 D S 1
SD1 7 SDA 2
VDD
3
VSS
6
RES
SC0 5
SC1
9KQJ RES
PCA9540B
7KQH
2K0
3KTZ
R
ES
R
ES
2K2
3KTT
9KQB
FKLY
FKYE
FKYD
FKYB
FKYC
1n0
2KR
M
R
ES
2KR
L
1n0
R
ES
FKQL
FKQW
FKYA
FKMK
FKML
R
ES
FKMJ
2KR
Q
100n
VCC
EN
OUTCOM
OUTCOM
FKMC
SDA-TCON
EN
BYPASS_MODE
SCK
SDO
SCS
SDI
WP
VCC
SCL-TCON
SDA-TCON
CTRL-DISP
SDA-DISP
SCL-DISP
VGA-SDA-EDID-TCON
SDA-TCON
SCL-TCON
VGA-SCL-EDID-TCON
SCL-TCON
BYPASS_MODE
SDO
VL255
SCS
VCOM
SDI
SCK
SELLVDS
R_L
WP
MODE2
SCL-TCON
SDA-TCON
100HZ_120HZ
OS_ON-OFF
U_D
INNCOM
VL31
VL159
VL63
VL95
VL0
VH0
VL247
VL191
VL159
VL127
VH247
VH159
VH191
VH95
VH159
VH127
VH191
VH95
VH63
VL95
VL127
VH127
VH255
CS_L
CS_H
INNCOM
OUTCOM
SCL-TCON
SDA-TCON
VH63
VH31
VL63
VL191
EN 164 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
MPD
18770_562 _100121.eps
100121
MPD
B14D B14D
2009-12-11 4
2009-11-12 3
2009-10-26 2 8204 000 9071
TCON SHARP
EP
NC
V+
-
+
V-
VIA VIA
VH1 VH2
V
C
O
MVL2 VL1 VLS
OA3
OB3
OA4
OB4
OA5
OB5
OA6
OB6
OA7
OB7
VIA
GND_HS DGND AGND
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
EN
CH
ST|NC
VCC
OA1
OB1
OA2
OB2
EP
NC
V+
-
+
V-
VIA VIA
VIA VIA
VIA VIA
EP
NC
V+
-
+
V-
EP
NC
V+
-
+
V-
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
+
REFL
REFH
7
6
5
4
3
2
1
AVDD
VIA
-
GND_HS GND
NC
OUTB
OUTA
-
INA
+
INB
IN
OUT1
3KWK Y Y
7KUB Y Y
7KUC Y Y
7KUE
2KUK Y Y
2KUM Y Y
2KUN
Y
Y Y
2KUQ Y Y
2KUT Y Y
Y
2KWA N Y
3KUA N Y
3KUB N Y
2KUV Y Y
2KWC Y Y
3KUF Y
3KUU
Y
3KUJ Y Y
3KUK Y Y
Y Y
3KVA Y Y
Y Y
ITEM NO 40 INCH 46/52 INCH
2KUA
ITEM NO 40 INCH 46/52 INCH
N Y
2KUF N Y
2KUH N
2KUW N Y
2KUY N
3KUC N Y
3KUD N Y
Y
3KUG Y
7KUD N Y
N Y
2KUB
7KUA N Y
13
1 7 8 9 10
FOR 32 INCH
NC
NC
NC
4 1 2 1 1 1 0 1 9 8 7 6
A
FOR 40 / 46 / 52 INCH
B
C
D
E
F
G
H
I
A
2KUB B1
2KUC B2
2KUD B3
2KUE B4
2KUF B4
2KUG B4
2KUH B5
2KUJ D3
2 3 4 5 6
2KUQ B6
2KUR B6
2KUT B7
2KUU B7
2KUV A5
2KUWD8
2KUY D6
2KUZ D6
2KWA D7
2KWB D7
11 12 13 14
1 2 3 4 5
2KWM I13
2KWN I12
2KWP I12
2KWQ I12
2KWR I12
2KWT I11
2KWU I11
2KWW I11
3KUD C1
3KUE B3
3KUF C1
3KUG D1
3KUH D3
3KUJ B9
3KUK B9
3KUL B7
3KUM D7
3KUN-1 I12
B
C
D
E
F
G
H
I
2KUA B1
3KUQ-3 I11
3KUQ-4 I11
3KUR B12
3KUT B13
3KUU D1
3KUW A14
3KUY B13
3KUZ B14
2KUK D4
2KUL D4
2KUM D5
2KUN E5
2KUP D2
7KUD-1 C8
7KUD-2 E8
7KUE E5
7KUF B12
7KUG B14
7KUH A12
FKUA E11
FKUB F11
FKUC F11
FKUD F11
2KWC E6
2KWD B12
2KWE B12
2KWF A14
2KWG C13
2KWH C13
2KWJ I13
2KWK B8
2KWL I13
FKUE G11
FKUF G11
FKUG G11
FKUH G11
FKUK H11
FKUL H11
FKUM H11
FKUN I11
2KWY I11
2KWZ I10
3KUA B1
3KUB B1
3KUC B1
2
K
W
J
1
0
0
n
3KUN-2 I13
3KUN-3 I13
3KUN-4 I13
3KUP-1 I11
3KUP-2 I12
3KUP-3 I12
3KUP-4 I12
3KUQ-1 I10
3KUQ-2 I11
3KVA B9
7KUA-1 B2
7KUA-2 C2
7KUB-1 C2
7KUB-2 E2
7KUC-1 B8
7KUC-2 C8
1
0
R
1
8
2
7
3
K
U
N
-1
2
3
3
K
U
N
-2
1
0
R
7KUH
2SC5886A
1
3
K
U
N
-3
1
0
R
3
6
1
0
R
3
6
4
5
3
K
U
Q
-3
2
K
W
T
1
0
0
n
3
K
U
Q
-4
1
0
R
2
K
W
R
1
0
0
n
2
K
W
Q
1
0
0
n
FKUM
FKUN
3
K
U
P
-1
1
8
2
K
W
P
1
0
0
n
1
0
R
FKUL
FKUG
FKUK
FKUH
FKUF
FKUE
1
0
0
n
2
K
W
M
2
K
W
L
1
0
0
n
4
5
3
K
U
N
-4
1
0
R
FKUD
FKUB
FKUA
2
K
W
Z
1
0
0
n
1
0
0
n
2
K
W
Y
1
0
R
2
7
3
K
U
Q
-2
2
7
1
0
R
3
6
1
0
R
3
K
U
P
-2
4
5
3
K
U
P
-3
3
K
U
P
-4
1
0
R
2
K
W
N
1
0
0
n
10
19
11
12
13
14
15
16
17
18
4
7KUD-2
MAX9650ATA
VIA
9
3
2
1 5 8
6
7
+VDISP
MAX9650ATA
7KUD-1
1
0
0
n
2
K
U
V
0
.5
%
VREF_15V2
3
K
U
K
4
K
3
0
.5
%
1
1
K
3
K
U
J
FKUC
2
K
W
W
1
0
0
n
2
K
W
U
1
0
0
n
1
0
R
1
8
3
K
U
Q
-1
R
E
S
2
K
0
3
K
U
E
1
n
0
2
K
U
J
R
E
S
2
K
U
D
1
n
0
R
E
S
1
6
V
2
2
u 2
K
U
E
R
E
S
1
6
V
2
2
u 2
K
U
K
2
K
W
A
2
2
u
1
6
V
1
0
0
n
2
K
W
K
3KVA
0.5% 10K
10K
3KUU
VREF_15V2
3
K
U
Z
1
1
K
0
.5
%
3
K
U
W
1
3
K
1
3
4
5
2
0
.5
%
NJM2125F
7KUG
2
K
U
W
4
7
0
n
2
K
W
F
1
0
0
n
2
K
U
L
1
0
0
n
R
E
S
R
E
S
1
0
0
n
2
K
U
Z
45
46
47
48
49
50
1
7
1
6
3
6
42
51
52
53
54
55
56
57
43
44
29
27
25
23
21
19
33
3
8
1
8
3
4
3
5
4
1
32
30
28
26
24
22
20
31
2
4
6
8
10
12
14
40
1
5
39
1
3
5
7
9
11
13
3
7
VCC_3V3
7KUE
MAX17079GTL
1
6
V
2
2
u
2
K
W
E
1
0
0
n
R
E
S
2
K
W
D
2
K
U
H
2
K
U
F
2
2
u
1
6
V
1
0
0
n
1
0
0
n
2
K
U
M
1
0
0
n
2
K
W
C
VLS_15V6
1
0
0
n
2
K
U
B
VREF_15V2
2
K
U
A
4
u
7
R
E
S
1
n
0
R
E
S
2
K
W
H
1
n
0
2
K
W
G
0
.5
%
1
2
K 3
K
U
G
0
.5
%
0
.5
%
1
6
K
3
K
U
F
13
14
15
16
17
18
3
9
K 3
K
U
DVIA
MAX9650ATA
7KUC-2
10
19
11
12
+VDISP
+VDISP
+VDISP
3KUY
0.5% 62R 0.5%
3
K
U
R
1
R
0
3KUT
33R
8
6
7
4
9
3
2
1 5
3
K
U
L
2
K
0
7KUC-1
MAX9650ATA
1
n
0
2
K
U
U
R
E
S
R
E
S
2
K
0
3
K
U
M
R
E
S
2
K
W
B
1
n
0
R
E
S
1
0
0
n
R
E
S
2
K
U
R
1
0
0
n
2
K
U
G
R
E
S
11
34
35
36
37
38
39
40
41
42
8
19
20
21
22
23
24
18
17
10
15
16
9
1
2
3
4
5
6
7
1
2
3
3
32
31
30
29
27
26
25
13
14
ISL24016IRTZ
7KUF
2
8
2
K
U
Y
1
0
0
n
9
3
2
1 5 8
6
7
4
6
7
4
7KUB-1
MAX9650ATA
9
3
2
1 5 8
3
K
U
H
MAX9650ATA
7KUA-1
2
K
0
R
E
S
VREF_15V2
1
K
0 3
K
U
C0
.5
%
3
K
U
B
5
6
K
0
.5
%
1
0
0
n
2
K
U
P
R
E
S
0
.5
%
9
1
K 3
K
U
A
2
K
U
C
1
0
0
n
15
16
17
18
R
E
S
7KUA-2
MAX9650ATA
VIA
10
19
11
12
13
14
12
13
14
15
16
17
18
MAX9650ATA
7KUB-2
10
19
11
+VDISP
+VDISP
VIA
2
K
U
T
2
2
u
1
6
V
1
0
0
n
2
K
U
Q
2
K
U
N
1
0
0
n
CS1U
CS11U
CS12U
CS10U
CS9U
CS8U
CS7U
CS6U
CS5U
CS4U
CS3U
CS2U
CS1U
CS8
CS2
CS7
CS1
VCOM
RESET
CS11U
CS12U
CS10U
CS9U
CS8U
CS7U
CS6U
CS5U
CS4U
CS3U
CS2U
CS_L
CS_H
CS12
CS6
CS11
CS5
CS10
CS4
CS9
CS3
CS5
CS6
CS_H
CS_L
CS12U
CS11U
CS10U
CS9U
CS8U
CS7U
CS6U
CS5U
CS4U
CS3U
CS2U
CS1U CS1
CS2
CS3
CS4
Circuit Diagrams and PWB Layouts EN 165 Q552.1E LA 10.
2010-Feb-19
back to
div. table
Mini LVDS
18770_563 _100121.eps
100121
Mini LVDS
B14E B14E
2009-12-11 4
2009-11-12 3
2009-10-26 2 8204 000 9071
TCON SHARP
8 9
B
C
D
E
F
G
H
I
A
B
G
H
I
1KA1 B4
1KA2 B9
1 2 3 4 5 6 7
3 4 5 6 7
A
2KLB H4
2KLD H8
2KLE H8
3KLA A2
3KLB A1
3KLC A2
3KLD A2
C
D
E
F
3KLJ B2
3KLK B2
3KLL B2
3KLM B2
3KLN B2
3KLQ B1
3KLR-1 C3
3KLR-2 C3
3KLR-3 C3
3KLR-4 C3
3KLT-1 F3
3KLT-2 F3
8 9
1 2
3KLW H2
3KLY I2
3KLZ I2
3KMA I1
3KMB I2
2KLA H3
3KMC I2
3KMD I2
3KME I2
3KMF I2
3KMG I2
3KMH I2
3KLE A2
3KLF B2
3KLG B2
3KLH B2
3KMN A6
3KMP B7
3KMQ B7
3KMR B7
3KMT B7
3KMU B7
3KMV B7
3KMW B7
3KMZ B7
3KLP B2
3KNB B6
3KNC-1 C8
3KNC-2 C8
3KNC-3 C8
3KNC-4 C8
3KND-1 F8
3KND-2 F8
3KLT-3 F3
3KLT-4 F3
3KLU H2
3KLV H2
3KNG H7
3KNH I7
3KNJ I7
3KNK I7
3KNL I6
FKPD E6
FKPE E6
3KNM I7
3KNN I7
3KNP I7
3KNQ I7
3KNR I7
3KNV I7
9KLA A2
FKLA G6
FKLB G6
FKLC I4
FKLE G6
FKLF G6
FKLG E1
FKLH G1
3KMJ A7
3KMK A7
3KML A7
3KMM A7
FKMY E1
FKMZ E1
FKNA E1
FKNB E1
FKNC E1
FKND E1
FKNE E1
FKNF E1
FKNG F1
FKNH F1
3KNA B7
FKNK F1
FKNL F1
FKNM F1
FKNN F1
FKNP F1
FKNQ G1
FKNR G1
3KND-3 F8
3KND-4 F8
3KNE H7
3KNF H7
FKNY G1
FKNZ E6
FKPA E6
FKPB E6
FKPC E6
FKPF E6
FKPG E6
FKPH E6
FKPJ E6
FKPK E6
FKPL E6
FKPM F6
FKPN F6
FKPP F6
9KLB A7
FKPR F6
FKPT F6
FKPU F6
FKPV F6
FKPW G6
FKPY G6
FKPZ G6
FKLK G6
FKMU E1
FKMV E1
FKMW E1
FKNJ F1
FKNT G1
FKNU G1
FKNV G1
FKNW G1
FKPQ F6
100R 1 8
1 8
3KNC-1
2 7
3KLT-1 100R
3KLT-2 100R
2K0 3KMK RES
2K0 3KMC RES
RES
3KLA 2K0
RES 2K0 3KLZ
RES 3KMB 2K0
VGL_-6V
5
2K0 3KMM RES
6
3KNC-4 100R 4
3KNC-3 100R 3
3KLV 2K0 RES RES 2K0 3KNF
FKNU
3KMF 2K0
VLS_15V6
RES
FKNW
3KMR 2K0
2K0
RES
RES
3KMN
3KMQ RES
3KMP 2K0
2K0
RES
2 7 100R 3KND-2
2K0 3KLU RES
FKNT
3KLY 2K0 RES
3KNC-2 100R 2 7
RES 2K0 3KLW
RES
RES 3KMD 2K0
2K0 3KME
RES
RES 3KLM 2K0
2K0
3KLB
2K0 3KLL RES
RES 2K0 3KLJ
FKNP
VCC_3V3
RES 2K0 3KNA
RES 3KLE 2K0
2K0 3KLD RES
RES 2K0 3KMG
RES
3KLQ
2K0
3KMH 2K0
RES
RES
2K0 3KLN
2K0 3KLH RES
3KLG 2K0
3KLK 2K0
RES
RES
RES
2K0
3KNB
RES 3KMV 2K0
3KMT 2K0
FKNM
RES
2K0 3KMW RES
3KMZ 2K0
9KLA
RES
FKNN
FKNL
RES
3KMA
2K0
RES
2K0
3KNL
RES 3KNR 2K0
3KLC 2K0 RES
74
75
76
77
78
79
8
80
9
81 82
64
65
66
67
68
69
7
70
71
72
73
55
56
57
58
59
6
60
61
62
63
46
47
48
49
5
50
51
52
53
54
35
36
37
38
39
4
40
41
42
43
44
45
26
27
28
29
3
30
31
32
33
34
16
17
18
19
2
20
21
22
23
24
25
1
10
11
12
13
14
15
196250-80041
1KA1
3KNG 2K0 RES
FKLC
VGH_35V
RES 2K0 3KLF
2K0 3KMJ RES
RES 2K0 3KMU
VGL_-6V
VLS_15V6
6 3KND-3 100R 3
2K0
RES
RES 3KNE
2K0 3KNV
2K0 3KNQ RES
3KNP 2K0
2K0
VCC_3V3
RES
RES 3KNM
RES 3KNJ 2K0
2K0 3KNH RES
3KND-1 100R 1 8
9KLB
VGH_35V
RES 3KML 2K0
5
FKNK
3KLT-4 100R 4
FKMU
FKMZ
100R 3KND-4 4 5
RES
RES
2K0 3KNN
2K0 3KNK
FKPA
2
2
n
2
K
L
E
1 8 100R 3KLR-1
3 6
2
5
V
4
7
u 2
K
L
D
4 5
100R 3KLR-3
82
100R 3KLR-4
74
75
76
77
78
79
8
80
9
81
65
66
67
68
69
7
70
71
72
73
55
56
57
58
59
6
60
61
62
63
64
45
46
47
48
49
5
50
51
52
53
54
36
37
38
39
4
40
41
42
43
44
26
27
28
29
3
30
31
32
33
34
35
17
18
19
2
20
21
22
23
24
25
196250-80041
1
10
11
12
13
14
15
16
1KA2
FKPT
FKPB
FKPE
RES 3KLP 2K0
FKNV
FKND
100R 3 6 3KLT-3
2
K
L
A
4
7
u
2
5
V
FKPM
FKMY
FKPW
FKNR
FKPF
FKNZ
FKPU
FKPC
FKPY
FKPZ
FKNH
FKPD
2
2
n
2
K
L
B
2 7
FKPL
100R 3KLR-2
FKNE
FKMV
FKNA
FKPP
FKPQ
FKPR
FKPH
FKPJ
FKNY
FKPN
FKLG
FKLH
FKLA
FKLE
FKPK
FKLF
FKNC
FKNF
FKNJ
FKLK
FKPV
FKLB
FKPG
FKNG
FKMW
FKNQ
FKNB
R_LVA2+
R_LVA1-
R_LVA1+
R_LVA0-
R_LVA0+
R_LVA4+
R_LVA3-
R_LVA3+
R_LVA2-
R_LVB0-
R_LVB0+
R_LVCKA-
R_LVCKA+
R_LVA5-
R_LVA5+
R_LVA4-
R_LVB4-
R_LVB4+
R_LVB3-
R_LVB3+
R_LVB2-
R_LVB2+
R_LVB1-
R_LVB1+
BIT_SDI
BIT_SCK
R_LVCKB-
R_LVCKB+
R_LVB5-
R_LVB5+
VL191
SCS
VL159
VL127
VL247
BIT_SCS
BIT_SCK
VH127
VH95
VH63
VH31
BIT_SDI
SDI
VL95
BIT_SDO
VL63
VL31
SDO
VL31
VL191
VL159
BIT_SDO
SDO
VH95
VH63
SCK
VH191
VH159 VH159
VH127
SDI
VH31
SCK
VL127
SCS
BIT_SCS
VL95
VL63
LS_L
FS
REV
G_LBR
G_LBR_INV
LS_R
FS
REV
G_LBR
VH191
CS9U
CS8U
CS7U
CS6U
CS5U
CS4U
CS3U
CS2U
CS1U
GOE_R
GCK_R
GSP1
GSP2
G_LBR_INV
CS2U
CS1U
GOE_L
GCK_L
GSP1
GSP2
VL0
VL255
VH0
VH247
VH255
VCOM
CS12U
CS11U
CS10U
VH247
VH255
VCOM
CS12U
CS11U
CS10U
CS9U
CS8U
CS7U
CS6U
CS5U
CS4U
CS3U
L_LVCKB+
L_LVB3-
L_LVB3+
L_LVB4-
L_LVB4+
L_LVB5-
L_LVB5+
VH0
L_LVB0-
L_LVB0+
L_LVB1-
L_LVB1+
L_LVB2-
L_LVB2+
L_LVCKB-
L_LVA4-
L_LVA4+
L_LVA5-
L_LVA5+
VL247
L_LVA2+
VL255
L_LVCKA-
L_LVCKA+
L_LVA3-
L_LVA3+
VL0
L_LVA0-
L_LVA0+
L_LVA1-
L_LVA1+
L_LVA2-
EN 166 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Connectors
18770_564 _100121.eps
100121
Connectors
B14F B14F
2009-12-11 4
2009-11-12 3
2009-10-26 2 8204 000 9071
TCON SHARP
*
*
HOTEL TV
*
**
*
LED PANEL
ROUND SCREWHOLE 4mm
8 9
A
F
A
B
C
D
E
F
1F53 D9
1K85 D2
1K86 E7
1M20 B9
1M71 D1
1P12 B4
1X03 F3
1X05 F4
1X08 F5
2K76 A8
2K77 B8
2K78 B8
2K79 B8
2K80 C8
2K81 B9
2K96 F9
3K71 F7
3K74 A7
3K75 A7
TEMPERATURE
*
ROUND SCREWHOLE 4.5mm
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7
LIGHT STRIP
3K83 D2
3K84 C7
3K85 D7
3K86 D7
B
C
D
E
Dummy testlands for common jig
*
2K82 C8
2K83 D2
2K84 D2
2K85 E1
2K86 C8
2K87 D8
2K88 D8
2K89 E8
2K90 E8
2K91 F8
2K92 F8
2K93 C4
2K94 C5
2K95 B7
5K53 E3
5K54 E3
9K50 E8
FK50 B4
3K76 A7
3K77 B7
3K78 B7
3K79 C7 OVAL SCREWHOLE
3K80 D2
3K81 D2
3K82 D2
FK60 E9
FK88 B9
FK89 B9
FK90 B9
3K87 F7
3K88-1 F7
3K88-2 E7
3K89 B5
2D DIMMING
3K90 C3
3K91 D2
3K92 D2
3K93 C3
FKZA A1
FKZB A1
FKZC A1
FKZD A2
FK51 B9
FK52 D9
FK53 D9
FK54 D9
FK55 D9
FK56 D9
FK57 D9
FK58 E9
FK5A F1
FK5B F1
FK5C F1
FK5D F1
FK5E F1
FK5F F1
FKZG B1
FKZH B1
FKZJ B1
* FOR TV550 ONLY
FK91 B9
FK92 B9
FK93 B9
FK94 B9
SENSOR
* *
FK96 D1
FK97 D1
FK98 D1
FK99 D1
FK56
FKZE A1
FKZF A1
1
0
0
p
2
K
8
4
2
K
9
6
1
0
0
n
FKZJ
100R
1
0
0
p
2
K
9
4
1K85
1.0A 63V T
3K89
2
K
9
5
EMC HOLE
1X08
R
E
S
4
7
n
1
u
0
2
K
8
5
FK89
FK60
FK90
FKZH
+3V3-STANDBY
100R RES 3K71
3K84 100R
+5V
3K80 100R
3K81
RES
100R
2
K
8
7
1
0
p
1K86
1.0A63V T
+3V3
3K91 RES 100R
8
FKZC
100R
3K88-1
1
3K85
100R
FK88
+12V
EMC HOLE
1X05
FK57
+3V3
FK58
FKZG
FK5D
FK5E
FK5F
FK97
3
K
7
4
1
0
0
K
3K79
10R
FK99
FK98
FK53
2
K
8
9
1
0
0
p
1
0
0
p
2
K
9
0
100R
3K75
2
K
8
1
1
0
0
n
1
0
0
p
2
K
8
8
2
K
7
7
1
0
0
p
100R
3K86
6
7
8
9
15 16
10
11
12
13
14
2
3
4
5
502386-1470
1F53
1
RES
30R
5K53
1
0
p
2
K
8
6
1
0
0
n
2
K
9
3
FK51
2 7
3K88-2
100R
FK50
REF EMC HOLE
1X03
4
100R 3K82
1M71
2041145-4
1
2
3
RES
3K83 100R FK55
FK52
FK54
1
2
3
4
5
6
7
8
1M20
2041145-8
1
0
K
3
K
9
0
R
E
S
FKZE
FKZF
FKZD
2
K
9
1
1
0
0
p
1
n
0
2
K
9
2
2
K
8
3
1
0
0
p
3K87
100R
6
1
2
3
4
5
3K78
100R
1P12
502382-0470
3K77
100R
FK92
3K76
100R
1
0
0
p
2
K
7
6
+5V
1
0
0
p
2
K
8
2
2
K
8
0
1
0
0
p
1
0
0
p
2
K
7
8
FK5C
FK5B
FK96
FK5A
+3V3
FK94
FK93
RES
FK91
2
K
7
9
1
0
0
p
5K54
30R
FKZB
FKZA
+3V3
9
K
5
0
3
K
9
3
1
0
K
100R RES
R
E
S
FAN-CTRL2
BACKLIGHT-PWM-ANA-DISP
+3V3
3K92
FAN-CTRL1
LED-2
LED-1
KEYBOARD
LED-1
BL-SPI-SDO
FAN-DRV
SDA-BL
TACH02
SCL-BL
TACH01
BACKLIGHT-PWM_BL-VS
BL-SPI-CSn
BL-SPI-CLK
SCL-BL
SDA-BL
RC
LIGHT-SENSOR
Circuit Diagrams and PWB Layouts EN 167 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-28 B14 820400090724 TCON SHARP
TCON Control
18770_553_100121.eps
100218
TCON Control
B14A B14A
2009-12-09 4
2009-11-12 3
2009-10-26 2 8204 000 9072
TCON SHARP
FKBM F7
FKBN F7
FKBP F7
FKBQ F7
FKCD G7
FKBC E7
FKBD E7
FKBE E7
FKBF E7
FKBG E7
FKCG G7
FKCH G7
FKCJ H7
FKCM E6
FKCN E6
FKBWF7
FKBY G7
FKBL F7
FKAA A3
FKAB B3
FKAC B3
FKAD C3
FKAE A7
FKBR F7
FKBT F7
FKBU F7
FKCE G7
FKCF G7
FKAM C7
FKAN C7
FKAP C7
FKAQ C7
FKAR C7
FKAT D7
FKAU D7
FKAV D7
FKBZ G7
FKCA G7
FKCB G7
FKCC G7
FKBB E7
3KBL E12
3KBM E12
3KBN F12
3KBP G12
3KBQ G12
FKBH E7
FKBJ E7
FKBK F7
FKCK H7
FKCL E6
3KBY I3
3KBZ E8
3KCA E2
3KCB G2
5KAA A3
5KAB B3
5KAC B3
5KAD C3
5KAE A6
5KAF B6
5KAG I4
5KAH B5
5KAJ C5
5KAK C5
7KAA-1 E5
7KAA-2 C11
9KAA H10
3KAQ D8
3KAR D8
3KAT D8
3KAU D9
3KAV E8
FKAF B7
FKAH J9
FKAJ J9
FKBV F7
FKAL C7
3KBC G8
3KBD G8
3KBE G8
3KBF G8
3KBG G9
3KBH H10
3KBJ-1 J9
3KBJ-2 J10
FKAWD7
FKAY D7
FKAZ D7
FKBA D7
3KBK D12
2KCZ B13
2KDA B13
2KDB B13
2KDC F2
2KDD F2
3KBR H12
3KBT I12
3KBU I2
3KBW J5
3KAF E5
3KAG C8
3KAH C8
3KAJ C8
3KAK C8
3KAL C8
3KAM C9
3KAN D8
7KAA-3 A16
7KAA-4 E16
7KAB I8
7KAC I3
3KAP D8
2KCB A13
2KCC A13
2KCD A13
2KCE I8
3KAWE8
3KAY E8
3KAZ E8
FKAK C7
3KBB G8
2KCL I3
2KCM B12
2KCN A8
2KCP A9
2KCQ A9
2KCR A10
2KCT A14
2KCV A14
3KBJ-3 J10
3KBJ-4 J10
2KCY B13
2KBF A11
2KBG A11
2KBH A11
2KBJ A11
2KBK B10
3KAA E3
3KAB E3
3KAC E3
3KBV I5
3KAE F3
2KBR B11
2KBT B11
2KBU B12
2KBV B12
2KBWB12
2KBY A12
2KBZ A12
2KCA A13
2KCF I3
2KCG I5
2KCH J3
3KBA E9
2KCK I5
2KAT A7
2KAU A8
2KAV A8
2KAWA8
2KAY A8
2KAZ A9
2KBA A9
2KBB A10
2KCWB12
2KBE A11
2KBL B10
2KBM B10
2KBN B11
3KAD E3
2KBQ B11
2KAP A7
2KCJ I4
2KAR B7
2KBC A10
2KBD A10
2KAB A2
2KAC A3
2KAD A3
2KAE B3
2KAF B3
2KBP B11
1KAA E2
2KAA A2
2KAQ B7
2KAG C3
2KAH C3
2KAJ C3
2KAK C3
2KAL A6
2KAM A6
2KAN A7
FKCP E6
FKCQ F6
FKCR F6
FKCT F6
FKCU F6
FKCV F6
FKCWF6
FKCY F6
FKCZ F6
FKDA F7
FKDB B2
FKDC C7
FKDD I5
FKDE D7
CKAA J4
7
8
9
10
11
12
VS
V8
DATA
CLK
LATCH
IN
OUT
GAM_LUT
OS_LUT
SCL
SDA
SDI
SDO
SCS
SCK
SDI
SDO
SCS
SCK
VPOL
READY
SSCLK
H_TOTAL
EXCLK
DBG
SLAVE
BIT
OUT
DAC
CS
GCK
R
L GCE
1
2 GPS
R
L LS
GSLOP
R
L
3
2
1
G_LBR_INV
G_LBR
FS
REV
4
5
6
MINI_AGND12
SSCG_AGND
GND
LVDS_AGND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DGND
DGND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MINI_AGND34
MILVC_N3
MILVC_P4
MILVC_N4
MILVC_P5
MILVC_N5
MILVC_P6
MILVC_N6
MILVC_P7
MILVC_N7
MILVCLKC_P
MILVCLKC_N
MILVD_P0
MILVD_N0
MILVD_P1
MILVD_N1
MILVD_P2
MILVD_N2
MILVD_P3
MILVD_N3
MILVD_P4
MILVD_N4
MILVD_P5
MILVD_N5
MILVD_P6
MILVD_N6
MILVD_P7
MILVD_N7
MILVCLKD_P
MILVCLKD_N
MILVA_N5
MILVA_P6
MILVA_N6
MILVA_P7
MILVA_N7
MILVCLKA_P
MILVCLKA_N
MILVB_P0
MILVB_N0
MILVB_P1
MILVB_N1
MILVB_P2
MILVB_N2
MILVB_P3
MILVB_N3
MILVB_P4
MILVB_N4
MILVB_P5
MILVB_N5
MILVB_P6
MILVB_N6
MILVB_P7
MILVB_N7
MILVCLKB_P
MILVCLKB_N
MILVC_P0
MILVC_N0
MILVC_P1
MILVC_N1
MILVC_P2
MILVC_N2
MILVC_P3
MILVA_P0
MILVA_N0
MILVA_P1
MILVA_N1
MILVA_P2
MILVA_N2
MILVA_P3
MILVA_N3
MILVA_P4
MILVA_N4
MILVA_P5
RC4_P
RC4_N
RD4_P
RD4_N
RE4_P
RE4_N
RCLK4_P
RCLK4_N
TEN
DMA
TMC1
TMC2
TRST
TEST_L_0
TEST_L_1
TEST_L_2
TEST_C
SS_OUT
ROM_ACC
RESET
SELLVDS
HSCAN
VSCAN
TEMP_0
TEMP_1
TEMP_2
MODE_0
MODE_1
MODE_2
RE1_P
RE1_N
RCLK1_P
RCLK1_N
RA2_P
RA2_N
RB2_P
RB2_N
RC2_P
RC2_N
RD2_P
RD2_N
RE2_P
RE2_N
RCLK2_P
RCLK2_N
RA3_P
RA3_N
RB3_P
RB3_N
RC3_P
RC3_N
RD3_P
RD3_N
RE3_P
RE3_N
RCLK3_P
RCLK3_N
RA4_P
RA4_N
RB4_P
RB4_N
RA1_P
RA1_N
RB1_P
RB1_N
RC1_P
RC1_N
RD1_P
RD1_N
GND VIA GND_HS
SW COMP
EN
VIN
SS FB
BS
MINI_AVDD34
MINI_AVDD12
VDD12
SSCG_AVDD
DVCC
DVCC
VDD12
LVDS_AVDD
DVCC
VDD12
VDD12
VDD12
VDD12
VDDQ
VDDQ
VDD33
VDD33
VDD33
VDDQ
VDDQ
A
B
C
D
E
K
L
A
B
C
D
E
F
14 15 16 17
1 7 8 9 10 11 12 13 14 17
F
G
H
J
1 2 3 4 5 6 7 8 10 11 12 13
2 3 4 6
NC
G
H
I
J
K
L
15 16 5
I
9
10u
2KAG
VDD33
5KAF
30R
VCC_1V2
2KBA
100n
3KBB
100R
6.3V
47u 2KC
G
E20
E19
E1
H3
VDD12
V3
J2
J3
J1
P2
V1
J22
H20
H21
H19 U1
U2
U3
T2
T3
T1
R1
P3
R3
R2
V2
M3
L1
L2
L3
H1
G1
H2
J21
J20
F22
E22
G19
F19
N1
K1
K2
K3
N2
N3
M1
M2
7KAA-1
UPD809900F1-S11-KNB-A
G20
F20
CONTROL
3KBT
100R
VDDQ
100R
3KBM
FKDD
3KBN
100R
1n0
2KAR
SSCG_AVDD
FKAE
1n0
2KAK
FKAD
30R
5KAA
2KAZ
10n
3KBD
100R
3KAF
2K2
E9
V9
V13
H9
RES
J8
K8
P8
R8
R9
R13
R14
R15
E14
E13
E10
N18
M18
J18
H18
E18
E15
E12
AB8
E11
E8
E5
H5
J5
T5
V5
V8
V15
AB1
V18
T18
R18
N19
M19
D19
D18
D15
D12
AA1
D11
D8
D5
W9
W10
W13
W14
W15
W18
Y1
W19
V19
T19
R19
D4
H4
J4
M4
R4
T4
W1
V4
W4
W5
W8
B6
Y8
Y15
W20
M20
D1
C17
C12
C11
C6
AA8
AA15
W21
M21
G21
C1
F21
E21
B17
B12
B11
G22
D22
C22
B22
B1
A22
A17
A12
A11
A6
N11
N12
K13
L11
M11
M12
L12
AA22
Y22
W22
M22
J9
K9
P9
P13
P14
J13
L10
AB22
M10
N10
N5
K15
J15
H13
K14
J14
A1
AB15
P15
H15
H14
7KAA-4
UPD809900F1-S11-KNB-A
GND
K4
N4
K5
FKCQ
FKCR
2KBR
1u0
1u0
2KBP
1u0
2KBK
FKBB
60R
5KAC
1n0
2KAH
FKAZ
1n0
2KAD
FKDB
FKDC
FKCJ
100n
2KAU
FKAT
FKAV
100n
LVDS_AVDD
2KBC
FKAA
SGND2
2KCJ
10n
100R
FKCF
3KBA
SGND2
cKAA
VDDQ
2KBN
100n
100n
2KBL
100R
3KAG
3KAP
100R
FKCA
FKBY
10u
2KAL
3KBY
100K
3KBR
2KAC
100R
10u
2KAA
10u
FKCN
VDD12
2KBT
100n
100n
2KBQ
FKBV
FKBT
F3
F4
G2
L22
FKCC
J19
F2
K21
K20
K19
G4
F1
E2
E3
E4
C2
A18
B18
A13
B13
A7
B7
A2
B2
P1
H22
A8
B3
A3
C19
C18
C14
C13
C8
C7
C3
B20
A15
B15
A9
B9
A4
B4
B19
A19
B14
A14
B8
A5
C21
C20
C16
C15
C10
C9
C5
C4
A20
L21
L20
L19
B21
A21
B16
A16
B10
A10
B5
P21
P20
N22
V22
U20
U21
T22
R20
P22
N20
N21
AB18
Y19
AB20
Y21
AA21
V21
V20
U22
T21
T20
AA16
Y16
AB17
AA18
Y18
AA20
Y20
AB21
AB16
Y17
AA17
AB13
Y14
AA14
AB5
AA5
AB12
AA12
AB19
AA19
R22
R21
AA11
Y11
AA13
Y13
AB14
AB9
Y10
AA10
AB11
Y12
AB2
Y3
AA3
AB4
Y5
AB6
Y7
AA7
AA9
Y9
AB10
G3
K22
AA2
Y2
AB3
AA4
Y4
AA6
Y6
AB7
7KAA-2
UPD809900F1-S11-KNB-A
INTERFACE
1
8
FKAB
3KBJ-1
10K
100R
FKCG
3KAZ
FKCE
FKCD
3KAM
100R
FKCV
2KBB
10n
VDD33
3KAN
100R
FKDA
FKBZ
3n3
2KC
H
3KAD 10K
10K
3KAE
100R
3KAV
FKAP
FKCL
100n
2KBE
100R
3KAU
3KAT
100R
10u
2KAN
FKCB
100n
2KBJ
2KBG
100n
10n
2KBH
VDD33
2KAQ
10u
VDD12
2KC
D
100n
FKCU
2K2
3KBH
R
ES
FKAU
FKAW
FKAM
mini_AVDD
5KAD
60R
1n0
2KAF
1n0
2KAM
FKCW
FKCT
FKAQ
100R
3KBC
VDD33
FKAN
100R
3KBK
+VDISP
5
4 9
8
3
10 11
2 MP2301ENE-LF
7KAC
1
6
7
60R
5KAB
100n
2KC
B 30R
5KAE
3KAK
100R
10u
2KAJ
R
ES
VDD12
3KC
B
100R
2KAB
VCC_3V3
1n0
1K0
3KAB
3KBQ
100R
10n
2KC
C
FKAK
2KBF
10n
FKCK
FKDE
VDD12
mini_AVDD
VDD33
FKBW
FKBU
100R
3KAY
SSCG_AVDD
LVDS_AVDD
FKBE
mini_AVDD
FKAR
FKBD
2KBU
1u0
FKBJ
10K 3KAC
3KBZ
100R
100R
3KBJ-4
4
5
3KAW
100n
2KC
T
10K
VDD33
100n
2KD
A
2KC
Z
100n
100n
100n
2KC
W
2KC
Y
100n
2KC
R
100n
2KC
P
2KC
Q
100n
VCC_3V3
10u
2KAE
A0 7
A1 6
A2 5
G
N
D
4
OS 3
SCL 2
SDA 1
7KAB
LM75BDP
+VS
8
R
ES
10n
2KBD
2KD
D
100n
R
ES
100n
2KD
C
R
ES
100R
3KC
A
60R
5KAK
60R
5KAH
5KAJ
60R
4u7
2KC
F
3
6
2
1
3
10K
3KBJ-3
24M 1KAA
SGND2
FKCH
2KC
V
100n
100n
2KD
B
1u0
2KBW
3KAL
100R
10n
2KC
A
1n0
2KAP
100R
3KBF
100n
2KC
M
2KBV
100n
LVDS_AVDD
FKCZ
FKCY
FKAH
FKAJ
3KAH
100R
3KBG
100R
3KBU
1K8 0.5%
100R
3KAQ
3KAR
FKBQ
100R
FKBR
2KBM
1u0
FKBF
4n7
2KCL
3KBE
100R
100R
W12
3KBP
U18
W2
P18
E16
E7
D21
D3
W3
D20
W7
W11
V17
D2
W16
U19
P19
D16
D7
V7
V11
V12
V16
E6
L18
U5
W6
W17
D17
D6
F5
G5
V6
R10
R11
R12
N15
H11
H10
U4
K18
G18
F18
E17
J12
J11
J10
M8
K10
N13
M13
L13
K12
K11
N8
V14
H8
L8
L9
M9
N9
P10
P11
P12
N14
R5
M15
L15
H12
M14
L14
D14
D13
D10
D9
V10
L4
P5
L5
P4
M5
7KAA-3
UPD809900F1-S11-KNB-A
POWER
3KBL
100R
2KCE
100n
2KBZ
100n
FKCM
100R
3KAJ
VDDQ
FKBN
FKAF
3KBV
7K5
SSCG_AVDD
10n
2KAT
2KAV
10n
10n
2KC
N
FKBC
FKBA
FKAL
FKAY
FKBH
FKBG
15K
SGND2
3KBW
VCC_3V3
9KAA
FKBL
100n
2KAY
2KAW
100n
FKAC
VCC_1V2
FKCP
1M
0
3KAA
FKBP
2KBY
10n
2
7
3KBJ-2
10K
FKBK
FKBM
22u
2KC
K
R
ES
4u5
SSCG_AGND
LVDS_AGND
MINI_AGND
5KAG
LVDS_AGND
MINI_AGND
SSCG_AGND
LVDS_AGND
MINI_AGND
SSCG_AGND
SDI
U_D
CS1
GSLOP
G_LBR_INV
G_LBR
GSP2
GSP1
GOE_R
GOE_L
GCK_R
GCK_L
R_L
BIT_SCS
BIT_SDO
CS12
CS11
CS10
CS9
CS8
CS7
CS6
CS5
CS4
CS3
CS2
MODE2
SCK
SCS
SDO
SDI
BIT_SCK
BIT_SDI
SDA-TCON
SCL-TCON
PX3C-
PX3D+
PX3D-
PX3E+
PX3E-
OS_ON-OFF
100Hz_120Hz
PX3CLK-
PX3CLK+
PX3A+
PX3A-
PX3B+
PX3B-
PX3C+
PX4D+
PX4C-
PX4C+
PX4B-
PX4B+
PX4A-
PX4A+
PX1A-
PX4CLK-
PX4CLK+
PX4E-
PX4E+
PX4D-
PX1E+
PX1D-
PX1D+
PX1C-
PX1C+
PX1B-
PX1B+
PX1A+
PX2D+
PX2C-
PX2C+
PX2B-
PX2B+
PX2A-
PX2A+
PX1E-
EN
PX1CLK-
PX1CLK+
PX2CLK-
PX2CLK+
PX2E-
PX2E+
PX2D-
SELLVDS
RESET R_LVB3+
R_LVB3-
R_LVB4+
R_LVB4-
R_LVB5+
R_LVB5-
R_LVCKB+
R_LVCKB-
R_LVCKA+
R_LVCKA-
R_LVB0+
R_LVB0-
R_LVB1+
R_LVB1-
R_LVB2+
R_LVB2-
R_LVA2+
R_LVA2-
R_LVA3+
R_LVA3-
R_LVA4+
R_LVA4-
R_LVA5+
R_LVA5-
L_LVB5+
L_LVB5-
L_LVCKB+
L_LVCKB-
R_LVA0+
R_LVA0-
R_LVA1+
R_LVA1-
L_LVB1+
L_LVB1-
L_LVB2+
L_LVB2-
L_LVB3+
L_LVB3-
L_LVB4+
L_LVB4-
L_LVA4+
L_LVA4-
L_LVA5+
L_LVA5-
L_LVCKA+
L_LVCKA-
L_LVB0+
L_LVB0-
REV
L_LVA0-
L_LVA1+
L_LVA1-
L_LVA2+
L_LVA2-
L_LVA3+
L_LVA3-
FS
LS_L
LS_R
L_LVA0+
LVDS_AGND
EN 168 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
TCON DC/DC
18770_554 _100121.eps
100121
TCON DC/DC
B14B B14B
2009-12-09 4
2009-11-12 3
2009-10-26 2 8204 000 9072
TCON SHARP
1KFA B3
1KFB B3
2KFA B9
2KFM C12
2KFN C12
2KFP E10
2KFQ E11
2KFB B9
2KFC B9
2KFD B10
2KFE B11
2KFG B12
2KFH B13
2KFK B13
2KHT B7
2KHU B8
2KFR E11
2KFT E11
2KFU F10
2KFV F10
2KFW F10
2KFZ J12
2KGA I10
2KGB I10
2KGG E7
2KGH E7
2KGJ D7
2KGN F14
2KGP F14
2KGQ F15
2KGR F15
2KGT F16
2KGU F15
2KGV F9
2KHH L5
2KHK B13
2KHN B6
2KFL B13
2KHWJ12
3KFA B9
3KFB C9
3KFC C11
3KFD C11
3KFE B12
3KFF C12
3KFG D10
2KGC F8
2KGD E7
2KGE E7
2KGF E7
3KFM F14
3KFN F14
3KFP E15
2KGK C8
2KGL C9
2KGM E13
3KFU J14
3KFV J13
3KFW I12
3KFY I9
3KFZ I9
3KGA K6
2KGWE15
2KGY B2
2KGZ B3
2KHG B11
3KGF E6
3KGG I12
5KFA B10
2KHP B7
2KHQ B7
2KHR B7
6KFA B11
6KFB F14
6KFC E16
6KFD J13
6KFE B4
6KFF I6
7KFA-1 D8
7KFA-2 G8
3KFH D12
3KFJ E11
3KFK E9
3KFL E9
7KFF F9
9KFB-1 A10
9KFB-2 A10
3KFQ F16
3KFR B4
3KFT J13
9KFC-2 A12
9KFC-3 A12
9KFC-4 B12
9KFD F7
9KFE-1 I13
3KGB K5
3KGC L5
3KGD F7
3KGE D7
FKFA J14
FKFB E15
FKFC B4
5KFB B2
5KFC B2
5KFD E14
FKFD B14
FKFH I5
FKFJ L5
7KFB J13
7KFC J13
7KFD B12
7KFE B10
FKFK E16
cKFA F8
9KFB-3 A10
9KFB-4 B10
9KFC-1 A12
9KFE-2 I13
9KFE-3 I13
9KFE-4 I13
9KFF L5
FKFE C5
FKFG H5
VIA VIA
VIA
VIA
DRN
COM
VREF
FBN
NOUT
CB
1
2
FBL
LDO-CTL
LDO-FB
TEMP
FBP
C1
P
N C2
LX
LXL
PGND
PVIN SUPP
SU
PN
AG
N
D
G
N
D
_H
S
COMP
HVS
EN
PROT
P
N
CTL
CDEL
VL
CM2
1
2
FBB
RSET
POUT
J
K
L
A
B
C
H
I
J
K
L
1 6 7 8 9 10 11 12 13
5 6 7
FOR DEBUG ONLY
14 15 16 17
11 12 13 14 15 16
D
E
F
G
D
E
F
2 3 4 5
1 2 3 4 8 9 10 17
A
B
C
G
H
I
DISPLAY INTERFACING - VDISP
FKFH
FKFG
RES
5
6
7
8
4
1
2
3
FDS9435A
7KFD
10n
2KG
V
R
ES
SGND1
3KFD
3K3
22u
2KG
Y
100n
2KG
A
R
ES
2K2
2KFC
R
ES
3KFA
100n
RES
3.0A 32V T
1KFA
3KFG
2K2
SGND1
3KFJ 39K
2u2
2KG
KVG
L_-6V
100p
2KG
B
3 6 9KFC-3
9KFF
2u2
2KFD
RES
3
1
2
7KFC
2N7002
FKFA
10u
2KFB
2u2
2KFA
2KG
N
1n0
R
ES
25V
47u 2KFH
4u7
2KH
W
4u7
2KG
L
1 8
VLS_15V6
10n
2KFG
9KFC-1
0.5%
3KFT
R
ES
R
ES
2KGJ
13K
4n7
RES
2K2
3KGF
5KFA
6u8
SGND1
4n7 2KGF
1u0
2KGM
SGND1
SGND1
3KFN
12K
44
45
46474849
50
42
51
52
53
54 55 56 57
43 VIA
7KFA-2
ISL97653AIRZ
100n
2KG
Z
220n 2KFT
FKFD
4 5
R
ES
10u
2KFK
4 5
9KFE-4
2 3
9KFC-4
7KFB
2SB1767
RES
1
100n 2KGH
2u2
2KG
R
R
ES
VCC_3V3
4
2
6KFF
RB550EA
1
3
5
FKFJ
9KFE-1 1 8
13K
0.5%
R
ES
3KG
G
+VDISP
RES 2K2 3KFL
2KFN
1n0
R
ES
3KFC
39K
2KFE
6KFB
SS24
1
2
3
10u
FDS9435A
7KFE
5
6
7
8
4
+VDISP-INT
30R
5KFB RES
RES 9KFB-1 1 8
820p 2KFR
VLS_15V6
+VDISP
SGND1
2u2
2KFL
R
ES
2KH
R
10u
R
ES
R
ES
VCC_3V3
2KH
Q
10u
R
ES
3KFF
100K
3KG
C
16K
2 7
9KFD
9KFE-2
4u5
5KFD
9KFC-2 2 7
cKFA
100p 2KGW
3KFY
27K
SGND1
SGND1
3KGE
10K
R
ES16V
22u 2KFWR
ES
R
ES
2KFV
2u21n0
2KG
P
75K
3KG
B
VGH_35V
10K
3KFU
+VDISP
FKFK
RES 9KFB-3 3 6
SGND1
RES 9KFB-2 2 7
100n
2KH
H
R
ES
2u2
2KG
C
RES
1
2
3
SGND1
VLS_15V6_B
7KFF
KTA1718D
4u7 2KGE
16V
22u
2KG
T
6KFA
SS34
RES
SGND1
3KFK 2K2
RES 100n 2KFP
3KFQ
2K2
22u
2KG
Q
SGND1
VGL_-6V
3KFR
2K2
FKFE
LTST-C190KGKT
6KFE
FKFC
FKFB
10u
2KH
G
220n 2KFQ
R
ES
3KFE
39K
1
3
5
4
2
6KFC
RB550EA
R
ES
10u
2KH
P
RES
2K2
3KFH
RES
VCC_1V2
5KFC RES
30R
1KFB
3.0A 32V T
VLS_15V6
SGND1
3KFV
3K6
R
ES
100n
2KFZ
2KGD
R
ES
VLS_15V6_B
220n
3KGA
75K
R
ES
10u
2KH
T
100n
2KH
N
1n0
2KFM
+VD
ISP
R
ES
3KFZ
750K
6KFD
PM
EG
1030EJ
R
ES
16V
47u 2KH
U
9KFE-3 3 6
0.5%
R
ES
VGH_35V
3KG
D
13K
2KH
K
10u
100n 2KGG
R
ES
381
28
12
31
9
10
35
3
4
13
32335614
21
36
26
29
8
11
20
41
27
40
39
34
16
15
18
17
2 25
7
22
30
24
23

ISL97653AIRZ
7KFA-1
373KFM
20K
2u2
2KFU
R
ES
VCC_3V3
16V
22u 2KG
U
R
ES
3KFP 240K
3KFB
10K
9KFB-4 4 5
R
ES
3KFW
2K2
RES
VGL_FB
VGH_FB
VLS_FB
GSLOP
RESET
GSLOP
Circuit Diagrams and PWB Layouts EN 169 Q552.1E LA 10.
2010-Feb-19
back to
div. table
P Gamma & VCom & Flash
18770_555 _100121.eps
100121
P Gamma & VCom & Flash
B14C B14C
2009-12-09 4
2009-11-12 3
2009-10-26 2 8204 000 9072
TCON SHARP
-BUS
CTRL FIL
I 2 C INP
INPCOM|DVR_OUT
REFIN_INN
REFIN
SET
SCL
SDA
SET_COMP
V_THERM
BANKSEL
GND_HS
VIA
GND
OUT10
OUT11
OUT12
OUTCOM
INNCOM
AVDD
OUT1
OUT2
OUT3
OUT4
OUT5
INN5
OUT6
INN6
OUT7
INN7
OUT8
INN8
OUT9
VSD
SI
SO
CS
HOLD
WP
SCK
2KQA B2
NC
5 6 7 8
2KQB B2
2KQC B3
2KQD B4
2KQE B4
2KQJ D8
2KQK D8
2KQM E7
2KQN E7
2KQP E8
1 7 8 9 10 11
NC
F
17
1 2 3 4
G
H
I
J
9 10
B
C
D
E
16 17
A
B
C
K
L
1KQA E15
1KQB G15
2HRK C12
I
J
K
L
A
2KQF B5
2KQG D7
2KQH D7
3KRA E9
3KRB E9
3KRC E9
3KRD F9
3KRE F9
2KQQ E8
2KQR G7
2 3 4 5 6
2KRA G4
2KRB G5
2KRH I8
2KRJ C12
2KRL C13
12 13 14 15 16
3KQB B3
3KQC B2
3KQD C3
3KQE C2
3KQF D3
NC
11 12 13 14 15
3KQH-3 C7
3KQH-4 C7
3KQJ C9
3KQK C9
3KQL C9
D
E
F
G
H 3KQT D9
3KQU D9
3KQWE9
3KQY E9
3KQZ E9
3KRF F9
3KRG G4
2KQT G7
2KQU G8
2KQWG8
2KQY G4
2KQZ G3
3KRL-3 E7
3KRL-4 E7
3KRM-1 G8
3KRM-2 G8
3KRM-3 G7
2KRM C13
2KRN C14
2KRQ D13
2KRT G5
3KQA B2
3KTH K7
3KTJ K7
3KTK I9
3KTL I10
3KTM K9
3KQG B5
3KQH-1 C8
3KQH-2 C8
3KTR G8
3KTT K10
3KTU B11
3KTV B11
3KTWB12
3KQM C9
3KQN C9
3KQP C9
3KQQ C9
3KQR D9
3KYD B14
3KYE C13
3KYF C14
3KYG C14
3KYH G14
3KRH G5
3KRJ G4
3KRK G4
3KRL-1 E8
3KRL-2 E8
3KYM G2
3KYN H2
3KYP G6
3KYQ G6
6KQA H6
3KRM-4 G7
3KTD I6
3KTE I7
3KTF I9
3KTG K9
9KQA C9
9KQB C9
9KQC D9
9KQD E9
9KQE E9
VCOM BUFFER
3KTN K9
3KTP D3
3KTQ E3
9KQF F9
9KQG-1 F4
9KQG-2 F4
9KQG-3 F4
9KQG-4 F4
3KTY C12
3KTZ C12
3KYA B12
3KYB B13
3KYC B13
FKMA C10
FKMB C10
FKMC C10
FKMD C10
FKME C10
3KYJ G14
3KYK C13
FKMH D10
FKMJ D10
FKMK E10
FKML E10
FKQA E14
7KQA B4
7KQB J8
7KQC H4
7KQD G4
7KQH D13
FKQG B15
FKQH B15
FKQJ B15
FKQK B15
FKQL B15
FKYE F10
FKYF F10
FKYG E12
FKYH D12
I2C SWITCH (VGA VCOM)
ASIC OPTIONS
FKQM C15
9KQH G12
9KQJ G12
9KQK H12
FKLY G2
FKLZ C10
FKQWD3
FKYA E10
FKYB E10
FKYC E10
FKYD E10
FKMF C10
FKMG D10
100K
6K2
10K
39K
2K7
FKQB E14
FKQC F14
FKQD F14
FKQE F14
FKQF G13
NC
cKQB F5
NC
DEBUG ONLY

32 INCH
FKQP J9
FKQQ F4
FKQR D3
FKQT D3
FKQU F14
40/46/52 INCH
3KQA
3KQC
3KQE 3K9
2K0
R
ES
3KTZ
R
ES
3KTT
2K2
FKLY
9KQB
FKYE
FKYC
FKYD
FKYB
R
ES
2KR
M
1n0
R
ES
1n0
2KR
L
FKQL
FKQW
FKML
FKYA
FKMK
2KR
Q
FKMJ
R
ES
100n
FKMC
100n
2KQ
U
3KTM
2K2
7 SD1 2 SDA
3
VDD
6
VSS
7KQH
PCA9540B
5 SC0
8 SC1
4 L C S 1 SD0
9KQJ
RES
RES
FKQR
cKQ
B
2K2
3KTJ
R
ES
2KQ
P
100n
100n
2KQ
N
4K7
3KTF
2K2
3KTG
R
ES
FKYH
FKYG
FKQQ
FKYF
R
ES
1n0
2KR
N
6
9KQ
G
-4
4
5
3KR
M
-3
10R
3
RES 9KQH
FKQD
FKQC
FKQB
5
6
7
8
9
10 11
FKQA
502382-0970
1
2
3
4
FKMA
RES
1KQA
9KQ
G
-1
1
8
0R
51
3KR
K
FKMF
FKMD
FKMG
FKME
FKQT
3KTN
2K2
9KQF
R
ES
+VDISP
3KTE
2K2
R
ES
VCC_3V3
R
ES
2K2
3KTL
3KTH
2K2
R
ES
100R 3KRA RES
100n
2KR
A
R
ES
1
8
10R
2
7
10R
3KR
L-1
3
6
3KR
L-2
4
5
10R
3KR
L-3
3KR
L-4
10R
31
100n
2KQ
Q
28
30
34
35
36
37
38
39
40
41
29
10
16
18
19
25
32
1
13
12
26
27
2
22
23
24
3
4
7
8
521
14
62033
9
11
15
17
ISL24837IRZ-T13
7KQA
VREF_15V2
3KYB
2K0
R
ES
2
7
1n0
2KR
J
10R
3KR
M
-2
R
ES
3
6
3KQQ 100R
9KQ
G
-3
RES
RES
100R 3KQP
VCC_3V3
RES 9KQK
10K
3KYH
3KYJ
10K
R
ES
VCC_3V3
R
ES
3KTW
2K0
R
ES
3KR
G
0R
51
0.5%
3KRJ
750R
3KR
H
1K0
0.5%
FKMB
FKLZ
FKMH
FKQF
1
2
3
4
5 6
RES
1KQB
502382-0470
2K2
3KYK
RES 100R 3KRE
3KTR
2K2
VCC_3V3
10K
3KTQ
R
ES
3KTP
10K
2KQ
E
100n
100n
2KQ
D
VLS_15V6
10u
2KQ
Y
68p
2KR
B
VCC_3V3
100n
2KQ
C
3
FKQP
FLASH

(32K) 1
4
7
6
5
2
8 AT25DF321-SU
7KQB
2KQ
T
100n
3KQ
D
18K
0.5%
RES 100R 3KRD
100n
2KQ
R
3KQ
C
6K2
0.5%
3KR
M
-1
10R
1
8
3KQN 100R
RES
RES
9KQA
100R 3KQM
PBSS5330X
7KQC
7KQD
PBSS4540X
RES 100R 3KQW
9KQD
2K2
3KTV
FKQU
10u
2KQ
F
2KQ
J
100n
10R
4
5
3
6
3KQ
H
-4
2
7
10R
3KQ
H
-3
3KQ
H
-2
10R
2K2
3KYA
10R
3KR
M
-4
4
5
2KQ
W
100n
9KQE
100R 3KRC RES
3KRB 100R RES
2KQ
M
100n
3KQ
A
100K
0.5%
9KQC
VLS_15V6 VLS_15V6
RES 3KQR 100R
3KQ
B
22K
0.5%
VREF_15V2
R
ES
3KYN
10K
10K
3KYM
R
ES
2KR
H
4u7
2K2
3KTY
100R 3KQT RES
2H
R
K
1n0
R
ES
FKQJ
FKQK
3KYF
2K2
16V
22u 2KQ
Z
3KQ
E
10K
0.5%
3KQ
G
2K2
0.5%
9KQ
G
-2
2
7
6KQ
A
M
SS1P4
3KTK
2K2
3KRF 100R
R
ES
VREF_15V2
RES
R
ES
10K
3KYQ
R
ES
3KYP
10K
100n
2KR
T
R
ES
100R
RES
RES 3KQK
100R 3KQL
RES 3KQJ 100R
FKQE
2K2
3KTD
3KQ
U
2K2
R
ES
3KQF
3K3 0.5%
VLS_15V6
FKQM
3KTU
2K2
VCC_3V3
3KYG
2K0
2KQ
G
100n
100n
2KQ
H
3KQZ 100R RES
RES 3KQY 100R
10R
3KQ
H
-1
1
8
100n
2KQ
K
1u0
2KQ
A
3KYD
2K0
R
ES
3KYE
2K2
R
ES
2K0
3KYC
1u0
2KQ
B
FKQG
FKQH
EN
BYPASS_MODE
VCC
EN
OUTCOM
OUTCOM
SDA-DISP
SCL-DISP
SDA-TCON
SCK
SDO
SCS
SDI
WP
VCC
SCL-TCON
SDA-TCON
CTRL-DISP
SCK
VGA-SDA-EDID-TCON
SDA-TCON
SCL-TCON
VGA-SCL-EDID-TCON
SCL-TCON
BYPASS_MODE
VL255
SCS
VCOM
SDI
SELLVDS
R_L
WP
SDO
SCL-TCON
SDA-TCON
100HZ_120HZ
OS_ON-OFF
U_D
MODE2
INNCOM
VL0
VH0
VL247
VL191
VL159
VL127
VH159
VH127
VH191
VH95
VH63
VL95
VL31
VL159
VL63
VL95
VH247
VH159
VH191
VH95
VL191
VL127
VH127
VH255
CS_L
CS_H
INNCOM
OUTCOM
SCL-TCON
SDA-TCON
VH63
VH31
VL63
EN 170 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
MPD
18770_556_100121.eps
100121
MPD
B14D B14D
2009-12-09 4
2009-11-12 3
2009-10-26 2 8204 000 9072
TCON SHARP
VIA VIA
VIA VIA
EP
NC
V+
-
+
V-
EP
NC
V+
-
+
V-
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
+
REFL
REFH
7
6
5
4
3
2
1
AVDD
VIA
-
GND_HS GND
NC
OUTB
OUTA
-
INA
+
INB
IN
OUT1
EP
NC
V+
-
+
V-
VIA VIA
VH1 VH2
V
C
O
M VL2 VL1 VLS
OA3
OB3
OA4
OB4
OA5
OB5
OA6
OB6
OA7
OB7
VIA
GND_HS DGND AGND
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
EN
CH
ST|NC
VCC
OA1
OB1
OA2
OB2
EP
NC
V+
-
+
V-
VIA VIA
3KUA B1
3KUB B1
3KUC B1
3KUD C1
3KUE B3
3KUN-3 I13
3KUN-4 I13
3KUP-1 I11
3KUP-2 I12
3KUP-3 I12
3KUP-4 I12
3KUQ-1 I10
3KUQ-2 I11
3KVA B9
7KUA-1 B2
7KUA-2 C2
7KUB-1 C2
7KUB-2 E2
7KUC-1 B8
7KUC-2 C8
7KUD-1 C8
2KUM D5
2KUN E5
2KUP D2
2KUQ B6
2KUR B6
7KUD-2 E8
7KUE E5
7KUF B12
7KUG B14
7KUH A12
FKUA E11
FKUB F11
FKUC F11
FKUD F11
2KWD B12
2KWE B12
2KWF A14
2KWG C13
2KWH C13
2KWJ I13
2KWK B8
2KWL I13
FKUE G11
FKUF G11
FKUG G11
FKUH G11
FKUK H11
FKUL H11
FKUM H11
FKUN I11
2KWY I11
2KWZ I10
FOR 40 / 46 / 52 INCH
B
3KUF C1
3KUG D1
3KUH D3
3KUJ B9
3KUK B9
3KUL B7
3KUM D7
3KUN-1 I12
3KUN-2 I13
C
D
E
F
G
H
I
2KUA B1
3KUQ-3 I11
3KUQ-4 I11
3KUR B12
3KUT B13
3KUU D1
3KUW A14
3KUY B13
3KUZ B14
2KUK D4
2KUL D4
4 5 6 7 8
2KUT B7
2KUU B7
2KUV A5
2KUW D8
2KUY D6
2KUZ D6
2KWA D7
2KWB D7
2KWC E6
12 13 14
1 2 3 4 5
2KWM I13
2KWN I12
2KWP I12
2KWQ I12
2KWR I12
2KWT I11
2KWU I11
2KWWI11
C
D
E
F
G
H
I
A
B
2KUB B1
2KUC B2
2KUD B3
2KUE B4
2KUF B4
2KUG B4
2KUH B5
2KUJ D3
2 3 9 10
FOR 32 INCH
NC
NC
NC
11
4 1 2 1 1 1 0 1 9 8 7 6
A
1
7KUA N Y
13
N Y
2KUB
Y
2KUY N Y
2KWA
N Y
3KUD N Y
Y
3KUG Y
7KUD N Y 3KVA Y Y
3KWK Y
Y
ITEM NO 40 INCH 46/52 INCH
2KUA
ITEM NO 40 INCH 46/52 INCH
N Y
2KUF N Y
2KUH N
2KUW N
Y
2KUT Y Y
2KUV
N Y
3KUA N Y
3KUB N Y
3KUC
Y Y
2KWC Y Y
3KUF Y
3KUU
Y
3KUJ Y Y
3KUK Y Y
Y Y
Y
7KUB Y Y
7KUC Y Y
7KUE Y
2KUK Y Y
2KUM Y Y
2KUN
Y
Y Y
2KUQ Y
1
0
0
n
2
K
U
R
R
E
S
2
K
U
G
1
0
0
n
R
E
S
40
41
42
18
17
10
11
34
35
36
37
38
39
4
5
6
7
8
19
20
21
22
23
24
25
13
14
15
16
9
1
2
3
2
8
1
2
3
3
32
31
30
29
27
26
7KUF
ISL24016IRTZ
8
6
7
4
1
0
0
n
2
K
U
Y
9
3
2
1 5
1 5 8
6
7
4
MAX9650ATA
7KUB-1
7KUA-1
MAX9650ATA
9
3
2
R
E
S
2
K
0
3
K
U
C
1
K
0
3
K
U
H
VREF_15V2
0
.5
%
0
.5
%
5
6
K 3
K
U
B
3
K
U
A
9
1
K
0
.5
%
R
E
S
2
K
U
P
1
0
0
n
2
K
U
C
R
E
S
11
12
13
14
15
16
17
18
1
0
0
n
VIA
MAX9650ATA
7KUA-2
10
19
VIA
10
19
11
12
13
14
15
16
17
18
7KUB-2
MAX9650ATA
1
6
V
2
2
u 2
K
U
T
+VDISP
+VDISP
2
K
U
Q
1
0
0
n
2
K
U
M
1
0
0
n
1
0
0
n
2
K
U
N
VLS_15V6
2
K
W
C
1
0
0
n
1
0
0
n
2
K
U
B
4
u
7
2
K
U
A
VREF_15V2
R
E
S
1
n
0
2
K
W
H
2
K
W
G
R
E
S
1
n
0
3
K
U
G
1
2
K
0
.5
%
3
K
U
F
1
6
K
3
K
U
D
3
9
K
0
.5
%
11
12
13
14
15
16
17
18 0
.5
%
7KUC-2
MAX9650ATA
VIA
10
19
+VDISP
+VDISP
62R 0.5%
3KUY
0.5% 33R
3KUT
+VDISP
3
K
U
R
1 5 8
6
7
4
1
R
0 MAX9650ATA
7KUC-1
9
3
2
R
E
S
R
E
S
2
K
0
3
K
U
L
3
K
U
M
2
K
0
2
K
U
U
1
n
0
R
E
S
R
E
S
1
n
0
2
K
W
B
2
K
U
Z
1
0
0
n
R
E
S
R
E
S
1
0
0
n
2
K
U
L
43
44
45
46
47
48
49
50
1
7
1
6
3
6
1
8
3
4
3
5
42
51
52
53
54
55
56
57
31
29
27
25
23
21
19
33
3
8
40
1
5
39
4
1
32
30
28
26
24
22
20
11
13
3
7
2
4
6
8
10
12
14
MAX17079GTL
7KUE
1
3
5
7
9
VCC_3V3
1
6
V
2
K
W
E
2
K
W
D
R
E
S
1
0
0
n
2
2
u 1
6
V
2
2
u 2
K
U
F
1
0
0
n
2
K
U
H
1
6
V
2
2
u
2
K
W
A
2
K
W
K
1
0
0
n
3KVA
10K
3KUU
10K
0.5%
0
.5
%
1
1
K
3
K
U
Z
1
3
K
3
K
U
W
0
.5
%
VREF_15V2
7KUG
NJM2125F 1
3
4
5
2
4
7
0
n
2
K
U
W
1
0
0
n
2
K
W
F
3
K
U
Q
-1
1
8
1
0
R
3
K
U
E
2
K
0
R
E
S
2
K
U
J
1
n
0
R
E
S
1
n
0
2
K
U
D
1
6
V
R
E
S
R
E
S
2
K
U
E
2
2
u
2
K
U
K
2
2
u
1
6
V
3
6
3
K
U
P
-4
4
5
1
0
R
3
K
U
P
-3
1
0
0
n
2
K
W
N
1
0
R
16
17
18
VIA
MAX9650ATA
7KUD-2
10
19
11
12
13
14
15
5 8
6
7
4
7KUD-1
MAX9650ATA
9
3
2
1
+VDISP
VREF_15V2
2
K
U
V
1
0
0
n
0
.5
%
4
K
3
3
K
U
K
3
K
U
J
1
1
K
0
.5
%
FKUC
1
0
0
n
2
K
W
W
1
0
0
n
2
K
W
U
1
0
R
3
K
U
Q
-2
2
7
1
0
R
2
7
3
K
U
P
-2
1
0
0
n
2
K
W
M
1
0
0
n
2
K
W
L
1
0
R
3
K
U
N
-4
4
5
FKUD
FKUA
FKUB
1
0
0
n
2
K
W
Z
2
K
W
Y
1
0
0
n
1
0
R
3
K
U
Q
-3
3
6
1
0
R
3
K
U
Q
-4
4
5
1
0
0
n
2
K
W
T
2
K
W
Q
1
0
0
n
2
K
W
R
1
0
0
n
FKUM
FKUN
1
0
R
1
8
1
0
0
n
2
K
W
P
3
K
U
P
-1
FKUK
FKUL
FKUH
FKUG
FKUF
FKUE
1
0
0
n
2
K
W
J
3
K
U
N
-1
1
8
1
0
R
3
K
U
N
-2
2
7
1
0
R
2SC5886A
7KUH 1
2
3
3
K
U
N
-3
3
6
1
0
R
CS11U
CS12U
CS10U
CS9U
CS8U
CS7U
CS6U
CS5U
CS4U
CS3U
CS2U
CS1U
CS6U
CS5U
CS4U
CS3U
CS2U
CS1U
CS2
CS7
CS1
VCOM
RESET
CS11U
CS12U
CS10U
CS9U
CS8U
CS7U
CS_L
CS_H
CS12
CS6
CS11
CS5
CS10
CS4
CS9
CS3
CS8
CS3U
CS2U
CS1U CS1
CS2
CS3
CS4
CS5
CS6
CS_H
CS_L
CS12U
CS11U
CS10U
CS9U
CS8U
CS7U
CS6U
CS5U
CS4U
Circuit Diagrams and PWB Layouts EN 171 Q552.1E LA 10.
2010-Feb-19
back to
div. table
Mini LVDS
18770_557_100121.eps
100121
Mini LVDS
B14E B14E
2009-12-09 4
2009-11-12 3
2009-10-26 2 8204 000 9072
TCON SHARP
FKNT G1
FKNU G1
FKNV G1
FKNW G1
FKPQ F6
FKPR F6
FKPT F6
FKPW G6
FKPY G6
FKPZ G6
FKLK G6
FKMU E1
FKMV E1
FKMW E1
FKNJ F1
FKNK F1
FKNL F1
FKNP F1
FKNQ G1
FKNR G1
3KND-3 F8
3KND-4 F8
3KNE H7
3KNF H7
FKNY G1
FKNZ E6
FKPA E6
FKPB E6
FKPC E6
FKPG E6
FKPH E6
FKPJ E6
FKPK E6
FKPL E6
FKPM F6
FKPN F6
FKPP F6
9KLB A7
FKLA G6
FKLB G6
FKPU F6
FKPV F6
FKLF G6
FKLG E1
FKLH G1
3KMJ A7
3KMK A7
3KML A7
3KMM A7
FKMY E1
FKMZ E1
FKNA E1
FKNB E1
FKNC E1
FKND E1
FKNE E1
FKNF E1
FKNG F1
FKNH F1
3KNA B7
3KNB B6
3KNC-1 C8
FKNM F1
FKNN F1
3KNC-4 C8
3KND-1 F8
3KND-2 F8
3KLT-3 F3
3KLT-4 F3
3KLU H2
3KLV H2
3KNG H7
3KNH I7
3KNJ I7
3KNK I7
3KNL I6
FKPD E6
FKPE E6
FKPF E6
3KNM I7
3KNN I7
3KNP I7
3KNQ I7
3KNR I7
3KNV I7
9KLA A2
3KMC I2
FKLC I4
FKLE G6
3KMF I2
3KMG I2
3KMH I2
3KLE A2
3KLF B2
3KLG B2
3KLH B2
3KMN A6
3KMP B7
3KMQ B7
3KMR B7
3KMT B7
3KMU B7
3KMV B7
3KMW B7
3KMZ B7
3KLP B2
3KLQ B1
3KLR-1 C3
3KNC-2 C8
3KNC-3 C8
3KLR-4 C3
3KLT-1 F3
3KLT-2 F3
8 9
1 2
3KLW H2
3KLY I2
3KLZ I2
3KMA I1
3KMB I2
2KLA H3
2KLB H4
2KLD H8
3KMD I2
3KME I2
3KLB A1
3KLC A2
3KLD A2
C
D
E
F
3KLJ B2
3KLK B2
3KLL B2
3KLM B2
3KLN B2
1 2
3KLR-2 C3
3KLR-3 C3
5 6 7
3 4 5 6 7
A
B
C
2KLE H8
3KLA A2
F
G
H
I
A
B
G
H
I
1KA1 B4
1KA2 B9
3 4
FKLE
8 9
D
E
FKPK
FKLF
FKNC
FKNF
FKLK
FKNJ
FKPV
FKLB
FKPG
FKNG
FKMW
FKNQ
FKPY
FKNB
FKPD
FKPZ
FKNH
FKPL
2
K
L
B
2
2
n
3KLR-2 100R 2 7
FKNA
FKMV
FKNE
FKPQ
FKPR
FKPP
FKPJ
FKNY
FKPH
FKLH
FKPN
FKLA
FKLG
FKND
100R 3KLT-3 3 6
4
7
u 2
K
L
A2
5
V
FKPW
FKPM
FKMY
FKNR
FKNZ
FKPF
FKPU
FKPC
2
K
L
E
2
2
n
3KLR-1 100R 1 8
4
7
u
2
5
V
100R 3 6
2
K
L
D
4 5
3KLR-3
9
81 82
3KLR-4 100R
72
73
74
75
76
77
78
79
8
80
63
64
65
66
67
68
69
7
70
71
53
54
55
56
57
58
59
6
60
61
62
44
45
46
47
48
49
5
50
51
52
33
34
35
36
37
38
39
4
40
41
42
43
24
25
26
27
28
29
3
30
31
32
14
15
16
17
18
19
2
20
21
22
23
1
10
11
12
13
FKPT
196250-80041
1KA2
FKPE
FKPB
RES 2K0 3KLP
FKNV
3KML RES
FKNK
2K0
4 5 100R 3KLT-4
FKMU
FKMZ
4 5 3KND-4 100R
RES 3KNN 2K0
3KNK 2K0
FKPA
RES
VGH_35V
9KLB
VLS_15V6
VGL_-6V
3 6 100R 3KND-3
2K0 3KNE RES
3KNV 2K0
2K0
RES
RES
RES 3KNQ
2K0 3KNP
2K0 3KNM RES
VCC_3V3
RES 2K0 3KNJ
RES 3KNH 2K0
100R 3KND-1 1 8
FKLC
VGH_35V
2K0 RES 3KLF
3KMJ 2K0
3KMU 2K0
RES
RES
FKNN
FKNL
2K0
3KMA
RES RES
3KNL
2K0
3KNR RES
RES
2K0
2K0 3KLC
78
79
8
80
9
81 82
69
7
70
71
72
73
74
75
76
77
59
6
60
61
62
63
64
65
66
67
68
49
5
50
51
52
53
54
55
56
57
58
4
40
41
42
43
44
45
46
47
48
30
31
32
33
34
35
36
37
38
39
20
21
22
23
24
25
26
27
28
29
3
10
11
12
13
14
15
16
17
18
19
2
1KA1
196250-80041
1
3KNG RES 2K0
RES 3KMG 2K0
2K0
3KLQ
RES
RES 2K0 3KMH
RES 3KLN 2K0
3KLH 2K0
RES
RES
RES
2K0 3KLG
2K0 3KLK
RES
3KNB
2K0
2K0 3KMV RES
RES 2K0 3KMT
3KMW 2K0
FKNM
RES
RES
2K0 3KMZ
9KLA
FKNP
VCC_3V3
3KNA 2K0 RES
3KLE RES
2K0
2K0
RES 3KLD
100R 3KNC-2 2 7
2K0 RES 3KLW
RES 2K0 3KMD
RES 3KME 2K0
RES
2K0
2K0 3KLM
RES
3KLB
RES 3KLL 2K0
3KLJ 2K0 RES
RES
RES 3KMQ 2K0
2K0 3KMP
3KND-2 100R 2 7
3KLU 2K0 RES
FKNT
3KLY RES 2K0
3KMM 2K0
4 5
RES
3 6
100R 3KNC-4
RES
100R 3KNC-3
2K0 3KLV RES 3KNF 2K0
FKNU
2K0 3KMF RES
FKNW
VLS_15V6
RES 2K0 3KMR
2K0
3KMN
RES
100R 3KNC-1 1 8
100R 3KLT-1 1 8
3KLT-2 2 7
3KMK 2K0
100R
RES
RES 3KMC 2K0
2K0 3KLA
RES
3KLZ 2K0
RES
RES
2K0 3KMB
R_LVA0+
VGL_-6V
R_LVA2-
R_LVA2+
R_LVA1-
R_LVA1+
R_LVA0-
R_LVA4-
R_LVA4+
R_LVA3-
R_LVA3+
R_LVB1-
R_LVB1+
R_LVB0-
R_LVB0+
R_LVCKA-
R_LVCKA+
R_LVA5-
R_LVA5+
R_LVB5-
R_LVB5+
R_LVB4-
R_LVB4+
R_LVB3-
R_LVB3+
R_LVB2-
R_LVB2+
BIT_SDI
BIT_SCK
R_LVCKB-
R_LVCKB+
VL63
VL31
SDO
VL191
SCS
VL159
VL127
VL247
BIT_SCS
SCK
VH191
VH159
BIT_SCK
VH127
VH95
VH63
VH31
BIT_SDI
SDI
VL95
BIT_SDO
VL95
VL63
VL31
VL191
VL159
BIT_SDO
SDO
VH95
VH63
VH159
VH127
SDI
VH31
SCK
VL127
SCS
BIT_SCS
G_LBR
G_LBR_INV
LS_R
FS
REV
G_LBR
VH191
GOE_R
GCK_R
GSP1
GSP2
G_LBR_INV
LS_L
FS
REV
VH0
VH247
VH255
VCOM
CS12U
CS11U
CS10U
CS9U
CS8U
CS7U
CS6U
CS5U
CS4U
CS3U
CS2U
CS1U
CS5U
CS4U
CS3U
CS2U
CS1U
GOE_L
GCK_L
GSP1
GSP2
VL0
VL255
VH247
VH255
VCOM
CS12U
CS11U
CS10U
CS9U
CS8U
CS7U
CS6U
L_LVCKB+
L_LVB3-
L_LVB3+
L_LVB4-
L_LVB4+
L_LVB5-
L_LVB5+
VH0
L_LVB0-
L_LVB0+
L_LVB1-
L_LVB1+
L_LVB2-
L_LVB2+
L_LVCKB-
L_LVA4-
L_LVA4+
L_LVA5-
L_LVA5+
VL247
L_LVA2+
VL255
L_LVCKA-
L_LVCKA+
L_LVA3-
L_LVA3+
VL0
L_LVA0-
L_LVA0+
L_LVA1-
L_LVA1+
L_LVA2-
EN 172 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Connectors
18770_558_100121.eps
100121
Connectors
B14F B14F
2009-12-09 4
2009-11-12 3
2009-10-26 2 8204 000 9072
TCON SHARP
1K86 E7
1M20 B9
1M71 D1
1P12 B4
1X03 E3
1X05 E4
1X08 E5
OVAL SCREWHOLE
*
LED PANEL
LIGHT STRIP
9
1
B
C
D
E
F
1F53 D9
1K85 D2
Dummy testlands for common jig
*
ROUND SCREWHOLE 4.5mm
2K76 A8
2K77 B8
2K78 B8
*
*
HOTEL TV
TEMPERATURE
*
1 2 3 4 5 6 7 8
ROUND SCREWHOLE 4mm
*
**
2D DIMMING
2 3 4 5 6 7 8 9
A
B
C
D
E
F
A
**
3K85 D7
3K86 D7
3K87 F7
2K79 B8
2K80 B8
2K81 B9
2K82 C8
2K83 D2
2K84 D2
2K85 E1
2K86 C8
2K87 D8
2K88 D8
2K89 E8
2K90 E8
2K91 F8
2K92 F8
2K93 C4
2K94 C5
2K95 B7
2K96 F9
3K71 E7
3K74 A7
3K75 A7
3K76 A7
3K77 B7
3K78 B7
3K79 C7
3K80 D2
3K81 D2
3K82 D2
3K83 D2
3K84 C7
SENSOR
FK92 B9
FK93 B9
FK94 B9
FK96 D1
FK97 D1
FK98 D1
3K88-1 F7
3K88-2 D7
3K89 B5
3K90 C3
3K91 C2
3K92 D2
3K93 C3
5K53 E3
5K54 E3
9K50 E8
FK50 B4
FK51 B9
FK52 D9
FK53 D9
FK54 D9
FK99 D1
FKZA A1
FKZB A1
FKZC A1
FKZD A2
FKZE A1
FKZF A1
FKZG A1
FKZH A1
FKZJ B1
FK55 D9
FK56 D9
FK57 D9
FK58 D9
FK5A F1
FK5B F1
FK5C F1
FK5D F1
FK5E F1
FK5F F1
FK60 E9
FK88 B9
FK89 B9
FK90 B9
FK91 B9
* FOR TV550 ONLY
T 63V 1.0A
1K86
1
0
0
p
2
K
8
4
FK56
FKZE
FKZF
FKZD
2
K
9
1
1
0
0
p
1
n
0
2
K
9
2
2
K
8
3
1
0
0
p
3K87
100R
1
2
3
4
5 6
1P12
502382-0470
3K78
100R
3K77
100R
3K76
100R
FK92
+5V
1
0
0
p
2
K
7
6
1
0
0
p
2
K
8
2
2
K
8
0
1
0
0
p
R
E
S
+3V3
1
0
K
3
K
9
0
3K85
100R
RES 100R 3K91
FKZC
100R
3K88-1
1 8
1
0
0
p
2
K
7
8
FK88
EMC HOLE
1X05
FK57
+12V
+3V3
2
K
8
1
1
0
0
n
2
K
9
6
1
0
0
n
2
K
8
7
1
0
p
FKZJ
3K81
RES
100R
1
0
0
p
2
K
9
4
3K89
100R
1K85
1.0A 63V T
4
7
n
2
K
9
5
EMC HOLE
1X08
R
E
S
1
u
0
2
K
8
5
FK90
FK89
+3V3-STANDBY
FK60
RES
FKZH
3K71 100R
100R 3K84
100R 3K80
FK52
2041145-8
1
2
3
4
5
6
7
8
1M20
+5V
FKZG
FK5D
FK5F
FK5E
FK97
3
K
7
4
1
0
0
K
3K79
10R
FK99
FK98
FK53
1
0
0
p
2
K
9
0
2
K
8
9
1
0
0
p
100R
3K75
R
E
S
3
K
9
3
1
0
K
100R RES
1
0
0
p
2
K
8
8
+3V3
3K92
2
K
7
7
1
0
0
p
100R
3K86
6
7
8
9
15 16
10
11
12
13
14
2
3
4
5
502386-1470
1F53
1
RES
30R
5K53
1
0
p
2
K
8
6
1
0
0
n
2
K
9
3
FK51
2 7
3K88-2
100R
FK50
REF EMC HOLE
1X03
4
100R 3K82
1M71
2041145-4
1
2
3
RES
3K83 100R FK55
FK54
FK58
FK5B
FK5C
FK5A
+3V3
FK96
FK94
FK93
FK91
5K54
30R
RES
2
K
7
9
1
0
0
p
FKZB
FKZA
9
K
5
0
FAN-CTRL2
BACKLIGHT-PWM-ANA-DISP
+3V3
FAN-CTRL1
SDA-BL
RC
LIGHT-SENSOR
LED-2
LED-1
KEYBOARD
LED-1
BL-SPI-SDO
FAN-DRV
SDA-BL
TACH02
SCL-BL
TACH01
BACKLIGHT-PWM_BL-VS
BL-SPI-CSn
BL-SPI-CLK
SCL-BL
Circuit Diagrams and PWB Layouts EN 173 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-29 310431363643 SSB Layout
Overview top side
18770_580_100216.eps
100219
1328
1329
1
7
3
5
1
D
3
8
1D50
1D52
1E00
1E01
1E02
1E03 1E04
1E05
1E06
1
E
0
7
1E08
1E09
1E12 1E18 1E19
1E22
1E23
1E24
1E25
1E26 1E27
1E28
1E29
1E31
1E37
1E38
1E39
1E42
1E43
1E44
1E45
1E46
1E47
1E48
1E49 1E52
1E53
1E54 1E55
1E56
1E57
1E70
1E75
1E76
1E85
1E86
1ECB
1EP2
1
F
1
0
1
F
2
4
1F25
1F51
1F52
1F53
1F75
1FC1 1FC2 1FC3 1FC4
1FC
5
1FC6
1FD
2
1FD3
1G35
1G36
1
G
3
7
1G50 1G51
1M09
1M20
1M59
1M71
1
M
9
5
1
M
9
9
1N00
1P00
1P02 1P03 1P04
1P05
1P07
1P08
1P09
1S02
1T01
1T85
1T86
1
U
M
0
2B44
2B45
2B46
2B47
2D05
2D06
2
D
0
7
2
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0
8
2
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9
2D10
2
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1
1
2
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1
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2D16
2
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1
9
2
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2
0
2E01
2E04
2E06
2E10
2E12
2E13
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2E20 2E21
2E22
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2E27
2E29 2E30
2E31
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2E33
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2E36
2E37 2E38
2E39
2E40
2E41
2E44
2E48
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2E51
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2E55
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2E62
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2E70
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2E752E76
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2E78
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2E84
2E85
2E86
2E87
2E88
2E89
2E90
2E91
2E92
2E93
2E94
2E95
2E96
2E97
2E98
2E99
2EB1
2EB3
2EC1
2ECC
2ECM
2ECN
2EC
P
2ECU
2EE0
2EE1
2EE2
2EE3
2EE4
2EE5
2
E
E
6
2
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7
2
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0
1
2F29
2F32
2F33
2F34 2F35
2
F
4
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2F60
2F81
2F86
2
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8
8
2F90 2F91
2F92
2F93
2F94
2FC1
2FC2
2FC3
2FC4
2FC5
2FC6
2FC7
2FC8
2G10
2G11
2G12
2G13 2G14
2G15
2G16
2G17
2G18
2G19
2G24
2G25
2G26
2G27
2G28
2G29
2G75
2G76 2G77
2G78 2G79
2G7A2G96
2G97
2G98
2G99
2GA4
2S2R
2S2S
2S2T
2S2V
2S2W
2S2Y
2S2Z
2S30
2S31
2S32
2S33
2S34
2S41
2S4D
2S4E
2S4F
2S4G
2S4M
2S77
2S78
2S7E
2S7H
2S7J
2S7K
2S7L
2S7M
2S7N
2S7P
2S7Q
2S7R
2S7U
2S87
2S8G
2T70
2T76
2T77
2T78
2T79
2T80
2T81
2T82
2T83
2T84
2
T
8
5
2U09
2U11
2
U
1
5
2U16
2U17 2U18
2
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1
9
2U20
2U23
2U24
2U25
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2U28
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42
2U43
2U44
2U45
2U46
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2UD1
2UD2 2UD3
2
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2
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5
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2UD7
2
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2
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2
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2
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2
2
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3
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2
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6
2UE8
2
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9
2US32UU0
2UU1
3B00
3B02
3B04
3B05
3B07
3B08
3B10
3B11
3B12
3B13
3B14
3B15
3B16
3B17
3B18
3B19
3B23
3B24
3B25
3B26
3E07
3E11
3E14
3E15
3E16
3E17
3E18
3E19 3E20
3E21
3E22
3E24
3E25
3E26
3E30
3E31
3E32
3E33
3E35
3E37
3E39
3E40
3E43
3E44
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3E48
3E49
3E52
3E53
3E61
3E62
3E63
3E64
3E65
3E66
3E69
3E70
3E71
3E72
3E73
3E74
3E753E76
3E77
3E78
3E79
3E80
3E82
3E83
3E84
3E85
3E86
3E87
3E88
3E89
3E90
3E95
3E96
3E97
3E98
3EA1
3EA2
3EB1 3EB3
3EB6
3EB9
3EC3
3EC5
3ECF
3ECG
3ECM
3ECN
3ECP
3EE0
3EE1
3EE2
3F26
3F28
3F31
3F36
3F58
3F59
3F60
3F623F63
3F64
3F65
3F71
3F72
3F75
3F78
3FC1
3FC2
3FC3
3FC4
3FC5
3FC6
3FC7
3G10 3G11 3G12
3G13
3G14
3G15
3G28
3GA1
3G
A5
3S00
3S01
3S02
3S03
3S04
3S12
3S13
3S14
3S1B
3S1C
3S1E
3S1J
3S1K
3S1L
3S21 3S23
3S24
3S26
3S27
3S28
3S29
3S2A
3S2M
3S3F
3S3G 3S3H
3S3L
3S3M
3S3N
3S3Q
3S3R
3S3S
3S3T
3S3U
3S3W
3S3Y
3S42 3S43
3S44
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3S4J
3S4K
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3S4P
3S4R
3S4T
3S4U
3S4W
3S50
3S52
3S53
3S54
3S59
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3S62
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3S6J
3S6K
3S80
3S81
3S83
3S84
3T70
3T74
3T75
3T76
3T77
3T78
3T79
3T80
3T81
3T82
3T83
3T90
3T91
3T92
3T93
3U063U07
3U23
3U
24
3U26
3U
29
3U42
3U43
3U44
3U45
3U56
3U64
3U65
3U66
3U67
3U71
3U81
3U84
3UD0
3UD1
3UD2
3UD3
3UD4
3UD5
3US2
3US3
3US4
3US5
3US6
3US7
3
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3
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1
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5D05
5D07
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5
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6E01
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6E10
6E12
6E14
6E15 6E16
6E19
6E20
6E22
6E23
6E24
6E26
6E28
6E29
6E30
6E31
6E32
6E34
6E35
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6E38
6E40
6E43 6E44
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6FC1
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6FC5
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6
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7
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9E01
9E02
9E04
9E05
9E06
9E07
9E08 9E09 9E10
9E29
9E42
9E43
9E50
9E51
9E52
9E53
9E54
9E55
9E57 9E58
9EC3
9F00
9F01
9F04
9F05
9F06
9F27
9F28
9F71
9FC3
9FC4
9FC5
9FC6
9G0K
9GA0
9S00
9S06
9S14
9S15
9US0
9UU0 9UU1
BE00
BE01
BE02
BE03
BE20 BE21 BE22
BEC0
BEC1BEC2 BEC3 BEC4
BEC5
BS09
BS10
BS13
BS15
CD10
DBS8
DS50
IE07
IE09
IE10
IE11
IE39
IE42
IEE3
IEE4
IEE5
IEE6
IF61
IF62
IF86
IF89
IG11
IGA0
IGA1 IGA2
IGA3
IS13
IT74 IT75
IU15
IU
17
IU18
IU23
IU57
IUD0
IUD1 IUD2
IU
D
4
IUS3
IUS4
IUS5
IUS6
IU
S9
IUT1
IU
T2
3104 313 6364.3
EN 174 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Overview bottom side
1
F
E
0
1
G
0
0
1
G
0
3
1U40
2B00
2B01
2B02
2B03
2B04
2B05
2B06
2B07
2B08
2B09
2B10
2B11 2B12
2B13
2B14
2B15
2B16
2B17
2B18 2B19
2B20
2B21
2B22
2B23
2B24
2B25
2B26
2B27
2B28
2B29
2B30
2B31
2B32 2B332B34 2B35
2B36
2B37
2B38
2B39
2B40
2B41
2B42
2B43
2D01
2D02
2D03
2D13
2D14
2D
17
2D21
2D22
2D23
2D24
2D26
2D27
2D28
2D29
2E52
2E53
2EA4
2EA5 2EC0
2EC
22EC3
2EC6
2EC7
2EC8
2ECQ
2EC
V
2EC
W
2F00
2F02
2F03
2F04
2F05
2F06
2F20
2F21
2F25
2F26
2F27
2F28
2F30
2F31
2F52
2F53
2
F
5
9
2
F
6
1
2F62
2F63
2F64
2F65 2F66
2F70
2F71
2F72
2F73
2F74
2F75
2F76
2F77
2F78
2F79
2F80
2F82
2F84
2F85
2FA2
2FA3
2FA4
2FD1
2FDC
2FDD
2FE0
2FE3
2FE4
2FE5
2FE6
2FE8
2FF0
2FF1
2FF2
2FF3
2FF4
2FF5
2FF6
2FF7
2FF8
2FF9
2FG0
2FG
1
2FG2
2FG3
2FG4
2FG6 2FG7
2FG8
2FG9
2FH
2
2FH3
2FH
4
2FH5
2FH6
2FH7
2FH8
2G43
2
G
4
4
2G92
2G93
2G94
2G95
2GA0
2GA1
2GA2
2GA3
2GA5
2GE0
2S10
2S11
2
S
1
2
2S13
2S14
2S15
2S16
2S17
2S18
2S19
2S20
2S21
2S22
2
S
2
3
2S24
2S25
2S26
2S27
2S28
2
S
2
9 2S2E
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2S2H
2S2J
2S2K
2S2L
2S36
2S37
2S38
2S39
2S3A
2S3B
2S3C
2S3D
2S3E
2S3F
2S3G
2S3H
2
S
3
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2S3K
2S3L
2S3M
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2S40
2S42
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2
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4
Q 2
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4
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2S4S
2S4T
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2S50
2S51
2S52
2S53
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2S56
2S57
2S58 2S592S5A
2S5B
2S5C 2S5D
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2
S
5
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2S5M
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2S60
2S61
2S62 2S63
2S64
2S65
2S66
2S67
2S68
2S6A
2S6B
2S6C
2S6D
2S6E
2S6F
2S6G
2S6H2S6K
2S6L 2S6M
2S6N
2S6P
2S75
2S76
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2S85
2S86
2S89
2S8A
2SHW
2T86
2T87
2T88
2T89 2T902T912T92
2U00
2U01
2U02
2U03
2U
04
2U05
2U06 2U07
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2U10 2
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1
2
2
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1
3
2
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1
4
2U21
2U22
2U292U47
2U50
2U54
2U55
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2U71
2UA0
2UA1 2UA2
2UA3
2UA4
2UA5
2UA6
2UA7
2UA8
2UA9
2UB0
2UB1
2UB2
2UB3 2UB4
2UB5
2UB6
2UB7
2UB8
2UE5
2UE7
3B01
3B03
3B06
3B09
3B20 3B21
3B22
3B27
3B28
3D
01
3D
02
3D04
3D06 3D09
3D
10
3D
14
3D15
3D16
3E23
3E34
3E51
3E67
3E68
3EA7
3EC1 3ECA
3ECD
3ECE
3ECH3ECJ3ECK
3ECL
3ECU
3
F
0
1
3F02
3F03
3F04 3F05
3F06
3F07
3F08
3F09 3F10
3F11
3F12
3F19
3F20
3F21
3F22 3F23
3F24
3
F
2
5
3F30
3
F
3
2
3F34
3F35
3F40
3F41 3F42
3F43
3F44
3F45
3F51
3F52
3F53
3F54
3F66
3F67
3F68
3F69
3F76
3F77
3F79
3F80
3F81
3F82
3FBF
3FD1
3FD2
3FD3
3FD4
3FD6
3FD7
3FD
G
3FE5
3FE6
3FE7
3FE8
3FE9
3FG2 3FG4
3FG
6
3FG7
3G2W 3G2Y
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3G30
3G31
3G32
3G33
3G34
3G35
3G36
3G37
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A6
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3S06
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3S10
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3S16 3S17
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3S2V
3S30
3S32
3S33
3S34
3S36
3S37
3S38
3S39
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3S40 3S41
3S45
3S46
3S47
3S49
3S51
3S55
3S56
3S57
3S58
3S5B
3S5E
3S5S
3S5T
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3S5W
3S5Y
3S5Z
3S60
3S61
3S64
3S65
3S66
3S67
3S68
3S69
3S6A
3S6B
3S6C
3S6D
3S6E
3S6F
3S6G
3S6L
3S6M
3S6P
3S6Q 3S6V
3S6W
3S72
3S75
3S76
3S82
3T71
3T84
3T85
3T86
3T87
3T88
3U00
3U01
3U02
3U03
3U04
3U05
3U08
3U09
3U10
3U11
3U12
3U13
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3U15 3U16
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3104 313 6364.3
18770_581_100216.eps
100216
Circuit Diagrams and PWB Layouts EN 175 Q552.1E LA 10.
2010-Feb-19
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div. table
10-30 310431364003 SSB Layout
Overview top side
18770_582_100216.eps
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1
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U
D
2
5UD3
5UM0
5UM1
6E01
6E02
6E03
6E06
6E07
6E08
6E09
6E10
6E12
6E14
6E15 6E16
6E19
6E20
6E22
6E23
6E24
6E26
6E28
6E29
6E30
6E31
6E32
6E34
6E35
6E36
6E37
6E38
6E40
6E43 6E44
6E46
6E51
6E52
6EC1
6F72
6FC1
6FC2
6FC3
6FC4
6FC5
6FC6
6FC7
6FC8
6FD2
6FD3
6
K
F
A
6KFB
6KFE
6
U
0
0
6
U
D
0
7B00
7B02
7D10
7E01
7
E
0
4
7
E
0
5
7E06
7
E
0
9
7E10
7EC1
7EE0
7EE1
7F20
7F25
7
F
5
8
7F70
7HA0
7KAA
7KAB
7KAC
7KFA
7
K
F
E
7
K
Q
A
7
K
Q
C
7KQD
7
K
Q
H
7KUE
7
K
U
H
7S00
7
S
0
8
7
U
0
1
7
U
0
2
7
U
0
4
7U05
7
U
D
0
7
U
D
1
7
U
S
1
7
U
S
2
7
U
S
3
7UU0
7
U
U
1
7UU2
7UU3
9E01
9E02
9E04
9E05
9E06
9E07
9E08 9E09 9E10
9E29
9E42
9E43
9E50
9E51
9E52
9E53
9E54
9E55
9E57 9E58
9EC3
9F00
9F01
9F04
9F059F06
9F27
9F28
9F71
9FC3
9FC4
9FC5
9FC6
9KFB9KFD
9KLA
9KLB
9KQA
9KQB 9KQC
9KQE
9KQF
9KQ
G
9S00
9S06
9S14
9S15
9US0
9UU0 9UU1
BE00
BE01
BE02
BE03
BE20 BE21 BE22
BEC0
BEC1BEC2 BEC3 BEC4
BEC5
BS09
BS10
BS13
BS15
CD10
CKAA
CKFA
CKQB
DBS8
DS50
IE07
IE09
IE10
IE11
IE39
IE42
IEE3
IEE4
IEE5
IEE6
IF61
IF62
IF86
IF89
IS13
IU15
IU17
IU18
IU23
IU57
IUD0
IUD1 IUD2
IUD4
IUS3
IUS4
IUS5
IUS6
IUS9
IUT1
IUT2
3104 313 6400.3
EN 176 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Overview bottom side
1
F
E
0
1K85
1U40
2B10
2B11
2B12
2B13
2B14
2B15
2B16
2B17
2B18
2B19
2B20
2B21
2B31
2B32
2B33
2B34 2B35
2B36
2B372B38
2B48
2B49
2B50
2B51
2D01
2D02
2D03
2D13
2D14
2D17
2D21
2D22
2D23
2D24
2D26
2D27
2D28
2D29
2E52
2E53
2EA4
2EA5 2EC0
2EC22EC3
2EC6
2EC7
2EC8
2ECQ
2ECV
2ECW
2F00
2F02
2F03
2F04
2F05
2F06
2F20
2F21
2F25
2F26
2F27
2F28
2F30
2F31
2F52
2F53
2
F
5
9
2
F
6
1
2F62
2F63
2F64
2F65 2F66
2F70
2F71
2F72
2F73
2F74
2F75
2F76
2F77
2F78
2F79
2F80
2F82
2F84
2F85
2FA2
2FA3
2FA4
2FD1
2FDC
2FDD
2FE0
2FE3
2FE4
2FE5
2FE6
2FE8
2FF0
2FF1
2FF2
2FF3
2FF4
2FF5
2FF6
2FF7
2FF8
2FF9
2FG0
2FG
1
2FG2
2FG3
2FG4
2FG6 2FG7
2FG8
2FG9
2FH2
2FH3
2FH4
2FH5
2FH6
2FH7
2FH8
2HA0
2HA1
2HA2
2HA3
2HA42HA5
2HA6
2HA7
2HA8
2HA9
2HE0
2K76
2K77
2K78
2K79
2K802K81
2K82
2K83
2K84
2K85
2K86
2K87
2K88
2K89
2K90
2K91
2K92
2K93
2K94
2K95
2KAA
2KAB
2KAC
2KAD
2KAE
2KAF
2KAG
2KAH
2KAJ
2KAK
2KAL
2KAM
2KAN
2KAP
2KAQ
2KAR
2KAT
2KAU
2KAV
2KAW
2KAY 2KAZ
2KBA
2KBB
2KBC
2KBD
2KBE
2KBF
2KBG
2KBH
2KBJ 2KBK
2KBL
2KBM
2KBN 2KBP
2KBQ
2KBR
2KBT
2KBU
2KBV
2KBW
2KBY
2KBZ
2KCA 2KCB
2KCC
2KCD
2KCM
2KCN
2KCP
2KCQ
2KCR
2KCT 2KCV
2KCW
2KCY
2KCZ
2KDA
2KDB
2KFG
2KFK
2KFL
2KFQ
2KFR2
K
F
U
2
K
F
V
2
K
F
W
2KFZ
2KGA 2KGB
2KG
E
2KGF
2KGT
2KGW
2KHH
2KHK
2KHW
2KQD
2KQ
E 2KRH
2KRL
2KRM
2KUA
2KUB 2KUC 2KUD
2KUE
2KUF
2KUG
2KUL
2KUN
2KUQ
2KUR 2KUT
2KUU
2KUV
2KUW
2KUY
2KUZ
2KWA
2KWB
2KW
C
2KW
F
2KWK
2S10
2S11
2
S
1
2
2S13
2S14
2S15
2S16
2S17
2S18
2S19
2S20
2S21
2S22
2
S
2
3
2S24
2S25
2S26
2S27
2S28
2
S
2
9 2S2E
2S2G
2S2H
2S2J
2S2K
2S2L
2S36
2S37
2S38
2S39
2S3A
2S3B
2S3C
2S3D
2S3E
2S3F
2S3G
2S3H
2
S
3
J
2S3K
2S3L
2S3M
2S3Q
2S40
2S42
2S43
2S45
2S46
2S4K
2S4N
2S4P
2
S
4
Q 2
S
4
R
2S4S
2S4T
2S4U
2S4V
2S4W
2S4Y
2S4Z
2S50
2S51
2S52
2S53
2S55
2S56
2S57
2S58 2S592S5A
2S5B
2S5C 2S5D
2S5G
2S5H
2S5J
2S5K
2S5M
2S5P
2S60
2S61
2S62 2S63
2S64
2S65
2S66
2S67
2S6A
2S6B
2S6C
2S6D
2S6E
2S6F
2S6G
2S6H2S6K
2S6L 2S6M
2S6N
2S6P
2S75
2S76
2S84
2S85
2S86
2S89
2S8A
2SHW
2U00
2U01
2U02
2U03
2U04
2U05
2U06 2U07
2U08
2U10 2
U
1
2
2
U
1
3
2
U
1
4
2U21
2U22
2U292U47
2U50
2U54
2U55
2U68
2U71
2UA0
2UA1 2UA2
2UA3
2UA4
2UA5
2UA6
2UA7
2UA8
2UA9
2UB0
2UB1
2UB2
2UB3 2UB4
2UB5
2UB6
2UB7
2UB8
2UE5
2UE7
3B40
3B42
3B51
3B52
3B54
3D01
3D02
3D04
3D06 3D09
3D10
3D14
3D15
3D16
3E23
3E34
3E51
3E67
3E68
3EA7
3EC1 3ECA
3ECD
3ECE
3ECH3ECJ3ECK
3ECL
3ECU
3
F
0
1
3F02
3F03
3F04 3F05
3F06
3F07
3F08
3F09 3F10
3F11
3F12
3F19
3F20
3F21
3F22 3F23
3F24
3
F
2
5
3F30
3
F
3
2
3F34
3F35
3F40
3F41 3F42
3F43
3F44
3F45
3F51
3F52
3F53
3F54
3F66
3F67
3F68
3F69
3F76
3F77
3F79
3F80
3F81
3F82
3FBF
3FD1
3FD2
3FD3
3FD4
3FD6
3FD7
3FDG
3FE5
3FE6
3FE7
3FE8
3FE9
3FG2 3FG4
3FG
6
3FG7
3HA0
3HA1
3HA2
3HE0 3HE1
3HE2
3HE3
3HE4
3K71
3K74
3K75
3K76
3K77
3K78
3K79 3K80
3K81
3K82 3K83
3K84
3K85
3K86
3K87
3K88
3K89
3K90
3K91
3K92
3K93
3KAC
3KAD
3KAE
3KAF
3KBH
3KBJ
3KBK3KBL
3KBM3KBN
3KBP
3KBQ
3KBR
3KBT
3KFE
3KFF
3KFJ3KFK
3KFL
3KFP
3KFQ
3KFT
3
K
F
U
3KFV
3KFY
3KFZ
3KGA
3KGB
3KGC
3KGG
3KLB
3KLC
3KLD
3KLE
3KLF
3KLG
3KLH 3KLJ
3KLK
3KLL
3KLM
3KLN
3KLP
3KLQ
3KLR
3KLT
3KLU
3KLV
3KLW
3KLY
3KLZ
3KMA
3KMB
3KMC
3KMD
3KME
3KMF 3KMG
3KMH3KMK
3KML
3KMM
3KMN
3KMP
3KMQ
3KMR
3KMT
3KMU
3KMV
3KMW
3KMZ
3KNA
3KNB
3KND
3KNE
3KNF
3KNG
3KNH
3KNJ
3KNK
3KNL
3KNM
3KNN
3KNP
3KNQ
3KNR
3KNV
3KQL
3KQW
3KQY
3KRB
3KRC
3KTD
3KTE
3KTF
3KTG
3KTH
3KTJ 3KTK
3KTP
3KTQ
3KTR
3KTU
3KTV
3KUA
3KUB
3KUC
3KUD
3KUE
3KUJ
3KUK 3KUL
3KUM
3KUW
3KUZ
3KVA
3KYB
3KYC
3KYE
3KYK
3KYP
3KYQ
3S05
3S06
3S07
3S08
3S09
3S0V
3S0W
3S0Z
3S10
3S11
3S15
3S16 3S17
3S18
3S19
3S1D
3S1F
3S1G
3S1H
3S1P
3S1R3S1S3S1T
3S1U
3S20
3S22
3S25
3S2F
3S2G
3S2H
3S2K
3S2L
3S2S
3S2V
3S30
3S32
3S33
3S34
3S36
3S37
3S38
3S39
3S3P
3S40 3S41
3S45
3S46
3S47
3S49
3S51
3S55
3S56
3S57
3S58
3S5B
3S5E
3S5S
3S5T
3S5V
3S5W
3S5Y
3S5Z
3S60
3S61
3S64
3S65
3S66
3S67
3S68
3S69
3S6A
3S6B
3S6C
3S6D
3S6E
3S6F
3S6G
3S6L
3S6M
3S6Q 3S6V
3S6W
3S72
3S75
3S76
3S82
3U00 3U01
3U02
3U03
3U04
3U05
3U08
3U09
3U10
3U11
3U12
3U13
3U14
3U15 3U16
3U17
3U18
3U19
3U20
3U21
3U22
3U25
3U27
3U28
3U41
3U53
3U59
3U60
3U61
3U62
3U63
3U68
3U69
3U70
3U72
3U73
3U74
3U75
3U76
3U80
3U82
3U83
3UA0
3UA1
3UA2
3UA3
3UA4
3UA5
3UA6 3UA7
3UA8
3UA9
3UB0
3UB1
3UB2
3UB3
3UB4 3UB5
3UB6
3UB7
5
D
0
3
5EC0
5EC3
5
F
6
6
5
F
7
1
5
F
7
4
5
F
7
6
5FA3
5FA4
5FE0
5FE3
5FE4
5FE5
5FE7
5FE8
5FE9
5FG0
5FG2
5HA0
5HA1 5K53
5K54
5KAA
5KAB
5KAC
5KAD
5KAE
5KAF
5KAH
5KAJ
5KAK
5S04
5S80
5S81
5S82
5S83
5S84
5S85
5S87
5S88
5S89
5S90
5S92
5S93
5S94
5S95
5UA0
6
D
0
1
6
E
4
76E48
6E49
6E50
6FD1
6
K
F
C
6KFD
6
K
F
F
6KQA
6
U
4
0
6
U
D
1
7
D
0
3
7D11
7D13
7D15
7E02 7EC0
7
F
0
0
7
F
0
1
7
F
0
2
7
F
0
3
7
F
0
4
7
F
0
5
7
F
5
2
7
F
5
3
7
F
5
4
7
F
7
5
7FA3
7
F
D
1
7FE0
7
F
E
3
7
H
E
0
7HE1
7KFB
7
K
F
C
7KFD
7KFF
7
K
Q
B
7KUA
7KUB
7KUC
7KUD
7KUF
7KUG
7S01
7S05
7S09
7
S
2
0
7
U
0
0
7
U
0
3
7U06
7U40
7U41
7U42
7U43
7
U
4
8
7UA0
7
U
A
1
7UA2
7
U
A
3
7UA4
7UA5
7
U
A
6
7
U
A
7
7UC0
7UD2
7UD3
9CH0
9EC0
9EC2
9F02
9F03
9F20
9F21
9F25
9F26
9FC1 9FC2
9FD1
9FD2 9FD5
9HA0
9HA1
9HE0
9HE1
9HE2 9HE3
9K50
9KAA
9KFC
9KFE
9KFF
9KQD
9KQH
9KQJ
9KQK
9S08
9S0D
9S0E
9S10
9S11
9S12
9S13
9S17
9S24
9U41
9U42
AF70
AF71 AF72
AF73
BFE1 BFE2
BFE3
BFE4
BFE5
BS17
C000
C001
CU00
CUA0
DFE6
DFE7
DFE8
DFE9
DFF1
DFF2
DS52
FB00
FD01
FD02
FD03
FD05
FD06
FD07
FD14
FE01 FE02
FE03
FE27
FE28
FE29
FE30
FE31
FE32
FE33
FE34
FE35
FE36
FE41
FE42
FE43
FE44 FE45 FE46
FE48
FE49 FE50
FE51
FE54
FE55
FE56
FE57
FE58
FE59
FE60 FE61 FE62 FE63 FE64 FE66 FE67 FE68
FE70 FE71 FE72 FE73
FE74
FE75
FE76 FE77 FE78 FE79
FE80 FE81 FE82
FE83
FE84
FE85
FEA0
FEA1
FEC0
FEC1
FEC2
FEC3
FEC4
FEC5
FEC6
FEC7 FEC8
FECA
FECB
FECC
FECD
FECE
FECF
FECG
FECJ
FECK
FECL
FECM
FECN FECP
FECR
FECW
FECY
FECZ
FEE0
FF00
FF01
FF03
FF04
FF29
FF30
FF31
FF32
FF33
FF34
FF35
FF36
FF37
FF38
FF39
FF40
FF41
FF42
FF43
FF44
FF45
FF46
FF47
FF48
FF49
FF50
FF55
FF56
FF57
FF58
FF61
FF62
FF63
FF64
FF65 FF66
FF71
FF74
FF75
FF76
FF81
FF82
FFA2
FFAF
FFB1
FFB2
FFB3
FFB4
FFB5
FFB6
FFC1
FFC2
FFC3 FFC4
FFC5
FFC6
FFC7
FFC8
FFC9
FFDA
FFDB
FFDC
FH70 FH71
FH72
FH73
FH74
FH75
FH76 FH77
FH78
FH79
FH80
FH81 FH82
FHA0
FHA1
FHA2 FHA3
FHA4
FHA5
FHA6
FK50
FK51
FK52 FK53
FK54
FK55
FK56 FK57
FK58
FK5A
FK5B
FK5C
FK5D
FK5E
FK5F
FK60
FK88
FK89
FK90 FK91 FK92
FK93
FK94
FK96 FK97 FK98 FK99
FKAA
FKAB
FKAC
FKAD
FKAE
FKAF
FKAH
FKAJ
FKAK
FKAL FKAM
FKAN
FKAP
FKAQ FKAR
FKAT
FKAU FKAV
FKAW FKAY
FKAZ FKBA
FKBB
FKBC
FKBD FKBE
FKBF
FKBG FKBH
FKBJ FKBK
FKBL
FKBM FKBN
FKBP
FKBQ
FKBR
FKBT
FKBU
FKBV FKBW FKBY
FKBZ
FKCA
FKCB
FKCC
FKCD
FKCE FKCF
FKCG
FKCH FKCJ
FKCK
FKCL
FKCM
FKCN
FKCP
FKCQ
FKCR
FKCT
FKCU
FKCV
FKCW
FKCY
FKCZ
FKDA
FKDB
FKDC
FKDD
FKDE
FKFA
FKFB
FKFC
FKFD
FKFE
FKFG
FKFH
FKFJ
FKFK
FKLA FKLB
FKLC
FKLE FKLF
FKLG
FKLH FKLK
FKLY
FKLZ
FKMA
FKMB
FKMC FKMD
FKME
FKMF FKMG FKMH
FKMJ
FKMK
FKML
FKMU
FKMV
FKMW
FKMY
FKMZ
FKNA
FKNB
FKNC
FKND
FKNE
FKNF
FKNG
FKNH
FKNJ
FKNK
FKNL FKNM
FKNN
FKNP
FKNQ
FKNR
FKNT
FKNU
FKNV
FKNW
FKNY FKNZ
FKPA
FKPB FKPC
FKPD
FKPE
FKPF FKPG
FKPH
FKPJ
FKPK FKPL
FKPM
FKPN
FKPP
FKPQ
FKPR FKPT
FKPU
FKPV
FKPW FKPY
FKPZ
FKQA
FKQB
FKQC
FKQD
FKQE
FKQF
FKQG
FKQH
FKQJ
FKQK
FKQL
FKQM
FKQP FKQQ
FKQR FKQT
FKQU
FKQW
FKUA FKUB
FKUC
FKUD
FKUE
FKUF
FKUG
FKUH
FKUK
FKUL
FKUM
FKUN FKYA
FKYB
FKYC
FKYD
FKYE
FKYF
FKYG
FKYH
FKZA
FKZB
FKZC
FKZD
FKZE
FKZF
FKZG
FKZH
FKZJ
FS01
FS02
FS03
FS08
FS0Z
FS10 FS11
FS2W FS2Y
FS31
FS44
FS45
FS49
FS50
FS51
FS52
FS53
FS57
FS64
FU00
FU01
FU02
FU03
FU04
FU05
FU06
FU07
FU48
FU49
FU50
FU51
FU52
FU53
FU54
FU55
FU56
FU57
FU58 FU59
FU60
FU61
FU62
FU63
FU64
FU65
FU66
FU67
FU68
FU72
FU73
FU74
FUA0
FUA1
FUA2 FUA3
FUA4
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18770_583_100216.eps
100216
3104 313 6400.3
Circuit Diagrams and PWB Layouts EN 177 Q552.1E LA 10.
2010-Feb-19
back to
div. table
10-31 310431364025 SSB Layout
Overview top side
18770_584_100216.eps
100219
3104 313 6402.5
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EN 178 Q552.1E LA 10. Circuit Diagrams and PWB Layouts
2010-Feb-19
back to
div. table
Overview bottom side
1
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