DM6467 HD-VICP Subsystem

Functional Simulator

Users Guide




March 2007



IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TIs
terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent
right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or
process in which TI products or services are used. Information published by TI regarding third-party products
or services does not constitute a license from TI to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or
other intellectual property of the third party, or a license from TI under the patents or other intellectual property
of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and is
an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:

Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Interface interface.ti.com Digital Control www.ti.com/digitalcontrol
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
Low Power Wireless www.ti.com/lpw Telephony www.ti.com/telephony
Video & Imaging www.ti.com/video
Wireless www.ti.com/wireless

Mailing Address: Texas Instruments
Post Office Box 655303 Dallas, Texas 75265


Copyright 2007, Texas Instruments Incorporated



ii

Preface
Read This First

About this Manual
This document provides an overview of DM6467 HD-VICP (High Definition
Video Imaging Co-processor) Subsystem functional simulator. It also
provides details on installing the DM6467 HD-VICP Subsystem functional
simulator and setting it up in Code Composer Studio. It explains how to use
multiple IMCOPS on different processors using PDM.
Intended Audience
This document is intended for users who would be using the DM6467 HD-
VICP Subsystem functional simulator for simulating DM6467 HD-VICP
based devices. This document assumes that you are familiar with the
usage of Code Composer Studio.
How to Use This Manual
This document includes the following chapters:
Chapter 1 Provides an introduction to DM6467 HD-VICP Subsystem
functional simulator. It also includes configuration details and
architecture of the simulator.
Chapter 2 Describes the installation procedure for DM6467 HD-VICP
Subsystem functional simulator, how to setup simulator in Code
Composer Studio, and Parallel Debug Manager (PDM).
Chapter 3 Provides details on effective usage of DM6467 HD-VICP
Subsystem functional simulator.
Related Documentation From Texas Instruments
DM6467 HD-VICP Subsystem Functional Simulator Release Notes
iii
Read This First


Abbreviations
The following abbreviations are used in this document.
Table 1-1. Table of Abbreviations

Acronym Description
HDIMCOP High Definition Imaging Coprocessor
HD-VICP High Definition Video Imaging Co-
processor
IMCOP Imaging Coprocessor
PDM Parallel Debug Manager
QT Quick Turn
GEM C64+CPU (TMS320C6400) +Memory
Model
Notational Conventions
The following conventions are used in this document:
Program source code, parameters, and command line options are
shown in a mono- spaced font.
Menus, submenus, commands, and buttons are shown in bold font.
Trademarks
Code Composer Studio is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.


iv

Contents

Read This First .................................................................................................................. iii
About this Manual ........................................................................................................iii
Intended Audience.......................................................................................................iii
How to Use This Manual..............................................................................................iii
Related Documentation From Texas Instruments........................................................iii
Abbreviations ...............................................................................................................iv
Notational Conventions................................................................................................iv
Trademarks..................................................................................................................iv
Contents ............................................................................................................................. v
Figures .............................................................................................................................. vii
Tables................................................................................................................................. ix
Introduction ..................................................................................................................... 1-1
1.1 Introduction........................................................................................................1-2
1.2 Supported Configuration...................................................................................1-2
1.3 DM6467 HD-VICP Subsystem Functional Simulator Architecture....................1-3
DM6467 HD-VICP Subsystem Functional Simulator Installation................................ 2-1
2.1 Installing DM6467 HD-VICP Subsystem Functional Simulator.........................2-2
2.2 Setting DM6467 HD-VICP Subsystem Functional Simulator in Code Composer
Studio................................................................................................................2-2
2.3 Parallel Debug Manager....................................................................................2-6
Simulator Usage.............................................................................................................. 3-1
3.1 Effective Usage of Simulator.............................................................................3-2
3.1.1 Optimal Performance of Simulator.....................................................................3-2
3.1.2 Shared Memory Debug Accesses.....................................................................3-2

v

This page is intentionally left blank


vi

Figures

Figure 1-1. DM6467 HD-VICP Subsystem Functional Simulator Architecture .......... 1-3
Figure 2-2. Code Composer Studio Setup.................................................................... 2-2
Figure 2-3. Available Family and Platform.................................................................... 2-3
Figure 2-4. DM6467 HD-VICP Subsystem Functional Simulator Selection................ 2-3
Figure 2-5. Configuration Added to System................................................................. 2-4
Figure 2-6. Code Composer Studio............................................................................... 2-4
Figure 2-7. CCStudio: Parallel Debug Manager ........................................................... 2-5

vii

This page is intentionally left blank

viii



Tables

Table 1-1. Table of Abbreviations .......................................................................................................iv
Table 1-2. Supported Configuration.................................................................................................... 2

ix

This page is intentionally left blank


x

Chapter 1
Introduction

This chapter provides an overview of the DM6467 HD-VICP Subsystem
functional simulator and its architecture. It also provides information on the
supported simulator configurations.
Topic Page
1.1 Introduction 1-2
1.2 Supported Configuration 1-2
1.3 DM6467 HD-VICP Subsystem Functional Simulator Architecture 1-3

1-1
Introduction


1.1 Introduction
The DM6467 HD-VICP Subsystem functional simulator, available within the
Code Composer Studio Integrated Development Environment (IDE),
simulates the DM6467 HD-VICP based devices. Entire codec development
as well as optimization for video standards (e.g. H.264, MPEG2/4, and
VC1) is performed on DM6467 HD-VICP Subsystem functional simulator. It
also supports multiple high definition Imaging Coprocessor (IMCOP).
1.2 Supported Configuration
Following table lists the DM6467 HD-VICP Subsystem functional simulator
configurations supported in this release.
Table 1-2. Supported Configuration

Sl.
No.
Simulator
Configuration
Description
1 DM6467 HD-VICP
subsystem functional
simulator
Functional simulator for DM6467
board with IMCOPs, C64x+memory
subsystem, and Host ARM (simulates
ARM968 instead of ARM926EJ -S).

1-2
Introduction

1.3 DM6467 HD-VICP Subsystem Functional Simulator Architecture
Following block diagram illustrates the DM6467 HD-VICP Subsystem
functional simulator architecture.

Figure 1-1. DM6467 HD-VICP Subsystem Functional Simulator Architecture



1-3
Introduction


This page is intentionally left blank

1-4

Chapter 2
DM6467 HD-VICP Subsystem
Functional Simulator Installation

This chapter provides details on installing DM6467 HD-VICP Subsystem
functional simulator and setting it up in Code Composer Studio. It also
provides details on Parallel Debug Manager.
Topic Page
2.1 Installing 2-2
2.2 Setting DM6467 HD-VICP Subsystem Functional Simulator in
Code Composer Studio
2-2
2.3 Parallel Debug Manager 2-6
2-1
DM6467 HD-VICP Subsystem Functional Simulator Installation


2.1 Installing DM6467 HD-VICP Subsystem Functional Simulator
Follow these steps to install the DM6467 HD-VICP Subsystem functional
simulator:
1) Install Code Composer Studio v3.2 or v3.3 on your machine.
2) Run the DM6467 HD-VICP Subsystem functional simulator installer.
This is a self extracting and self installing patch.
3) This executable creates a folder named DM6467 in the location <install
directory>\drivers\c64plus_sim_ua_releases\DM6467
2.2 Setting DM6467 HD-VICP Subsystem Functional Simulator in Code
Composer Studio
Follow these steps to setup DM6467 HD-VICP Subsystem functional
simulator in Code Composer Studio v3.2:
1. Click start button in the taskbar and select Setup Code Composer
Studio v3.2 or v3.3 from the Programs menu. Code Composer Studio
Setup screen is displayed.

Figure 2-2. Code Composer Studio Setup
2-2
DM6467 HD-VICP Subsystem Functional Simulator Installation

2. The Available Factory Boards section displays all the available family
of simulators and corresponding platforms as shown.

Figure 2-3. Available Family and Platform
3. Click on the Family drop-down list and select DM6467 from the list of
simulators as shown.

Figure 2-4. DM6467 HD-VICP Subsystem Functional Simulator Selection
2-3
DM6467 HD-VICP Subsystem Functional Simulator Installation


4. This displays the list of DM6467 HD-VICP Subsystem functional
simulator configurations. Select the required configuration and click
Add. The selected simulator configuration is added to the system.

Figure 2-5. Configuration Added to System
5. Click Save & Quit. This displays a message box to check if you want
to start Code Composer Studio on exit.

Figure 2-6. Code Composer Studio
2-4
DM6467 HD-VICP Subsystem Functional Simulator Installation

6. Click Yes to start Code Composer Studio. This displays the CCStudio:
Parallel Debug Manager window as shown.

Figure 2-7. CCStudio: Parallel Debug Manager
2-5
DM6467 HD-VICP Subsystem Functional Simulator Installation


2.3 Parallel Debug Manager
PDM (Parallel Debug Manager) enables the usage of multiple processors
in the system. For example, to use GEM and ARM968 processors in
parallel, it is important to load the program on the respective processor,
and then run it from PDM. This would provide execution of an event in
order to simulate both GEM and ARM968 at the same time. The PDM
window also shows the status of each processor whether it is in RUN
state, or in HALTED state.
For more details on PDM, refer Code Composer Studio online help.
2-6

Chapter 3
Simulator Usage

This chapter provides details on how you can effectively use the DM6467
HD-VICP Subsystem functional simulator to achieve optimal performance.
It also explains shared memory debug access.
Topic Page
3.1 Effecti ve Usage of Simulator 3-2
3-1
Simulator Usage


3.1 Effective Usage of Simulator
3.1.1 Optimal Performance of Simulator
When you invoke DM6467 HD-VICP Subsystem functional simulator in
Code Composer Studio, four processors are displayed in the System pane
(two ARM968 and one C64+(TMs320c6400) and a Host ARM). See
Figure 2-7.
If you run the simulation from PDM without selecting any particular
processor, then all the processors will be clocked. The processor that does
not execute any test case causes performance degradation of the
simulator.
Follow these guidelines to avoid performance degradation of the simulator:
1. To execute a test case on GEM, run the simulation from GEM (C64+)
IDE and not from PDM window.
2. To execute a test case on one of the ARMs of IMCOPs, run the
simulation from the corresponding ARM IDE and not from PDM
window.
3. To execute a test case on any two IDEs, follow these steps:
a. Load the test case on corresponding IDEs
b. From PDM, select any two processors under System pane
c. From the Group menu, select <Highlighted CPUs>
d. With the desired CPUs selected, click RUN icon in PDM
window
4. To execute a test case on IMCOP0, IMCOP1, and GEM, load the test
case on corresponding IDEs (ARM0 for IMCOP0, ARM1 for IMCOP1,
and C64+for GEM), group them, and click RUN icon in PDM window.
5. To execute a test case on IMCOP0, IMCOP1, GEM, and Host ARM,
load the test case on corresponding IDEs and click RUN icon in PDM
window.
3.1.2 Shared Memory Debug Accesses
Shared memory in the DM6467 HD-VICP Subsystem functional simulator
is visible from GEM and IMCOPs. To access shared memory, click View-
>Memory from any of the processor window. In the memory window, you
can modify the shared memory by using debug-write.
Consider the following points while debugging access to shared memories:
1. The shared memory present in one CPU would reflect in the other CPU
only if a manual refresh is done in the latter. To refresh the shared
memory, right click and choose Refresh in the memory window.
Memory refresh is not required for the debugger window where you
actually perform the changes.
3-2
Simulator Usage
2. Debug access (read/write is allowed only for Read Only memory
locations. You can modify Read Only memory only if the access is
allowed by CPU or DMA. To debug-write a memory location, choose
View->Memory and manually modify.
3-3