EC 1201DIGITAL ELECTRONICS

A. J awahar,
Assistant Professor, ECE Dept.
SSN College of Engineering
Phone: 044 32909855 275 (Extn : 359)
91-9444067484 (cellphone)
Email: jawahara@ssn.edu.in
Sequential circuits Overview
Circuits require memory to store intermediate data
Sequential circuits use a periodic signal to determine when to store
values.
A clock signal can determine storage times
Clock signals are periodic
Single bit storage element is a flip flop
A basic type of flip flop is a latch
Latches are made from logic gates
NAND, NOR, AND, OR, Inverter
The story so far ...
Logical operations which respond to combinations of inputs to
produce an output.
Call these combinational logic circuits.
For example, can add two numbers. But:
No way of adding two numbers, then adding a third (a
sequential operation);
No way of remembering or storing information after inputs have
been removed.
To handle this, we need sequential logic capable of storing
intermediate (and final) results.
Sequential Circuits
Combinational
circuit
Flip
Flops
Outputs
Inputs
Next
state
Present
state
Timing signal
(clock)
Clock
Clock
a periodic external event (input)
Clock
a periodic external event (input)
synchronizes when current state changes happen
keeps system well-behaved
makes it easier to design and build large systems
synchronizes when current state changes happen
keeps system well-behaved
makes it easier to design and build large systems
Cross-coupled Inverters
0
1
1
0
State 1
State 2
A stable value can be stored at inverter
outputs
S-R Latch with
NORs
1 1
1 0
0 1
0 0
S R Q Q
0 1
1 0 Set
1 0
Stable
0 1 Reset
0 0 Undefined
R (reset)
Q
Q
S (set)
S-R latch made from cross-coupledNORs
If Q =1, set state
If Q =0, reset state
Usually S=0 and R=0
S=1 and R=1 generates unpredictable results
S-R Latch with
NANDs
S
R
Q
Q
0 0
0 1
1 0
1 1
S R Q Q
0 1
1 0 Set
1 0
Store
0 1 Reset
1 1 Disallowed
Latch made from cross-coupledNANDs
Sometimes called S-R latch
Usually S=1 and R=1
S=0 and R=0 generates unpredictable
results
S-R Latches
S-R Latch with control
input
Occasionally, desirable to avoid latch changes
C =0 disables all latch state changes
Control signal enables data change when C =1
Right side of circuit same as ordinary S-R latch.
Latch operation
enabled by
C
Latch operation Latch operation
enabled by enabled by
C C
Input sampling
enabled by gates
Input sampling
enabled by gates
NOR S-R Latch with Control Input
R
S
Q
Q
C
Outputs change when C is
low:
RESET and SET
Otherwi se: HOLD
Outputs change when C is Outputs change when C is
low: low:
RESET and SET RESET and SET
Otherwi se: HOLD Otherwi se: HOLD
Latch is level-sensitive, in regards to C Latch is Latch is level level - -sensitive sensitive, in regards to C , in regards to C
Only stores data if C = 0
Only stores data if C = 0
D Latch
Q
Q
C
D
S
R
X
Y
X Y C Q Q
0 0 1 Q
0
Q
0
Store
0 1 1 0 1 Reset
1 0 1 1 0 Set
1 1 1 1 1 Disallowed
X X 0 Q
0
Q
0
Store
0 1 0 1
1 1 1 0
X 0 Q
0
Q
0

D C Q Q
Q
0
indicates the previous state (the previously stored
value)
D Latch
Q
Q
C
D
S
R
X
Y
0 1 0 1
1 1 1 0
X 0 Q
0
Q
0

D C Q Q
Input value Dis passed to output Q when C is high
Input value Dis ignored when C is low
D Latch
E
x
Latches on following
edge of clock
E
D
Q
C
x
z
z
Zonly changes when E is high
If E is high, Zwill followX
D Latch
E
x
Latches on following
edge of clock
E
D
Q
C
x
z
z
The D latch stores data indefinitely, regardless of input D values, if
C =0
Forms basic storage element in computers
Symbols for
Latches
SR latch is based on NOR gates
SR latch based on NAND gates
D latch can be based on either.
D latch sometimes called transparent latch
Summary
Latches are based on combinational gates (e.g. NAND, NOR)
Latches store data even after data input has been removed
S-R latches operate like cross-coupled inverters with control inputs (S =
set, R =reset)
With additional gates, an S-R latch can be converted to a D latch (D
stands for data)
D latch is simple to understand conceptually
When C =1, data input Dstored in latch and output as Q
When C =0, data input Dignored and previous latch value output
at Q
Next time: more storage elements!
Any Queries ?
Please Contact
jawahara@ssn.edu.in
Thank You