PROJECT REPORT ON

STREET LIGHT THAT GLOWS ON

DETECTING VEHICLE MOVEMENT

Easy Electronics
easyelectronics.weebly.com

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Introduction
Component Used
Circuit Diagram
Circuit Description
IR Transmitter(TSAL 6200)
IR Receiver(TSO !"#$)
Stepper %otor
Diode
LCD
Resistor
Cr&sta' Osci''ator
(o'tage Regu'ator
Capacitor
%omentar& s)itc*
Source Code
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The project is designed to detect vehicle movement on highways to switch ON
only a block of street lights ahead of it (vehicle), and to switch OFF the trailing lights to
save energy. !ring night all the lights on the highway remain ON for the vehicles, b!t
lots of energy is wasted when there is no vehicle movement.
This proposed system provides a sol!tion for energy saving. This is achieved by
sensing an approaching vehicle and then switches ON a block of street lights ahead of
the vehicle. "s the vehicle passes by, the trailing lights switch OFF a!tomatically. Th!s,
we save a lot of energy. #o when there are no vehicles on the highway, then all the
lights remain OFF. $owever, there is another mode of operation where instead of
switching OFF the lights completely, they remain ON with %&' of the ma(im!m intensity
of the light. "s the vehicle approaches, the block of street lights switch to %&&' intensity
and then as the vehicle passes by, the trailing lights revert back to %&' intensity again.
$igh intensity discharge lamp ($)) presently !sed for !rban street light are based on
principle of gas discharge, th!s the intensity is not controllable by any voltage red!ction.
*hite +ight ,mitting iode (+,) based lamps are soon replacing the $) lamps in
street light. )ntensity control is also possible by -!lse *idth .od!lation (-*.)
generated by the microcontroller. #ensors !sed on either side of the road senses
vehicle movement and sends logic commands to microcontroller to switch ON/OFF the
+,s. Th!s this way of dynamically changing intensity ON/OFF helps in saving a lot of
energy. The project !ses a -)0 series microcontroller.
F!rther the project can be enhanced by !sing appropriate sensors for detecting
the failed street light and then sending an #.# to the control department via 1#.
modem for appropriate action.
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Component used Quantity (no.s)
"T2304% microcontroller (base 5 )0)
1
iode (6&&7, .7v)
4
%&k resistance
1
6.7k resistance
7
67& ohms resistance
12
0rystal oscillator
1
Transformer (88&v93&3)
1
+.,..
1
0eramic 0apacitor (:&pf9::pf)
2
,lectrolytic capacitor (%&& microfarad)
1
0apacitor(%&nf)
4
,lectrolytic capacitor (67& microfarad)
1
0apacitor(% pf)
4
); Transmitter(T#"+ <8&&)
4
); ;eceiver (T#O- %7:2)
4
=oltage reg!lator (72&4)(54v)
1
-ot (%&k)
4
89-in connector
1
89 pin switches
2
0ello tape (for electrical !se)
1
#!pply wire
2 mts

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This project !tili>es two powerf!l ); transmitters and two receivers? one pair of
transmitter and receiver is fi(ed at !p side (from where the =,$)0+, comes) at a level
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higher than a h!man being in e(act alignment and similarly the other pair is fi(ed at
down side of the to other direction.
#ensor activation time is so adj!sted by calc!lating the time taken at a certain speed to
cross at least one compartment of standard minim!m si>e of the )ndian railway.
#ensors are fi(ed at %km on both sides of the gate.
*e call the sensor along the vehicle direction as @foreside sensorA and the other as @aft
side sensorA. *hen foreside receiver gets activated, the light is t!rned on. *hen aft side
receiver gets activated
B!>>er will immediately so!nd at the fore side receiver activation and light will glow
after 4 seconds.
8052 Microcontroller
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The "T23048 is a low9power, high9performance 0.O# 29bit microcomp!ter with 2C
bytes of Flash programmable and erasable read only memory (-,;O.). The device
is man!fact!red !sing "tmelAs high9density nonvolatile memory technology and is
compatible with the ind!stry9standard .0#94% instr!ction set and pin o!t. The on9chip
Flash allows the program memory to be reprogrammed in9system or by a conventional
non9volatile memory programmer. By combining a versatile 29bit 0-D with Flash on a
monolithic chip, the "tmel "T23048 is a powerf!l microcomp!ter which provides a
highly9fle(ible and cost9effective sol!tion to many embedded control applications.
The "T23048 provides the following standard feat!resE 2C bytes of Flash, 84< bytes of
;"., :8 )/O lines, three %<9bit timer/co!nters, a five vector two9level interr!pt
architect!re, a f!ll d!ple( serial port, on9chip oscillator and clock circ!itry. )n addition,
the "T23048 is designed with static logic for operation down to >ero freF!ency and
s!pports two software selectable power saving modes. The )dle .ode stops the 0-D
while allowing the ;"., timer/co!nters, serial port and interr!pt system to contin!e
f!nctioning. The -ower9down .ode saves the ;". contents b!t free>es the oscillator
disabling all other chip f!nctions !ntil the ne(t hardware reset.
Pin Configuration :
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Pin Description
(CC+
#!pply voltage.
,-D+
1ro!nd.
ort 0+
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-ort & is an 29bit open9drain bi9directional )/O port. "s an o!tp!t port, each pin can sink
eight TT+ inp!ts. *hen %s are written to port & pins, the pins can be !sed as high
impedance inp!ts. -ort & may also be config!red to be the m!ltiple(ed low order
"ddress /data b!s d!ring accesses to e(ternal program and data memory. )n this mode
-& has internal p!ll !ps. -ort & also receives the code bytes d!ring Flash programming,
and o!tp!ts the code bytes d!ring program verification. ,(ternal p!ll !ps are reF!ired
d!ring program verification.
ort !+
-ort % is an 29bit bi9directional )/O port with internal p!ll9!ps. The -ort % o!tp!t b!ffers
can sink/so!rce fo!r TT+ inp!ts. *hen %s are written to -ort % pins they are p!lled high
by the internal p!ll9!ps and can be !sed as inp!ts. "s inp!ts, -ort % pins that are
e(ternally being p!lled low will so!rce c!rrent ())+) beca!se of the internal p!ll9!ps. -ort
% also receives the low9order address bytes d!ring Flash programming and verification.
ort 2+
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-ort 8 is an 29bit bi9directional )/O port with internal p!ll9!ps. The -ort 8 o!tp!t b!ffers
can sink/so!rce fo!r TT+ inp!ts. *hen %s are written to -ort 8 pins they are p!lled high
by the internal p!ll9!ps and can be !sed as inp!ts. "s inp!ts, -ort 8 pins that are
e(ternally being p!lled low will so!rce c!rrent ())+) beca!se of the internal p!ll9!ps.
-ort 8 emits the high9order address byte d!ring fetches from e(ternal program memory
and d!ring accesses to e(ternal data memory that !se %<9bit addresses (.O=G H
-T;). )n this application, it !ses strong internal p!ll9!ps when emitting %s. !ring
accesses to e(ternal data memory that !se 29bit addresses (.O=G H ;)), -ort 8 emits
the contents of the -8 #pecial F!nction ;egister. -ort 8 also receives the high9order
address bits and some control signals d!ring Flash programming and verification.
ort #+
-ort : is an 29bit bi9directional )/O port with internal p!ll9!ps. The -ort : o!tp!t b!ffers
can sink/so!rce fo!r TT+ inp!ts. *hen %s are written to -ort : pins they are p!lled high
by the internal p!ll9!ps and can be !sed as inp!ts. "s inp!ts, -ort : pins that are
e(ternally being p!lled low will so!rce c!rrent ())+) beca!se of the p!ll9!ps. -ort : also
serves the f!nctions of vario!s special feat!res of the "T23048 as listed belowE -ort :
also receives some control signals for Flash programming and verification.
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ALE/PROG:
"ddress +atch ,nable o!tp!t p!lse for latching the low byte of the address d!ring
accesses to e(ternal memory. This pin is also the program p!lse inp!t (-;O1) d!ring
Flash programming. )n normal operation "+, is emitted at a constant rate of %/< the
oscillator freF!ency, and may be !sed for e(ternal timing or clocking p!rposes. Note,
however, that one "+,
-!lse is skipped d!ring each access to e(ternal ata .emory. )f desired, "+, operation
can be disabled by setting bit & of #F; location 2,$. *ith the bit set, "+, is active only
d!ring a .O=G or .O=0 instr!ction. Otherwise, the pin is weakly p!lled high. #etting
the "+,9disable bit has no effect if the microcontroller is in e(ternal e(ec!tion mode.
R.S.T+
;eset inp!t. " high on this pin for two machine cycles while the oscillator is r!nning
resets the device.
S.-+
-rogram #tore ,nable is the read strobe to e(ternal program memory. *hen the
"T23048 is e(ec!ting code from e(ternal program memory, -#,N is activated twice
each machine cycle, e(cept that two -#,N activations are skipped d!ring each access
to e(ternal data memory.
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.A/(+
,(ternal "ccess ,nable. ," m!st be strapped to 1N in order to enable the device to
fetch code from e(ternal program memory locations starting at &&&&$ !p to FFFF$.
Note, however, that if lock bit % is programmed, ," will be internally latched on reset.
," sho!ld be strapped to =00 for internal program e(ec!tions. This pin also receives
the %89volt programming enable voltage (=--) d!ring Flash programming, for parts that
reF!ire %89volt =--.
0TAL!+
)np!t to the inverting oscillator amplifier and inp!t to the internal clock operating circ!it.
0TAL2+
O!tp!t from the inverting oscillator amplifier.
Osci''ator C*aracters+
GT"+% and GT"+8 are the inp!t and o!tp!t, respectively, of an inverting amplifier which
can be config!red for !se as an on9chip oscillator, as shown in Fig!re %. ,ither a F!art>
crystal or ceramic resonator may be !sed. To drive the device from an e(ternal clock
so!rce, GT"+8 sho!ld be left !nconnected while GT"+% is driven as shown in Fig!re 8.
There are no reF!irements on the d!ty cycle of the e(ternal clock signal, since the inp!t
to the internal clocking circ!itry is thro!gh a divide9by9two flip9flop, b!t minim!m and
ma(im!m voltage high and low time specifications m!st be observed.
Id'e %ode+
)n idle mode, the 0-D p!ts itself to sleep while all the on chip peripherals remain active.
The mode is invoked by software. The content of the on9chip ;". and all the special
f!nctions registers remain !nchanged d!ring this mode. The idle mode can be
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terminated by any enabled interr!pt or by a hardware reset. )t sho!ld be noted that
when idle is terminated by a hard ware reset, the device normally res!mes program
e(ec!tion, from where it left off, !p to two machine cycles before the internal reset
algorithm takes control. On9chip hardware inhibits access to internal ;". in this event,
b!t access to the port pins is not inhibited. To eliminate the possibility of an !ne(pected
write to a port pin when )dle is terminated by reset, the instr!ction following the one that
invokes )dle sho!ld not be one that writes to a port pin or to e(ternal memory.
rogramming t*e 1'as*+
The "T23048 is normally shipped with the on9chip Flash memory array in the erased
state (that is, contents I FF$) and ready to be programmed. The programming interface
accepts either a high9voltage (%89volt) or a low9voltage (=00) program enable signal.
The low9voltage programming mode provides a convenient way to program the
"T23048 inside the !serAs system, while the high9voltage programming mode is
compatible with conventional third party Flash or ,-;O. programmers. The "T23048
is shipped with either the high9voltage or low9voltage programming mode enabled.
The "T23048 code memory array is programmed byte by byte in either programming
mode. To program any nonblank byte in the on9chip Flash .emory, the entire memory
m!st be erased !sing the 0hip ,rase .ode.
Programming !lgorit"m
Before programming the "T23048, the address, data and control signals sho!ld be set
!p according to the Flash programming mode table. To program the "T23048, take the
following steps.
%. )np!t the desired memory location on the address lines.
8. )np!t the appropriate data byte on the data lines.
:. "ctivate the correct combination of control signals.
6. ;aise ,"/=-- to %8= for the high9voltage programming mode.
4. -!lse "+,/-;O1 once to program a byte in the Flash array or the lock bits. The
byte9write cycle is self9timed and typically takes no more than %.4 ms.
;epeat steps % thro!gh 4, changing the address and data for the entire array or !ntil the
end of the object file is reached.
Data o''ing+
The "T23048 feat!res ata -olling to indicate the end of a write cycle. !ring a write
cycle, an attempted read of the last byte written will res!lt in the complement of the
written dat!m on -O.7. Once the write cycle has been completed, tr!e data are valid on
all o!tp!ts, and the ne(t cycle may begin. ata -olling may begin any time after a write
cycle has been initiated.
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Read&/2us&+
The progress of byte programming can also be monitored by the ;J/B#J o!tp!t
signal. -:.6 is p!lled low after "+, goes high d!ring programming to indicate BD#J.
-:.6 is p!lled high again when programming is done to indicate ;,"J.
rogram (eri3&E
)f lock bits +B% and +B8 have not been programmed, the programmed code data can be
read back via the address and data lines for verification. The lock bits cannot be verified
directly. =erification of the lock bits is achieved by observing that their feat!res are
enabled.
C*ip .raseE
The entire Flash array is erased electrically by !sing the proper combination of control
signals and by holding "+,/-;O1 low for %& ms. The code array is written with all K%Ls.
The chip erase operation m!st be e(ec!ted before the code memory can be re9
programmed.
Reading t*e Signature 2&tes+
The signat!re bytes are read by the same proced!re as a normal verification of
locations &:&$, &:%$, and &:8$, e(cept that -:.< and -:.7 m!st be p!lled to a logic
low. The val!es ret!rned are as follows.
(&:&$) I %,$ indicates man!fact!red by "tmel
(&:%$) I 4%$ indicates 23048
(&:8$) I FF$ indicates %8= programming
(&:8$) I &4$ indicates 4= programming
Specia' 1unction Registers+
" map of the on9chip memory area called the #pecial F!nction ;egister (#F;) space.
Note that not all of the addresses are occ!pied, and !nocc!pied addresses may not be
implemented on the chip. ;ead accesses to these addresses will in general ret!rn
random data, and write accesses will have an indeterminate effect. Dser software
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sho!ld not write %s to these !nlisted locations, since they may be !sed in f!t!re
prod!cts to invoke.
Data %emor&+
The "T23048 implements 84< bytes of on9chip ;".. The !pper %82 bytes occ!py a
parallel address space to the #pecial F!nction ;egisters. That means the !pper %82
bytes have the same addresses as the #F; space b!t are physically separate from
#F; space. *hen an instr!ction accesses an internal location above address 7F$, the
address mode !sed in the instr!ction specifies whether the 0-D accesses the !pper
%82 bytes of ;". or the #F; space. )nstr!ctions that !se direct addressing access
#F; space. new feat!res. )n that case, the reset or inactive val!es of the new bits will
always be &.
#nterrupt $egisters
The individ!al interr!pt enable bits are in the ), register. Two priorities can be set for
each of the si( interr!pt so!rces in the )- register. specifies whether the 0-D accesses
the !pper %82 bytes of ;". or the #F; space. )nstr!ctions that !se direct addressing
access #F; space. For e(ample, the following direct addressing instr!ction accesses
the #F; at location &"&$ (which is -8).
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)nstr!ctions that !se indirect addressing access the !pper %82 bytes of ;".. For
e(ample, the following indirect addressing instr!ction, where ;& contains &"&$,
accesses the data byte at address &"&$, rather than -8 (whose address is &"&$).
Timer 0 and !+
Timer & and Timer % in the "T23048 operate the same way as Timer & and Timer % in
the "T2304%.
Timer 2+
Timer 8 is a %<9bit Timer/0o!nter that can operate as either a timer or an event co!nter.
The type of operation is selected by bit 0/T8 in the #F; T80ON. Timer 8 has three
operating modesE capt!re, a!to9reload (!p or down co!nting), and ba!d rate generator.
The modes are selected by bits in T80ON. Timer 8 consists of two 29bit registers, T$8
and T+8. )n the Timer f!nction, the T+8 register is incremented every machine cycle.
#ince a machine cycle consists of %8 oscillator periods, the co!nt rate is %/%8 of the
oscillator freF!ency. )n the 0o!nter f!nction, the register is incremented in response to
a %9to9& transition at its corresponding e(ternal inp!t pin, T8. )n this f!nction, the
e(ternal inp!t is sampled d!ring #4-8 of every machine cycle. *hen the samples show
a high in one cycle and a low in the ne(t cycle, the co!nt is incremented. The new co!nt
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val!e appears in the register d!ring #:-% of the cycle following the one in which the
transition was detected. #ince two machine cycles (86 oscillator periods) are reF!ired to
recogni>e a %9to9& transition, the ma(im!m co!nt rate is %/86 of the oscillator freF!ency.
To ens!re that a given level is sampled at least once before it changes, the level sho!ld
be held for at least one f!ll machine cycle.
Capture %ode+
)n the capt!re mode, two options are selected by bit ,G,N8 in T80ON. )f ,G,N8 I &,
Timer 8 is a %<9bit timer or co!nter which !pon overflow sets bit TF8 in T80ON. This bit
can then be !sed to generate an interr!pt. )f ,G,N8 I %, Timer 8 performs the same
operation, b!t a %9 to9& transition at e(ternal inp!t T8,G also ca!ses the c!rrent val!e
in T$8 and T+8 to be capt!red into 0"-8$ and ;0"-8+, respectively. )n addition, the
transition at T8,G ca!ses bit ,GF8 in T80ON to be set. The ,GF8 bit, like TF8, can
generate an interr!pt.
Auto4re'oad (Up or Do)n Counter)+
Timer 8 can be programmed to co!nt !p or down when config!red in its %<9bit a!to9
reload mode. This feat!re is invoked by the 0,N (own 0o!nter ,nable) bit located in
the #F; T8.O. Dpon reset, the 0,N bit is set to & so that timer 8 will defa!lt to
co!nt !p. *hen 0,N is set, Timer 8 can co!nt !p or down, depending on the val!e of
the T8,G pin.
Interrupts+
The "T23048 has a total of si( interr!pt vectorsE two e(ternal interr!pts ()NT& and
)NT%), three timer interr!pts (Timers &, %, and 8), and the serial port interr!pt. ,ach of
these interr!pt so!rces can be individ!ally enabled or disabled by setting or clearing a
bit in #pecial F!nction ;egister ),. ), also contains a global disable bit, ,", which
disables all interr!pts at once. Note that bit position ),.< is !nimplemented. )n the
"T2304%, bit position ),.4 is also !nimplemented. Dser software sho!ld not write %s to
these bit positions, since they may be !sed in f!t!re "T23 prod!cts. Timer 8 interr!pt is
generated by the logical O; of bits TF8 and ,GF8 in register T80ON. Neither of these
flags cleared by hardware when the service ro!tine is vectored . )n fact, the service
ro!tine may have to determine whether it was TF8 or ,GF8 that generated the
interr!pt, and that bit will have to be cleared in software. . The Timer & and Timer %
flags, TF& and TF%, are set at #4-8 of the cycle in which the timers overflow.
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The val!es are then polled by the circ!itry in the ne(t cycle.$owever, the Timer 8 flag,
TF8, is set at #8-8 and is polled in the same cycle in which the timer overflows.
SERIAL COMMUNICATION:
Computers trans3er data in t)o )a&s+
ara''e'+ Often 2 or more lines (wire cond!ctors) are !sed to transfer data to a device
that is only a few feet away.
Seria'+ To transfer to a device located many meters away, the serial method is !sed.
The data is sent one bit at a time.
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"t the transmitting end, the byte of data m!st be converted to serial bits !sing parallel9
in9serial9o!t shift register. "t the receiving end, there is a serial in9parallel9o!t shift
register to receive the serial data and pack them into byte. *hen the distance is short,
the digital signal can be transferred as it is on a simple wire and reF!ires no mod!lation.
)f data is to be transferred on the telephone line, it m!st be converted from &s and %s to
a!dio tones.
This conversion is performed by a device called a modem, K.od!lator/demod!latorL.
Seria' data communication uses t)o met*ods5 #ynchrono!s method transfers a
block of data at a time "synchrono!s method transfers a single byte at a time )t is
possible to write software to !se either of these methods, b!t the programs can be
tedio!s and long. There are special )0 chips made by many man!fact!rers for serial
comm!nications UART (universa' as&nc*ronous Receiver transmitter) USART
(universa' s&nc*ronous as&nc*ronous Receiver4transmitter)6 )f data can be
transmitted and received, it is a d!ple( transmission. )f data transmitted one way a time,
it is referred to as half d!ple(. )f data can go both ways at a time, it is f!ll d!ple(.
" protocol is a set of r!les agreed by both the sender and receiver on.
*hen the data begins and ends. "synchrono!s serial data comm!nication is widely
!sed for character9oriented transmissions?
,ach character is placed in between start and stop bits, this is called framing.
Block9oriented data transfers !se the synchrono!s method.
The start bit is always one bit, b!t the stop bit can be one or two bits The start bit is
always a & (low) and the stop bit(s) is % (high)
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#BDF is an 29bit register !sed solely for serial comm!nication. For a byte data to be
transferred via the T( line, it m!st be placed in the #BDF ;egister. The moment a byte
is written into #BDF, it is framed with the start and stop bits and transferred serially via
the T( line #BDF holds the byte of data when it is received by 2&4% ;( line. *hen
the bits are received serially via ;(, the 2&4% de9frames it by eliminating the stop and
start bits, making a byte o!t of the data received, and then placing it in #BDF
.O= #BDF,MAA ?load #BDFI66h, "#0)) for @A
.O= #BDF," ?copy acc!m!lator into #BDF
.O= ",#BDF ?copy #BDF into acc!m!lator
SCO- is an $47it register used to program t*e start 7it8 stop 7it8 and data 7its o3
data 3raming8 among ot*er t*ings.
S%08 S%!+ They determine the framing of data by specifying the n!mber of bits per
character, and the start and stop bits.
S%2+ This enables the m!ltiprocessing capability of the 2&4%.
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R.- (receive ena7'e)+ )t is a bit9addressable register6 *hen it is high, it allows 2&4% to
receive data.
R9D pin+ )f low, the receiver is disable6
TI (transmit interrupt)+ *hen 2&4% finishes the transfer of 29bit character. )t raises T)
flag to indicate that it is ready to transfer another byte.T) bit is raised at the beginning of
the stop bit
RI (receive interrupt)+ *hen 2&4% receives data serially via ;(, it gets rid of the start
and stop bits and places the byte in #BDF register. )t raises the ;) flag bit to indicate
that a byte has been received and sho!ld be picked !p before it is lost. ;) is raised
halfway thro!gh the stop bit.
Description
T#"+<8&& is a high efficiency infrared emitting diode in 1a"l"s on 1a"s technology,
molded in clear, bl!egrey tinted plastic packages.
)n comparison with the standard 1a"s on 1a"stechnology these emitters achieve more
than %&& ' radiant power improvement at a similar wavelength.
The forward voltages at low c!rrent and at high p!lse c!rrent ro!ghly correspond to the
low val!es of the standard technology. Therefore these emitters are ideally s!itable as
high performance replacements of standard emitters.
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%eatures
N ,(tra high radiant power and radiant intensity
N $igh reliability
N +ow forward voltage
N #!itable for high p!lse c!rrent operation
N #tandard T9%O (4 mm) package
N "ngle of half intensity I P %7Q
N -eak wavelength I 36& nm
N 1ood spectral matching to #i photodetectors
&asic C"aracteristics
Tamb I 84 Q0, !nless otherwise specified
Parameter 'est Condition (ym)ol Min. 'ype Ma*. +nit
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Forward
voltage
)(f)I%&&m"
t(p)I8&m# =(f)
%.:4
%.< v
)(f)I% "
t(p)I%&&!s =(f) 8.< : v
Temp.
0offecient
of =(f)
)(f)I%&&m" Tk (vf) 9%.: m=/C
!pplications
)nfrared remote control !nits with high power reF!irements
Free air transmission systems
)nfrared so!rce for optical co!nters and card readers
); so!rce for smoke detectors
Description
The T#O-%7 series are miniat!ri>ed receivers for infrared remote control systems. -)N
diode and preamplifier are assembled on lead frame, the epo(y package is designed as
); filter. The demod!lated o!tp!t signal can directly be decoded by a microprocessor.
T#O-%7 is the standard ); remote control receiver series, s!pporting all major
transmission codes.
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%eatures
-hoto detector and preamplifier in one package
)nternal filter for -0. freF!ency
)mproved shielding against electrical field dist!rbance
+ow power cons!mption
$igh imm!nity against ambient light
0ontin!o!s data transmission possible(!pto86&&bps)
TT+ and 0.O# compatibility
O!tp!t active low
#!itable b!rst length %& cycles/b!rst
The circ!it of the T#O-%7 is designed in that way that !ne(pected o!tp!t p!lses d!e to
noise or dist!rbance signals are avoided. " bandpassfilter, an integrator stage and an
a!tomatic gain control are !sed to s!ppress s!ch dist!rbances. The disting!ishing mark
between data signal and dist!rbance signal are carrier freF!ency, b!rst length and d!ty
cycle. The data signal sho!ld f!llfill the following conditionE R 0arrier freF!ency sho!ld
be close to center freF!ency of the bandpass (e.g. :2k$>). R

B!rst length sho!ld be %& cycles/b!rst or longer. "fter each b!rst which is between %&
cycles and 7& cycles a gap time of at least %6 cycles is neccessary. R For each b!rst
which is longer than %.2ms a corresponding gap time is necessary at some time in the
data stream. This gap time sho!ld have at least same length as the b!rst. R
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Dp to %6&& short b!rsts per second can be received contin!o!sly. #ome e(amples for
s!itable data format areE N,0 0ode, Toshiba .icom Format, #harp 0ode, ;04 0ode,
;0< 0ode, ;8&&& 0ode, #ony Format (#);0#).
*hen a dist!rbance signal is applied to the T#O-%7.. it can still receive the data signal.
$owever the sensitivity is red!ced to that level that no !ne(pected p!lses will occ!r.
#ome e(amples for s!ch dist!rbance signals which are s!ppressed by the T#O-%7..
areE R 0 light (e.g. from t!ngsten b!lb or s!nlight) R 0ontin!o!s signal at :2k$> or at
any other freF!ency R #ignals from fl!orescent lamps with electronic ballast (an e(ample
of the signal mod!lation is in the fig!re below).
" diode is a two9terminal electronic component that cond!cts electric c!rrent in only
one direction. The term !s!ally refers to a semiconductor diode, the most common
type today, which is a crystal of semicond!ctor connected to two electrical terminals, a
-9N j!nction.
The most common f!nction of a diode is to allow an electric c!rrent in one direction
(called the diodeSs forward direction) while blocking c!rrent in the opposite direction (the
reverse direction). Th!s, the diode can be tho!ght of as an electronic version of a check
valve. This !nidirectional behavior is called rectification, and is !sed to convert
alternating c!rrent to direct c!rrent, and remove mod!lation from radio signals in radio
receivers.
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The e'ectrica' resistance of an object is a meas!re of its opposition to the passage of
a steady electric c!rrent. "n object of !niform cross section will have a resistance
proportional to its length and inversely proportional to its cross9sectional area, and
proportional to the resistivity of the material.
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The resistance of a resistive object determines the amo!nt of c!rrent thro!gh the object
for a given potential difference across the object, in accordance with OhmSs lawE ) I=/;
R is the resistance of the object, meas!red in ohms, eF!ivalent to TRs/0
8

V is the potential difference across the object, meas!red in volts
I is the c!rrent thro!gh the object, meas!red in amperes
For a wide variety of materials and conditions, the electrical resistance does not depend
on the amo!nt of c!rrent thro!gh or the amo!nt of voltage across the object, meaning
that the resistance ; is constant for the given temperat!re and material. Therefore, the
resistance of an object can be defined as the ratio of voltage to c!rrent.)n the case of
nonlinear objects (not p!rely resistive, or not obeying OhmSs law), this ratio can change
as c!rrent or voltage changes? the ratio taken at any partic!lar point, the inverse slope
of a chord to an )U= c!rve, is sometimes referred to as a Vchordal resistanceV or Vstatic
resistanceV.
W

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" cr&sta' osci''ator is an electronic circ!it that !ses the mechanical resonance of a
vibrating crystal of pie>oelectric material to create an electrical signal with a very
precise freF!ency. This freF!ency is commonly !sed to keep track of time (as in F!art>
wristwatches), to provide a stable clock signal for digital integrated circ!its, and to
stabili>e freF!encies for radio transmitters and receivers. The most common type of
pie>oelectric resonator !sed is the F!art> crystal, so oscillator circ!its designed aro!nd
them were called Vcrystal oscillatorsV.
X!art> crystals are man!fact!red for freF!encies from a few tens of kilohert> to tens of
megahert>.
29 | P a g e

" F!art> crystal can be modelled as an electrical network with a low impedance
(series) and a high impedance (parallel) resonance point spaced closely together.
" vo'tage regu'ator is an electrical reg!lator designed to a!tomatically maintain a
constant voltage level.)t may !se an electromechanical mechanism, or passive or active
electronic components. epending on the design, it may be !sed to reg!late one or
more "0 or 0 voltages.
=oltage reg!lators operate by comparing the act!al o!tp!t voltage to some internal
fi(ed reference voltage. "ny difference is amplified and !sed to control the reg!lation
element in s!ch a way as to red!ce the voltage error. This forms a negative feedback
control loop? increasing the open9loop gain tends to increase reg!lation acc!racy b!t
30 | P a g e
red!ce stability (avoidance of oscillation, or ringing d!ring step changes). There will also
be a trade9off between stability and the speed of the response to changes.
I3 t*e output vo'tage is too 'o) the reg!lation element is commanded to prod!ce a
higher o!tp!t voltage 9 by dropping less of the inp!t voltage or to draw inp!t c!rrent for
longer periods
i3 t*e output vo'tage is too *ig* the reg!lation element will normally be commanded
to prod!ce a lower voltage. $owever, many reg!lators have over9c!rrent protection, so
that they will entirely stop so!rcing c!rrent (or limit the c!rrent in some way) if the o!tp!t
c!rrent is too high, and some reg!lators may also sh!t down if the inp!t voltage is
o!tside a given range
.

" capacitor or condenser is a passive electronic component consisting of a pair of
cond!ctors separated by a dielectric (ins!lator). *hen a potential difference (voltage)
e(ists across the cond!ctors, an electric field is present in the dielectric. This field
stores energy and prod!ces a mechanical force between the cond!ctors. The effect is
greatest when there is a narrow separation between large areas of cond!ctor, hence
capacitor cond!ctors are often called plates.
0apacitors are widely !sed in electronic circ!its to block the flow of direct c!rrent while
allowing alternating c!rrent to pass, to filter o!t interference, to smooth the o!tp!t of
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power s!pplies, and for many other p!rposes. They are !sed in resonant circ!its in
radio freF!ency eF!ipment to select partic!lar freF!encies from a signal with many
freF!encies.

TYPES OF CAPACITOR:
A'uminum .'ectro'&tic Capacitors
"(ial +eads ;adial +eads 0omp!ter 1rade #nap .o!nt Twist +ok #!rface .o!nt
Tanta'um Capacitors
32 | P a g e
#olid Tantal!m
( "(ial +eads )
#olid Tantal!m
( ;adial +eads )
Foil Tantal!m
( "(ial +eads )
ipped Tantal!m *et Tantal!m #!rface .o!nt
Ceramic Capacitors
ip 1!ard
.onolithic
( "(ial +eads )
.onolithic
( ;adial +eads )
isc #!rface .o!nt
1i'm Capacitors
-olyester
( "(ial +eads )
-olyester
( ;adial +eads )
-olypropylene
( "(ial +eads )
-olypropylene
( ;adial +eads )
-olystyrene
( "(ial +eads )
%ica Capacitors
ipped .ica .etal 0lad Transmitting
Oi' Capacitors
$ermetically #ealed
( "(ial +eads )
$ermetically #ealed
( ;adial +eads )
Ot*er Capacitor T&pes
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=ac!!m 0apacitors Trimmers Feed Thr!


)n electronics, a s)itc* is an electrical component that can break an electrical
circ!it, interr!pting the c!rrent or diverting it from one cond!ctor to another.
The most familiar form of switch is a man!ally operated electromechanical device
with one or more sets of electrical contacts.
,ach set of contacts can be in one of two statesE either SclosedS meaning the
contacts are to!ching and electricity can flow between them, or SopenS, meaning the
contacts are separated and noncond!cting.
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" switch may be directly manip!lated by a h!man as a control signal to a system,
s!ch as a comp!ter keyboard b!tton, or to control power flow in a circ!it, s!ch as a
light switch. "!tomatically9operated switches can be !sed to control the motions of
machines, for e(ample, to indicate that a garage door has reached its f!ll open
position or that a machine tool is in a position to accept another workpiece. #witches
may be operated by process variables s!ch as press!re, temperat!re, flow, c!rrent,
voltage, and force, acting as sensors in a process and !sed to a!tomatically control
a system.
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