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This document contains a multiple choice quiz with 6 sections testing knowledge of computer architecture, assembly language, and digital logic. It covers topics like processor modes, instruction execution cycles, addressing modes, boolean logic, and number systems including binary, hexadecimal, and two's complement. The quiz contains multiple choice, short answer, tracing, arithmetic, and base conversion problems.
Исходное описание:
This is a sample exam given in an x86 assembly language programming course.
This document contains a multiple choice quiz with 6 sections testing knowledge of computer architecture, assembly language, and digital logic. It covers topics like processor modes, instruction execution cycles, addressing modes, boolean logic, and number systems including binary, hexadecimal, and two's complement. The quiz contains multiple choice, short answer, tracing, arithmetic, and base conversion problems.
This document contains a multiple choice quiz with 6 sections testing knowledge of computer architecture, assembly language, and digital logic. It covers topics like processor modes, instruction execution cycles, addressing modes, boolean logic, and number systems including binary, hexadecimal, and two's complement. The quiz contains multiple choice, short answer, tracing, arithmetic, and base conversion problems.
1. Flat addressing is used in which processor mode(s)? a. Protected b. Virtual-8086 c. Real-address d. System management
2. Which language (or virtual machine) uses short mnemonics such as ADD and SUB to identify instructions? a. conventional machine language b. ISA-level language c. assembly language d. microcode interpreter
3. Which directive identifies the part of a program containing instructions? a. .DATA b. .CODE c. .STACK d. .PROG
4. Segment-offset addressing is used in which processor mode(s)? a. Protected b. Virtual-8086 c. Real-address d. System management
5. The three types of buses connected to the CPU are: a. data, system, address b. address, control, memory c. data, address, control d. fetch-decode, control, execution
2 of 5 6. What is the smallest signed integer that may be stored in 16 bits? a. -32767 b. -65536 c. -65535 d. -32768
7. Which flag is set when the result of a signed arithmetic operation is too large to fit? a. Sign b. Carry c. Overflow d. Auxiliary Carry
8. Which register is known as an accumulator? a. EDX b. EBX c. ECX d. EAX
9. During which phase of the instruction execution cycle does the program counter is incremented? a. decode b. execute c. operand fetch d. fetch
10. List the three primary steps of the instruction execution cycle, in sequential order: a. fetch, decode, memory write b. fetch, memory read, execute c. decode, fetch, execute d. fetch, decode, execute
3 of 5 Question # 2. Short Answer (20 points; 5 points each) 1. What is the range of signed integers that may be stored in a 32 bit register?
2. What is the value and the order of operations in the expression 6 MOD 5+ (24+1) * 4?
3. In real-address mode, convert the following hexadecimal segment-offset address to a 20-bit physical address: 8AF4:C92D.
4. Construct the truth table for the Boolean expression X (Y Z)
X Y Z Y Z X (Y Z)
4 of 5 Question # 3. Tracing Problem (10 points)
What is the final hexadecimal value of AX when this code executes? Add comments next to each instruction.
Perform the following calculation in 8-bit 2s complements arithmetic. Be sure to give the final answer in decimal. In each case, indicate when arithmetic overflow occurs. Also indicate when a carry out is discarded from the most significant bit position.