How does a Memristor work ?

Advantages of Memristor Processors Sneak Current Paths

Xyce and OSC Cluster
Outcome ?
Current versions of SPICE are limited to small
crossbars. Xyce could model larger crossbars.
Xyce developed by Sandia Labs Jan 2014 .
Supports large scale parallel computing
architectures using hundreds of processors .
Uses Message Passing Implementation (MPI).
The Ohio Supercomputer (OSC) Oakley
cluster (8,324 cores) is used for this work.
What is a Memristor Device ?
Exploring the Capabilities of Large Scale Memristor Crossbars
Roshni Uppala
Advisor: Dr. Tarek M. Taha
Abstract: The memristor is a novel nano-scale device discovered in 2008. Initial studies have shown that memristor based neuromorphic processors
consume 300,000 times less power than a traditional Intel Xeon Processor for neural network applications. A key problem in the current approach is
modelling large arrays of memristors. Unfortunately no group has been able to do this yet. The aim of this project is to model large memristor crossbar
using Xyce, a new parallel circuit simulator. These simulations will be used to evaluate power efficiency, robustness, and effects of noise on the crossbars.
Fourth fundamental passive circuit element.
Combines the behavior of resistor and
memory.
I-V characteristics is a pinched hysteresis loop.
Xyce, a parallel circuit simulator, is very new and
will likely allow large circuit simulation. This
will pave the path to analyze the behaviors of
such large crossbars which can eventually be
used to build memristor chips.
Memristor based architectures provide energy
efficient cognitive computing which has strong
SWAP (size, weight and power) benefits.
Low
Resistance
Multi-core neuromorphic architectures can :
accelerate key application kernels (such as fft,
k-means, etc.) as neural networks.
RMS based applications such as chip routing,
video encoding, etc.
IBM True North :
Multicore SRAM
based neural
architecture.
Small kernels
grouped to implement
large applications.
Electric current through the memristors shifts
the oxygen vacancies, causing a gradual
change in electrical resistance.
Initial HP design : Titanium
oxide (TiO
2
) and oxygen
deficient (TiO
2-x
) layer of
width D is sandwiched
between two platinum
electrodes.
+ve
voltage
Oxygen
vacancies
expands
Thicker
TiO
2-x
Layer
-ve
voltage
Oxygen
vacancies
contracts
Thicker
TiO
2
Layer
High
Resistance
IBM True
North
Such paths consume power and degrade signal.
Modelling large arrays of memristors in
SPICE provides low circuit level behaviors.
Advanced tools such as MATLAB, do not
model sneak paths and so are inaccurate.
Low
Resistance
High
Resistance