2

Question 1

(a) Compare and describe the difference between computer architecture and computer
organization.
(8 marks)

Answer:

Computer architecture Computer organization

Computer architecture refers to those
attributes of a system visible to a programmer
or, put another way, those attributes that
have a direct impact on the logical execution
of a program


Computer organization refers to the
operational units and their interconnections
that realize the architectural specifications
e.g.:
It is an organizational issue whether
that instruction will be implemented by
a special multiply unit or by a
mechanism that makes repeated use
of the add unit of the system.
The organizational decision may be
based on the anticipated frequency of
use of the multiply instruction, the
relative speed of the two approaches,
and the cost and physical size of a
special multiply unit





(b) At each level of a computer system hierarchy, two main concepts normally discussed are
structure and function. Define these two concepts.

(4 marks)

Answer:

Structure:
The way in which the components are interrelated

Function:
The operation of each individual component as part of the structure



(c) Name the four main structural components of a computer and define their functions.

(8 marks)

Answer

1 Cen

2 Mai


3 I/O

4 Sys







Questio

(a) De
wi


Answer

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escribe the
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description
(8 marks)

(b) The lines on a bus can be classified into 3 functional groups, namely data bus, address
bus and control bus. Briefly describe each of these bus type.
(6 marks)

Answer:


Data bus



Data bus is a set of bus lines that provide a
path for moving data among system modules.


Address bus



Address bus is a set of bus lines are that
used to designate the source or destination of
the data on the data bus


Define control bus



Control bus is a set of bus lines that are used
to control the access to and the use of the
data and address lines
Control signals transmit both command and
timing information among system modules





(c) Bus lines can be separated into two generic types namely i) dedicated and ii) multiplexed.
Compare and describe the difference between these two types.
(6 marks)

Answer:

Dedicated Bus

Multiplexed Bus

A dedicated bus line is permanently assigned
either to one function or to a physical subset
of computer components

Functional Dedication
An example of functional dedication is the
use of separate dedicated address and data
lines, which is common on many buses

Physical Dedication
Physical dedication refers to the use of
multiple buses, each of which connects only
a subset of modules

A multiplexed bus uses the same lines for
multiple purposes (time multiplexing), e.g.:

Address and data information may be
transmitted over the same set of lines
using an Address Valid control line
At the beginning of a data transfer, the
address is placed on the bus and the
Address Valid line is activated
At this point, each module has a specified
period of time to copy the address and
determine if it is the addressed module
The address is then removed from the
bus, and the same bus connections are
used for the subsequent read or write data
5

transfer




Question 3

(a) Instructions can be categorized into 4 different types. List the 4 instruction types and
briefly describe each of them.
(8 marks)

Answer:


1 Data processing


Arithmetic instructions provide
computational capabilities for processing
numeric data
Logic (Boolean) instructions operate on
the bits of a word as bits rather than as
numbers


2 Data storage



Instructions that initiate movement of data
into or out of register and or memory
locations

3 Data movement



I/O instructions are needed to transfer
programs and data into memory and the
results of computations back out to the user


4 Control


Test instructions are used to test the
value of a data word or the status of a
computation
Branch instructions are then used to
branch to a different set of instructions
depending on the decision made













6

(b) List the sequence of instructions needed to compute the equation in Figure Q3b based on
the following 4 instruction modes. Conclude the total number of instructions that need to
be executed in each case.

i) Three-address instruction format
ii) Two-address instruction format
iii) One-address instruction format
iv) Zero-address instruction format


Y = A - B + (D E)
C

Figure Q3b
(12 marks)

Answer:

i) Three-address instruction format

Instruction Comment
SUB Y,A,B YAB
DIV Y,Y,C YYC
MUL T,D,E TDE
ADD Y,Y,T YY+T
Totalno.ofinstruction:4

ii) Two-address instruction format

Instruction Comment
MOV Y,A YA
SUB Y,B YYB
DIV Y,C YYC
MOV T,D TD
MUL T,E TTE
ADD Y,T YY+T
Totalno.ofinstruction:6

iii) One-address instruction format

Instruction Comment
LOAD A ACA
SUB B ACACB
DIV C ACACC
STOR Y YAC
LOAD D ACD
MPY E ACACE
ADD Y ACAC+Y
7

STOR Y YAC
Totalno.ofinstruction:8

iv) Zero-address instruction format

Instruction Comment
PUSH E (T)E Stack:
E
PUSH D (T)D Stack:
D
E
MUL (T)(T)(T1) Stack:
DE
PUSH C (T)C Stack:
C
DE
PUSH B (T)B Stack:
B
C
DE
PUSH A (T)A Stack:
A
B
C
DE
SUB (T)(T)(T1) Stack:
AB
C
DE
DIV (T)(T)(T1) Stack:
AB
C
DE
ADD (T)(T)+(T1) Stack:
AB+DE
C
POP Y Y(T)
Totalno.ofinstruction:10
*(T):Topofstack
*(T1):Secondtopelementofstack

Question


(a) De





Answer




(b) De
va

Answer

The disp
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escribe the
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escribe Dis
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(8 marks)
ree of its
(8 marks)

Where E
A: The v
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Diagram

Displace
which is
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Three o
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(c) By
sp
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Answer

12- bits
23 opco
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1 1 1 1
1 1 1 1
1 1 1 1


1 1 1 1
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EA is the ef
value in the
ntent of a re
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ase-register
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odes require
maining bits
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ffective addr
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egister
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contained in
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expanding
set of 23
24-bits.
rved for 3 a
es only 5 bit
(MSB) are
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:
:
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ress (finalize
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ed address)
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3-address in
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9
ast one of
a register
nstructions
h of each
(4 marks)

1 1 1 1




Questio

(a) Dr


Answer



(b) Fo
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i
i


1 1 1 1
on 5
raw the bloc
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10
nents.
(4 marks)
le. Briefly
10 marks)
11

Answer:


Control and timing


The internal resources, such as main
memory and the system bus, must be shared
among a number of activities, including data
I/O
Thus, the I/O function includes a control and
timing requirement, to coordinate the flow of
traffic between internal resources and
external devices


Processor communication


The I/O module must communicate with the
processor and with the external device

Processor communication involves the
following
Command decoding
Data
Status reporting
Address recognition


Device communication


On the other side, the I/O module must be
able to perform device communication
This communication involves commands,
status information, and data.


Data buffering


Transfer rate into and out of main memory or
the processor is quite high, the rate is orders
of magnitude lower for many peripheral
devices and covers a wide range
Data coming from main memory are sent to
an I/O module in a rapid burst
The data are buffered in the I/O module and
then sent to the peripheral device at its data
rate

In the opposite direction, data are buffered so
as not to tie up the memory in a slow transfer
operation


Error detection


An I/O module is often responsible for error
detection and for subsequently reporting
errors to the processor
One class of errors includes mechanical and
12

electrical malfunctions reported by the device

(e.g., paper jam, bad disk track)
Another class consists of unintentional
changes to the bit pattern as it is transmitted
from device to I/O module






(c) Briefly describe these three I/O techniques.

Programmed I/O
Interrupt driven I/O
DMA

(6 marks)

Answer:


Programmed I/O





With programmed I/O, data are exchanged
between the processor and the I/O module
The processor executes a program that gives
it direct control of the I/O operation, including:
sensing device status,
sending a read or write command,
and transferring the data


Interrupt driven I/O


With interrupt-driven I/O the processor issues
an I/O command, continues to execute other
instructions and is interrupted by the I/O
module when the latter has completed its
work


DMA


In this mode, the I/O module and main
memory exchange data directly, without
processor involvement





End of question paper