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Question 1

(a) As one goes down the memory hierarchy, there are a range of memory types classified
either as internal or external.

i. Define 3 types of memory classified as internal memory
ii. Describe external memory

(8 marks)

Answer:

i. 3 types of internal memory
- Registers
- Main memory
- Cache

ii. External memory
- External memory consists of peripheral storage devices such as disk and tape, that
are accessible to the processor via I/O controllers



(b) The following three parameters are commonly used to measure the memory performance.
Briefly describe each of these performance parameters.

i. Access time (latency)
ii. Memory cycle time
iii. Transfer rate

(6 marks)

Answer:

i. Access time (latency)
For random-access memory, this is the time it takes to perform a read or write operation.
For non-random-access memory, access time is the time it takes to position the read
write mechanism at the desired location

ii. Memory cycle time
This concept is primarily applied to random-access memory and consists of the access
time plus any additional time required before a second access can commence

iii. Transfer rate
This is the rate at which data can be transferred into or out of a memory unit





3

(c) As one goes down the memory hierarchy, define the trend in terms of:

i. cost/bit
ii. capacity
iii. access time
iv. frequency of access
(4 marks)

Answer:

i. cost/ bit
Decreasing cost per bit

ii. capacity
Increasing capacity

iii. access time
Increasing access time

iv. frequency of access
Decreasing frequency of access of the memory by the processor




(d) A variety of physical types of memory have been employed. Name one of the most
common types.
(2 marks)

Answer:

One of these:
i. semiconductor memory
ii. magnetic surface memory, used for disk and tape
iii. optical and magneto-optical





Questio

(a) How

Answer

32 word
bits of th
uses 31
to identi
diagram

Memory







(b) Brie
diag

Answer

Cache m
availabl
of semic










on 2
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address lin
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m of the logic
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efly describ
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:
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ntify their po
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9
a
28
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ts identifying
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ig memory
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he block. Si
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emory in a 2
. a
5
a
4
g blocks
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ory size at t
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n a block. T
nce a 2 Gig
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2 Gig memo
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3
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2

Bits id
and aid you
that of the fa
the price of

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ory space. B
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0

dentifying o
ur descriptio
astest mem
less expens
4
(4 marks)
he last five
ess space
s are used
Below is a
offset
on with a
(4 marks)
mories
sive types
5

(c) Name the three main methods used to map a line in the cache to an address in memory.

(3 marks)

Answer:

1) direct mapping
2) full associative mapping
3) set associative mapping



(d) The table below represents five lines from a cache that uses fully associative mapping
with a block size of eight. Identify the address of the shaded data (FA
16
).

Tag 000 001 010 011 100 101 110 111
0110110110010
2
16 36 66 28 A1 3B D6 78
0100011010101
2
54 C9 6A 63 54 32 00 D3
0001000111011
2
29 8C ED FD 29 54 12 F3
0001111001100
2
39 FA B5 C1 33 9E 33 C8
1001100101101
2
23 4C D2 40 6A 76 A3 F0

(4 marks)

Answer:

The tag for FA
16
is 0001111001100
2
. When combining this with the word id of 001
2
, the address
in main memory from which FA
16
was retrieved is 0001111001100001
2
= 996C
16
.



(e) Is the data from memory address 46AB
16
contained in the table from the previous sample
cache? If it is, retrieve the data.
(5 marks)

Answer:

For this cache, the last three bits identify the word and the rest of the bits act as the tag. Since
46AB
16
= 0100011010101011
2
, then 011
2
is the word id and 0100011010101
2
is the tag.
Scanning the rows shows that the second row contains this tag, and therefore the table contains
the data in which we are interested. The word identified by 011
2
is 63
16
.





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Question 3

(a) Name the basic element of a semiconductor memory and define its 3 common properties.

(8 marks)

Answer:

The basic element of a semiconductor memory is the memory cell.
The 3 common properties being shared by all semiconductor memory cells are:
i. They exhibit two stable (or semistable) states, which can be used to represent binary 1
and 0
ii. They are capable of being written into (at least once), to set the state
iii. They are capable of being read to sense the state



(b) Describe common characteristics of a dynamic RAM (DRAM).
(4 marks)

Answer:

A dynamic RAM (DRAM) is made with cells that store data as charge on capacitors.
The presence or absence of charge in a capacitor is interpreted as a binary 1 or 0.
Because capacitors have a natural tendency to discharge, dynamic RAMs require periodic
charge refreshing to maintain data storage.


(c) Explain why the term "dynamic" is being used to name DRAM?.
(2 marks)

Answer:

The term dynamic refers to this tendency of the stored charge to leak away, even with power
continuously applied.


(d) Briefly describe how are binary values being stored in SRAM.
(4 marks)

Answer:

In SRAM, binary values are stored using traditional flip-flop logic-gate configurations.
A static RAM will hold its data as long as power is supplied to it.



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(e) Does SRAM need "refresh operation" to retain data?


(2 marks)

Answer:

Unlike the DRAM, no refresh is needed to retain data



Question 4


(a) Briefly describe Operating System (OS).
(4 marks)

Answer:

The OS is a program that
manages the computers resources,
provides services for programmers, and
schedules the execution of other programs

OR

An OS is a program that controls the execution of application programs and acts as an interface
between the user of a computer and the computer hardware



(b) Name and describe at least 3 services provided by OS.
(6 marks)

Answer:

3 of these:

1. Program creation
The OS provides a variety of facilities and services, such as editors and debuggers, to
assist the programmer in creating programs
Typically, these services are in the form of utility programs that are not actually part of
the OS but are accessible through the OS

2. Program execution
A number of tasks need to be performed to execute a program
Instructions and data must be loaded into main memory, I/O devices and files must be
initialized, and other resources must be prepared
The OS handles all of this for the user

3. Access to I/O devices
Each I/O device requires its own specific set of instructions or control signals for
8

operation
The OS takes care of the details so that the programmer can think in terms of simple
reads and writes

4. Controlled access to files
In the case of files, control must include an understanding of not only the nature of the
I/O device (disk drive, tape drive) but also the file format on the storage medium
Again, the OS worries about the details
Further, in the case of a system with multiple simultaneous users, the OS can provide
protection mechanisms to control access to the files

5. System access
In the case of a shared or public system, the OS controls access to the system as a
whole and to specific system resources
The access function must provide protection of resources and data from unauthorized
users and must resolve conflicts for resource contention

6. Error detection and response
A variety of errors can occur while a computer system is running
These include internal and external hardware errors, such as a memory error, or a
device failure or malfunction; and various software errors, such as arithmetic overflow,
attempt to access forbidden memory location, and inability of the OS to grant the
request of an application
In each case, the OS must make the response that clears the error condition with the
least impact on running applications
The response may range from ending the program that caused the error, to retrying
the operation, to simply reporting the error to the application

7. Accounting
A good OS collects usage statistics for various resources and monitor performance
parameters such as response time
On any system, this information is useful in anticipating the need for future
enhancements and in tuning the system to improve performance
On a multiuser system, the information can be used for billing purposes



(c) The key to multiprogramming is scheduling. Define and briefly describe at least two types
of scheduling.
(4 marks)

Answer:

Two of the following:

i. Long-term scheduling
The decision to add to the pool of processes to be executed

ii. Medium-term scheduling
The decision to add to the number of processes that are partially or fully in main
memory
9


iii. Short-term scheduling
The decision as to which available process will be executed by the processor

iv. I/O scheduling
The decision as to which processs pending I/O request shall be handled by an
available I/O device



(d) Describe paging and illustrate an example of allocation pages onto frames.
(6 marks)

Answer:

Paging
When paging s being emloyed, memory is partitioned into equal fixed-size chunks that are
relatively small, and that each process is also divided into small fixed-size chunks of some size.
Then the chunks of a program, known as pages, could be assigned to available chunks of
memory, known as frames, or page frames.

Allocation pages onto frames





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Question 5

(a) Two types of instructions can be used to load a value into an address register, LEA and
MOVEA. Set the value of A1 to $400400 and A2 to $ABCD using the following instructions.

i. LEA.
ii. MOVEA.L
iii. MOVEA.W
(6 marks)

Answer:

i. LEA.

START ORG $400400

LEA $400400,A1
LEA $ABCD,A2

END START


ii. MOVEA.L

START ORG $1000

MOVEA.L #$400400,A1
MOVEA.L #$ABCD,A2

END START


iii. MOVEA.W

START ORG $400400

MOVEA.W #$400400,A1
MOVEA.W #$ABCD,A2

END START









11

(b) Locations $400440 contain a word number. Write a program which will load the contents of
this memory location in a data register D1 and copy the content of this register into memory
location $400450 respectively using the following modes of addressing:

i. Absolute addressing mode (using Register D1)
ii. Indirect addressing mode (using Register D1, A1 and A2)

(10 marks)

Answer:

Absolute addressing mode

START ORG $400400

MOVE. W $400440, D1
MOVE. W D1, $400450

ORG $400440
DC. W $12AB

END START

Indirect addressing mode

START ORG $400400

LEA $400440, A1
LEA $400450, A2
MOVE. W ( A1) , D1
MOVE. W D1, ( A2)

ORG $400440
DC. W $12AB

END START












12

(c) Analyze and fill up the following table with contents before and after program execution
based on answers given in Q5b.

i. Absolute addressing mode

BeforeProgramExecution AfterProgramExecution
Registers/
Memory
Locations

Contents Registers/
Memory
Locations

Contents
$400440 $400440
D1 D1
$400450 $400450

ii. Indirect addressing mode (using Register D1, A1 and A2)

BeforeProgramExecution AfterProgramExecution
Registers/
Memory
Locations

Contents Registers/
Memory
Locations

Contents
$400440 $400440
A1 A1
A2 A2
D1 D1
$400450 $400450


(4 marks)

Answer:

i. Absolute addressing mode

BeforeProgramExecution AfterProgramExecution
Registers/
Memory
Locations

Contents Registers/
Memory
Locations

Contents
$400440 $00000000 $400440 $000012AB
D1 $00000000 D1 $000012AB
$400450 $00000000 $400450 $000012AB








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ii. Indirect addressing mode (using Register D1, A1 and A2)

BeforeProgramExecution AfterProgramExecution
Registers/
Memory
Locations

Contents Registers/
Memory
Locations

Contents
$400440 $00000000 $400440 $000012AB
A1 $00000000 A1 $400440
A2 $00000000 A2 $400450
D1 $00000000 D1 $000012AB
$400450 $00000000 $400450 $000012AB




End of question paper

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