S-band Discrete and MMIC GaN Power Amplifiers

Joakim Nilsson
1
, Niklas Billstrm
1
, Niklas Rorsman
2,
Paolo Romanini
3
1
Microwave & Antennas, Saab Microwave Systems, Saab AB
SE-412 89 Gothenburg, Sweden
1
joakim.u.nilsson@saabgroup.com
2
Chalmers University of Technology, Gothenburg, Sweden
3
SELEX Sistemi Integrati, Rome, Italy

Abstract The use of GaN devices for microwave power
amplifiers begins to be a reality in Europe. This paper describes
two S-band (2.7-3.3 GHz) high power amplifier (HPA) designs;
one discrete 100 W output stage and one 10 W MMIC power
amplifier. The discrete power amplifier is designed using two
GaN power bars with a total gate width of 19.2 mm. The GaN
power bars have been developed by Selex-SI, within the
european co-project Korrigan. The MMIC power amplifier was
designed using a 0.25 m GaN HEMT process supplied and
processed by Chalmers.
I. INTRODUCTION
Future phased array radar systems, (see fig. 1), require more
efficient power amplifier realizations. One way of meeting
these new requirements is to use microwave power transistors
in Wide Band Gap technology. With the possibility of high
supply-voltage, the system power distribution will be more
efficient, resulting in lower losses in voltage conversion. The
high feeding-voltage for the power amplifiers leads to higher
output impedance and therefore simpler matching networks
with lower losses, which contributes to higher system
efficiency. Other advantages with microwave power
transistors in WBG material are heat-hardiness and high
power density. A typical practical power density value is 5
W/mm-gate width for a 30 W GaN-chip in comparison with
less than 1 W/mm with Si or GaAs. That gives, for instance,
greater possibilities to design smaller MMIC-power amplifiers
than with traditional technologies.


Fig 1 Typical block diagram of a phased array T/R-function.
II. DISCRETE 100 W POWER AMPLIFIER
A. Power Bar Device Fabrication Process
The power bars reported below have been fabricated with the
current SELEX Sistemi Integrati GaN-HEMT coplanar
waveguide (CPW) MMIC technology process. This process is
based on an epi-layer structure of GaN/AlGaN/GaN deposited
on a semi insulating SiC substrate by either MOCVD or MBE
techniques. The mask levels for power bar fabrication are
based on a 0.35 Pm resolution I-Line stepper lithography
process enabling high yield 0.5 Pm gate-length devices on
both 2 and 3 inch substrates. Drain and source electrodes of
the devices are made by ohmic contact formation of a
Ti/Al/Ni/Au metallisation to the GaN/AlGaN epi-layer via a
high temperature alloying cycle. Wafer passivation for surface
protection is carried out by SiN plasma-enhanced chemical
vapour deposition (PECVD), while the active device isolation
is achieved via fluorine ion implantation.
For this process, gate metal deposition, annealing and
subsequent SiN passivation have been optimised to minimise
the carrier trap concentration at the respective interfaces
within the semiconductor in order to minimise the respective
gate-leakage current and drain current dispersion phenomenon,
fundamental for achieving high processing yields for large
gate periphery (circa 10 mm) high power density (circa 6
W/mm) devices.
After active device formation the Power Bar fabrication
process is completed with the deposition of NiCr thin-film
resistors and electro-plating of interconnect lines with air-
bridges where necessary.
Figure 2 shows a micrograph of a typical device fabricated
with the above process which is capable of achieving devices
with better than 6 W/mm power density and corresponding
yields better than 75% after selection with a gate-leakage
current screening procedure of less than 0.1 mA/mm.


Fig 2 Micrograph of a 9.6 mm gate-width power bar device.

B. Characterization of packaged GaN power bars
The initial design work began with small-signal simulations
with transistor models provided by the Korrigan project [1]. A
model of a power bar was made by combining four 2.4 mm
unit cells. At the simulations a stabilization network was
derived and then used in the measurement fixtures as well as
for the amplifier design. Figure 3 shows one of the fixtures,
978-2-87487-011-8 2009 EuMA 29 September - 1 October 2009, Rome, Italy
Proceedings of the 39th European Microwave Conference
1848
together with a package, used for the characterization of the
packaged power bars.


Fig 3 Characterisation measurement fixture.
The power bars were glued to the bottom of the package
with normal Ag filled epoxy glue (2-3 W/mK heat
conductivity). The substrate used for the measurement fixture
was Rogers 4350 (H
r
= 3.66). The substrate and the package-
mounted power bars were screwed on to an aluminium carrier
with SMA connectors at the input and output.
Load-Pull measurements at class AB bias were performed
with pulsed gate voltage and RF-signal (50 s at 5% duty-
cycle), at three frequencies covering the targeted frequency
band, 2.7, 3 and 3.3 GHz. The measured small signal gain was
about 10 dB.
The maximum values of output power and PAE at the
measurements with 30 V drain voltage are shown in Table 1.

Table 1 Measured results-Load Pull-measurements.


At the measurements we could not control or monitor the
harmonic loads, which of course contributes to uncertainty
regarding the measured PAE in comparison with PAE of the
final amplifier design.
Finally, to get the necessary input data for the input-matching
network, pulsed S-parameter measurements were performed.
C. Design of Discrete Power Amplifier
Figure 4 shows the measured result of the designed output
matching network (green) in comparison with Load-Pull
characteristics at 2.7 GHz (blue) and 3.3 GHz (red).


Fig 4 Measured output matching network.
One can establish that the designed output matching
network corresponds well with the Load-Pull measurements.
The input matching network was designed using the measured
packaged power bar and the simulated output network acting
as load.
Figure 5 shows the manufactured amplifier. The measured
S-parameters for the discrete amplifier are shown in fig 6.


Fig 5 Manufactured amplifier (size 100x50 mm).



Fig 6 Measured input matching, gain and -factor of the discrete amplifier.
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The amplifier small-signal gain was somewhat low,
(7.5 r 2 dB), compared to the maximum stable gain
calculation from S-parameter measurements, (~ 12.5 dB). The
difference is due to losses in the input matching net and the
power matching of the output. The gain increases, however,
about 0.5-1 dB during the power sweeps, because of the class
AB-mode of the amplifier.

D. Measured Output Power and PAE
Power sweeps were performed at seven discrete frequencies
within the band (2.7-3.3 GHz) with three different drain-
voltages, 25, 30 and 35 V. The measured output power is
shown in fig 7. As seen, the output power drops off at the end
of the frequency band probably due to mismatch in the output
matching network. The peak output power reaches above 120
W at 2.7 and 2.8 GHz with a drain voltage of 35 V, which
means a power density of more than 6 W/mm at amplifier
level. The output power is > 100 W between 2.7 and 3.2 GHz.


Fig 7 Measured output power of the discrete power amplifier.
Fig. 8 shows the PAE at the corresponding power sweeps.
As seen, a maximum PAE of nearly 70% is reached at 2.9
GHz with 25 V drain voltage. The efficiency drops, at most
frequencies when the supply-voltage increases.

Fig 8 Measured PAE for the discrete amplifier.
The measurements on the amplifier show a higher PAE
than for the Load-Pull measurements. It is probably due to the
fact that the harmonic impedances are different in the
amplifier-matching networks than at the Load-Pull
measurements; therefore a higher efficiency is achieved. The
amplifier has also been tested with 200 s pulse length at 20%
duty cycle, still maintaining an output power > 100 W, but
with somewhat lower gain and PAE.
III. MMIC POWER AMPLIFIER
The MMIC power amplifier can be used as a driver stage for
the discrete power amplifier, or as the final HPA for a T/R-
module in a large 2D phased array, and was designed for the
frequency band 2.5-3.5 GHz.
A. MMIC Fabrication Process
The circuit was manufactured at Chalmers microstrip
AlGaN/GaN MMIC process [2]. The AlGaN/GaN epi
structure is based on a 2 m undoped GaN buffer layer on
which a 25 nm Al
0.25
Ga
0.75
N layer is grown resulting in a
typical sheet carrier density of 10
13
cm
2
and a mobility of 1200
cm
2
/Vs according to Hall measurements.
The HEMT is defined and isolated through mesa etching.
Ohmic contacts using a Ti/Al/Ni/Au 200/1100/400/400
metal stack are annealed at 850 Cq for 30 s giving a contact
resistivity of typically 0.4-0.6mm. The component is
passivated with an 800 thick sputtered SiN layer. The gate
is defined in a two step process where a recess is first etched
in the passivation, and the gate metalization is sequentially
deposited with an overlap on the passivation layer giving a
small field plate extending towards both source and drain. The
first metal layer (defining both HEMT electrodes and
transmission lines) consisting of Ti/Au 300/3600 is
deposited, followed by a 3000 thick SiN dielectric for MIM
capacitors. Air-bridges are formed to enable multi-finger
components, top-plate capacitor interconnects and inductor
overpasses. In the same step the transmission lines are
electroplated to minimize conductive losses. A 4 m thick
BCB layer is used for encapsulation. The substrate is lapped
to a thickness of 100 m and via-holes with a diameter of 80
m are etched. The backside is metalized with electroplated
Au. This MMIC process typically produces transistors with a
saturation current of 1A/mm and fT/fmax figures of 23/52
GHz. At 10 GHz, the HEMTs show a power density of 5
W/mm at 30 V drain bias in class AB operation. The passive
component technology which is designed for high voltage
operation are:
MIM capacitors with breakdown voltages of >150 V and
a capacitance per unit area of 200 pF/mm
2
.
Resistors made in TaN thin film technology with a sheet
resistivity of 41 : per square.
Spiral inductors for inductive matching and DC biasing.
B. Design of MMIC HPA
The design targets for the MMIC power amplifier was > 10 W
output power with > 40 % PAE. The simulations showed that
targets were reached with a good margin. In Figure 9, a photo
of the manufactured MMIC is shown.
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Fig 9 Manufactured MMIC power amplifier, (size 2.7x3 mm).
C. Measured Results of the MMIC Power Amplifier
The MMIC was mounted on a Cu carrier and measured
using probes with 150 m pitch. The measurement setup was
calibrated at the probe tips.
The figures 11, 12 show the measured, (CW), transmission,
S
21
and in/output reflection, S
11
and S
22
. As seen in fig 11, the
input matching, S
11
is somewhat shifted down in frequency,
but still reasonable good.

Fig 10 Measured CW gain of the MMIC amplifier.
At the pulsed power sweeps the pulse length, (gate bias and
RF), was set to 50 s with 5 % duty cycle. The small-signal
gain (due to less heating-effect), was about 12 dB over the
frequency band.


Fig 11 Measured CW input and output matching of the MMIC amplifier.
Fig 13-14 show Output power and PAE vs. compression
level at power sweeps with 30 V supply voltage.


Fig 12 Measured power sweeps, Pout vs. compression point.


Fig 13 Measured power sweeps, PAE vs. compression point.
The output power is > 7 W (power density ~ 3.5 W/mm), in
the 2.8-3.5 GHz frequency band at 3-4 dB compression with a
PAE at about 30%.
IV. CONCLUSION
The design and measured results of two S-band GaN power
amplifiers has been reported. The first amplifier, a discrete
design using two 9.6 mm GaN power bars, achieved more
than 100 W of output power and a PAE better than 50% at
2.8-3.2 GHz. The second amplifier, a microstrip 2 mm gate-
width MMIC design, performed 8 W of output power and a
PAE of 30% at 2.5-3.5 GHz.
The results are considered very promising for the
development of high performance phased array radar systems.

REFERENCES
[1] Project number RTP 102.052 within EDA
[2] M. Sdow, M. Fagerlind, M. Thorsell, K. Andersson, N. Billstrm, P.-
. Nilsson and N. Rorsman, An AlGaN/GaN HEMT Based
Microstrip MMIC Process for Advanced Transceiver Design, IEEE
Transactions on Microwave Theory and Techniques, Volume 56,
pp.1827 1833, 2008.

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