1

DS04-27401-4E
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP
Power Supply Monitor
with Watch-Dog Timer
MB3773
I DESCRIPTION
The Fujitsu MB3773 is designed to monitor the voltage level of a power supply (+5V or an
arbitrary voltage) in a microprocessor circuit, memory board in a large-size computer, for
example. The MB3773 also contains a watch-dog timer function to detect uncontrol. Table
status of processor and reset system/processor.
If the circuits power supply deviates more than a specified amount, then the MB3773
generates a reset signal to the microprocessor. Thus, the computer data is protected from
accidental erasure.
When the MB3773 does not receive the clock pulse from the processor in the specified
period, the MB3773 generates a reset signal to the mciroprocessor.
Using the MB3773 requires few external components. To monitor only a +5 volt supply,
the MB3773 requires the connection of one external capacitor.
The MB3773 is available in an 8-pin Dual In-Line package space saving Flat Package, or
a Single In-Line Package.
Precision voltage detection (VS = 4.2V 2.5%)
Threshold level with hysterisis
Low voltage output for reset signal (VCC = 0.8V typ.)
Precision reference voltage output (VREF = 1.245 V1.5%)
External clock monitor and reset signal generator
Negative-edge input watch-dog timer
Minimal number of external components (one capacitor min.)
Available in a variety of packages
8-pin Dual In-Line Package
8-pin Flat Package
8-pin Single In-Line Package
PLASTIC PACKAGE
DIP-8P-M01
PLASTIC PACKAGE
SIP-8P-M03
PLASTIC PACKAGE
FPT-8P-M01
This device contains circuitry to protect the inputs
against damage due to high static voltages or
electric fields. However, it is advised that normal
precautions be taken to avoid application of any
voltage higher than maximum rated voltages to this
high impedance circuit.
2
MB3773
I PIN ASSIGNMENT
I ABSOLUTE MAXIMUM RATINGS
NOTE: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Parameter Symbol Rating Unit
Supply voltage VCC -0.3 to +18 V
Input voltage
VS -0.3 to VCC +0.3 (+18) V
VS -0.3 to +18 V
RESET, RESET Supply voltage VOH -0.3 to VCC +0.3 (+18) V
Power dissipation(Ta 85C) PD 200 mW
Storage temperature TSTG -55 to +125 C
CT
RESET
CK
GND
RESET
VCC
VREF
VS
1
2
3
4
8
7
6
5
Top View
8
7
6
5
Front
RESET
VCC
VS
4
3
2
1
GND
CT
RESET
CK
VREF
(DIP-8P-M01)
(FPT-8P-M01)
(SIP-8P-M03)
View
3
MB3773
I BLOCK DIAGRAM
I RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Value Unit
Supply voltage VCC +3.5 to +16 V
Reset, reset sink current IOL 0 to 20 mA
VREF output current IOUT -200 to +5 A
Watch clock setting time tWD 0.1 to 1000 ms
Rising/falling time tFC, tRC <100 s
Terminal capacitance CT 0.001 to 10 F
Operating ambient temperature Ta -40 to +85 C
CT
+
_
+
_
8 2
7
3
1
4
5
GND
RESET
VS
VCC
R
S
Q
1.24V
40k
1.24V
10A
1.2A
100
k
Watch
Dog
Timer
P.G
+
_
Reference Voltage Generator
+
_
Reference AMP.
VREF
6
COMP.O
RESET
10A
Inhibit
CK
COMP.S
4
MB3773
I ELECTORICAL CHARACTERISTICS
(1) DC Characteristics
(VCC=5V, Ta=25C)
Parameter Condition

Symbol

Value

Unit
Min Typ Max
Supply current Watch dog timer operating ICC - 600 900 A
Detection voltage
VCC
VSL
4.10 4.20 4.30
V
Ta = -40C to +85C 4.05 4.20 4.35
VCC
VSH
4.20 4.30 4.40
Ta = -40C to +85C 4.15 4.30 4.45
Hysterisis width VCC VHYS 50 100 150 mV
Reference voltage
-
VREF
1.227 1.245 1.263
V
Ta = -40C to +85C 1.215 1.245 1.275
Reference voltage change rate VCC = 3.5 to 16V VREF1 - 3 10 mV
Reference voltage output
loading change rate
IOUT = -200A to+5A VREF2 -5 - +5 mV
CK threshold voltage Ta = -40C to +85C VTH 0.8 1.25 2.0 V
CK input current
VCK = 5.0V IIH - 0 1.0
A
VCK = 0.0V IIL -1.0 -0.1 -
CK input current
Watch dog timer operating
VCT = 1.0V
ICTD 7 10 14 A
High level output voltage
VS open, IRESET = -5A VOH1 4.5 4.9 -
V
VS = 0V, IRESET = -5A VOH2 4.5 4.9 -
Output saturation voltage
VS = 0V, IRESET = 3mA VOL1 - 0.2 0.4
V
VS = 0V, IRESET = 10mA VOL2 - 0.3 0.5
VS open, IRESET = 3mA VOL3 - 0.2 0.4
VS open, IRESET = 10mA VOL4 - 0.3 0.5
Output sink current
VS = 0V, VRESET = 1.0V IOL1 20 60 -
mA
VS open, VRESET = 1.0V IOL2 20 60 -
5
MB3773
(1) DC Characteristics (Continued)
(2)AC Characteristics
* Output rising/falling time are measured at 10% to 90% of voltage.
(VCC=5V, Ta=25C)
Parameter Condition


Symbol

Value
Unit
Min Typ Max
CT charge current
Power on reset operating
VCT = 1.0V
ICTU 0.5 1.2 2.5 A
Min. supply voltage for RESET
VRESET = 0.4V
IRESET = 0.2mA
VCCL1 - 0.8 1.2 V
Min. supply voltage for RESET
VRESET =VCC -0.1V
RL (2 pin - GND) = 1M
VCCL2 - 0.8 1.2 V
(VCC=5V, Ta=25C)
Parameter Condition


Symbol

Value
Unit
Min Typ Max
VCC input pulse width
VCC
TPI 8.0 - - s
CK input pulse width CK TCKW 3.0 - - s
CK input frequency TCK 20 - - s
Watch dog timer
watching time
CT = 0.1F TWD 5 10 15 ms
Watch dog timer
reset time
CT = 0.1F TWR 1 2 3 ms
Rising reset hold time CT = 0.1F, VCC TPR 50 100 150 ms
Output propagation
Delay time from VCC
RESET, RL = 2.2k
CL = 100pF
TPD1 - 2 10
s
RESET, RL = 2.2k
CL = 100pF
TPD2 - 3 10
Output rising time *
RL = 2.2k
CL = 100pF
tR - 1.0 1.5
s
Output falling time *
RL = 2.2k
CL = 100pF
tF - 0.1 0.5
5V
4V
or
6
MB3773
Fig. 1 - MB3773 Basic Operation
VCC
RESET
RESET
CK
Logic Circuit
CT = 0.1F
TPR (ms) 1000 CT (F) (100ms)
TWD (ms) 100 CT (F) (10ms)
TWR (ms) 20 CT (F) (2ms)
RESET
RESET
CK
GND
CT
VCC
VCC
VSH
VSL
0.8V
CK
CT
RESET
TWR
TPR
TWD TPR
TCK
7
MB3773
I TYPICAL CHARACTERISTIC CURVES
S
u
p
p
l
y

c
u
r
r
e
n
t

I
c
c

(
m
A
)
O
u
t
p
u
t

v
o
l
t
a
g
e

V
R
E
S
E
T

(
V
)
(RESET, RESET pin)
Fig. 2 - Supply current vs. supply voltage
0.75
0.65
0.55
0.45
0.35
0.25
0.15
4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0
Supply voltage VCC (V)
1.0
1.0
2.0
3.0
4.0
5.0
6.0
2.0 3.0 4.0 5.0 6.0 7.0
Supply voltage VCC (V)
Fig. 3 - Output voltag vs. supply voltage
(RESET pin)
1.0
0 1.0
2.0
3.0
4.0
5.0
6.0
2.0 3.0 4.0 5.0 6.0 7.0
Supply voltage VCC (V)
Pull up 2.2k
Fig. 4 - Output voltag vs. supply voltage
(RESET pin)
0
Ta = 85C
Ta = 25C
Ta = -40C
4.00
4.10
4.20
4.30
4.44
4.50
Fig. 5 - Detection voltage
(VSH, VSL) vs. temperature
-40 -20 0 20 40 60 80 100
Temperature Ta (C)
300
400
Fig. 6 - Output saturation
voltage vs. output sink current
(RESET pin)
0 2.0 4.0 8.0 10.0 12.0 14.0 16.0 18.0 6.0
Output sink current IOL2 (mA)
300
400
Fig. 7 - Output saturation
voltage vs. output sink current
(RESET pin)
0 2.0 4.0 8.0 10.0 12.0 14.0 16.0 18.0 6.0
Output sink current IOL8 (mA)
Ta = 85C
Ta = 25C
Ta = -40C CT = 0.1F
VSL
VSH
500
Ta = -40C
Ta = 25C
Ta = 85C
Ta = 25C
Ta = 25C
2.0
Ta = 85C
Ta = -40C
200
100
CT = 0.1F
200
100
0
Ta = 85C
D
e
t
e
c
t
i
o
n

v
o
l
t
a
g
e

V
S
H
,

V
S
L

(
V
)
O
u
t
p
u
t

s
a
t
u
r
a
t
i
o
n

V
o
l
t
a
g
e

V
O
L
8


(
m
V
)
O
u
t
p
u
t

v
o
l
t
a
g
e

V
R
E
S
E
T

(
V
)
O
u
t
p
u
t

s
a
t
u
r
a
t
i
o
n

v
o
l
t
a
g
e

V
O
L
2


(
m
V
)
CT = 0.1F
Ta = -40C
Pull up 2.2k
Ta = -40C, 25C, 85C
8
MB3773
I TYPICAL CHARACTERISTIC CURVES (Continued)
Fig. 11 - Reference voltage
vs. reference current
Fig. 8 - High level output voltage
vs. high level output current
4.0
0
CT = 0.1F
Ta = 25C
Ta= 85C
-5 -15
(RESET pin)
Fig. 9 - High level output voltage
vs. high level output current
4.0
0
CT = 0.1F
Ta = 25
Ta = 85
-5
(RESET pin)
Fig. 10 - Reference voltage
vs. supply voltage
1.246
1.244
1.242
1.240
1.238
1.236
1.234
5.0 7.0 9.0 11.0 13.0 15.0 17.0 19.0 21.0 0 3.0
Supply voltage VCC (V)
-40 -80 -120 -160 -200 -240
Reference current IREF (A)
0
Ta = 25C
Ta = 85C
Ta = -40C
CT = 0.1F
1.250
1.255
CT = 0.1F
Ta= 25C
Ta= 85C
Ta = -40C
1.21
1.22
1.23
1.24
1.25
1.26
Fig. 12 - Reference voltage
vs. temperature
-40 -20 0 20 40 60 80 100
Temperature Ta(C)
40
60
80
100
120
140
Fig. 13 - Rising reset hold time
vs. temperature
-40 -20 0 20 40 60 80 100
Temperature Ta(C)
0
0
160
VCC = 5V
CT = 0.1F
1.240
1.245
5.0
4.5
-10
Ta = -40C
4.5
High level output current IOH2 (A)
1.27
High level output current IOH8 (A)
-10
H
i
g
h

l
e
v
e
l

o
u
t
p
u
t

v
o
l
t
a
g
e

V
O
H
8
(
V
)
R
e
f
e
r
e
n
c
e

v
o
l
t
a
g
e

V
R
E
F

(
V
)
P
R

(
m
s
e
c
)
R
e
f
e
r
e
n
c
e

v
o
l
t
a
g
e

V
R
E
F

(
V
)
R
E
F

(
V
)
Ta = -40C
5.0
H
i
g
h

l
e
v
e
l

o
u
t
p
u
t

v
o
l
t
a
g
e

V
O
H
2

(
V
)
-15
R
i
s
i
n
g

r
e
s
e
t

h
o
l
d

t
i
m
e

T
R
e
f
e
r
e
n
c
e

v
o
l
t
a
g
e

V
9
MB3773
I TYPICAL CHARACTERISTIC CURVES (Continued)
Fig. 16 - Terminal capacitance
vs. rising reset hold time
Fig. 15 - Watch dog timer watching
time vs. temperature
-40 -20 0 20 40 60 80 100
Temperature Ta (C)
Fig. 14 - Reset time vs.
temperature
-40 -20 0 20 40 60 80 100
Temperature Ta (C)
Terminal capacitance CT (F)
10
-2
10
-1
10
0
10
1
10
2
10
-3
10
4
10
-2
10
-1
10
0
10
1
10
2
10
3
10
-3
10
5
10
6
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
-3
10
-2
10
-1
10
0
10
1
10
2
(At watch dog timer)
0
2
1
3
0
10
6
14
4
8
12
16
VCC = 5V
CT = 0.1F
VCC = 5V
CT = 0.1F
Fig. 17 - Terminal capacitance
vs. reset time
Fig. 18 - Terminal capacitance vs.
watch dog timer watching time
10
4
10
-2
10
-1
10
0
10
1
10
2
10
3
10
-3
10
5
10
6
10
-3
10
-2
10
-1
10
0
10
1
10
2
Ta = -40C
Ta = 25C
85C
Terminal capacitance CT (F)
(at watch dog timer)
Terminal capacitance CT (F)
Ta = -40C
Ta = 25C,
85C
Ta =
-40C
Ta=
25C,
85C
W
a
t
c
h

d
o
g

t
i
m
e
r
w
a
t
c
h
i
n
g

t
i
m
e

T
W
D

(
m
s
e
c
)
R
w
s
e
t

t
i
m
e

T
W
R

(
m
s
e
c
)
R
i
s
i
n
g

r
e
s
e
t

h
o
l
d

t
i
m
e

T
P
R
R
e
s
e
t

t
i
m
e

T
W
R

(
m
s
)
W
a
t
c
h

d
o
g

t
i
m
e
r
w
a
t
c
h
i
n
g

t
i
m
e

T
W
D

(
m
s
)

(
m
s
)
10
MB3773
I APPLICATION CIRCUIT
EXAMPLE 1 : Monitoring 5V Supply Voltage and Watch-dog Timer
VCC (5V)
MB3773
RESET
RESET
CK
GND
Logic circuit
Supply voltage is monitored using Vs.
Detection voltage are VSH and VSL.
CT
1
2
3
4
8
7
6
5
EXAMPLE 2 : 5V Supply Voltage Monitoring (external fine-tuning type)
VCC (5V)
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK
GND
Logic circuit
Vs detection voltage can be adjusted externally.
Selecting R1 and R2 values that are sufficiently lower than the resistance of the ICs internal
voltage divider allows the detection voltage to be set according to the resistance ratio between
R1 and R2. (See the table below.)
R1
R2
CT
R1 (k) R2 (k) Detection voltage:VSL (V) Detection voltage:VSH (V)
10 3.9 4.4 4.5
9.1 3.9 4.1 4.2
11
MB3773
EXAMPLE 3 : With Forced Reset (with reset hold)
VCC
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK
GND
Logic circuit
Grouding pin 7 at the time of SW ON sets RESET (pin 8) to Low and RESET (pin 2)
to High.
SW
a
VCC
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK
GND
Logic circuit
Feeding the signal to pin RESIN and turning on Tr sets the RESET pin to Low
and the RESET pin to High.
b
10k
Tr
RESIN
10k
Cr
CT
12
MB3773
EXAMPLE 4 : Montitoring Two Supply Voltages (with hysterisis, reset output and NMI)
VCC1 (5V)
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK
GND
Comp. 2
Example : Comp. 1, Comp. 2
: MB4204, MB47393
NMI or port
10k
R6
+
_
+
_
VCC2(12V)
180k
R4
100k
R3
5.1k
R2
1.2k
R1
4.7k
R5
Comp. 1
NOTE: The 5V supply voltage is monitored by the MB3773.
The 12V supply viltage is monitored by the external circuit. Its output is connected to the NMI
pin and, when voltage drops, Comp. 2 interrrupts the logic circuit.
Use VCC1 (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit
shown above.
The detection voltage of the VCC2 (=12V) supply voltage is approximately 0.2V.
VCC2 detection voltage and hysterisis width can be found using the following formulas:
Detection voltage
Hysterisis width VHYS = V2H - V2L
R3 + (R4 // R5)
R4 // R5
VREF
V2L =
R3 + R5
R5
VREF
(Approx. 9.4V in the above illustration)
(Approx. 9.2V in the above illustration)
CT
Logic circuit
V2H =
13
MB3773
EXAMPLE 5 : Montitoring Two (M) Supply Voltages (with hysterisis and reset output)
VCC1 (5V)
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK
GND
Comp. 2
Example : Comp. 1, Comp. 2
: MB4204, MB47393
20k
R6
+
_
+
_
VCC2 (12V)
180k
R4
30k
R3
5.1k
R2
1.2k
R1
4.7k
R5
Comp. 1
NOTE: When either 5V or 12V supply voltage decreases below its detection voltage (VSL), the MB3773
RESET pin is set to High and the MB3773 RESET pin is set to Low.
Use VCC1 (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown
above.
The detection voltage of the VCC2 (=12V) supply voltage is approximately 9.2V/9.4V and has a
hysterisis width of approximately 0.2V.
For the formulas for finding hysterisis width and detection voltage, see section 4.
Logic circuit
Diode
CT
14
MB3773
EXAMPLE 6 : Montitoring Low voltage and Overvoltage Monitoring (with hysterisis)
VCC (5V)
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK
GND
Comp. 2
Example : Comp. 1, Comp. 2
: MB4204, MB47393
20k
R6
+
_
180k
R4
30k
R3
5.6k
R2
1.2k
R1
4.7k
R5
Comp. 1
Comp. 1 and Comp. 2 are used to monitor for overvoltage while the MB3773 is used to monitor for low
voltage.
Detection voltages V1/V1H at the time of low voltage areappoximately 4.2V/4.3V. Detection voltages
V2L/V2H at the time of overvoltage are approximately 6.0V/6.1V.
For the formulas for finding hysterisis width and detection voltage, see section 4.
Use VCC (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown above.
Logic circuit
Diode
RESET
0
V1L V1H
V2L V2H
VCC
+
_
CT
15
MB3773
EXAMPLE 7 : Monitoring Supply Voltage Using Delayed Trigger
VCC
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK
GND
Logic circuit
Adding voltage such as shown in the figure to VCC increases the minimum input pulse
width by 50 microseconds (C1 = 1000pF).
C1
VCC
5V
4V
CT
16
MB3773
(Continued)
EXAMPLE 8 : Stopping Watch-dog Timer (Monitering only supply voltage)
a Using NPN transistor
These are example application circuts in which the MB3773 monitors supply voltage alone without resetting
the microcomputer even if the latter, used in standby mode, stops sending the clock pulse to the MB3773.
The watch-dog timer is inhibited by clamping the Cr pin voltage to VREF .
The supply voltage is constantly monitored even while the watch-dog timer is inhibited.
For this reason, a reset signal is output at the occurrence of either instataneous disruption or a sudden drop
to low voltage.
Note that in application examples a and b, the hold signal is inactive when the watch-dog timer is inhibited
at the time of resetting.
If the hold signal is active when tie microcomputer is reset, the solution is to add a gate, as in examples c and d.
VCC(5V)
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK
GND
Logic circuit
R2=1k
HALT
R1=1M
b Using PNP transistor
VCC (5V)
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK
GND
Logic circuit
R2=1k
HALT
R1=51k
CT
CT
17
MB3773
(Continued)
c Using NPN transistor
VCC (5V)
1
2
3
4
8
7
6
5
CT
MB3773
RESET
RESET
CK
GND
Logic circuit
R2=1k
HALT
R1=1M
d Using PNP transistor
VCC (5V)
1
2
3
4
8
7
6
5
CT
MB3773
RESET
RESET
CK
GND
Logic circuit
R2=1k
HALT
R1=51k
18
MB3773
EXAMPLE 9 : Reducing Reset Hold Time
VCC(=5V)
1
2
3
4
8
7
6
5
CT
MB3773
RESET
RESET
CK
GND
Logic circuit
(a) TPR reduction method
VCC (=5V)
1
2
3
4
8
7
6
5
CT
MB3773
RESET
RESET
CK
GND
Logic circuit
RESET is the only output that can be used.
Standard TPR, TWD and TWR value can be found using the following formulas.
Formulas :
TPR (ms) 100 CT (F)
TWD (ms) 100 CT (F)
TWR (ms) 16 CT (F)
The above formulas allow fo standard values in determining TPR, TWD and TWR.
Reset hold time is compared below between the reduction circuit and the standard circuit.
(b) Standard usage
CT = 0.1F
TPR reduction circuit Standard circuit
TPR 10ms 100ms
TWD 10ms 10ms
TWR 1.6ms 2.0ms
19
MB3773
EXAMPLE 10 : Circuit for Monitoring Multiple Microcomputers
VCC (=5V)
1
2
3
4
8
7
6
5
CT
MB3773
RESET
RESET
CK
GND
connects from FF1 and FF2 outputs Q1 and Q2 to the NOR input.
Depending on timing, these connections may not be necessary.
Example:R1 = R2 = 2.2k
CT = 0.1F
RESET
RESET
CK
GND
RESET
RESET
CK
GND
S
D3
CK3
R
Q3
Q3
S
D2
CK2
R
Q2
Q2
S
D1
CK1
R
Q1
Q1
FF3 FF2 FF1
R2
R1
CK1
Q1
CK2
Q2
CK3
Q3
NOR
Output
Figure 1
Figure 2
20
MB3773
Description of Application Circuits
Using one MB3773, this application circuit monitors multiple microcomputers in one system. Signals from each microcomputer
are sent to FF1, FF2 and FF3 clock inputs. Figure 2 shows these timings. Each flip-flop operates using signals sent from mi-
crocomputers as its clock pulse. When even one signal stops, the relevant receiving flip-flop stops operating. As a result, cy-
clical pulses are not generated at output Q3. Since the clock pulse stops arriving at the CK pin of the MB3773, the MB3773
generates a reset signal.
Note that output Q3 frequncy f will be in the following range, where the clock frequencies of CK1, CK2 and CK3 are f1, f2 and f3
respectively.
where f0 is the lowest frequency among f1, f2 and f3.
1
f0
----
1
f
---
1
f1
----
1
f2
----
1
f3
---- + +
21
MB3773
EXAMPLE 11 : Circuit for Limiting Upper Clock Input Frequency
This is an example application to limit upper frequency fH of clock pulses sent from the
microcomputer.
If the CK cycle sent from the microcomputer exceeds fH, the circuit generates a reset
signal.
(The lower freqency has already been set using Cr.)
When a clock pulse such as shown below is sent to pin CK, a short T2 prevents C2 voltage
from reaching the CK input threshold level ( 1.25V), and will cause a reset signal to be
output.
The T1 value can be found using the following formula :
Example : Setting C and R allow the upper T1 value to be set (See the table below.)
VCC (5V)
1
2
3
4
8
7
6
5
CT
RESET
RESET
CK
GND
R2
R1=10k
C2
Tr1
T1 0.3 C2R2
T2
CK waveform
T3
C2 voltage
T1
where VCC = 5V, T3 3.0sec, T2 20sec
C R T1
0.01F 10k 30s
0.1F 10k 300s
22
MB3773
I PACKAGE DIMENSIONS
+0.30
0
+.012 +.012
0
+.016
.012
.012
+.014
0
+0.30
0
+0.40
0.30
0.30
+0.35
(.244.010)
6.200.25 1 PIN INDEX
15MAX
TYP
7.62(.300)
0.51(.020)MIN
(.010.002)
0.250.05
(.018.003)
0.460.08
TYP
2.54(.100)
3.00(.118)MIN
4.36(.172)MAX
.039 .060
.370
.035
1.52 0.99
9.40
0.89
1994 FUJITSU LIMITED D08006S-2C-3
C
8 pin, Plastic DIP
(DIP-8P-M01)
Dimensions in mm (inches).
23
MB3773
I PACKAGE DIMENSIONS (Continued)
+0.40
0.20
+.016
.008
+0.05
0.02
+.002
.001
+0.25
0.20
+.010
.008
3.81(.150)REF
1.27(.050)
TYP
INDEX
6.80
.268
0.15
.006
6.35 .250
(.307.016) (.209.012)
(.018.004)
(STAND OFF)
(.020.008)
0.500.20
5.300.30 7.800.40
0.05(.002)MIN
2.25(.089)MAX
0.450.10
Details of "A" part
0.50(.020)
0.20(.008)
0.18(.007)MAX
0.68(.027)MAX
"A"
M 0.13(.005)
0.10(.004)
1994 FUJITSU LIMITED F08002S-4C-4
C
8 pin, Plastic SOP
(FPT-8P-M01)
Dimensions in mm (inches).
24
MB3773
I PACKAGE DIMENSIONS (Continued)
0
+.012
+.012
0
.014
+.006
+0.30
0
+0.15
0.35
0
+0.30
(.010.002)
0.250.05
3.260.25
(.128.010)
(.244.010)
6.200.25
(.323.012)
8.200.30
(.157.012)
4.000.30
(.020.003)
0.500.08
TYP
2.54(.100)
.060
.039
.774
0.99
19.65
INDEX-2
INDEX-1
1.52
1994 FUJITSU LIMITED S08010S-3C-2
C
8 pin, Plastic SIP
(SIP-8P-M03)
Dimensions in mm (inches).
25
MB3773
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
KAWASAKI PLANT, 4-1-1, Kamikodanaka
Nakahara-ku, Kawasaki-shi
Kanagawa 211-8588, Japan
Tel: (044) 754-3763
Fax: (044) 754-3329
http://www.fujitsu.co.jp/
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, USA
Tel: (408) 922-9000
Fax: (408) 922-9179
Customer Response Center
Mon. - Fri.: 7 am - 5 pm (PST)
Tel: (800) 866-8608
Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe
FUJITSU MIKROELEKTRONIK GmbH
Am Siebenstein 6-10
D-63303 Dreieich-Buchschlag
Germany
Tel: (06103) 690-0
Fax: (06103) 690-122
http://www.fujitsu-ede.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LTD
#05-08, 151 Lorong Chuan
New Tech Park
Singapore 556741
Tel: (65) 281-0770
Fax: (65) 281-0220
http://www.fmap.com.sg/
F9803
FUJITSU LIMITED Printed in Japan
All Rights Reserved.
The contents of this document are subject to change without
notice. Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document presented
as examples of semiconductor device applications, and are not
intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the
use of this information or circuit diagrams.
FUJITSU semiconductor devices are intended for use in
standard applications (computers, office automation and other
office equipment, industrial, communications, and measurement
equipment, personal or household devices, etc.).
CAUTION:
Customers considering the use of our products in special
applications where failure or abnormal operation may directly
affect human lives or cause physical injury or property damage,
or where extremely high levels of reliability are demanded (such
as aerospace systems, atomic energy controls, sea floor
repeaters, vehicle operating controls, medical devices for life
support, etc.) are requested to consult with FUJITSU sales
representatives before such use. The company will not be
responsible for damages arising from such use without prior
approval.
Any semiconductor devices have inherently a certain rate of
failure. You must protect against injury, damage or loss from
such failures by incorporating safety design measures into your
facility and equipment such as redundancy, fire protection, and
prevention of over-current levels and other abnormal operating
conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Control Law of Japan, the
prior authorization by Japanese government should be required
for export of those products from Japan.