Macro name: Base Timer I/O Select

Function

Large item internal item small item Check

timer item HM　Spec Mark No. Page No. Verification method Flowchart mark No.
16 bit PPG
timer
21.1 Overview HM-1 440
16/32 bit
reload timer
overview 16/32 bit HM-1.1 440
I/O mode 0:16 bit timer standard mode HM-1.1.1 440
I/O mode 1: Timer Full mode HM-1.1.2 440
I/O mode 2: External trigger shared modeHM-1.1.3 440
I/O mode 3: Other channel trigger share HM-1.1.4 440
I/O mode 4: Timer activation/stop mode HM-1.1.5 440
I/O mode 5: Same time software activatio HM-1.1.6 440
I/O mode 6: Software activation timer ac HM-1.1.7 440
I/O mode 7: Timer activation mode HM-1.1.8 440
I/O mode 8: Other channel trigger shared HM-1.1.9 440
21.2 Configuration HM-2 441
Block diagram of the base timer I/O select function Block diagram HM-2.1.1 441
I/O selection block HM-2.1.2 441
Base timer (ch.0- ch.15) HM-2.1.3 441
21.3 Pin HM-3 442
overview HM-3.1 442
External pin HM-3.1.1 442
TIOA0-TIOA15 pins HM-3.1.1.1 442
TIOB0-TIOB15 pins HM-3.1.1.2 442
Internal pin HM-3.1.2 442
TOUT signal HM-3.1.2.1 442
ECK signal HM-3.1.2.2 442
TGIN signal HM-3.1.2.3 442
TIN signal HM-3.1.2.4 442
DTRG signal HM-3.1.2.5 442
COUT signal HM-3.1.2.6 442
CIN signal HM-3.1.2.7 442
Connection of the external pins and internal signals HM-3.1.3 443
Relationship between the I/O mode and pin connections HM-3.1.3 443
I/O mode 0 HM-3.1.3.1 443
I/O mode 1 HM-3.1.3.2 443
I/O mode 2 HM-3.1.3.3 443
I/O mode 3 HM-3.1.3.4 443
I/O mode 4 HM-3.1.3.5 443
I/O mode 5 HM-3.1.3.6 443
I/O mode 6 HM-3.1.3.7 443
I/O mode 7 HM-3.1.3.8 443
I/O mode 8 HM-3.1.3.9 443
21.4 Registers HM-4 444
List of registers of the base timer I/O select function HM-4.0.1 444
BTSSSR HM-4.0.1.1 444
BTSEL0123 HM-4.0.1.2 444
BTSEL4567 HM-4.0.1.3 444
BTSEL89AB HM-4.0.1.4 444
BTSELCDEF HM-4.0.1.5 444
Base Timer IO Select Register for Ch.0/1/2/3
HM-4.1 445
(BTSEL0123)
Bit configuration of base timer io select register HM-4.1.1 445
Attribute HM-4.1.1.1 445
Initial value HM-4.1.1.2 445
note HM-4.1.1.3 445
SEL23_3 to SEL23_0=0000 HM-4.1.1.4 446
SEL23_3 to SEL23_0=0001 HM-4.1.1.5 446
SEL23_3 to SEL23_0=0010 HM-4.1.1.6 446
SEL23_3 to SEL23_0=0011 HM-4.1.1.7 446
SEL23_3 to SEL23_0=0100 HM-4.1.1.8 446
SEL23_3 to SEL23_0=0101 HM-4.1.1.9 446
SEL23_3 to SEL23_0=0110 HM-4.1.1.10 446
SEL23_3 to SEL23_0=0111 HM-4.1.1.11 446
 SEL23_3 to SEL23_0=1000 HM-4.1.1.12 446
note HM-4.1.1.13 446
SEL01_3 to SEL01_0 (I/O select bit for HM-4.1.1.14 447
SEL01_3 to SEL01_0 (I/O select bit for HM-4.1.1.15 447
SEL01_3 to SEL01_0=0000 HM-4.1.1.16 447
SEL01_3 to SEL01_0=0001 HM-4.1.1.17 447
SEL01_3 to SEL01_0=0010 HM-4.1.1.18 447
SEL01_3 to SEL01_0=0011 HM-4.1.1.19 447
SEL01_3 to SEL01_0=0100 HM-4.1.1.20 447
SEL01_3 to SEL01_0=0101 HM-4.1.1.21 447
SEL01_3 to SEL01_0=0110 HM-4.1.1.22 447
SEL01_3 to SEL01_0=0111 HM-4.1.1.23 447
SEL01_3 to SEL01_0=1000 HM-4.1.1.24 447
note HM-4.1.1.25 447
Base Timer IO Select Register for Ch.4/5/6/7
HM-4.2 448
(BTSEL4567)
Bit configuration of base timer io select register HM-4.2.1 448
Attribute HM-4.2.1.1 448
Initial value HM-4.2.1.2 448
note HM-4.2.1.3 448
SEL67_3 to SEL67_0=0000 HM-4.2.1.4 449
SEL67_3 to SEL67_0=0001 HM-4.2.1.5 449
SEL67_3 to SEL67_0=0010 HM-4.2.1.6 449
SEL67_3 to SEL67_0=0011 HM-4.2.1.7 449
SEL67_3 to SEL67_0=0100 HM-4.2.1.8 449
SEL67_3 to SEL67_0=0101 HM-4.2.1.9 449
SEL67_3 to SEL67_0=0110 HM-4.2.1.10 449
SEL67_3 to SEL67_0=0111 HM-4.2.1.11 449
SEL67_3 to SEL67_0=1000 HM-4.2.1.12 449
note HM-4.2.1.13 449
SEL45_3 to SEL45_0=0000 HM-4.2.1.14 450
SEL45_3 to SEL45_0=0001 HM-4.2.1.15 450
SEL45_3 to SEL45_0=0010 HM-4.2.1.16 450
SEL45_3 to SEL45_0=0011 HM-4.2.1.17 450
SEL45_3 to SEL45_0=0100 HM-4.2.1.18 450
SEL45_3 to SEL45_0=0101 HM-4.2.1.19 450
SEL45_3 to SEL45_0=0110 HM-4.2.1.20 450
SEL45_3 to SEL45_0=0111 HM-4.2.1.21 450
SEL45_3 to SEL45_0=1000 HM-4.2.1.22 450
note HM-4.2.1.23 450
Base Timer IO Select Register for Ch.8/9/A/B
HM-4.3 451
(BTSEL89AB)
Bit configuration of base timer io select register HM-4.3.1 451
Attribute HM-4.3.1.1 451
Initial value HM-4.3.1.2 451
note HM-4.3.1.3 451
SELAB_3 to SELAB_0=0000 HM-4.3.1.4 452
SELAB_3 to SELAB_0=0001 HM-4.3.1.5 452
SELAB_3 to SELAB_0=0010 HM-4.3.1.6 452
SELAB_3 to SELAB_0=0011 HM-4.3.1.7 452
SELAB_3 to SELAB_0=0100 HM-4.3.1.8 452
SELAB_3 to SELAB_0=0101 HM-4.3.1.9 452
SELAB_3 to SELAB_0=0110 HM-4.3.1.10 452
SELAB_3 to SELAB_0=0111 HM-4.3.1.11 452
SELAB_3 to SELAB_0=1000 HM-4.3.1.12 452
note HM-4.3.1.13 452
SEL89_3 to SEL89_0=0000 HM-4.3.1.14 453
SEL89_3 to SEL89_0=0001 HM-4.3.1.15 453
SEL89_3 to SEL89_0=0010 HM-4.3.1.16 453
SEL89_3 to SEL89_0=0011 HM-4.3.1.17 453
SEL89_3 to SEL89_0=0100 HM-4.3.1.18 453
SEL89_3 to SEL89_0=0101 HM-4.3.1.19 453
SEL89_3 to SEL89_0=0110 HM-4.3.1.20 453
SEL89_3 to SEL89_0=0111 HM-4.3.1.21 453
SEL89_3 to SEL89_0=1000 HM-4.3.1.22 453
note HM-4.3.1.23 453
Base Timer IO Select Register for Ch.C/D/E/F
HM-4.4 454
(BTSELCDEF)
Bit configuration of base timer io select register HM-4.4.1 454
Attribute HM-4.4.1.1 454
 Initial value HM-4.4.1.2 454
note HM-4.4.1.3 454
SELEF_3 to SELEF_0=0000 HM-4.4.1.4 455
SELEF_3 to SELEF_0=0001 HM-4.4.1.5 455
SELEF_3 to SELEF_0=0010 HM-4.4.1.6 455
SELEF_3 to SELEF_0=0011 HM-4.4.1.7 455
SELEF_3 to SELEF_0=0100 HM-4.4.1.8 455
SELEF_3 to SELEF_0=0101 HM-4.4.1.9 455
SELEF_3 to SELEF_0=0110 HM-4.4.1.10 455
SELEF_3 to SELEF_0=0111 HM-4.4.1.11 455
SELEF_3 to SELEF_0=1000 HM-4.4.1.12 455
note HM-4.4.1.13 455
SELCD_3 to SELCD_0=0000 HM-4.4.1.14 456
SELCD_3 to SELCD_0=0001 HM-4.4.1.15 456
SELCD_3 to SELCD_0=0010 HM-4.4.1.16 456
SELCD_3 to SELCD_0=0011 HM-4.4.1.17 456
SELCD_3 to SELCD_0=0100 HM-4.4.1.18 456
SELCD_3 to SELCD_0=0101 HM-4.4.1.19 456
SELCD_3 to SELCD_0=0110 HM-4.4.1.20 456
SELCD_3 to SELCD_0=0111 HM-4.4.1.21 456
SELCD_3 to SELCD_0=1000 HM-4.4.1.22 456
note HM-4.4.1.23 456
Base Timer Same Time Soft Start Register (BTSSSR) HM-4.5 457
Bit configuration of base timer same time soft start
HM-4.5.1 457
register (BTSSSR)
Attribute HM-4.5.1.1 457
Initial value HM-4.5.1.2 457
note-1 HM-4.5.1.3 457
note 2 HM-4.5.1.4 457
SSSR15 HM-4.5.1.5 458
note HM-4.5.1.6 458
SSSR14 HM-4.5.1.7 458
note HM-4.5.1.8 458
SSSR13 HM-4.5.1.9 458
note HM-4.5.1.10 458
SSSR12 HM-4.5.1.11 458
note HM-4.5.1.12 458
SSSR11 HM-4.5.1.13 459
note HM-4.5.1.14 459
SSSR10 HM-4.5.1.15 459
note HM-4.5.1.16 459
SSSR9 HM-4.5.1.17 459
note HM-4.5.1.18 459
SSSR8 HM-4.5.1.19 459
note HM-4.5.1.20 459
SSSR7 HM-4.5.1.21 460
note HM-4.5.1.22 460
SSSR6 HM-4.5.1.23 460
note HM-4.5.1.24 460
SSSR5 HM-4.5.1.25 460
note HM-4.5.1.26 460
SSSR4 HM-4.5.1.27 460
note HM-4.5.1.28 460
SSSR3 HM-4.5.1.29 461
note HM-4.5.1.30 461
SSSR2 HM-4.5.1.31 461
note HM-4.5.1.32 461
SSSR1 HM-4.5.1.33 461
note HM-4.5.1.34 461
SSSR0 HM-4.5.1.35 461
note HM-4.5.1.36 461
21.5 I/O mode HM-5 462
I/O Mode 0 (16-bit Timer Standard Mode) HM-5.1 462
External pins used HM-5.1.1 462
Connection Destinations of the External Pins and I/O Signals HM-5.1.2 462
TIOA0-TIOA15 pins HM-5.1.2.1 462
TIOB0-TIOB15 pins HM-5.1.2.2 462
note HM-5.1.2.3 462
Block Diagram of I/O Mode 0 (16-bit Timer Standard Mode) HM-5.1.3 463
Connections for I/O mode 0 HM-5.1.4 463
connection1 HM-5.1.4.1 463
 connection2 HM-5.1.4.2 463
connection3 HM-5.1.4.3 463
connection4 HM-5.1.4.4 463
I/O Mode 1 (Full Timer Mode) HM-5.2 464
External pins used HM-5.2.1 464
Connection Destinations of the External Pins and I/O Signals HM-5.2.2 464
TIOAn pins HM-5.2.2.1 464
TIOBn pins HM-5.2.2.2 464
TIOAn+1 pins HM-5.2.2.3 464
TIOBn+1 pins HM-5.2.2.4 464
Block Diagram of I/O Mode 1 (Timer Full Mode) HM-5.2.3 464
Connections for I/O mode 1 HM-5.2.4 465
connection1 HM-5.2.4.1 465
connection2 HM-5.2.4.2 465
connection3 HM-5.2.4.3 465
connection4 HM-5.2.4.4 465
note HM-5.2.4.5 465
I/O Mode 2 (External Trigger Shared Mode) HM-5.3 466
External pins used HM-5.3.1 466
Connection Destinations of the External Pins and I/O Signals HM-5.3.2 466
TIOAn pins HM-5.3.2.1 466
TIOBn pins HM-5.3.2.2 466
TIOAn+1 pins HM-5.3.2.3 466
TIOBn+1 pins HM-5.3.2.4 466
Block Diagram of I/O Mode 2 (External Trigger Shared Mode) HM-5.3.3 466
Connections for I/O mode 2 HM-5.3.4 467
connection1 HM-5.3.4.1 467
connection2 HM-5.3.4.2 467
connection3 HM-5.3.4.3 467
note HM-5.3.4.4 467
I/O Mode 3 (Other Channel Trigger Shared Mode) HM-5.4 468
External pins used HM-5.4.1 468
Connection Destinations of the External Pins and I/O Signals HM-5.4.2 468
TIOAn pins HM-5.4.2.1 468
TIOAn+1 pins HM-5.4.2.2 468
TIOBn, TIOBn+1 pins HM-5.4.2.3 468
Block Diagram ofI/O Mode 3 (Other Channel Trigger Shared Mode) HM-5.4.3 468
Connections for I/O mode 3 HM-5.4.4 469
connection1 HM-5.4.4.1 469
connection2 HM-5.4.4.2 469
connection3 HM-5.4.4.3 469
note-1 HM-5.4.4.4 469
note-2 HM-5.4.4.5 469
note-3 HM-5.4.4.6 469
note-4 HM-5.4.4.7 469
note-5 HM-5.4.4.8 469
note-6 HM-5.4.4.9 469
note-7 HM-5.4.4.10 469
Operations in I/O Mode 4 (Timer Activation/Stop Mode) HM-5.5 470
External pins used HM-5.5.1 470
Connection Destinations of the External Pins and I/O Signals HM-5.5.2 470
TIOAn pins HM-5.5.2.1 470
TIOBn pins HM-5.5.2.2 470
TIOAn+1 pins HM-5.5.2.3 470
TIOBn+1 pins HM-5.5.2.4 470
Block Diagram of I/O Mode 4 (Timer Activation/Stop Mode) HM-5.5.3 471
Connections for I/O mode 4 HM-5.5.4 471
connection1 HM-5.5.4.1 471
connection2 HM-5.5.4.2 471
connection3 HM-5.5.4.3 471
note-1 HM-5.5.4.4 471
note-2 HM-5.5.4.5 471
Register setting-1 HM-5.5.4.6 472
Register setting-2 HM-5.5.4.7 472
Register setting-3 HM-5.5.4.8 472
Register setting-4 HM-5.5.4.9 472
Register setting-5 HM-5.5.4.10 472
Register setting-6 HM-5.5.4.11 472
Example-waveform HM-5.5.4.12 472
Operations in I/O Mode 5 (Same Time Software
HM-5.6 473
Activation Mode)
 External pins used HM-5.6.1 473
Connection Destinations of the External Pins and I/O Signals HM-5.6.2 473
TIOAn pins HM-5.6.2.1 473
TIOAn+1 pins HM-5.6.2.2 473
TIOBn, TIOBn+1 pins HM-5.6.2.3 473
Block Diagram of I/O Mode 5 (Same Time Software
HM-5.6.3 473
Activation Mode)
Connections for I/O mode 5 HM-5.6.4 474
connection1 HM-5.6.4.1 474
connection2 HM-5.6.4.2 474
connection3 HM-5.6.4.3 474
connection4 HM-5.6.4.4 474
note-1 HM-5.6.4.5 474
note-2 HM-5.6.4.6 474
Operations in I/O Mode 6 (Software Activation Timer
HM-5.7 475
Activation/Stop Mode)

External pins used HM-5.7.1 475

Connection Destinations of the External Pins and I/O Signals HM-5.7.2 475
TIOAn pins HM-5.7.2.1 475
TIOAn+1 pins HM-5.7.2.2 475
TIOBn, TIOBn+1 pins HM-5.7.2.3 475
Block Diagram of I/O Mode 6(Software Activation Timer
HM-5.7.3 475
Activation/Stop Mode)
Connections for I/O mode 6 HM-5.7.4 476
connection1 HM-5.7.4.1 476
connection2 HM-5.7.4.2 476
connection3 HM-5.7.4.3 476
note-1 HM-5.7.4.4 476
note-2 HM-5.7.4.5 476
note-3 HM-5.7.4.6 476
Operations in I/O Mode 7 (Timer Activation Mode) HM-5.8 477
External pins used HM-5.8.1 477
Connection Destinations of the External Pins and I/O Signals HM-5.8.2 477
TIOAn pins HM-5.8.2.1 477
TIOBn pins HM-5.8.2.2 477
TIOAn+1 pins HM-5.8.2.3 477
TIOBn+1 pins HM-5.8.2.4 477
Block Diagram of in I/O Mode 7 (Timer Activation Mode) HM-5.8.3 477
Connections for I/O mode 7 HM-5.8.4 488
connection1 HM-5.8.4.1 488
connection2 HM-5.8.4.2 488
connection3 HM-5.8.4.3 488
Operations in I/O Mode 8 (Other Channel Trigger
HM-5.9 489
Shared Timer Activation/Stop Mode)
External pins used HM-5.9.1 489
Connection Destinations of the External Pins and I/O Signals HM-5.9.2 489
TIOAn pins HM-5.9.2.1 489
TIOAn+1 pins HM-5.9.2.2 489
TIOBn, TIOBn+1 pins HM-5.9.2.3 489
Block Diagram of I/O Mode 8 (Other Channel Trigger Shared Timer
HM-5.9.3 489
Activation/Stop Mode)
Connections for I/O mode 8 HM-5.9.4 490
connection1 HM-5.9.4.1 490
connection2 HM-5.9.4.2 490
note-1 HM-5.9.4.3 490
note-2 HM-5.9.4.4 490
note-3 HM-5.9.4.5 490
note-4 HM-5.9.4.6 490
note-5 HM-5.9.4.7 490
note-6 HM-5.9.4.8 490
note-7 HM-5.9.4.9 490
note-8 HM-5.9.4.10 490
note-9 HM-5.9.4.11 490
Assembly m No Confirm method Test pattern nam Judgment ch0Judgment c Judgment ch2Judgment ch3Confirmation dRemarks