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IC TERMINOLOGY

IC TERMINOLOGY
IC TERMINOLOGY
IC TERMINOLOGY

DIGITAL IC TERMINOLOGY

Current and voltage parameters Fan-Out Fan-In Propagation delays Power dissipations Noise immunity Invalid voltage levels Current-sourcing and current-sinking action

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Voltage parameters

V IH (min) :high-level input voltage. The minimum voltage level required for a logical 1 at an input. Any voltage below this level will not be accepted as a HIGH by the logic circuit. V IL (max) :low-level input voltage. The maximum voltage level required for a logical 0 at an input. Any voltage above this level will not be accepted as a LOW by the logic circuit. V OH (min) :high-level output voltage. The minimum voltage level at a logic circuit output in the logical 1 state under defined load conditions.

V OL (max) :low-level output voltage. The maximum voltage level at a logic circuit output in the logical 0 state under defined load conditions.

level at a logic circuit output in the logical 0 state under defined load conditions. rihana

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Current parameters

I IH :high-level input current. The current that flows into an input when a specified high-level voltage is applied to that input. I IL :low-level input current. The current that flows into an input when a specified low-level voltage is applied to that input. I OH :high-level output current. The current that flows from an output in the logical 1 state under specified load conditions. I OL : low-level output current. The current that flows from an output in the logical 0 state under specified load conditions.

current that flows from an output in the logical 0 state under specified load conditions. rihana

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Fan-Out

The number of gates that each gate can drive, while providing voltage levels in the guaranteed range, is called the standard load or fan-out. Also called loading factor is defined as the maximum number of logic inputs that an output can drive reliably. E.g. A logic gate that is specified to have a fan out of 10 can drive 10 logic inputs. If this number exceeded, the output logic level voltages cannot be guaranteed.

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Fan-out

Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs
Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs
Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs
Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs
Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs
Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs
Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs
Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs
Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs
Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs
Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs
Fan-out Fan-out at LOW state Fan-out at HIGH state rihana ® DiGiTaL eLeCtRoNiCs

Fan-out at LOW state

Fan-out at HIGH state

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Fan-In

The number of inputs available on a gate.

Fan-In The number of inputs available on a gate. rihana ® DiGiTaL eLeCtRoNiCs Fan-in = 2
Fan-In The number of inputs available on a gate. rihana ® DiGiTaL eLeCtRoNiCs Fan-in = 2
Fan-In The number of inputs available on a gate. rihana ® DiGiTaL eLeCtRoNiCs Fan-in = 2

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Fan-in = 2

Fan-in = 4

Propagation delay

The time between the logic transition on an input and the corresponding logic transition on the output of the logic gate. The propagation delay is measured at midpoints. The two propagation delay times are defined as follows :

logic gate . The propagation delay is measured at midpoints. The two propagation delay times are

1. t PLH : delay time in going from logic ‘0’ to logic ‘1’

2. t PHL : delay time in going from logic ‘1’ to logic ‘0’

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t pd (avg) = (t PLH + t PHL )/2

Power Dissipations

Each gate is connected to a power supply V CC (V DD in the case of CMOS). It draws a certain amount of current during its operation. Since each gate can be in a High, Transition or Low state, there are three different currents drawn from power supply.

1. I CCH : Current drawn during HIGH state.

2. I CCT : Current drawn during HIGH to LOW, LOW to HIGH transition.

3. I CCL : Current drawn during LOW state.

For TTL, I CCT the transition current is negligible, in comparison to I CCH and I CCL . If we assume that I CCH and I CCL are equal then, Average Power Dissipation = V CC * (I CCH + I CCL )/2

For CMOS, I CCH and I CCL current is negligible, in comparison to I CCT . So the Average power dissipation is calculated as below. Average Power Dissipation = V CC * I CCT

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Power Dissipations

The power drawn from the power supply and consumed by the gate. The power consumed is dissipated as heat.

Power dissipation can be classified into Static power dissipation and Dynamic power dissipation.

Ps (Static Power Dissipation): Power consumed when the output or input are not changing or rather when clock is turned off. Normally static power dissipation is caused by leakage current. (As we reduce the transistor size, i.e. below 90nm, leakage current could be as high as 40% of total power dissipation). Pd (Dynamic Power Dissipation): Power consumed during output and input transitions. So we can say Pd is the actual power consumed i.e. the power consumed by transistors + leakage current.

transitions. So we can say Pd is the actual power consumed i.e. the power consumed by

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Speed-Power Product (SPP)

The speed-power product provides a basis for the comparison of logic circuits when both propagation delay time and power dissipation are important considerations in the selection of the type of logic to be used in a certain application. Also called Power-Delay Product . The lower the SPP, the better. The unit of speed-power product is picojoule (pJ).

Also called Power-Delay Product . The lower the SPP, the better. The unit of speed-power product
Also called Power-Delay Product . The lower the SPP, the better. The unit of speed-power product
Also called Power-Delay Product . The lower the SPP, the better. The unit of speed-power product

Speed-Power Product = P D * t pd

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Noise immunity

The noise immunity of a logic circuit refers to the circuit’s ability to tolerate noise without causing spurious changes in the output voltage. A quantitative measure of noise immunity is called noise margin an is illustrated in figure below,

NM H = V OH (min) – V IH (min)

NM H

NM L

NM L = V IL (max) – V OL (max)

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example

The input/output voltage specifications for the standard TTL family are listed as below, use this value to determine:

1. The maximum amplitude noise spike that can be tolerated when a HIGH output is driving an input.

2. The maximum amplitude noise spike that can be tolerated when a LOW output is driving an input.

 

Min

Typ

Max

V

OL

-

0.35

0.5

V

OH

2.5

-

-

V

IL

-

-

0.8

V

IH

2.0

-

-

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NM H = V OH (min) – V IH (min)

= 2.5V -2.0V

= 0.5V

NM L = V IL (max) – V OL (max)

= 0.8V – 0.5V

= 0.3V

Invalid voltage levels

For proper operation the input voltage levels to a logic circuit must be kept outside the indeterminate range, i.e. must be either lower than V IL (max) or higher than V IH (min). Invalid region can occur when :

Logic output malfunctioning/overloaded power supply voltages are outside the acceptable range

CMOS rihana®DiGiTaL eLeCtRoNiCs
CMOS
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malfunctioning/overloaded power supply voltages are outside the acceptable range CMOS rihana®DiGiTaL eLeCtRoNiCs
malfunctioning/overloaded power supply voltages are outside the acceptable range CMOS rihana®DiGiTaL eLeCtRoNiCs
malfunctioning/overloaded power supply voltages are outside the acceptable range CMOS rihana®DiGiTaL eLeCtRoNiCs
malfunctioning/overloaded power supply voltages are outside the acceptable range CMOS rihana®DiGiTaL eLeCtRoNiCs
malfunctioning/overloaded power supply voltages are outside the acceptable range CMOS rihana®DiGiTaL eLeCtRoNiCs
malfunctioning/overloaded power supply voltages are outside the acceptable range CMOS rihana®DiGiTaL eLeCtRoNiCs

Invalid voltage levels

TTL

Invalid voltage levels TTL rihana ® DiGiTaL eLeCtRoNiCs

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Invalid voltage levels TTL rihana ® DiGiTaL eLeCtRoNiCs
Invalid voltage levels TTL rihana ® DiGiTaL eLeCtRoNiCs
Invalid voltage levels TTL rihana ® DiGiTaL eLeCtRoNiCs
Invalid voltage levels TTL rihana ® DiGiTaL eLeCtRoNiCs
Invalid voltage levels TTL rihana ® DiGiTaL eLeCtRoNiCs
Invalid voltage levels TTL rihana ® DiGiTaL eLeCtRoNiCs

Current sourcing/sinking

Current sourcing/sinking rihana ® DiGiTaL eLeCtRoNiCs

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