M.

Jagadesh Kumar and Sukhendu Deb Roy, "A New High Breakdown Voltage Lateral
Schottky Collector Bipolar Transistor on SOI: Design and Analysis," IEEE Trans. on
Electron Devices, Vol.52, pp.2496-2501, November 2005

A New High Breakdown Voltage Lateral Schottky Collector

Bipolar Transistor on SOI: Design and Analysis

M. Jagadesh Kumar1 and Sukhendu Deb Roy

Department of Electrical Engineering,
Indian Institute of Technology, Delhi,
Hauz Khas, New Delhi – 110 016, INDIA.
Email: mamidala@ieee.org Fax: 91-11-2658 1264

1
Author for correspondence
Abstract: Using two-dimensional process and device simulation, we present for the first

time, a new high breakdown voltage two-zone base extended buried oxide (BOX) lateral

Schottky Collector Bipolar Transistor (SCBT) on SOI with a breakdown voltage as high as 12

times that of the conventional lateral Schottky collector bipolar transistor. We have explained

the new design features of the proposed Schottky collector structure and the reasons for its

significantly improved breakdown performance. The proposed structure is expected to be

suitable in the design of the new generation scaled high voltage Schottky collector bipolar

transistors for low power high speed analog applications.

Key Words: Silicon-On-Insulator (SOI), Lateral Schottky Collector Bipolar Transistor

(SCBT), Breakdown Voltage, Two-zone Base, and Buried Oxide (BOX).

2
1. Introduction

The concept of Schottky Barrier Collector Transistor (SBCT) has been introduced by

G. A. May [2] so as to minimize the collector storage time, suppress the minority carrier

reverse injection into the base and reduce collector series resistance. Since then the SBCTs

have been a subject of intense investigations for their practical applications in high speed

switching and non-saturating logic circuits or in class-D amplifier stages, and a number of

references [3-18] show adequate treatment on their practical design and implementation both

for small and large dimension devices. However, all these designs were based on vertical

current concept and did not become popular due to the difficulties in integrating them in a

standard CMOS process.

The other class of Schottky collector bipolar transistors recently proposed by Kumar et

al [19-24] is the lateral Schottky Collector Bipolar Transistor (SCBT) on SOI technology.

Their simulation results show that lateral SCBTs have promising applications in high speed

analog and mixed signal circuit designs and especially in nonsaturating VLSI logic circuits on

BiCMOS technology. However, a major drawback of either vertical or lateral Schottky

collector bipolar transistors is their extremely low collector breakdown voltage (VCE ≤ 3 V).

This is because of the presence of an accumulated or depleted space-charge region over a very

small region [1], which produces a high electric field at the Schottky collector-base interface.

In addition, due to the field induced barrier lowering effect and the image force [1],

nonsaturating reverse leakage current becomes large to cause their premature breakdown.

In this paper, using two-dimensional simulation, we demonstrate for the first time that

by applying a combination of a two-zone base region and an extended buried oxide (BOX) in

a lateral Schottky collector bipolar transistor, the collector breakdown voltage can be

3
enhanced by as large as 12 times that of a conventional lateral Schottky collector bipolar

transistor. The proposed, two-zone base region has a high doped base at the emitter side and a

low doped base at the collector Schottky metal side. The doping level of the low doped base is

chosen such that in the absence of an externally applied bias it gets completely depleted. This

reduces the electric field at the metal-base interface, thereby improving the breakdown

voltage. However, breakdown voltage is still limited by the high electric field at the Schottky

metal-BOX interface. This shortcoming is eliminated by using an extended BOX region

below the two-zone base to support the high electric field resulting in a significant

improvement in the breakdown voltage.

In the following sections, we have explained the proposed device structure, its

possible fabrication procedure and the reasons for its significantly improved breakdown

performance.

2. Device structure and simulation parameters

The Fig. 1 shows the schematic cross-section of a conventional SCBT, a Two-zone base

SCBT (TSCBT), and a Two-zone base Extended BOX SCBT (TESCBT) structures. The

process steps for realizing the conventional SCBT in the two-dimensional process simulator

ATHENA [25] are similar to those proposed in [19]. In the case of TSCBT structure, a two-

step base implantation process can be used using an additional mask to generate the high

doped and low doped two-zone base region. For obtaining the TESCBT, the process steps are

exactly the same as above except that the starting wafer has the extended BOX, which is

obtained on the handling wafer prior to the wafer bonding or layer transfer process. For all the

structures, an optimized 1.0 μm thick field oxide over the two-zone base is used to facilitate

4
spreading of electric field lines. In addition, the collector Schottky metal electrode on the field

oxide is extended from the collector-base interface and optimized to act as the metal plate

field termination. The doping profiles for the conventional and TSCBT structures obtained by

ATHENA using the above process are shown in Fig. 2. The doping profile for the TESCBT is

exactly same as that of the TSCBT.

The above structures created in the process simulator ATHENA are imported to the two-

dimensional device simulator ATLAS [26] for evaluating their electrical characteristics. The

various models activated in the simulations are Fermi-Dirac distribution for carrier statistics,

Klaassen’s unified mobility model for dopant-dependent low-field mobility, analytical field

dependent mobility for high electric field, Slotboom model for bandgap narrowing,

Selberherr’s ionization rate model for impact ionization and Shockley-Read-Hall (SRH) and

Klaassen Auger recombination models for minority carrier recombination lifetime. The SRH

recombination lifetime for silicon is chosen to be 2.0 μs for a carrier concentration of

5.0×1016 cm-3 and for all other concentrations recombination lifetimes are calculated using

Roulston’s equation [27]. For simulating the Schottky junction properties, standard

thermionic emission model is invoked and the image force barrier lowering effect parameter

is included. For a better comparison of the breakdown voltage, the common emitter peak

current gain of all the three structures is chosen to be identical (~30) by an appropriate choice

of the emitter and base dopings as shown in Fig. 2. For each structure, the collector-emitter

breakdown voltage (BVCEO) is calculated at the collector current of 1.0x10-6 Aμm-1. The

Gummel plots and current gain curves for the above structures are compared at VCE=1 V in

Fig. 3 and Fig. 4, respectively. The device dimensions and appropriate model parameters used

in our simulation are given in Table 1 and 2.

5
3. Results and Discussion

The output characteristics of the TSCBT and TESCBT are compared with that of the

conventional lateral SCBT in Fig. 5. Clearly, in the case of TSCBT, the breakdown voltage

increases to 13.2 V when compared with that of the conventional SCBT whose breakdown

voltage is 2.3 V. This is an improvement of about 5.7 times. However, the TESCBT exhibits a

breakdown voltage of 28.4 V, which is about 12 times that of the conventional SCBT. This is

a remarkable improvement in the breakdown voltage of a Schottky collector bipolar transistor

not reported so far in literature. This enhancement in breakdown voltage can be understood by

observing the potential contours and the corresponding electric field line crowding for all the

three structures as shown in Figs 6 - 8.

In the case of the conventional SCBT, we notice from Fig. 6(a) that the potential contours

crowd at the base-metal junction. This makes the electric field reach its critical value at the

junction of this device at a lower collector-base reverse bias as shown in Fig. 6(b) resulting in

an early breakdown voltage at 2.3 V. In the case of TSCBT, we observe from Fig. 7(a) that

the potential counters are more uniformly distributed at the collector base-metal junction

because of the lightly doped part of the two-base region. As a result, the critical electric field

is reached at a higher collector-base reverse bias as shown in Fig. 7(b) leading to a higher

breakdown voltage of 13.2 V. However, the potential contours of the TSCBT are still

crowded in the BOX under the base-metal junction. If these potential contours can be more

uniformly distributed, one would expect a further improvement in the collector breakdown

voltage of the SCBT. This is achieved in the TESCBT structure in which the BOX thickness

is extended under the low doped base and metal collector regions. It is clear from Fig. 8(a)

that the potential contours are now more uniformly distributed not only at the base-metal

6
junction but also in the oxide regions. This makes it possible to apply a large collector-base

reverse bias before the critical electric field is reached as shown in Fig. 8(b) resulting in a

breakdown voltage of about 28.4 V for the TESCBT. This improvement in breakdown voltage

is more than two times that of the TSCBT and as high as 12 times that of the conventional

lateral SCBT.

Fig. 9(a) shows the effect of Schottky Metal Extension (SME) on the breakdown voltages

of the TSCBT and TESCBT. We observe that the SME distributes the peak electric field away

from the Schottky metal-base interface. However, it is not as effective as the low doped

depleted base region and the contribution to the improvement in the breakdown voltage by

using SME alone is about 5% and 12% respectively for the TSCBT and TESCBT structures.

Fig. 9(b) shows the effect of increasing the thickness of the extended BOX on the

breakdown voltage. It shows that the breakdown voltage increases with the increase in

extended BOX thickness and finally saturates to a constant value when the BOX thickness is

about 1.8 μm below the bottom silicon-BOX interface. This is expected when both the

components of the electric field are responsible in the avalanche process and hence increasing

the extended BOX thickness beyond a certain thickness does not improve the breakdown

voltage.

4. Conclusions

Based on two-dimensional numerical studies, we have demonstrated the highest collector

breakdown voltage for a Schottky collector bipolar transistor not reported so far in literature.

Our proposed structure has a low doped base at the collector side and a high doped base at the

emitter side and also an extended buried oxide below the Schottky metal-base region. We

7
have demonstrated that the above design allows significant improvement in collector

breakdown voltage, which is about 12 times higher when compared with the conventional thin

film lateral Schottky Collector Bipolar Transistor on SOI. We have explained the

improvement in breakdown voltage as due to the spreading of the electric field away from the

Schottky collector metal-base interface into the depleted low doped base and suppression of

vertical breakdown at the Schottky metal-buried oxide interface by the extended buried oxide.

Our proposed structure is expected to have wide applications in the design of high

voltage, high speed Schottky collector lateral bipolar transistors on SOI for the new

generation analog circuits such as the low power RF amplifiers, current and voltage precision

circuits, bandgap reference circuits [28-34].

8
References

[01] S. M. Sze, Physics of the Semiconductor devices (2nd Edition) Wiley-Interscience, New
York (1981).

[02] G. A. May, “The Schottky-barrier-collector transistor,” Solid-State Electronics, Vol.

11,No. 6, pp. 613-619, 1968.

[03] S. C. Blackstone and R. P. Mertens, “Schottky collector I/SUP 2/L,“ IEEE Journal of
Solid-State Circuits, Vol. 12, No. 3, pp. 270-275, 1977.

[04] F. W. Hewlett, “A compact efficient Schottky collector transistor switch, “ IEEE Journal
of Solid-State Circuits,” Vol. 14, No. 5, pp. 801-806, 1979.

[05] S. Hau, L. J. Cornell, W. Eccleston, and J. S. Roberts, “Emitter-down, Schottky collector

HJBT for very fast, high-density logic applications,” Electronics Letters, Vol. 24, No.
15, pp. 971-973, 1988.

[06] S. Hall, L. J. Cornell, W. Eccleston, and J. S. Roberts, “Direct coupled logic using an
integrated, emitter-down, Schottky collector, heterojunction bipolar transistor with a
MESFET load,” Proceedings of the IEE Colloquium on Heterojunction and Quantum
Well Devices: Physics, Engineering and Applications, pp. 19/1 - 19/3, 1988.

[07] S. Akbar, N. Anantha, C. Hsieh, and J. Walsh, "Method of fabrication of Schottky

bipolar transistor," IBM Technology Disclosure Bulletin, vol. 33, p. 11, Apr. 1991.

[08] S. Akbar, S. Ratanaphanyarat, J. B. Kuang, S. F. Chu, and C. M. Hsieh, “Schottky-

collector vertical PNM bipolar transistor,“ Electronics Letters, Vol. 28, No. 1, pp. 86-87,
1992.

[09] J. L. Pelouard, N. Matine, F. Pardo, D. Sachelarie, and J. L. Benchimol, “Fully self-

aligned InP/InGaAs heterojunction bipolar transistors grown by chemical beam epitaxy
with a Schottky collector,” Proceedings of the Fifth International Conference on Indium
Phosphide and Related Materials, Paris, France, pp. 393-396, 1993.

[10] O. Nur and M. Willander, “Switching characteristics of pSi/nSi1−xGex/CoSi2 Schottky

collector HBT,” Microelectronics Journal, Vol. 24, No. 7, pp. 823-830, 1993.

[11] O. Nur and M. Willander, “The high-speed performance of p-Si/n-Si1−xGex/CoSi2

Schottky collector HBTs,” Microelectronics Journal, Vol. 25, No. 6, pp. 399-406, 1994.

[12] U. Bhattacharya, M. J. Mondry, G. Hurtz, I. H. Tan, R. Pullela, M. Reddy, J. Guthrie, M.

J. W. Rodwell, and J. E. Bowers, “Transferred substrate Schottky-collector
heterojunction bipolar transistors: first results and scaling laws for high fmax,“ IEEE
Electron Device Letters, Vol. 16, No. 8, pp. 357 – 359, 1995.

9
[13] U. Bhattacharya, M. J. Mondry, G. Hurtz, J. Guthrie, M. J. W. Rodwell, T. Liu, C.
Nguyen, and D. Rensch, “100 GHz transferred-substrate Schottky-collector
heterojunction bipolar transistor,” Proceedings of the Eighth International Conference
on Indium Phosphide and Related Materials, pp.145-148, 1996.

[14] H. Beneking, “The collector function in semiconductor devices,” IEEE Transactions on

Electron Devices, Vol. 43, No. 9, pp. 1416-1427, 1996.

[15] B. Agarwal, D. Mensa, R. Pullela, Q. Lee, U. Bhattacharya, L. Samoska, J. Guthrie, and

M. J. W. Rodwell, “A 277 GHz fmax transferred-substrate heterojunction bipolar
transistor,” Proceedings of the Ninth International Conference on Indium Phosphide and
Related Materials, pp. 633 - 636, 1997.

[16] Q. Lee, S. C. Martin, D. Mensa, R. P. Smith, J. Guthrie, and M. J. W. Rodwell,

”Submicron transferred-substrate heterojunction bipolar transistors,“ IEEE Electron
Device Letters, Vol. 20, No. 8, pp. 396 – 398, 1999.

[17] T. Arai, H. Tobita, Y. Harada, M. Suhara, Y. Miyamoto, and K. Furuya, “Proposal of

buried metal heterojunction bipolar transistor and fabrication of HBT with buried
tungsten,” Eleventh International Conference on Indium Phosphide and Related
Materials, pp.183– 186, 1999.

[18] A. Girardot, A. Henkel, S. L. Delage, M. A. DiForte-Poisson, E. Chartier, D. Floriot, and

S. Cassette, “High-performance collector-up InGaP/GaAs heterojunction bipolar
transistor with Schottky contact,” Electronics Letters, Vol. 35, No. 8, pp. 670-672, Apr.
1999.

[19] M. J. Kumar and D. V. Rao, "A new lateral PNM Schottky collector bipolar transistor on
SOI for nonsaturating VLSI logic design," IEEE Transactions on Electron Devices, Vol.
49, No. 6, pp. 1070-1072, 2002.

[20] M. J. Kumar and C. L. Reddy, “2D-simulation and analysis of lateral SiC N-emitter
SiGe P-base Schottky metal-collector (NPM) HBT on SOI,” Microelectronics
Reliability, Vol. 43, No. 7, pp. 1145-11, 2003.

[21] M. J. Kumar, and D. V. Rao, “A New Lateral SiGe-Base PNM Schottky Collector
Bipolar Transistor on SOI for Non-saturating VLSI Logic Design,” Proceedings of the
16th International Conference on VLSI Design, New Delhi, pp. 489 - 492, 2003.

[22] M. J. Kumar and C. L. Reddy, “A new dual-bandgap SiC-on-Si p-emitter, SiGe n-base,
lateral Schottky metal-collector (PNM) HBT on SOI with reduced collector-emitter
offset voltage,” Conference on Convergent Technologies for Asia-Pacific Region,
TENCON 2003, Vol. 1, pp. 493- 495, 2003.

10
[23] M. J. Kumar, and D. V. Rao, “Proposal and design of a new SiC-emitter lateral NPM
Schottky collector bipolar transistor on SOI for VLSI applications,” IEE Proceedings on
Circuits, Devices and Systems, Vol. 151, No. 1, pp. 63 – 67, 2004.

[24] M. J Kumar and C. L. Reddy, "Realizing wide bandgap P-SiC-emitter Lateral

Heterojunction Bipolar Transistors with Low Collector-Emitter Offset Voltage and High
Current Gain - A Novel Proposal using Numerical Simulation," IEE Proceedings -
Circuits, Devices and Systems, Vol.151, pp. 399-405, October 2004.

[25] Athena User’s Manual. Santa Clara, CA: Silvaco International, 2000.

[26] Atlas User’s Manual. Santa Clara, CA: Silvaco International, 2000.

[27] D. J. Roulston, N. D. Arora, and S. G. Chamberlain, “Modeling and measurement of

minority-carrier lifetime versus doping in diffused layer of n+p silicon diodes,” IEEE
Transactions on Electron Devices, Vol. 29, pp. 284-291, 1982.

[28] J. A. Appels and H. M. J. Vaes, “High voltage thin layer devices,” IEDM Technology.
Digest, pp. 238–241, 1979.

[29] E. Arnold, “Silicon-on-insulator devices for high voltage and power IC applications,”
Journal of Electrochemical Society, Vol. 141, No. 7, pp. 1983–1988, 1994.

[30] J. Kim, S. Matsumoto, T. Sakai, and T. Yachi, “Breakdown voltage improvement for
thin-film SOI power MOSFETS by buried oxide step structure” IEEE Electron Device
Letters, Vol. 15, No. 5, pp.148-150, 1994.

[31] V. M. C. Chen and J. C. S. Woo, “A low thermal budget, fully self-aligned lateral BJT
on thin film SOI substrate for low power BiCMOS applications,” Symposium on VLSI
Technology, Digest of Technical Papers, pp. 133-134, 1995.

[32] S. Kawanaka, T. Fuse, K, Inoh, T. Shino, H. Nii, T. Yamada, M. Yoshimi, and S.

Watanabe, “3-D simulation analysis of high performance SOI lateral BJT for RF
applications,” Proceedings of the IEEE International SOI Conference, pp. 29-30 1998.

[33] T. Yamada, H. Nii, K. Inoh, T. Shino, S. Kawanaka, Y. Minami, T. Fuse, Y. Yoshimi,

Y. Katsumata, S. Watanabe, J. Matsunaga, and H. Ishiuchi, “ A novel high-
performance lateral BJT on SOI with metal-backed single-silicon external base for low-
power/low-cost RF applications,” Proceedings of the Bipolar/BiCMOS Circuits and
Technology Meeting, pp. 129-132, 1999.

[34] H. Nii, T. Yamada, K. Inoh, T. Shino, S. Kawanaka, M. Yoshimi, and Y. Katsumata, “A

novel lateral bipolar transistor with 67 GHz fmax on thin-film SOI for RF analog
applications,” IEEE Transactions on Electron Devices, Vol. 47, No. 7, pp. 1536 – 1541,
2000.

11
Figure captions

Fig. 1: (a) Schematic cross-section of the conventional SCBT, (b) Two-zone base SCBT

(TSCBT) and (c) Two-zone base extended BOX SCBT (TESCBT).

Fig. 2. Doping profiles of the TSCBT compared with that of the conventional SCBT.

Fig. 3. Gummel plots of the TESCBT compared with that of the conventional SCBT.

Fig. 4. Collector current versus current gain of the TESCBT compared with that of the

conventional SCBT.

Fig. 5. Common-emitter I-V characteristics of the TESCBT compared with that of the TSCBT

and the conventional SCBT: tBOX=0.2 μm and tExtended BOX=1.8 μm.

Fig. 6. (a) Potential contours and (b) the lateral electric field distribution for the conventional

SCBT.

Fig. 7. (a) Potential contours and (b) the lateral electric field distribution for the TSCBT:

Schottky Metal Extension (SME) length=1.0 μm.

Fig. 8. (a) Potential contours and (b) the lateral electric field distribution for the TESCBT:

tExtended BOX =1.8μm and Schottky Metal Extension (SME) length=1.5 μm.

Fig. 9(a). Breakdown voltage versus Schottky Metal Extension (SME) length on the field

oxide for the TSCBT and TESCBT structures: tBOX=0.2 μm and tExtended BOX =1.8 μm

Fig. 9(b). Breakdown voltage versus extended BOX thickness to show the effect of extended

BOX thickness on the breakdown voltage of the TESCBT: Schottky Metal Extension (SME)

length=1.5 μm.

12
Table -1. Device parameters
Parameters Conventional SCBT TSCBT TESCBT
SOI thickness 0.2 μm 0.2 μm 0.2 μm
Buried Oxide (BOX)
0.2 μm 0.2 μm 2.0 μm
thickness
Emitter length 4.0 μm 4.0 μm 4.0 μm
Emitter doping level 5.0×1019 cm-3 5.0×1019 cm-3 5.0×1019 cm-3
Peak base Base one doping = 3.0×1017 cm-3
1.0×1018 cm-3
doping Level Base two doping = 1.0×1016 cm-3
Base one width ~ 1.0 μm
Base width 0.6 μm
Base two width ~ 2.0 μm
Substrate doping level 1.0×1015 cm-3 1.0×1015 cm-3 1.0×1015 cm-3
Field oxide Thickness 1.0 μm 1.0 μm 1.0 μm

Field plate termination - 1.0 μm 1.50 μm

length at the collector

Table-2. Simulation parameters

Parameters Value
SRH electron and minority carrier life time coefficients
2.0×10-6 s
(TAUN0, TAUP0)
SRH electron and hole minority carrier life time at the
3.4×10-10 s
poly base contact (TAUN0, TAUP0)
Surface recombination velocity at the poly base contact
2.5×106 cm s-1
(VSURFP).
Interface states at the silicon-oxide interface. 5.0×1010 cm-2
Metal workfunction for the Schottky contact (Ti). 4.34 eV

13
 E B C

N+ P
buried oxide
(a)

P-substrate
E B C

Field
oxide
N+ P P-
(b)
buried oxide

P-substrate

E B C

Field
oxide
N+ P P-
(c)
buried oxide
Extended
BOX
P-substrate

Fig. 1

14
 20 +
10 N
tSi= 0.2 μm
Net doping [ cm ]

19
10 tBOX= 0.2 μm
-3

18 P
10
17
10
TSCBT
-
16 Conventional SCBT P
10
Schottky
15
metal-base
10 interface

0 1 2 3 4 5 6 7
Transistor length [ μm ]

Fig. 2

15
 -2
10 TSCBT
-4 Conventional SCBT
10
φM= 3.34 eV
-6
10 VCB= 1 V IB
IB, IC [ Aμm ]

IC
-1

tSi= 0.2 μm
-8
10 tBOX= 0.2 μm
-10
10
-12
10
-14
10
-16
10
-18
10
0.0 0.2 0.4 0.6 0.8 1.0 1.2
Base-emitter voltage, VBE [ V ]

Fig. 3

16
 30
φM= 3.34 eV
VCB= 1 V
25 tSi= 0.2 μm
Current gain [ β ]

tBOX= 0.2 μm
20
TSCBT
15 Conventional SCBT

10

0 -16 -14 -12 -10 -8 -6 -4

10 10 10 10 10 10 10
-1
Collector current , IC [ Aμm ]

Fig. 4

17
 1.8 TESCBT
TSCBT
1.6 Conventional SCBT
1.4 φM= 3.34 eV
IC [ x10 Aμm ]
-1

tSi= 0.2 μm
1.2 tBOX= 0.2 μm
IB increment
1.0 5 nAμm
-1
-6

0.8
0.6
0.4 IB=10.0 nAμm
-1

0.2
IB=0
0.0
0 4 8 12 16 20 24 28
Collector-emitter voltage, VCE [ V ]

Fig. 5

18
 Conventional SCBT
-1.3 -1.3
Vertical length [ µm ]

-0.3 N+ P M
-0.3
BOX
0.1 0.1
VCE=2.3 V
VCE=0 V
0.4 VCE increment @ 0.25 V 0.4
depletion edge

1.0 P-substrate
1.0

0 1 2 3 4 5 6 7 8 9
Lateral length [ µm ]

Fig. 6(a)

19
 20 Conventional SCBT
10 +

Electric field [ x10 Vcm ]

N VCE=2.3 V 3.0

-1
19 tSi=0.2μm
10
Net doping [ cm ]

tBOX=0.2μm 2.5
-3

5
18
10 P
2.0
17
10 1.5
16
10 1.0
15 Schottky 0.5
10 metal-base
interface
14
10 0.0
4.6 3.6 2.6 1.6 0.6 0
Distance from metal-base interface [ μm ]

Fig. 6(b)

20
 -1.5 TSCBT -1.5
-1.3 -1.3
Vertical length [ µm ]

Field
oxide

-0.3 N+ P P- M -0.3
BOX
0.1 0.1
VCE=13.2 V

0.4 VCE increment @ 1.44 V 0.4

VCE=0 V
depletion edge

1.0 P-substrate 1.0

0 1 2 3 4 5 6 7 8 9
Lateral length [ µm ]

Fig. 7(a)

21
 20 +
10 N TSCBT 3.0
VCE=13.2 V

Electric field [ x10 Vcm ]

tSi=0.2 μm

-1
VCE increment @ 2.5 V 2.5
tBOX=0.2 μm
Net doping [ cm ]

19
10
-3

Schottky
metal-base interface
2.0

5
18
10 P
1.5
17
10
VCE=2.5 V
-
1.0
16 P
10 0.5
15
10 0.0
7 6 5 4 3 2 1 0
Distance from metal-base interface [ μm ]

Fig. 7(b)

22
 -1.5 TESCBT -1.5
-1.3 -1.3
Vertical length [ µm ]

Field
oxide
-0.3 N+ P P- M
-0.3
0.1 BOX 0.1
depletion edge
Extended BOX

VCE=28.4 V
1.9 VCE increment @ 2.0 V 1.9
VCE=0 V
P-substrate
3.0 3.0
0 1 2 3 4 5 6 7 8 9
Lateral length [ µm ]

Fig. 8(a)

23
 20 + TESCBT
2.5
10 N

Electric field [ x10 Vcm ]

Schottky

-1
tSi=0.2 μm metal-base
tBOX=0.2 μm 2.0
Net doping [ cm ]

19
10 interface
-3

5
VCE increment @ 5 V
10
18 VCE=28.4 V 1.5
P
17
10 1.0
-
16 P
10 0.5

15
10 VCE=5 V 0.0
7 6 5 4 3 2 1 0
Distance from metal-base interface [ μm ]

Fig. 8(b)

24
 29
13.3 TESCBT
Breakdown voltage [ V ]

Breakdown voltage [ V ]
TSCBT
13.2 28
13.1
27
13.0
12.9
26
12.8
12.7 25
12.6
24
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
Schottky metal extension length [ μm ]
Fig. 9(a)

25
 30
Breakdown voltage, BVCEO [ V ]

TESCBT
28
tSi=0.2 μm
26 tBOX=0.2 μm

24
22
20
18
16
14
12
0.0 0.5 1.0 1.5 2.0 2.5
Extended BOX thickness [ μm ]

Fig. 9(b)

26