Chapter 4 Semiconductor Devices

1
1. Schottky Junction
(1) Schottky diode Schottky diode is formed when a metal contacts
n-type semiconductor with work function of
metal larger than semiconductor(Φm > Φn )

Definition of work function: energy difference

between vacuum level and Fermi level.

Energy required
E i d to free
f an electron
l b
by
thermionic emission and photon?

Thermionic emission: work function of metal

and semiconductor .

Photon: Metal: work function; semiconductor:

electron affinity.
affinity

When the two solids come into contact, the more energetic electrons in the CB of the
semiconductor can readily tunnel into the metal in search of lower empty energy
levels (just above EFm) and accumulate near the surface of the metal.
2
Electrons tunneling
El li from
f the
h semiconductor
i d l
leave
behind an electron-depleted region of width W in
which there are exposed positively charged
donors,, in other words,, net ppositive space
p charge.
g

The contact potential, called the built-in potential

V0, therefore develops between the metal and the
semiconductor.
semiconductor

There is obviously also a built-in electric field E0 from the positive charges to
the negative charges on the metal surface.

Eventually this built-in potential reaches a value that prevents further

3
accumulation of electrons at the metal surface and an equilibrium is reached.
 EFm and EFn line up.

n decreases
d → Ec – EFn increases
i

⎡ (E − E F ) ⎤
n = N c exp ⎢− c ⎥
⎣ kT ⎦
The bands must bend to increase Ec – EFn toward
the junction.

The bending is just enough for the vacuum level

to be continuous and changing by Φm - Φn from
the semiconductor to the metal, as this much
energy is needed to take an electron across from
the semiconductor to the metal.

Far awayy from the jjunction,, we,, of course,, still

have an n-type semiconductor.

The PE barrier for electrons moving from the

Φ B = Φ m − χ = eV 0 + (E c − E Fn ) metal to the semiconductor is called the
Schottky barrier height ΦB, which is given by,
4
 Under open circuit conditions, there is no net
current flowing through the metal-semiconductor
junction Thermal emission balance is reached.
junction. reached

Emission probability depends on the PE barrier for

emission through
g the Boltzmann factor. There are
two current components due to electrons flowing
through the junction. The current due to electrons
being thermally emitted from the metal to the CB of
the semiconductor is,
is

⎛ Φ ⎞
J 1 = C 1 exp ⎜ − B ⎟ 4-1
⎝ kT ⎠

Where C1 is some constant, whereas the current due

to electrons being thermally emitted from the CB of
In equilibrium the semiconductor to the metal is,
is

⎛ eV 0 ⎞
J open circuit = J 2 − J1 = 0 J 2 = C 2 exp ⎜ − ⎟ 4-2
⎝ kT ⎠

5
 Under forward bias conditions, the semiconductor
side is connected to the negative terminal.

Since the depletion region W has a much larger

resistance than the neutral n-region (outside W) and
the metal side, nearly all the voltage drop is across the
depletion region.

The applied bias is in the opposite direction to the

b ilt i voltage
built-in lt V0. Thus
Th V0 isi reduced
d d to V ΦB
t V0 – V.
remains unchanged. So the PE barrier for thermal
emission of electrons from the semiconductor to the
metal is now e(V
( 0 – V).
)

The current J2for, due to the electron emission from the semiconductor to the metal,
is now,

⎛ e (V 0 − V ) ⎞
J 2for = C 2 exp ⎜ − ⎟
⎝ kT ⎠

6
The current J1, due to the electron emission from the metal to semiconductor
remains unchanged since ΦB is the same. The net current is then:

⎛ e (V 0 − V ) ⎞ ⎛ eV 0 ⎞
J = J 2for − J 1 = C 2 exp ⎜ − ⎟ − C 2 exp ⎜− ⎟
⎝ kT ⎠ ⎝ kT ⎠
or
⎛ eV 0 ⎞ ⎡ ⎛ eV ⎞ ⎤
J = C 2 exp ⎜ − ⎟ ⎢ exp ⎜ ⎟ − 1⎥
⎝ kT ⎠ ⎣ ⎝ kT ⎠ ⎦
⎡ ⎛ eV ⎞ ⎤ 4-3
= J 0 ⎢ exp ⎜ ⎟ − 1 ⎥
⎣ ⎝ kT ⎠ ⎦

Where J0 is the constant that depends on the material and surface properties of the
two solids.
lid

7
 r

Schottky junction is reverse biased, then the

positive terminal is connected to the semiconductor.

CB
The applied voltage Vr drops across the depletion
ΦB e(V0+Vr region
g since this region
g has veryy few carriers and is
Ec
highly resistive.
Ev
VB The built-in voltage V0 thus increases to V0 + Vr. The
PE barrier for thermal emission of electrons from the
CB to the metal becomes e(V0 + Vr), which means that
the corresponding current component becomes,

⎛ e (V 0 + V r ) ⎞
J 2rev = C 2 exp ⎜ − ⎟
⎝ kT ⎠
⎛ Φ ⎞ ⎛ eV 0 ⎞
J 1 = C 1 exp ⎜ − B ⎟ = C 2 exp ⎜ − ⎟
⎝ kT ⎠ ⎝ kT ⎠
The net current is then:

⎛ eV 0 ⎞ ⎡ ⎛ eV ⎞ ⎤
J = J 2rev − J 1 = C 2 exp ⎜ − ⎟⎢ exp ⎜− ⎟ − 1⎥ 4-4
⎝ kT ⎠ ⎣ ⎝ kT ⎠ ⎦ 8
Since generally V0 is typically a fraction of a volt and the reverse bias is more than a few
volts, J2rev << J1 and the reverse bias current is essentially limited by J1 only and is very
small.
ll Thus,
Th under
d reverse bias
bi conditions,
di i the
h current is i primarily
i il due
d to theh thermal
h l
emission of electrons over the barrier ΦB from the metal to the CB of the semiconductor.

I-V characteristics of a typical Schottky junction.

⎡ ⎛ eV ⎞ ⎤
J = J 2for − J 1 = J 0 ⎢ exp ⎜ ⎟ − 1⎥
⎣ ⎝ kT ⎠ ⎦
1 m A

1 μA

V
0 .2 V
10 μ A

⎛ eV 0 ⎞ ⎡ ⎛ eV ⎞ ⎤
J = J 2rev − J 1 = C 2 exp
p⎜− p⎜−
⎟ ⎢ exp ⎟ − 1⎥
⎝ kT ⎠ ⎣ ⎝ kT ⎠ ⎦
⎛ eV 0 ⎞
J ≈ − J 1 = C 2 exp ⎜ − ⎟ 9
⎝ kT ⎠
(2) Schottky Junction Solar cell and photodetector

EHPs are generated

EHP t d iin th
the ddepletion
l ti region
i for
f
photon energy greater than energy bandgap.

Built-in field separates the EHPs. Electron toward

semiconductor and hole toward metal.

Extra electron in neutral n-region and less electron in

metal related to dark state.

Under open-circuit conditions, a voltage develops

across the Schottky junction with metal end positive
and semiconductor end negative.
negative

Connected to external load, the extra electrons will

ppass through
g the load toward the metal where it
replenishes the lost electrons in the metal. There is
photo energy to electric energy conversion.

10
For photon energy less than bandgap, what happen?

The photon will excite an electron from Fermi level

of metal over ΦB into CB of semiconductor. In this
case photon energy must be greater than ΦB.

reverse biased Schottky junction,

Increase the built

built-in
in potential from V0 to
V0+Vr and thus increase the drift velocity
of the EHPs in the depletion region.

Shorten the transit time required to cross

the depletion width.

Application for faster device such as

photodetector.
11
(3) Ohmic contact
An Ohmic contact is a junction between metal and
semiconductor that does not limit the current flow.

The work function of the metal Φm is smaller than

the work function Φn of the semiconductor.

The electrons (around EFm) tunnel into the

semiconductor in search of lower energy levels,
which they find Ec.

Consequently many electrons pile in the CB of the

semiconductor prevent further electrons tunneling
from the metal.
n increases, the Ec-EFn decreases and the energy
band bends downward.

The conduction electrons immediately on either side

of the junction (at EFm and Ec) have about the same
energy and therefore there is no barrier involved
when they cross the junction in either direction under
the influence of an electric field. 12
 Accumulation Region Bulk Semiconductor
Ohmic Contact

CB
Ec
EFm EFn
Ev
VB

Mt l
Metal n type Semiconductor
n-type
After Contact

It is clear that the excess electrons in the accumulation region increase the
conductivity of the semiconductor in this region. When a voltage is applied to the
structure, the voltage drops across the higher resistance region, which is the bulk
semiconductor region.
region Both the metal and the accumulation region have
comparatively high concentrations of electrons compared with the bulk of the
semiconductor. The current is therefore determined by the resistance of the bulk
region.

13
 2. pn Junction
2 1 Open
2.1 O circuit
i it
Metallurgical junction between n-type and p-type

Hole concentration gradient (p → n): ppo → pno

Electron concentration gradient (n → p): nno → npo

Hole diffusion p → n, Electron diffusion n → p

Depletion region or space charge layer(SCL) is

formed due to the recombination of diffused carriers
(Note: pn = ni2 everywhere, without applied bias or
photoexcitation)

14
 An internal electrical field E0 formed in the –x direction

This field drives both hole and electrons in the opposite

directions of their diffusion.

At last, the equilibrium is reached when the hole and

electron diffusion rate is balanced by the hole and
electron drifting back driven by the internal field.

The net space charge density in the depletion region (-

Wp<x<0)) is –eNa , and is eNd in the region
g of 0<x<Wn.

For overall charge neutrality,

Acceptor concentration Donor concentration

N aW p = N dWn 45
4-5

15
Gauss law relates Field (E) to net space charge density

dE ρ net ( x)
=
dx ε
Permittivity of the medium ε=ε0εr
Field in depletion region

1 x
(− W < x < 0) 1
ε∫
Wn
(0 < x < Wn )
ε∫
E(x) = ρ net ( x)dx, p E(x) = ρ net ( x)dx,
−W p x

1 eN (x + W ) 1 eN d (Wn − x )
(eN )dx = −
Wn
(− eN )dx = − ∫
x
=
∫
a p
=
ε ε
d
ε ε
a x
−W p

Electric Field at M (metallurgical junction) reaches the maximum value E0;

eN dWn eN aW p
Eo = − =− 4-6
ε ε
16
Relationship between built-in voltage and the depletion width

−
(
eN a x +W p ) (−W < x<0 )
E(x) = {
p
ε
eN d (Wn − x )
− (0< x <Wn )
ε
Since E= -dV/dx the built-in voltage across the depletion
region is then;

E ( x )dx
Wn
V0 = − ∫
−W p

⎡ 0 eN a (x + W p ) Wn eN (W − x ) ⎤
V0 = − ⎢ ∫ − dx + ∫ − d n dx ⎥
⎣ −W p ε 0 ε ⎦
N aW p2 eN dWn2
eN
= +
2ε 2ε

N aW p = N dW n

eN a N dW02
V0 = 47
4-7
2ε ( N a + N d )
W0=Wn+Wp, depletion width 17
Relationship between V0 and the doping parameter (Na, Nd)

⎛ E ⎞
Boltzmann statistics: N (E ) = N 0 exp ⎜ − ⎟
⎝ kT ⎠

PE of electron on p side is zero and on n side is –eV

eV0, the
ratio of the electron concentration in p type and n type
semiconductor is
n p0 ⎛ eV0 ⎞
= exp⎜ − ⎟
nn 0 ⎝ kT ⎠

Similarly for the hole concentrations,

Similarly, concentrations

pn 0 ⎛ eV0 ⎞
= exp⎜ − ⎟
p p0 ⎝ kT ⎠

kT ⎛ n p 0 ⎞ kT ⎛⎜ pn 0 ⎞⎟
V0 = lln⎜⎜ ⎟⎟ and
d V0 = lln
e ⎜⎝ p p 0 ⎟⎠
4-8
e ⎝ nn 0 ⎠
18
 kT ⎛ n p 0 ⎞ kT ⎜⎛ pn 0 ⎞⎟
V0 = ln⎜⎜ ⎟⎟ and V0 = ln
e ⎝ nn 0 ⎠ e ⎜⎝ p p 0 ⎟⎠

ni2 ni2
pn 0 = = ; p p0 = Na
nn 0 N d
kT ⎛ ni2 ⎞
V0 = ln⎜⎜ ⎟⎟ 4-9
e ⎝ Na Nd ⎠

Clearly V0 is related to the dopant and material properties via Na, Nd and ni

The built-in voltage (V0)is the voltage across a pn junction, going from P- to n-type
semiconductor in open circuit. It is not the voltage cross the diode, which is made
up of V0 as well as contact potentials at metal-semiconductor junction at electrodes.

19
2.2 Forward bias
The applied voltage V decrease the potential barrier
V0 to V0-V
V that electrons and hole surmount to
diffuse to left and right.
This results in more holes diffusion to n-side and
more electrons
l t diffusion
diff i to t p-side-injection
id i j ti off
excess of minority carriers.
By using Boltzmann statistics, the hole concentration
pn(0) att x’=0
’ 0 (x=W
( Wn) is
i

⎛ e(V − V ) ⎞
pn (0 ) = p po exp⎜ − 0 ⎟
⎝ kT ⎠
At open circuit
pn 0 ⎛ eV ⎞
= exp⎜ − 0 ⎟
⎛ eV ⎞ p p0 ⎝ kT ⎠
pn (0) = pno exp⎜ ⎟
⎝ kT ⎠
pp0 and pn0 are hole concentration in p-type
and n-type semiconductors
20
 Electrons are similarly injected from the n-side
to the p-side.
p side The electron concentration at x=-
x=
Wp is given by:

⎛ eV ⎞
n p (0 ) = n po exp⎜ ⎟
⎝ kT ⎠
np0 is electron concentration in p-type semiconductors

⎛ eV ⎞
pn (0 ) = pno exp⎜ ⎟ Law of the Junction: relationship between
⎝ kT ⎠ 4-10
minority carrier concentrations and voltage in
⎛ eV ⎞ pn junction
n p (0 ) = n po exp⎜ ⎟
⎝ kT ⎠

The current due to the hole diffusion in n-side and electron diffusion in p-side
(diff i off minority
(diffusion i ) can be
i i carriers) b maintained
i i d through
h h a pn junction
j i underd
forward bias.
21
 Assume that the length of the p- and n- regions are
longer than the minority carrier diffusion length.
The excess hole concentration in n-side
n side is :

⎛ x′ ⎞
Δpn ( x′) = Δpn (0) exp⎜⎜ − ⎟⎟
⎝ Lh ⎠

where Lh is the hole diffusion length, defined by Lh = Dhτ h in which τh is the mean
hole recombination lifetime (minority carrier lifetime) in the nn-region
region.

Excess minority carrier concentration Δpn ( x′) = pn ( x′) − pno

The hole diffusion current density JD,hole is therefore

dpn ( x') dΔpn ( x')

h l = −eDh
J D ,hole = −eDh
dx' dx'

eDh ⎛ x' ⎞
J D ,hole = Δpn (0 ) exp⎜⎜ − ⎟⎟
Lh ⎝ Lh ⎠
22
 The total current anywhere in the device is constant.

The total current J=JD,hole(x=Wn) +JD, elec (x=-Wp).

eDh
J D ,hole = Δpn (0 )
Lh

Δpn (0 ) = pn (0 ) − pn 0
⎛ eV ⎞
eDh pn 0 ⎡ ⎛ eV ⎞ ⎤ pn (0 ) = pno exp⎜ ⎟
J D ,hole = ⎢exp⎜ kT ⎟ − 1⎥ ⎝ kT ⎠
Lh ⎣ ⎝ ⎠ ⎦

Thermal equilibrium hole concentration pn0 is related to the donor concentrations by

ni2 ni2
pn 0 = =
nn 0 N d

eDh ni2 ⎡ ⎛ eV ⎞ ⎤
J D ,hole = ⎢exp⎜ kT ⎟ − 1⎥
Lh N d ⎣ ⎝ ⎠ ⎦ 23
 eDh ni2 ⎡ ⎛ eV ⎞ ⎤
Hole diffusion current in n-region J D ,hole = ⎢exp⎜ kT ⎟ − 1⎥
Lh N d ⎣ ⎝ ⎠ ⎦

Similarly, the electron diffusion eDe ni2 ⎡ ⎛ eV ⎞ ⎤

J D ,elec = ⎢expp⎜ kT ⎟ − 1⎥
currentt Le N a ⎣ ⎝ ⎠ ⎦

Total current across the device is

⎡ ⎛ eV ⎞ ⎤
J = J D ,hole + J D ,elec = J so ⎢exp⎜ ⎟ − 1⎥ 4-11
⎣ ⎝ kT ⎠ ⎦
⎛ eDh eDe ⎞ 2
J so = ⎜⎜ + ⎟⎟ni 4-12
⎝ Lh Nd Le Na ⎠

Equation 4-12 is the familiar diode equation and frequently called the Shockley equation.

24
2.3 Reversed bias

Applied voltage increases the built-in potential

barrier and thus electric field in SCL is larger than
the built-in internal field E0. but there is a small
reverse current.

Small amount of holes on the n-side near the SCL

become extracted and swept by the field across SCL
over to the p-side.

Junction law with reversed bias

⎛ eV ⎞
pn (0 ) = pno exp⎜ − ⎟
Small diffusion current due ⎝ kT ⎠
to concentration gradient ⎛ eV ⎞
n p (0 ) = n po exp⎜ − ⎟
⎝ kT ⎠
Reverse saturation current density is

⎛ eDh eDe ⎞ 2
J so = ⎜⎜ + ⎟⎟ni 4-13
⎝ Lh Nd Le Na ⎠
25
2.4 Depletion layer capacitance of the pn junction

Depletion
p region
g of a ppn jjunction has positive
p and
negative charges separated over distance W
similar to parallel plate.

C
Capacitance
i in
i parallel
ll l plate Q/V (εA)/W
l = Q/V=(

Capacitance in the depletion region depends on

th voltage.
the lt Incremental
I t l capacitance
it =dQ/dV
dQ/dV

⎡ 2ε (N a + N d )(Vo − V ) ⎤
1/ 2

From Eq. 4-7, depletion region width is; W =⎢ ⎥

⎣ eN N
a d ⎦
V is positive for forward bias and negative for reverse bias

Q = eN dWn A = eN aW p A Q Q
W = Wn + W p = +
eN d A eN a A

⎡ 2ε ( N a + N d )(Vo − V ) ⎤
1/ 2
Q Q
W= + =⎢ ⎥
eN d A eN a A ⎣ eN a N d ⎦ 26
 ⎡ 2ε ( N a + N d )(Vo − V ) ⎤
1/ 2
Q Q
W= + =⎢ ⎥
eN d A eN a A ⎣ eN a N d ⎦

⎡ eε ( N a N d ) ⎤
1/ 2
dQ A εA
Cdep = = ⎢ ⎥ = 4-13
dV (Vo − V )1/ 2 ⎣ 2( N a + N )
d ⎦ W

Cdepp is given by the same expression as that for the parallel plate capacitor , εA/W, but
with W being voltage dependent According to the definition of the capacitance of
parallel plate

The voltage dependence of the depletion capacitance

is utilized in Varactor diodes, which are employed
as voltage-dependent capacitors in tuning circuits.

The incremental capacitances of the

d l i region
depletion i increases
i with
i h forward
f d
bias and decreases with reverse bias.
27
2.5 Reverse breakdown: Avalanche and Zener
break breakdown

When the reverse voltage increases to a critical

value, the reverse current is substantially
increased.

This phenomenon is called pn junction break

down, which is caused either by the Avalanche
or Zener breakdown mechanism.
Reverse I-V characteristics of a pn
junction.

Avalanche breakdown: as the reverse bias increase,

the electric field in depletion region is so large that
thermally generated EHPs can gain enough energy
to ionize the host Si atoms. EHPs →new EHPs.

28
Zener breakdown mechanism:

Heavily doped pn junctions have narrow depletion

widths, and thus large electric field in this region

Reverse bias will lower down the CB in n-side.

Ec (n-side)<Ev (p-side), electrons tunneling from p
to n-side, lead to current. This process is called
Zener effect.

Zener breakdown mechanism

29
3. Bipolar Junction transistor (BJT)

Common base (CB) DC characteristics

p+ n p
(a)
Emitter Base Collector
E B C

Heavily doped p-region (p+): emitter

The base region has the most narrow
Lightly doped n-region (n): Base width.

Lightly
g y doped
p pp-region
g (p): Collector
(p)

30
 Emitter Base Collector
E B C
x E
pn(0)
IE IC
pn(x)
np((0))
(b) np(x) pno
npo
WEB WB WBC
IB VCB
VEB

Under normal and active conditions, the base-emitter (BE) is forwarded biased
and the base-collector (BC) junction is reverse biased. Base is common to both
the emitter and collector.

The emitter is heavily doped, the BE depletion region WEB extends almost
entirely into the base. The base and collectors have comparable doping, so the
base-collector depletion region WBC extends to both sides.

31
 Emitter Base Collector
E B C
x E
pn(0)
IE IC
pn(x)
np(0)
(b) np(x) pno
npo
WEB WB WBC
IB VCB
VEB

EB junction is forward biased, holes are injected into the base and electrons into
the emitter.

Hole injection into the base far exceeds the electron injection into the emitter
because the emitter is heavily doped. So can assume that the emitter current is
entirely due to holes injected from the emitter into the base.

Injected holes into the base must diffuse toward the collector junction because
there is a hole concentration gradient in the base.

⎛ eV EB ⎞
p n (0 ) = p n 0 exp ⎜ ⎟ p n (W B ) ≈ 0
⎝ kT ⎠ 32
 Assuming no holes are lost by recombination in the base, then all the injected
holes diffuse to the collector junction.

When the holes reach the collector junction, they are quickly swept across into the
collector by the internal field in WBC. The collector current is the same to the
emitter
i current.

The difference is that the collector current flows through a larger voltage
difference VCB. This means a net gain in power from the emitter circuit to the
collector circuit.

To evaluate the emitter current, we must know the hole concentration profile pn(x)
across the base. Because base is narrow, we can assume pn(x) profile is a straight
line.

⎛ dp n ⎞ p (0 )
I E = − eAD h p n 0 ⎜ ⎟ = eAD h n
⎝ dx ⎠ WB

⎛ eV EB ⎞
p n (0 ) = p n 0 exp ⎜ ⎟ eAD h p n 0 ⎛ eV EB ⎞
⎝ kT ⎠ IE = exp ⎜ ⎟
WB kT 33
⎝ ⎠
 Total emitter current I E = I E ( hole
h l ) + I E ( electron
l t ) without considering
g the recombination

The emitter injection efficiency:

I E(hole)
γ=
I E(hole) + I E(electron)
A small number of the diffusing holes in the narrow base inevitably become lost by
recombination
bi i with i h the
h large
l number
b off electrons,
l th base
the b t
transport f t αT
t factor

IC IC
αT = =
I E (hole
h l ) γI E
IC
Collector-base current transfer ratio of transistor- α is α= 34
defined as IE
 τh is
i the
th hole
h l lifetime
lif ti i the
in th base,
b 1/ τh is
i the
th probability
b bilit per unitit time
ti th t a hole
that h l
will recombine and disappear. τt is the time for a hole diffuse across WB

τt is the time for a hole diffuse across WB , τt = WB2/2Dh

1- τt / τh is the probability of not recombining, so

τt
αT = 1−
τh

⎛ τ ⎞
α = ⎜⎜ 1 − t ⎟⎟ γ ; α in the range of 0.99 - 0.999
⎝ τ h ⎠

⎛τt ⎞ ⎛τ ⎞
B
Base currentt is
i I B = I E (electron )+⎜
⎜τ ⎟⎟ I E ( hole ) = (1 − γ )I E + ⎜⎜ t ⎟⎟ γ I E = I E − I C
⎝ h ⎠ ⎝τh ⎠
35
The ratio of the collector current to the base current is the current gain β of the transistor

IC α γτ h
β = = ≈
IB 1−α τt

Leak current in the collector-base junction-ICBO

I C = α I E + I CBO
I B = (1 − α )I E − I CBO

what constitutes the transistor action is the control of IE and hence IC by VEB
36
 dc I-V characteristics of the pnp
p p
bipolar transistor (exaggerated
to highlight various effects)

pn((x))

Base SCL IC increases slightly with VCB even when IE is

pn(0)
pn(x) constant. (WHY?)

VCB is increased, WBC also increases.

VCB = -5 V Consequently the base width gets slightly
VCB = -10 V narrower, leading to a slightly shorter base transit
i τ t.
time

⎛ τ ⎞
α = ⎜⎜ 1 − t ⎟⎟ γ
x ⎝ τ ⎠
WB WBC h

The base width modulation by VCB is called the

37
W' B W'BC Early effect.
Common base amplifier

eAD h p n 0 ⎛ eV EB ⎞ The input signal is the ac voltage veb applied in

IE = exp ⎜ ⎟ series with the dc bias VEB across the EB, and
WB ⎝ kT ⎠
then modulates the injected hole junction pn(0)
up and down.
A small change in VEB leads to
large change in IE and then IC.
This can be used to obtain
IE changed → IC changed
voltage amplification.

38
 The change in IC can be converted to a voltage change by using a resistor RC, so

V CB = −V CC + R C I C

The output
p signal
g voltage
g vcb corresponds
p to the change
g in VCB,

v cb = δ V CB = R C δ I C = R C δ I E

The variation in the emitter current δIE depends on δVEB,

eAD h p n 0 ⎛ eV EB ⎞ δI E e
IE = exp ⎜ ⎟ = IE
WB ⎝ kT ⎠ δ V EB kT
Input resistance re is output signal is

δ V EB kT 25 v eb
re = = = v cb = R C δ I E = R C
δI E eI E I E (mA ) re

Voltage amplification is v cb R
AV = = C
v eb re 39
 Junction field effect transistor (JFET)

Gate
p+ G
Basic structure
G
Source Drain Circuit symbol
S n n-channel D for n-channel FET
S D
p+ S G D
Depletion p+ Metal electrode
region Insulation
Cross section p+ G
Depletion n (SiO2)
n regions
n
S D n-channel p
n-channel

Channel
thi k
thickness p+ (b)
(a)

Basic structure: An n-type semiconductor slab is provided with contacts at its

ends to pass current through it.
it Two terminals: source and drain.
drain

Two faces of the n-type are heavily p-type doped (gates). 40

1. VGS = 0

Vch
VDS
0 x
A B
VGS = 0
G
p+
ID = 6 mA
n n
S A B D

Depletion
region n-channel

VDS = 1 V
(a)

VDS >0 ID from D to S positive voltage along the n channel

depletion region extend more into

more reverselyy biased from A to B
th channel
the h l from
f A to
t B.
B
↑ VDS ↑ width of depletion region ↑ channel resistance 41
The resistance of the n-channel RAB increases with VDS. The drain current
therefore does not increase linearly with VDS.

ID (mA) VDS(sat) = VP

10 IDSS VGS = 0

5
IDS VGS = -2 V
VDS(sat) = VP+VGS VGS = -4 V
VGS = -5 V
0
0 4 8 12
VDS

42
 G
G
ID = 10.1 mA
ID = 10 mA
S A D
S D
Pinched off
channel
P

VDS = VP = 5 V VDS = 10 V
(b) (c)

VDS increases
i f th the
further, th two
t depletion
d l ti regions
i meett att point
i t P.
P The
Th channel
h l is
i
then said to be “pinched off”. The voltage VP is called the pinch-off voltage.

The pinch
pinch-off
off voltage is equal to the magnitude of reverse bias needed across
the p+n junctions to make them just touch at the drain end.

V GD = −V P

VGS = 0, so VGD = -VDS and pinch off occurs when VDS = VP.

The drain current does not increase significantly

g y with VDS when VDS > VP.

43
 G
Pinched off channel

ID = 10 mA
P
S A D
E

l
Lch po

VDS > 5 V

Beyond VDS = VP, there is a short pinched-off channel of length lpo.

There is a very strong electric field E in this region in the D to S direction.

El
Electrons i the
in h n-channel
h l drift
d if towardd P,
P andd when
h they
h arrive
i at P,
P they
h are
swept across the pinched-off channel by E. Consequently the drain current is
actually determined by the resistance of the conducting n-channel over Lch
from A to P and not by
y the ppinched-off channel.

44
As VDS increases, most of the additional voltage simply drops across lpo as this
region is depleted of carriers and hence highly resistive.
resistive Point P moves slightly
toward A.

Point P must still be at a potential VP because it is this potential that just makes
the depletion layers touch. Thus the voltage drop across Lch remains as VP, then,

VP
ID =
R AP

RAP is determined by Lch, which decreases slightly with VDS, ID increases

slightly with VDS. In many cases, ID is conveniently taken to be saturated at a
value IDSS for VDS > VP.

45
 2. VGS < 0 (for example, -2 V)

VGS = -2 V VGS = -2 V VGS = -2 V

G G G
p+ ID = 1.8 mA ID = 3.6 mA

A
A n B
D S D
S D S
P Pinched off

VDS = 0 V VDS = 1 V VDS = 3 V

(a) (b) (c)

VDS = 0,, the p+n jjunctions are now reverse-biased from the start,, the channel is
narrower, and the channel resistance is now larger than in the VGS = 0.

VDS = 1 V, the p+n junctions are now progressively more reverse-biased from VGS at
source to VGD = VGS – VDS at the drain.
drain

If the pinch-off voltage is 5 V, now we only need VDS = 3 V to pinch off the channel.

Beyond pinch off, ID is nearly saturated just as VGS = 0, but its magnitude is
obviously smaller as the thickness of the channel at A is smaller.
46
 ID (mA) VDS(sat) = VP

10 IDSS VGS = 0

5
IDS VGS = -2 V
VDS(sat) = VP+VGS VGS = -4 V
VGS = -5 V
0
0 4 8 12
VDS

In the presence of VGS, the pinch off occurs at VDS = VDS(sat),

V DS ( sat ) = V P + V GS

For VDS > VDS(Sat), V DS ( sat ) V P + V GS

IDS = = RAP depends on VGS.
R AP (V GS ) R AP (V GS )

If VGS = -VP (-5V), whole channel is closed. VGS(off). 47

IDS is relatively independent of VDS and is controlled by VGS. This control is only
possible if VDS > VDS(sat).

2
⎡ ⎛ V ⎞⎤
I DS = I DSS ⎢1 − ⎜ GS ⎟⎥
⎢⎣ ⎜⎝ VGS ( off ) ⎟⎠⎥⎦

Field effect: By changing VGS, varies the depletion layer and hence the resistance
of the channel.

48
JFET Amplifier

JFET transistor action is the control of IDS by VGS

The ac source-vac connected in serials with dc bias-VGG modulate the VGS up and down
around VGG. The variation of vgs converted into the variation of the drain current by
resistance RD and the current variation is not quite symmetric as that in the input signal.

The voltage across DS is VDS = VDD − I DS RD 49

 d RD =2000 Ω
VDD=18 V and

The peak-to-peak voltage amplification is:

ΔVDS vds ( pk − pk ) − 3 − (2.6 )

AV ( pk − pk ) = = = = −5.6
ΔVGS v gs ( pk − pk ) 0.5 − (− 0.5)

The negative sign represent the fact that the output and input voltages are out-of-
phase
h bby 180o.
50
 Mutual transconductance -gm: for the small signal about dc values, the variation δIDS
due to δVGS about the dc value.

g
dI DS δI DS i id is the change in the drain current
= ≈ = d
dVGS δVGS v gs
m
with its dc value and called output
signal current.
2
⎡ ⎛ V ⎞⎤
I DS = I DSS ⎢1 − ⎜ GS ⎟⎥
⎢⎣ ⎜⎝ VGS ( off ) ⎟⎠⎥⎦

dI DS 2 I DSS ⎡ ⎛ V ⎞ ⎤ 2 [I DSS I DS ]1 / 2
gm = =− ⎢1 − ⎜⎜ GS ⎟⎥ =
⎟⎥
dV GS V GS ( off ) ⎢⎣ ⎝ V GS ( off ) ⎠⎦ V GS ( off )

The small-signal
small signal voltage amplification vds = − RD id ; id = g m v gs
g

g
vds − RD id − RD ( m v gs )
AV = = = =− m RD
v gs v gs v gs
51
Metal-oxide-semiconductor field effect transistor (MOSFET)

1. Field effect and inversion

x
Fixed metal ions

Metal
+Q
(a) V C E
-Q
Metal

Charge density
Mobile electrons

Two metal pplates. Voltage g is applied,

pp , charges
g +QQ and –Q
Q appear
pp on the pplates and
there is an electric field.

In the top plate E displaces electrons from surface into the bulk to expose
positively charged ions to form +Q

In the lower plate E displaces electrons from bulk into the surface to form -Q

Due to metal has more than enough electrons on surface, electrical field does not
penetrate into the metal and terminates at the metal surface.
52
 x

Metal
+Q
(b) V
E W
Depletion -Q
region

Fixed acceptors Charge density

p-type semiconductor

If the lower plate is a p-type semiconductor, it is apparent that we do not sufficient

number of negative acceptors at the surface to generate the charge –Q.

Therefore, we must expose negative acceptors in the bilk, which means that the
fi ld mustt penetrate
field t t into
i t the
th semiconductor.
i d t HolesH l ini the
th surface
f region
i become
b
repelled toward the bulk and thereby expose more negative acceptors.

The penetrating field into the semiconductor drifts away most of the holes in this
region, called depletion region.

53
 x

(c)
IInversion
i +Q
V > Vth layer
E Wn
Wa -Q

Conduction
electron Depletion
D l ti Charge density
region

Voltage increases further, -Q also increases, as the field becomes stronger and
penetrates more into the semiconductor. Eventually, it is more difficult to make up
–Q by simply extending the depletion layer width Wa into the bulk.

If V > Vth (threshold voltage),

voltage) it becomes more favorable to attract conduction
electrons into the depletion layer and form a thin layer of width Wn near the surface.
This layer is called inversion layer.

Further increase in the voltage does not change Wa but simply increase Wn.

These electrons are from both minority carriers and breaking of Si-Si bonds.

54
2. Enhancement MOSFET

A metal-insulator-semi
t li l t i structure
t t i formed
is f d between
b t a p-type
t Si andd an Al electrode
l t d
(gate). The insulator is SiO2.

There two n+ doped

p regions
g at the ends of the MOS device that form the source ((S))
and drain (D).

Without voltage, S to D is an npn structure that is always reverse biased. If the

source a negative VDS will forward bias the n+p
substrate is connected to the source,
junction between the drain and the substrate. As the MOSFET device is not
normally used with a negative VDS, we will not consider this polarity. 55
 VDS
VGS = 3 V ID= 0 ID
Vth = 4 V
S G D (a) Below threshold V <V
GS th
VDS and V >0
DS

+ + Depletion
n n
p region

VGS < Vth, a depletion region is formed under the gate. No current from S to D for
any positive VDS.
VDS = 0.5 V

VGS = 8 V ID = 1 mA ID
Vth = 4 V
S G D
A n B
V DS (b) Above threshold V >V
GS th
+ + and V <V
DS DS(sat)
n n n-channel is the
p inversion layer

VGS > Vth, an n-channel inversion layer is formed under the gate, linking the two n+
regions. If a small VDS is applied, a drain current flows,
V DS
ID = 56
R n − ch
 VDS = 0.5 V

VGS = 8 V ID = 1 mA ID
Vth = 4 V
S G D
A n B
V DS (b) Above threshold V >V
GS th
+ + and V <V
DS DS(sat)
n n n-channel is the
p inversion layer

The voltage variation along the channel is from zero at A (source end) to VDS at B
(drain end).

The gate to the n-channel

n channel voltage is then VGS at A and VGD = VGS – VDS at B.
B A
depends only on VGS.

VDS ↑, the voltage at B (VGD) ↓, and causes less inversion. This means that the
channel gets narrower from A to B and its resistance Rn-ch increases with VDS.

57
 VDS = 4V

VGS = 8 V ID = 4.2
4 2 mA
A
ID
D (c) Above threshold V >V
S G IDS GS th

A and saturation, V =V
P DS DS(sat)

VDS
+ + VDS(sat)
n n
p

Eventually when the gate to n-channel voltage at B decreases to just below Vth, the
inversion layer at B disappears and a depletion layer is exposed. The n-channel
becomes pinched off at this point P. This occurs when VDS = VDS(sat), satisfying,

V GD = V GS − V DS ( sat ) = V th

When the driftingg electrons in the n-channel reach P,, the large
g E within the narrow
depletion layer at P sweeps the electrons across into the n+ drain. The current is
limited by the supply of electrons from the n-channel to the depletion layer at P,
which means that it is limited by the effective resistance of the n-channel between
A and P.
P

58
 V D S = 10 V

I D = 4.5 mA
V GS = 8 V
ID

S G D
A

VDS
+ P' +
n n
p

When VDS exceeds VDS(sat), the additional VDS drops mainly across the highly
resistive
i i depletion
d l i layer
l at P,
P which
hi h extends
d slightly
li h l to P’ towardd A.
A At
A P’,
P’ the
h gate
to channel voltage must still be just Vth as this is the voltage required to just pinch
off the channel.

The resistance of the channel from A to P’ does not change significantly with
increasing VDS, which means that the drain current is then nearly saturated at IDS,

V DS ( sat )
I D ≈ I DS ≈
R AP ' n − ch

59
 (b) Dependence of ID on VGS
at a given VDS (> VDS(sat))

As VDS(sat) depends on VGS, so does IDS. There is a slight increase in IDS with VDS
beyond VDS(sat).

The term “enhancement” refers to the fact that a gate voltage exceeding Vth is
required to enhance a conducting channel between the source and drain.

60
 Experimental relationship between IDS and VGS is:

I DS = K (VGS − Vth )
2

Zμ e ε
For ideal MOSFET, K can be expressed as: K=
2Ltox

where μe is the electron drift mobility in the channel, L and Z are the length and
width of the gate controlling the channel, and ε and tox are the permittivity (εrεo) and
thickness of the oxide insulation under the gate

I DS = K (V GS − V th ) (1 + λ V DS )
2

Where λ is a constant that is typically 0.01 V-1.

61
 Light emitting diodes (LED)

Light emitting diodes (LED) are simple optoelectronic devices that have applications in
display devices such as tail-lights in automobiles, traffic lights and also for optical
communications.

(1) Fundamentals of the operation of the light emitting diodes

62
The LED is a p-n junction that operates under forward bias. Electrons are injected
from n-doped
n doped material into p-doped
p doped material and holes,
holes vice versa,
versa move in the
opposite direction. Electrons injected into p-type semiconductor are minority carriers
there and would recombine with the holes either in the space charge region or beyond
the space charge region. As the result, if the recombination is radiative a light quantum
(photon) is emitted. The same happens with hole that penetrate into n-type material
where they are minority carrier. The emitted light quanta have to escape from the
device without absorption, therefore one of the electrodes has to be made transparent.

(2) Typical setup of LED

63
(3) Efficiency of the device

Efficienc of the device

Efficiency de ice is produced
prod ced by
b the combination of several
se eral factors

a. Internal efficiency of the radiative process

This component of the efficiency depends on the paraeters of the materials and the
quality of the interface. It is preferable to use direct bandgap materials with low
radiative lifetime. Non-radiative lifetime has to be made as big as possible. It depends
significantly on the concentration of the defects in the interface region.
region

b. Injection efficiency

Since a photon emitted deep in the buried layers of the device has larger probability to
be absorbed in the semiconductor it is desirable to concentrate emission closer to the
t
transparentt electrode.
l t d Usually
U ll the
th transparent
t t electrode
l t d is i hole
h l injecting.
i j ti Th f
Therefore, it
is desirable to have high efficiency of the electron component of the current. The
injection efficiency is defined as the ratio of the electron component of the current
to the total current through
g the pp-n jjunction.

64
In order to make the injection efficiency as large as possible the concentration of
donors in the nn-type
type semiconductor should be larger than the concentration of acceptor
in the p-type semiconductor. The choice of the acceptor concentration in the p-type
half of the device should be optimized taking into account the fact that decreasing the
p-type doping helps to make the electron injection larger, but at the same time it
i
increases the
h radiative
di i lifetime.
lif i

c. External efficiency

The external efficiency of an LED quantifies the efficiency of conversion of electric

energy into an emitted external optical energy. The emitted photons have to leave the
device and therefore the optics of the device should be designed with great care.
Possible mechanisms of photon losses include (a) reabsorption (b) reflection at the
interfaces and (c) Emission at such angle to the surface that the light undergoes total
internal reflection.

(4) Materials used for the LEDs

Efficient LEDs require high radiative recombination rate as compared to the non-
ad at ve recombination.
radiative eco b at o . Highly
g y eefficient
c e t dev
devices
ces use tthee ddirect
ect babandgap
dgap
semiconductors. Another important requirement for the material is the availability of
the suitable substrate. 65
Materials with direct bandgap Suitable Emission remarks
substrate energy
gy
range (eV)
AlxGa1-xAs GaAs 1.424 to 1.9
Eg = 1.424 + 1.247x; x < 0.45
GaP with doping GaP 2.21 (i) GaP: N (565 nm-yellow-
green)
(ii) GaP:Zn, O (640nm-red)
GaAs
G A 1-xPx I P
InP 11.424
424 to (i) GaAs0.6P0.4
G A 0 6P0 4 (650nm-
(650
Eg = 1.424 + 1.150x + 0.176x2; 1.977 red) (ii) GaAs0.35P0.65: N
x < 0.45 (620nm-orange) (III)
GaAs0.15P0.85: N (590nm:
yellow
ll
In1-xGaxAsyP1-y, x = 0.47 InP 0.8 to 1.35 Use for communication
Eg = 1.35 – 0.72y + 0.12 y2 for all y. applications

In1-xGaxN 13% lattice 2.07 to 3.4 Latest technology for blue

Eg = x2 + 0.33x + 2.07 for all x matched with light emission (displays,
Sapphire memories).

66
(5) Heterojunction high-intensity LEDs

Homojunction- A pn junction between two same bandgap semiconductors.

Heterojunction- A pn junction between two different bandgap semiconductors.

Double heterostructure LED: increaseing the

intensity of the output light

(a) A double heterostructure diode has two

junctions which are between two different
bandgap semiconductors (GaAs and AlGaAs).
(b) A simplified energy band diagram with
exaggerated features. EF must be uniform. (c)
Forward biased simplified energy band
diagram (d) Forward biased LED
diagram. LED. Schematic
illustration of photons escaping reabsorption in
the AlGaAs layer and being emitted from the
device.

67
(6) LED characteristics

The energy of emitted photons from an LED has a distribution and is not simply equal
to the bandgap energy.

The relative light intensity versus photon energy or wavelength is an important

characteristics of LED.
The linewidth of the output spectrum Δν orΔλ is defined as the width between half-
intensity point of the spectrum.
spectrum
The output spectrum from an LED depends not only on the semiconductor material but
68
also on the structure of the pn-junction diode, including the dopant concentration levels.
Solar cells

pn junction with a very narrow and more

heavily doped n-region

The electrodes attached to the n-side must

allow illumination to enter the device and at
same time result in a small series resistance.

An open circuit voltage-photovoltaic voltage

develops between the terminals of the device
due to the movement of EHPs
photogenerated..

Electron diffusion length in Si is longer than the

h l diffusion
hole diff i length.
l h

Open circuit → zero net current→ two opposite

currents
cu e ts , one
o e iss due to the
t e photogenerated
p otoge e ated EHPs,
s,
the other is due to the photovoltaic voltage
(injection of minority carriers-forward bias) 69
photocurrent

Photogenerated carriers within the volume Lh

+ W + Le give rise to a photocurrent Iph if the
terminals of the device are shorted.

Efficiency estimation of Si bandgap 1.1

Si-bandgap eV (E=hc/λ) wavelength 1.1μm
1 1 eV-(E=hc/ 1 1μm
crystalline Si

High energy photons become

Wavelength greater Anti-reflection Device
absorbed near the crystal
than 1.1 μm is coating is not itself
surface-being lost by
wasted. (25% for perfect, (80-90%
recombination in surface
sunlight) is collected)
region(more
i ( defects)
d f ) -40%
40%
Upper limit of the solar cell using single crystal of Si is about 24-26%. 70
p n Isc = −Iph = −KI
Photocurrent generated by light Light intensity

Constant that depends on the particular device

V due to the pphotocurrent passing

p g through
g R.

Forward bias, reducing the built-in potential and leading to the

minority
i it carriers
i injection,
i j ti Id
⎡ ⎛ eV ⎞ ⎤
I d = I o ⎢exp⎜⎜ ⎟⎟ − 1⎥
⎣ ⎝ ηkT ⎠ ⎦
where Io is the reverse saturation current and η is the ideality factor: 1 - 2

⎡ ⎛ eV ⎞ ⎤
Solar cell I-V I = − I ph + I o ⎢exp⎜⎜ ⎟⎟ − 1⎥
⎣ ⎝ ηkT ⎠ ⎦
 X
Applying external bias
A

Typical I-V characteristics of a Si solar cell.

The short circuit current is Iph and the open
circuit voltage is VOC.
 V
I =−
R

⎡ ⎛ eV ⎞ ⎤
I = − I phh + I o ⎢exp⎜⎜ ⎟⎟ − 1⎥
⎣ ⎝ ηkT ⎠ ⎦

By solving the two equation simultaneously, the actual current I’ and V’ in

the circuit can be obtained.

73
Load line construction method can easily find the I’ and V’.

V I-V characteristics in this equation is a straight line with a

I =− negative
g slope
p -1/R, called load line.
R

Point P satisfy both equations and the therefore represent the operation
pointt oof tthee ccircuit.
po cu t.
Fill factor-FF

The power delivered to the load is Pout=I’V’. The maximum delivered power can be
obtained by changing the R or the intensity of illumination. Where I’=Im and V’=Vm

I mVm
FF =
I scVoc
The FF is a measure of the closeness of the solar cell I-V curve to the rectangular
shape
h ((the
h id
ideall shape).
h )

From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)