COMMUNICATIONS 2 LABORATORY

Cyclic Redundancy Check (CRC-16 )

Project Documentation



Name
Section





Engr.
I N S T R U C T O R

I NTRODUCTI ON


The cyclic redundancy check, or CRC, is a technique for detecting errors in
digital data, but not for making corrections when errors are detected. It is used
primarily in data transmission. A sending device applies a 16- or 32-bit polynomial
to a block of data that is to be transmitted and appends the resulting cyclic
redundancy code (CRC) to the block. The receiving end applies the same
polynomial to the data and compares its result with the result appended by the
sender. If they agree, the data has been received successfully. If not, the sender can
be notified to resend the block of data.
The ITU-TS (CCITT) has a standard for a 16-bit polynomial to be used to
obtain the cyclic redundancy code (CRC) that is appended. IBM's Synchronous
Data Link Control and other protocols use CRC-16, another 16-bit polynomial. A
16-bit cyclic redundancy code detects all single and double-bit errors and ensures
detection of 99.998% of all possible errors. This level of detection assurance is
considered sufficient for data transmission blocks of 4 kilobytes or less. For larger
transmissions, a 32-bit CRC is used. The Ethernet and token ring local area
network protocols both used a 32-bit CRC.









CI RCUI T OPERATI ON
The circuit has a CRC polynomial degree of 16 as indicated in the equation:
x
16
+ x
15
+ x
5
+ 1. Below is the block diagram of the circuit:

The circuit would have three exclusive-OR (XOR) gates as it is indicated by
the number of plus sign on the CRC polynomial and four 4-Bit shift register as
indicated by CRC polynomial degree. The input data would be one of the inputs of
the XOR gate along with the output of the 16
th
stage. The output of that XOR gate
would be fed back to the 1
st
stage. The stages woud be the respective parallel input
and outputs of the shift register.
For the shift registers to work, a circuit of 555-timer in astable operation is
needed to serve as the ICs clock pulse. The input for the circuit would be using a
push button, one for high input and one for low. The output will then be dependent
on the calculated CRC. To input a high, the high push button must be pressed,
while for the low input, but the high and the low push buttons must be pressed at
the same time. In the circuit made, the operation can be paused by simply releasing
the high push button. Another push button is also presented which has a putpose of
reseting the operation.
The outputs of the shift registers can be determined because of the existence
of LED indicators. With the LED lit on, the signal is high, and signal is low when
it is off. An LED indicator is also placed on the timers output to serve as the guide
for the proper timing.














LI ST OF MATERI ALS
4-Bit Bidirectional Universal Shift Register IC (SN74LS194)
Quad 2-Input Exclusive OR Gate IC (SN74LS86)
555 Timer
7805 IC Regulator
LEDs ( Red & Green )
470 Resistor
100K Resistor
100nF Capacitor
10uF Capacitor
9V Battery and Battery Clip
2-pin Connectors
Solid Wires
Normally Open Push buttons
Acrylic Sheets







SCHEMATI C DI AGRAM




























PCB LAYOUT




































ACTUAL PROTOTYPE