Application Notes

Dynamic Voltage Drop Analysis: VectorLess Mode

1. List of all the Redhawk variables and input used during VectorLess analysis:

STA (instance slew, switching window information): The time at which an instance
may switch during a dynamic simulation is determined by its switching timing window as
given in the timing file provided to RedHawk from a STA data-base.

Cell Type (functionality): The property of the cell determines the type of switching it will
undergo during the dynamic simulation. For example, in a combinational cell like a NAND
or an inverter, primary power draw happens when the output switches from high to low or
vice-versa. For a sequential cell like a flop however, considerable power consumption
takes place from the clock logic even if the output does not change and has to be
considered.

Simulation Time: The time duration for dynamic simulation is determined by the GSR
keyword: DYNAMIC_SIMULATION_TIME. This can be specified as a single value (the
default starting time is 0) or as an interval from starting time to ending time.

Simulation Time Step: The time step for the transient simulation is given by the GSR
keyword: DYNAMIC_TIME_STEP. Typical values range from 10ps (default) to 30ps.

Dynamic initialization time: The start of the dynamic simulation is based on the
assumption that all decoupling capacitances present in the design are fully charged at the
start of the simulation and the current drawn from the pads start from the static leakage
current drawn by all the instances in the design.
However, this is not a realistic situation in most cases, so the GSR keyword:
DYNAMIC_PRESIM_TIME -1, is used to start the simulation prior to time t=0 so that by
the time the simulation reaches, time t=0, the decoupling capacitor voltages and the
inductor currents may reach more accurate states, determined by the switching
happening till then.

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RedHawk Dynamic Voltage Drop Analysis: Vectorless Mode

Cell Current: Spice based characterization is performed to create a library (APL) of

current profiles for cells in the library for different voltage, slew, and output load
conditions.

Decoupling Capacitance, ESR, and leakage: Spice based characterization is

performed to estimate output state specific intrinsic decoupling capacitance, effective
series resistance, and the leakage current for every cell present in the design.

Toggle rate: The toggle rate specified for an instance using either of the GSR keywords
BLOCK_TOGGLE_RATE or INSTANCE_TOGGLE_RATE drives the probability of an
instance switching during a VectorLess based dynamic analysis. When the toggle rate is
set to 0, the probability of that instance switching is low and similarly the probability is
high when the toggle rate is set to 1. If VCD file is available, it can be used to guide the
Vectorless engine to create the switching scenario through the GSR keyword, VCD_FILE.
Toggle probabilities from PIOs or register outputs can also be used to drive Vectorless
analysis.

GSC constraints: Users can explicitly control the switching mode (such as TOGGLE,
HIGH, LOW, STANDBY, OFF) of blocks, instances or cells using the keyword:
GSC_FILE. This guarantees that the instance or cell will remain in the switching mode
specified during the dynamic simulation.

Instance power: The switching of instances can also be controlled by specifying a low or
zero power for instances whose switching is not required in the VectorLess analysis. This
can be achieved through the use of the keywords: BLOCK_POWER_FOR_SCALING or
INSTANCE_POWER_FILE. By specifying a high power (relative to the power of the other
instances present in the design), the probability of switching for an instance is raised.

PAR (Peak to Average Ratio): This keyword determines the target power envelope in a
VectorLess based dynamic simulation.
As seen in the figure below, global average power (also called static average power) is
calculated based on current drawn over multiple cycles in a design. Typically in RedHawk,
this power is calculated based on VCD based toggle rates or a global toggle rate. By
using the GSR keyword, PAR, users can set a target for the power consumption during
the dynamic simulation as a multiple of this global average power.

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RedHawk Dynamic Voltage Drop Analysis: Vectorless Mode

PAR = power during dynamic simulation cycle (averaged over the simulation frame size
as defined by the GSR keyword DYNAMIC_FRAME_SIZE with default frame being given
by the cycle time defined in the GSR using the keyword FREQUENCY) static average
power.

Peak current

Current envelope
Average power
over multiple
cycles

n
T

(n+1)
T

Average
power in
peak cycle

(n+2)
T

2. A description of the VectorLess flow: explain exactly where in the flow the variables defined
above are used and how?
The VectorLess algorithm is a statistical method used to find realistic worst-case power
scenarios for both block level and full-chip power grid analysis. This technique can be
used to explore design weaknesses from the start of the design cycle and to perform
sensitivity analysis for different switching scenarios.
The probability of switching for any cell is arrived at based on the cell functionality, the
propagation of logic state, toggle rate for the instance, timing window overlap, the activity
at the registers, etc. Cells with higher toggle rate like elements of the clock network will
switch every cycle unless gated off.

By using PAR (peak to average power ratio) setting, the power target for the simulation
cycle for the dynamic analysis is set as a multiple of the average power dissipation
(which is calculated over multiple cycles). A switching scenario based on the instance
switching probability is then arrived at statistically to create a current envelope whose
power during the simulation cycle meets this specified target.

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RedHawk Dynamic Voltage Drop Analysis: Vectorless Mode

The likelihood of an instance to switch can also be controlled through the GSR keywords
that control the assignment of the toggle rates and control specification of power.
In addition, the algorithm finds instances in areas of structural grid-weakness and timing
critical instances to bias the switching and highlight the design weaknesses when other
Vectorless analysis modes are activated.
The switching direction of every instance depends on the likelihood of the instance to
switch and its functionality. For a multiple cycle VectorLess analysis, the switching
direction so determined for the first cycle is negated in the second. The STA timing data
provides the switching time for these instances based on the timing windows defined for
every instance.
The current consumed by each cell during the simulation is obtained from APL library. As
the voltage across the VDD and GND node for an instance changes, the appropriate
current profile is considered through interpolation.
The decoupling capacitance provided for each cell depends on the state of its output. For
an instance whose output is at state 1 and it is not switching, its output load acts as a
decoupling capacitance to the P/G network. The intrinsic decap used for every instance
depends on the value of the characterized state dependent intrinsic decap and the state
of the output for that instance.
The VectorLess algorithm is appropriate for design weakness exploration and for
sensitivity study. It is ideally suited for dynamic analysis at the full-chip level or even for
block level analysis in the absence of proper VCD stimulus. It can be used in conjunction
with VCD stimulus wherein the VCD data drives the switching scenarios generation by
the Vectorless algorithm.

3. How do you explain the result and fix the hot-spots from a VectorLess dynamic flow?
RedHawk provides several capabilities to understand the switching during the dynamic
simulation. Listed below are the TCL commands used for this purpose.
analyze condition config dump movie plot print select
One can do help in the RedHawk TCL interface to find details on each of these
commands. Please see the manual for more details.
RedHawk has automatic FAO (fix and optimize) features which can be used to repair the
hot-spots by fixing the power grid, by decap optimization and cell-swapping. Listed below
are the TCL commands used for this purpose.
cell decap eco generate mesh route

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