COMPUTER ORGANIZATION

&
ARCHITECTURE
For

Computer Science
&
Information Technology
By

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Syllabus

Computer Organization

Syllabus for
Computer Organization and Architecture
Machine instructions and addressing modes, ALU and data-path, CPU control design, Memory
interface, I/O interface (Interrupt and DMA mode), Instruction pipelining, Cache and main
memory, Secondary storage.

Analysis of GATE Papers

(Computer Organization and Architecture)
Year

Percentage of marks

2013

11.00

2012

6.00

2011

7.00

2010

9.00

2009

6.66

2008

16.00

2007

9.33

2006

9.33

2005

14.67

2004

10.00

2003

5.33

Overall Percentage

9.48%

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Contents

Computer Organization

CONTENTS
#1.

#2.

#3.

#4.

Chapter
Introduction

Page No.
1 28

14
4 12
12 13
13 19
19 22
23
24 26
27
27 28

Computer Design
Binary Data Representation
CPU Design
Binary Adder
Arithmetic Logic Unit
Assignment 1
Assignment 2
Answer Keys
Explanations

Memory

29 60

29 30
31 36
36 42
42 45
45 47
48 51
51 53
54
54 60

Memory Parameter
Main Memory
Cache Memory
Virtual Memory
Solved Examples
Assignment 1
Assignment 2
Answer Keys
Explanations

Pipelining and Vector Processing

61 82

61 65
65 74
74
75 77
77 78
79
79 82

Parallel Processing
Pipelining
Solved Example
Assignment 1
Assignment 2
Answer Keys
Explanations

Instruction Set and Addressing Mode

83 99

83
83 86
86 -87

Introduction
Instruction format
Addressing Modes

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Contents

#5.

#6.

Computer Organization

CISC and RISC

Solved Example
Assignment 1
Assignment 2
Answer Keys
Explanations

87 88
89
90 93
93 94
95
95 99

CPU Operation and Design

100 - 110

100 103
103 104
104 107
108 109
110
110

CPU Operations
Data Path and Control Path
Machine Cycle
Assignment
Answer Keys
Explanations

I/O Interface (Interrupt and DMA Mode)

111 131

111
111
111 112
112 116
116 118
119 124
125 126
126 128
129
129 131

Introduction
Difference between the Computer and Peripheral Devices
I/O Bus and Interface Modules
Modes of Data Transfer
I/O Communication Technique
Direct Momory Access (DMA)
Assignment 1
Assignment 2
Answer Keys
Explanations

#7. Control Unit Design

Von-Neumann Architecture
Von-Neumann Bottleneck
Harvard Architecture
Control Unit
Solved Examples
Assignment
Answer Keys
Explanations

132 141
132 133
133
134
134 137
137 138
139 140
141

141

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Contents

Module Test

Test Questions
Answer Keys
Explanations

Reference Books

Computer Organization

142 153
142 148
149
149 153

154

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Chapter-1

Computer Organization

CHAPTER 1
Introduction
Computer Architecture
Computer architecture deals with the structure and behavior of the computer system. It includes
the information formats, the instruction set and the hardware units that implement the
instructions along with the techniques for addressing memory.
Computer Organization
Computer organization deals with the way the various hardware components operate and the
way they are connected together to form the computer system. It also deals with the units of the
computer that receive information from external sources and send computed results to external
destinations.

Computer Design
Computer design is concerned with the hardware design of the computer. This aspect of
computer hardware is sometimes referred to as computer implementation. Figure 1.1 shows the
basic building blocks of a typical computer system.
MEMORY

ALU

CU

INPUT

OUTPUT
CPU

Fig. 1.1 Basic functional units of a computer

The basic blocks available in any digital computer are, Arithmetic Logic Unit (ALU), Control
Unit, Memory and Input/Output Unit.
Input Unit
It is a medium of communication between the user and the computer. With the help of input
unit only, it is possible to enter programs and data to the computer.
Examples
Keyboard, floppy disk drive, hard disk drive, mouse, Magnetic Ink Character Recognition
(MICR), Optical Character Recognition (OCR), paper tape reader, Magnetic tape reader,
Scanner etc.
Output Unit
It is a medium of communication between the computer and the user. With the help of
output unit only, it is possible to get results from the computer.
Example: Printers, Video Display Unit (VDU), Floppy disk drive, Hard disk drive, Magnetic
tape drive, punched cards, paper tape, plotter, digitizer etc.
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Memory
The memory unit is responsible for storing the user programs and data. The digital computer
memory unit mainly consists of two types of memories: Read Only Memory (ROM) and Read
Write Memory (R/WM) or Random Access Memory (RAM).
ROM
ROM is used to store permanent programs or system programs. It does not have write
capability.
Types: PROM, EPROM, EEPROM
RAM
It is also called user memory because the user programs or application programs are
stored in this memory. The CPU is able to write or read information into or from this
type of memory.
Types: static, dynamic, scratch pad etc.
Central Processing Unit (CPU)
The ALU and Control Unit together are called CPU. It is the heart of any digital computer.
ALU (Arithmetic Logic Unit)
The data processing part of CPU is responsible for executing arithmetic and logical instructions
on various operand types including fixed point and floating point numbers.
Various circuits used to execute data processing instructions are usually combined in a single
circuit called an arithmetic logic unit (ALU). The complexity of an ALU is determined by the way
in which its arithmetic instructions are realized. Simple ALUs that perform fixed point addition
and subtraction as well as word based logical operations, can be realized by combinational
circuits. Much more extensive data processing and control logic necessary to implement is
floating point arithmetic in hardware.
Example
For finding the sum of a series
, how will you use
an ALU without a multiplier unit but with an adder and barrel shifter? Barrel shifter is a shifter
that does
shift at an instance.
Solution
Left shift by 7 means multiplication by 128,6 means multiplication by 64,5 means multiplication
by 3
and means multiplication by . Hence the shift operations will be faster for
computing . Using the barrel shifter seven times for shifting by
3
.. we find and store left
shifted values of in a register and add these.
Two Types of ALUs
1.

Combinational ALUs
The simple ALU combine the functions of s complement adder-subtracter with those of a
circuit that generates word based logic functions of the form f(x, y).
For example AND XOR and NOT. They can thus implement most of a CPUs fixed point data
processing instructions.

2.

Sequential ALUs
Both multiplication and division can be implemented by combinational logic. It is generally
impractical to merge these operations with addition and subtraction into a single,
combinational ALU.

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Chapter-1

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The combinational multipliers and dividers are costly in terms of hardware. They are also
much slower than addition and subtraction.
An n-bit combinational multiplier or divider is typically composed of n or more levels of
add-subtract logic making multiplication and division at least n times slower than
addition (or) subtraction, where addition and subtraction each take one clock cycle, while
multiplication and division are multicycle operations.
Example
How many 16-bit ALU slices can be used for designing a 64-bit ALU?
Solution
Four slices will be needed in parallel if ALU 64-bits operations are to take nearly the same time
as 16-bit slice, and four slices will be needed in series if ALU 64- bits operations are to take
nearly four times of 16-bit slice.
Interconnection of basic of blocks
In order to form an operational system individual components or parts of computer that we
have discussed need to be connected in some organized way for this purpose bus is introduced
which is defined as a group of lines that serves as a connecting path for several devices. These
lines carry data, address and control signals.
Figure 1.2 shows a exemplanary interconnection using single bus structure

Input

Output

Memory

CPU

Fig1.2. Single-bus Structure

Since, this bus can be used only for single transfer at a time Multiple buses are introduced so as
to achieve more concurrency in operations so that two or more transfers can be carried out at
the same time. Hereby, increasing performance but at an increased cost.
Control Unit
The control unit (CU) is the heart of the CPU. Every instruction CPU supports has to be decided
by the CU and executed appropriately. Every instruction consists of a sequence of micro
instructions that carries out that instruction the CU controls the elements inside the CPU the
interface to the external data rate.
Following are the basic tasks of the control unit
1.
For each instruction the CU causes the CPU to go through a sequence of control steps:
2.
In each control step the CU issues a set of signal which caused the corresponding
operation to be executed.
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Chapter-1

3.

Computer Organization

The signals to be generated by CU depends upon the actual step to be executed, the
condition and states of flag register of the processor, the actual instruction to be executed
and any external signals received on the system bus (i.e., interrupt signals)
IR

Common signals
internal to the CPU
Flags

Control Unit (CU)

Common signals
internal on system bus
Signals from system bus

Clock

Binary data representation

In digital computer, integers are represented as binary numbers of fixed length. A binary
number of length x is an ordered sequence
(x
x
x
...x x )
Of binary digits where each digit x (also known as a bit)
Can assume one of the values 0 or 1
The above sequence of x digits represents the integer value
X

...x

x .

Since operands and results in an arithmetic unit are started in resisters of a fixed length, there is
a finite number of distances that can be represented with in an arithmetic unit. Let x
and
) is the range
x
denote the smallest and largest representable value. We say that (x
x
of the number
A sequence of n digits in a register does not necessarily have to represent an integer. We can get
such a sequence to represent a mixed number that has a fractional part as well as an integral
part. This is done by portioning the n digits into two series; k digits in integral part and in digits
in the fractional part, satisfying k +m = n
(x

..

...x x
x x

..

...x )

The above sequence of n digits represents the value

X

..

...x

..

...x

The radix point is now stored in the register but is understood to be in a fixed position between
k most significant digits and the m least significant digits. For this reason we call such
representation as fixed-point representation

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Chapter-1

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Representation of negative numbers

For fixed point numbers, we have to determine the way negative numbers are represented. Two
different terms are commonly used:
1.
2.

Sign and magnitude representation

Which is also called the signed-magnitude method
Complement representation
Which comprises two alternatives

Signed magnitude
In this representation the first digit is the sign digit and the remaining (
) digits represent
magnitude. In binary case sign bit is normally selected to be o for +ve numbers and 1 for +ve
ones.
Let the (
) digits representing the magnitude be partitioned into (
) and m digits in the
integral and fractional part, respectively. The largest representable number is then,
(
)
] and the range of ve number is (
Thus the range of +ve numbers is [
We therefore have two representations of zero, one +ve and ve.

).

A major disadvantage of the signed-magnitude representation is that the operation to be

performed may depend on the signed of the operands. This is avoided in the complement
representation methods
Complement representation
There are two alternatives
1. Radio complement (also called s complement)
2. Diminished radix complement (also called s complement)
In both complement method, a +ve number is represented in the same way as in the signal
), where R is a
magnitude method, where a negative number is represented by (
constant. Such a representation satisfies the basis identify
( )
One of the major advantages of a complement method is that no decisions have to be made
before executing an addition or substation
(
)
(
)
If
the ve result (
) is already in the same complement form. However if
, the
(
)
correct result should be
, while
(
). The addition term R must be
discarded, and the value of R should be selected to simplify or completely eliminate this
correction step.
In case of s complement the value of R is

and for complement the value of R is

The range of numbers in the twos complement for is

This range is slightly a symmetric as then is one more ve number than are +ve numbers, on the
hand these is a unique representation for 0.
The range of representable number in the ones complement system is symmetric
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